2010 2nd International Congress on Engineering Education, December 8-9, 2010, Kuala Lumpur, Malaysia
Incorporating VHDL in Teaching Combinational Logic Circuit Husna Zainol Abidin, Murizah Kassim, Kama Azura Othman, Mustaffa Samad Faculty of Electrical Engineering Universiti Teknologi MARA Shah Alam, Selangor, 40450 Malaysia
[email protected] knowledge and basic skill [1]. They also found that the teaching effect and efficiency can be enhanced through integrating of lecture materials, experiments content and raising student’s innovation spirit. In order to equip the students with current technology, Very High Speed Integrated Circuits Hardware Description Language (VHDL) is incorporated in this course. The main objective of introducing VHDL in this course is to enhance the understanding and skills of logic circuit design among the students where the VHDL tutorial and assessment are designed in such a way that would encourage the students to explore the tool themselves and to enhance their thinking and designing skill that are necessary for engineering graduates. Furthermore, this will ensure the students are aware and up-to-date with the technology used in the industry as early as in their first semester as outlined by the following Course Outcome (CO) and Program Outcome (PO) addressed by this course.
Abstract—Digital System Fundamentals is an elementary course offered by the Faculty of Electrical Engineering in Universiti Teknologi MARA (UiTM) for semester 1 undergraduate students of the Electrical Engineering programs specializing in computer, electronics, communication and instrumentation. As this course is focusing more on designing circuit rather than only knowing the theoretical part of the circuit, students are introduced with a tool which is widely used in the industry known as Very High Speed Integrated Circuits Hardware Description Language or better known as VHDL. This is also to ensure that these students are already exposed and equipped with updated technology and skills that would meet the industry requirement as well as for accreditation purposes. This paper outlines how the VHDL is incorporated in teaching combinational logic circuit of this course. Keywords—digital; VHDL; combinational logic circuit
I. INTRODUCTION Teaching electrical engineering subject in traditional way is no longer acceptable. With the accreditation requirement which emphasize on student centered learning and updated skill, the method of teaching should be integrated with a tool which are widely used in the industry. Furthermore, the teaching and learning process should be updated with the education trend in the world and should meet the market requirement. Faculty of Electrical Engineering (FEE) in Universiti Teknologi MARA (UiTM) introduces a course called Digital System Fundamentals with course code ECE421 to all the undergraduate students during their first semester of study. This course is offered compulsory to four different degree programs runs by the Faculty which are computer engineering, communication engineering, electronics engineering and instrumentation engineering. The syllabus content ranging from topics covering number systems, logic gates, as well as analysis and designing of combinational logic circuits and sequential circuits that should be taught within 14 weeks. ECE421 has expectation that the students will be able to implement their theoretical knowledge into practice to suit the current trend in engineering education whereby engineering graduates must be equipped with necessary skills accepted by the industries. Previous research believe that the educators should stand out to train the students’ ability of skilled digital circuits design combining with the professional knowledge, besides require the elementary
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CO3 - Utilize simulation tools for the analysis and design of combinational and sequential logic circuits. PO6 - Ability to use the techniques, skills, and modern engineering tools necessary for engineering practices.
This paper will briefly describe the method used in integrating VHDL in teaching and learning of combinational logic circuit in Digital System Fundamental course for semester 1 electrical engineering students. Next section will elaborate on the combinational logic circuit and VHDL. Section 3 will describe the VHDL teaching efforts and the assessment that have been carried out while Section 4 will outline feedback responds collected from survey distributed to the students and also based on their VHDL assignment scores. Finally, Section 5 will conclude the whole paper.
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II.
COMBINATIONAL LOGIC CIRCUIT AND VHDL
exercises guided the students to write a complete Register Transfer Level (RTL) description for the gates’ entities, build the circuit in a structural VHDL description as illustrated in Figure 1. This first exercise exposed the students to write a complete Register Transfer Level (RTL) description for the entities MY_AND2 and MY_OR2 and build the circuit in a structural VHDL description of the top‐level entity AND_OR.
Combinational logic circuit is the basic concept for circuit design in digital system fundamental. Digital system fundamentals introduced the use of binary number 1 and 0. Applied inputs for the system is then defined the designed digital circuit. A combinational logic can be defined as a cluster of logic gates that generates a set of outputs for a set of defined inputs and the outputs change whenever there is a change in the inputs. For a unique combination of inputs there will be a unique output combination. These circuits are asynchronous in nature [2]. Undergraduates should be given more exercises of the VHDL language due to the difficulty in handling VHDL language abstraction [3]. Other than Xilinx, previous research has developed the use of VHDL by using the EDA tools. It is also one of the interfaces that clarify VHDL abstraction and aid student learning, while providing improved design automation and scale [4]. Evaluations showed that students’ achievement level has increased effectively with VHDL training as well as improvements in automation and design quality. Previous study also resulted in improving students’ understanding of digital systems design through the increased level of practical achievement and more effective preparation for related major digital system design projects by using VHDL. III.
Figure 1. Design AND-OR structure combinational logic circuit.
The second exercise taught the students to prove and verify the output by simulating the combinational logic circuits for a certain defined inputs. This exercise requires students to write a VHDL test bench for the sample of AND_OR module that have been designed in the first exercise. As part of the test bench, students would create a simple input stimulus by using both concurrent and sequential statements. Figure 2 and 3 show the schematic view of the test bench called AND_OR_TB for the concurrent and sequential circuit and finally the simulations results on the stimulus input.
VHDL EXERCISE AND PROJECT ASSESSMENT
The offered course incorporated VHDL in teaching combination logic circuit through hands on exercises and group assessment. A. VHDL in ECE421 Course VHDL is commonly used as a design-entry language for field-programmable gate arrays and applicationspecific integrated circuits in electronic design automation of digital circuits [5]. As this is a course for semester 1 students, the VHDL activities are only focusing on the topic of combinational logic circuit. The students are expected to familiarize themselves with the basic of VHDL syntax and the application in designing combinational logic circuit since VHDL will be used in other higher level courses. This paper presented the project approach as in [4] where VHDL is used to capture automation and design visualization and at the same time enhance students’ understanding and achievement level in VHDL programming, digital embedded system design techniques and implementation. B. Hands On Exercise The Xilinx Integrated Software Environment (ISE) is used for the design entry. Students are introduced with VHDL in one or two tutorial sessions where hands on exercises are carried out in the class to ensure that the students are familiar with Xilinx ISE Design simulator and synthesizer as well as the VHDL syntax. The
Figure 2. Concurrent and Sequential Statements
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A. Students’ Feedback At the end of the semester, students are asked to fill in a questionnaire related on their opinions and experiences with the VHDL activities in this course. 100% of students which consists of 56 students enrolled in the course responded. The survey consists of seven statements with a score from 1 to 5. Score 1 indicates that they are strongly disagree with the statement while score 5 indicates that they are strongly agree with the statement. The students’ feedback resulted that majority of the students satisfied with the introduction of VHDL to this course as tabulated in Table I. Based on the survey, 61% of the students can be considered enjoying using VHDL and 71% of the students felt that they have learnt a lot from VHDL. Only 51% of the students thought that the tutorials are helpful. Thus, the tutorials may be reviewed to be more descriptive as these students are in their first semester of university. 70% of the students found that they have enhanced their understanding in combinational logic circuit through their experience in utilizing VHDL in designing the circuit while 62% of them felt that the exercises on VHDL is insufficient. About half of the students were happy with their group assignment. As shown in Table I, 69% of all the responded students agreed that their resume will look more valuable with their experience of using VHDL while 31% decided to put their opinion as neutral. This verified that they belief VHDL will somehow benefit them in the job market besides having gain extra skill in logic design in addition to the theoretical aspect of the circuit. By examining at the students’ feedback, the introduction of VHDL in ECE421 course can be said to be positively accepted and enjoyed by the students.
Figure 3. Simulation Results
A group assignment is then assigned to the students for them to explore further the Xilinx ISE Design Tool and to have better understanding skill on VHDL design and programming. C. Group Assignment In this section a description of assignment sample is presented. The assignment that is due at the end of the semester is worth 10% from the total of 40% coursework mark. Students are divided into groups of four individuals where each group was assigned with combinational logic circuit devices to be simulated with VHDL as follows: • • • • •
GROUP 1: Full Adder GROUP 2: 2 bit Multiplier GROUP 3: 2 bit Comparator GROUP 4: 2-to-4 Decoder GROUP 5: 4 input Multiplexer
For the assigned circuit students must write a complete RTL description for the gates’ entities and build the circuit in a structural VHDL description of the top level entity. Project documentations report submitted by the students must include the followings: • • • • •
Constructed programs with complete successfully syntax checking. RTL schematic diagram for the circuit. Low Level Technology schematic diagram of the circuit. High Level Technology schematic diagram. Verification of simulation results with theoretical analysis of the combinational logic.
B. Assignment Score The group assignment assigned to the students worth 10% of their overall marks for the course. As illustrated in Figure 4, 5% score the full mark of the assignment, 40% of the students score 9, 20% obtained the score 8 and also for score 7, 9% score 6 marks and 6% score 5 marks. In overall, 85% of the students score marks between 7 to 10 that is considered very good, while 15% score marks in the range of 6 to 5. Thus, it can be concluded that the students are able to grab the concept of VHDL as all students got at least 5 marks. Hence, none of the students failed the assignment.
Students are assessed through their group assignment. The assessment is done in a group to encourage the students to work in a team and to train them the benefit of having discussion with fellow classmates. Hence, it will enhance their understanding on combinational logic circuit and VHDL as they might not be able to absorb the tutorial given within a short period of time. In the documentation report, students are expected to hand in a written explanation for their implementation or any modification reasoning their actions including all VHDL codes, simulation results (waveforms) and all batch files (or testbenches) that they have used for their simulations.
VHDL Assignment Score 45 40 35
Percent (%)
30 25 20 15 10
IV.
FEEDBACK AND RESULTS
5 0
A survey on the student’s feedback was distributed. Then the analysis on the surveys’ feedback and VHDL assignment scored is presented.
10
9
8
7
6
5
4
3
Score
Figure 4. VHDL Assignment Score
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V.
[2]
CONCLUSION
This paper described the used of VHDL in teaching combinational logic circuit for semester one undergraduate Electrical Engineering degree students. Students are exposed to VHDL syntax by using Xilinx ISE Design simulator and synthesizer in tutorial session before they are assessed through their VHDL group assignment. They will have the opportunity to explore the computer aided design tool independently by doing the assignment. Feedback survey shows that the introduction of VHDL in this course can be considered positively accepted by the students. The assignment scores with zero failures indicate that most of the students are able to familiar and use VHDL using the Xilinx ISE Design simulator. It is also envisaged that the students will acquire updated skill which would be able to meet the market requirement as well as to fulfill the accreditation necessity.
[3] [4]
[5] [6]
[7]
[8] [9]
P. Radhakrishnan," An Insight into Sequential Logic Circuits", ASIC-Core Development Toshiba,1999. J. Armstrong. "A Multilevel Approach to Teaching Hardware Description Languages," MSE, vol. 00, p.0005, 1997. F. Morgan, P. Rocke, and M. O' Halloran, “Applied VHDL Training Methodology, EDA Framework and Hardware Implementation Platform”, International Conference on Reconfigurable Computing and FPGAs, 2005. ReConFig 2005, pp. 8 -19. “Introduction to VHDL, Lab Workbook,” Xilinx Education Services, Xilinx Inc. 2008. T. Weng, Y. Zhu and C-K, Cheng, “Digital Design and Programmable Logic Boards: Do Students Actually Learn More?” 38th Annual Frontiers in Education Conference, 2008, FIE 2008, pp. S1H-1 - S1H-1. R.J. Tocci, N.S. Widmer and G.L. Moss, “Digital Systems: Principles and Applications, 10th Ed.”, Pearson Education (Prentice-Hall), 2007. T.L. Floyd, “Digital Fundamentals,” 9th Edition, Prentice-Hall, New York, 2006. O.B. Adamo, P. Guturu, M.R. Varanasi, "An Innovative Method of Teaching Digital System Design in an Undergraduate Electrical and Computer Engineering Curriculum", Microelectronic Systems Education, MSE '09, 2009
REFERENCES [1]
X. Li, X. Ji and Y. Wang, “Research on Teaching Digital Electronic Technology to Computing Science Students,” 2009 First International Workshop on Education Technology and Computer Science, vol. 3, pp. 1021-1023.
TABLE I. STUDENTS’ FEEDBACK ON VHDL ACTIVITIES IN THE COURSE Percentage of Students (%) Statement
Disagree
Neutral
Agree
Strongly Agree
I enjoyed using VHDL.
5
34
34
27
I learnt a lot from VHDL.
7
22
44
27
2
39
31
27
2
29
41
29
7
25
42
20
10
37
34
19
31
51
19
The tutorials are helpful.
Strongly Disagree
2
Using VHDL has enhanced my understanding on combinational logic circuit. I wish to have more exercises on VHDL.
5
The VHDL group assignment was fair. The experience of using VHDL will strengthen my resume.
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