Interfacing Thermal and Visual Camera with FPGA ...
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Interfacing Thermal and Visual Camera with FPGA ...
This is a reference document for interfacing tamarisk 320 thermal camera with Nexus4 FPGA based board by using PMOD pins. Tamarisk 320 camera comes ...
Interfacing Thermal and Visual Camera with FPGA based Nexus4 Board Muhammad Imran, Mid Sweden University, Sweden.
2015
This is a reference document for interfacing tamarisk 320 thermal camera with Nexus4 FPGA based board by using PMOD pins. Tamarisk 320 camera comes with two options, feature board and without feature board. The camera without feature board (base configuration) offers digital output in the form of 8-bit or 14-bit parallel digital video, 8-bit, 14-bit camera link video and shutter control though 60pin connector. This configuration requires user to develop an interface board because the 60 –pins are not easily accessible. The interface board, developed by one of my colleague Matthias Kramer at Mid Sweden University is shown in Figure 1.
Figure 1. Camera interface board and cables
When colorization is disabled, the digital output video is 8 bit or 14 bit. Figure 2 shows that 8-bit video is coming after Automatic Gain Control (AGC) process whereas 14-bit video is coming before AGC process. It is important to note for configuration that in 8-bits, BDSI_D13 is MSB and BDSI_D06 is LSB. Controlling the camera through FTDI
The output from the base configuration can be controlled with DRC control software. In our case, FTDI is used for sending the commands to control the camera as shown in Figure 3. In the software, RS232 serial, with right combination of COM port and Baud rate of 57600 has been used to establish connection with camera since these are default parameters. The frame format is always 320 columns by 240 rows of progressive scan (4:3)
Figure 2. Thermal cam block diagram for video output
Figure 3. Control interface from DRS
Figure 4. Nexus4 board pins configurations for PMODs. Snapshot from digilent document “Nexys4™ FPGA Board Reference Manual”
Thermal camera PINS configuration with Nexus4 board, italic text for 8-bits for POST_AGC data Nexus4/ (UCF) K2 K1 E7 E6 J3 J2 J4 G6
PMOD
JC Interface board/ J5 on Camera side J1 BDSI_LSYNC BDSI_PCLK BDSI_D13 BDSI_FSYNC BDSI_D1 BDSI_D12 BDSI_D3 BDSI_D2
Nexus4/ (UCF) H4 H2 H1 G4 G1 G2 G3 F3
PMOD
JD Interface board/ J4 on Camera side J2 BDSI_D5 BDSI_D4 BDSI_D7 BDSI_D6 BDSI_D9 BDSI_D8 BDSI_D11 BDSI_D10
Figure 5. Thermal camera pins configuration schematic (Note: the PINS for J4 and J5 will appear flipped in original documents which needs to be corrected according to this document)
Visual Camera PINS configuration with Nexus4 board Visual camera PINS configuration with Nexus4 board Nexus4/ PMOD JA B13 G13 F14 C17 D17 D18 E17 E18
