Lesson 06: Performing an Arithmetic or Logical Operation Chapter 05 ...

Chapter 05: Basic Processing Units … Control Unit Design Organization

Lesson 06: Performing an Arithmetic or Logical Operation

Objective • Learn how an arithmetic or logic operation performed by sequences of microoperations

Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009

2

Arithmetic or logic operation

Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009

3

Execution of an ALU Instruction by Data Path Implementation • Execution of an ALU instruction can be considered as the implementation of a specific data path flow, as per the specific ALU instruction • The processing unit composition is as controlled data-path unit and control unit (controlling and sequencing unit) • Control unit generates control signals to implement each step using signals φs Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009

4

Sequence of actions to define the controlled transfers of data between processing subunits • Processing subunits─ registers, X, Y, ALU circuits, Z, and status register along a required data path • MUX unit to select one data path among several

Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009

5

ALU design as data path with a control unit for arithmetic or logic operation

Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009

6

Microoperations after receiving the instruction at IR • Decoded by decoding logic • Then the logic results at register instruction decoder (ID) initiate control actions • Each control signal selects an action through a gate input φ at each step

Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009

7

Microoperations for executing the instruction using ALU 1. Step i: Transfers a k-bit input source operand through the bus or immediate operand to X Input operand through a MUX → X • MUX─ a multiplexer to select one among several channels at inputs as per the select subunit signal

Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009

8

Microoperations for executing the instruction using ALU 2.

Step i + 1: X transfers k-bit input X to ALU─ X → ALU

Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009

9

Microoperations for executing the instruction using ALU 3. Step i + 2: Another input operand transfers kbits to Y (through bus)─ Input operand →Y

Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009

10

Microoperations for executing the instruction using ALU 4. Step i + 3: Transfer Y to ALU─ Y → ALU

Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009

11

Microoperations for executing the instruction using ALU 5. Step i + 4: ALU processing unit select through one of the gates φi an operation as per the arithmetic or logic instruction, which was received at the IR

Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009

12

Microoperations for executing the instruction using ALU 6.Step i + 5: Transfers a k-bit output Z from ALU─ Z ← ALU

Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009

13

Microoperations for executing the instruction using ALU 7. Step i + 6: Transfers status flags generated, for example, carry or overflow to status register ─ Status Register ← ALU

Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009

14

Microoperations for executing the instruction using ALU 8. Step i + 7: Transfers from Z the result to destination operand through bus─ (Bus) ← Z

Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009

15

ALU instruction • Eight steps in Z ← operation (X and Y operands), Flags ← status of operation and Bus ←Z

Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009

16

ADD operation

Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009

17

Add instruction 1. Input operand through a MUX → X 2. X → ALU-input 3. Input operand → Y 4. Y → ALU-input

Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009

18

Add instruction 5. Selects adder gate φadd when ADD instruction received at the IR and decoded at the instruction decoder logic • φadd : ALU-output (0-k−1) ← X + Y 6. Z ← ALU-output (0-k−1) 7. Status Register ← ALU (status) 8. (Bus) ← Z Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009

19

SUB instruction 1. Input operand through a MUX → X 2. X → ALU-input 3. Input operand → Y 4. Y → ALU-input

Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009

20

SUB operation

Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009

21

SUB instruction 5. Selects subtractor gate φsub when SUB instruction received at the IR and decoded at the instruction decoder logic • φsub: ALU-output (0-k−1) ← ALU ← X + NOT(Y) + 1 for finding X − Y 6. Z ← ALU-output (0-k−1) 7. Status Register ← ALU (status) 8. (Bus) ← Z Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009

22

Control Signal for selecting an ALU operation

Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009

23

ALU control input during an interval T step 5 for an Arithmetic Operation • 1. 2. 3. 4.

One active Calu among eight φs for eight arithmetic operations φadd : ALU ← X + Y φsub : ALU ← X + NOT(Y) + 1 φadc : ALU ← X + Y + CY φsbb : ALU ← X + NOT(Y) + 1 + Cy

Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009

24

ALU control input during an interval T step 5 for an Arithmetic Operation 5. 6. 7. 8.

φmul: ALU ← X × Y φdiv : ALU ← X ÷ Y φinc : temp_Y ← 1; ALU ← X + temp_Y φdec : temp_Y ← 1; ALU ← X + NOT( temp_Y) + 1

Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009

25

ALU control input during an interval T step 5 for a Logic Operation • 1. 2. 3. 4.

One active Calu among six φs for six logic operations φXOR : ALU ← X .XOR. Y φOR : ALU ← X .OR. Y φAND : ALU ← X .AND.Y φNOT : ALU ← NOT (X)

Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009

26

ALU control input during an interval T step 5 for a Logic Operation 5. φclear: ALU ← all 0s 6. φset : ALU ← all 1s

Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009

27

Summary

Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009

28

We learnt • An arithmetic or logic operation performed by sequences of microoperations • Eight steps for an ALU operation among 8 arithmetic and six logic operations

Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009

29

End of Lesson 06 on Performing an Arithmetic or Logical Operation