Fully Digital Trigger and Pre-Processing Electronics for Planar Positron Emission Mammography (PEM) Scanners J. D. Martínez, J. Toledo, R. Esteve, F. J. Mora, A. Sebastiá, J. M. Benlloch, M. Fernández, E. N. Giménez, M. Giménez, C. W. Lerche, N. Pavón
Abstract-- Digital trigger algorithms performed over large sequences of data can be an efficient way to shift processing time from baseline samples or singles to coincident Photo Multiplier Tube pulses. This paper describes a coincidence processing system intended to implement fully digital trigger and preprocessing algorithms for a Positron Emission Tomography scanner dedicated to breast imaging. In order to efficiently address all the emerging issues of high resolutio PET detectors, a high performance DSP processor has been embedded into the backbone of the system. Signals from 12 channels of a dual-head PET camera are acquired in free-running sampling while a first stage of FIFO memories, implemented using a Virtex-II Pro FPGA, translate data from a sequential sample-by-sample processing basis to a more efficient block-by-block one. This approach enables us to carry out trigger and pre-processing tasks in parallel. Moreover, the scheme offers additional benefits: intrinsic temporal coherence, zero data acquisition dead time, and a more flexible software approach to pre- and post-processing issues (from pile-ups and scatter correction to pre-reconstruction processing). It also heavily reduces the bandwidth required for the link to the host computer, enabling the use of a high speed USB port. The DAQ system is capable of handling count rates up to 10 Mevents/s, pre-processing the samples on the fly and lastly delivering data to the host computer for image reconstruction.
I.
INTRODUCTION
, breast cancer is usually detected using lowNenergy X-ray screening. However, molecular imaging OWADAYS
techniques as Positron Emission Tomography (PET) can be utilized both in diagnosing cancer and also in tracking illness evolution. Furthermore, the need for a better spatial resolution, reduced radiotracer doses and lower costs, which enable periodical monitoring, are shifting development efforts to This work was supported in part by the Spanish Government under CICYT project. J. D. Martínez, J. Toledo. R. Esteve, F. J. Mora and A. Sebastiá are with the Department of Electronics Engineering, Universidad Politécnica de Valencia, Spain (e-mail:
[email protected]). J. M. Benlloch, M. Fernández, E. N. Giménez, M. Giménez, C. W. Lerche and N. Pavón are with the Instituto de Física Corpuscular (CSIC-UV), P.O. Box 22085, Valencia, Spain
small dedicated detectors oriented to specific applications such as pharmacological research and mammography [1,2]. Positron Emission Mammography (PEM) scanners have been proposed essentially in two different geometries: planar and rectangular cameras [3]. Dual-head planar PEM scanners present a good trade-off between solid angle coverage and ease of positioning, although both schemes need specific image reconstruction algorithms due to the incomplete sinogram sampling. Another advantage of such small planar cameras is due to the separation between detector modules, ranging from 10 to 20 cm, which allows traditional breast compression systems used in X-ray mammography systems to be also used in PEM cameras. Nevertheless, the main challenges arise from the nearness of both detectors required in order to improve sensitivity and resolution. First of all, parallax error becomes critical and its correction depends on the availability of information about the depth of interaction. Secondly, there is an important increase in the geometrical acceptance of the detector. These issues, together with the need for reducing the scan time in order to enable screening applications, imply the acquisition of more events in less time. A novel data acquisition (DAQ) architecture has been designed to provide four major capabilities of paramount importance in high resolution PEM: high count rate acquisition with zero dead time due to electronics, depth of interaction (DOI) measurement based on a modified Anger logic resistors network, pile-up recovery features, and reduction in bandwidth requirements of the link to the image reconstruction subsystem. In this paper we present the design of a crucial component in the proposed DAQ system: the Coincidence Processing module (CP) for our dual-head planar PEM camera. The following section discusses the motivation of designing new electronics for dedicated PET scanners for breast imaging. Section III introduces the gamma-ray detector and the DAQ architecture. Section IV describes in detail the Coincidence Processing module architecture and implementation. Finally, our main conclusions are pointed out.
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II. MOTIVATION Dedicated PET cameras are posing new challenges in the design of the electronics. One of the most important, from the DAQ point of view, is the increase in the geometrical acceptance of the scanner. This parameter corresponds to the total solid angle covered by the camera from each point inside the field of view (FOV), and can be very high in mammography applications, as can be seen in Fig. 1., reaching up to 70% in scanners with reduced port diameter. As a result of this higher solid angle coverage, the event count rate is greatly augmented. This issue can be exploited for increasing the sensitivity of the whole system, which heavily depends on the number of events acquired during the scan time. Although this is only possible if we can design a DAQ and processing system fast enough for taking advantage of the increased number of gamma photons which impinge the detector. Traditional analog coincidence detection circuits, based on constant fraction discriminators (CFDs) for trigger level detection and the comparison of the energy signals from each detector, are simple and well-known techniques powerful enough for medium count rate systems. On the other hand, their main limitation is that the acquisition flow must be disabled when an event is detected during up to several microseconds leading to an unavoidable deadtime. Additional disadvantages of these analog approaches are arising because the signal shape and timing, and so the complete digitization of the incoming PMT pulse, are becoming increasingly important, i.e. for DOI estimation using pulse shape discrimination. One important aspect that enables the use of fully digital electronics is the reduction on the number of channels. This is possible by using division charge circuits for encoding position. In our system, we use also two additional channels for encoding DOI information and providing the complete pulse shape using a total of six channels per detector head. These channels can be continously digitized in free-running sampling, generating a data flow affordable for using fully digital techniques in the rest of the system.
Fig. 1. Diagram of the PEM camera geometry. When both detectors are put closer the geometrical acceptance of the camera is increased and so the event rate. This is really critical in dedicated systems with large continuous detectors separated less than 20 cm.
From the point of view of digital design, the major challenge is the vaste amount of information that must be converted, delivered and processed. This implies the need for high-speed serial buses and high performance digital signal processors (DSPs) which are the true enabling technologies for our fully digital coincidence processing system. III. GAMMA DETECTOR AND DAQ ARCHITECTURE A. Gamma-ray detector Our basic detector block is composed of a block of LSO scintillator crystal coupled to a Position Sensitive PhotoMultiplier Tube (PS-PMT) H8500 from Hamamatsu with an active area of 49x49 mm2. A charge division circuit reduces the number of position encoding channels from 64 to 4. Some modifications on the positioning circuit provide a signal which encodes the depth of interaction within the scintillator based on the width of the light distribution [4]. The last dynode signal is utilized to obtain the complete PMT pulse in order to perform coincidence detection and photon energy discrimination. An scheme of the detector is shown in Fig. 2
Fig. 2. Scheme of the γ-ray detector module. It is composed of a continuous LSO crystal followed by a PS-PMT in flat panel configuration. Next, a resistors network deals with the charge division in order to obtain current signals propotional to the position and also to the width of the scintillation light distribution.
B. DAQ Architecture The proposed architecture aims at overcoming the main limitations of conventional digital trigger schemes: dead time due to data acquisition blocking when an event is being processed, maximum achievable event count rate limited by the time required to process a single gamma event (in a coincidence lossless acquisition scenario) and massive storage capacities required. Accepting the premise that data processing throughput of the newest DSPs is much higher than usual sampling rates in PEM detectors, enough processing power is then available to perform very efficient digital triggers. We define a zero-deadtime pipelined architecture in which detector channels are acquired in free-running sampling. Acquired samples are written into FIFO memories, blocks of samples are transferred to a DSP using Direct Memory Access (DMA) transfers, and
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Fig. 3. Block diagram of the data acquisition system: a custom coincidence processing board (daughter card) plugged onto an off-the-shelf DSP board. trigger decisions are then carried out in order to locate and process all coincident gamma events. The coincidence detection algorithm comprises pulse height comparison inside a coincidence window, time resolution increase by interpolation of the digitized samples, windowing to reject false coincidences and centroid and depth of interaction calculation (the latter is estimated from look-up tables stored in the DSP memory). Two different DAQ modes are foreseen: histogramming and list-mode data acquisition. Storage capacity and link bandwidth are heavily reduced as only true events (list-mode) or histogrammed data are sent to the computer host for image reconstruction. A detailed description of this block-oriented DAQ scheme can be found in [5]. IV. COINCIDENCE PROCESSING MODULE: ARCHITECTURE AND FUNCTIONALITIES The CP module comprises and off-the-shelf DSP motherboard for the Texas Instruments TMS320C6416 [6] and a custom daughterboard which includes the analog-to-digital converters (ADCs), FIFO memories and a USB 2.0 interface. The use of an off-the-shelf DSP motherboard simplifies the design and allows the use of commercial emulation and realtime debugging tools. A block diagram of the CP module is shown in Fig. 3. The two boards are connected via two SMD 80-pin connectors which provide access to the less significant 32 bits of the DSP
external memory interface (EMIF), control and interrupt signals. Coaxial input channels are AC-coupled and converted from single-ended to differential by means of wide bandwidth transformers which provide additional signal shaping. The data conversion stage consists of two 8-channel 12-bit 40-MHz ADCs from Texas Instruments [7]. These compact and lowpower (less than 1 W per chip) ADCs have LVDS differential outputs, thus reducing board complexity and area (Fig. 4). A Xilinx Virtex-II Pro FPGA is at the backbone of the DAQ system. It is used as LVDS deserializer for the twelve 480 Mb/s ADC LVDS outputs, acquisition buffer (using embedded 4-Ksample FIFO memories) and DMA interface to the DSP. A DMA transaction takes place when a complete block of samples of a programmable size is available at the FIFOs. Additionally, custom digital filtering can be performed in the FPGA, for instance baseline correction or energy threshold computation for speeding up coincidence detection. A USB 2.0 interface, implemented in the daughtercard using a CY7C68001 device from Cypress Semiconductors, connects the CP module to a host computer. The USB connection is used for data transfer from the DSP to the host and for CP module configuration and control. Sustainable throughputs of up to 39 MB/s performing USB bulk transfers from the CP module to the host has been measured.
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Fig. 4. The daughtercard measures only 120 mm by 86 mm. Coaxial LEMO connectors (six per head, left) feed the input signals into the RF transformers. The secondary coil of each transformer is connected to an input of an 8-channel ADC chip (one per head, center). The ADC LVDS differential outputs are connected to the FPGA. Data blocks are sent from the FPGA to the DSP via 80-pin SMT connectors (not shown). The USB interface chip and the USB connector (right) provide connection to the host computer. Other components in the board (bottom right) are two FLASH memories for FPGA configuration, clock oscillators, a 2.5 V regulator, power connectors and a JTAG connector for debugging purposes.
VII. REFERENCES
V. CONCLUSIONS New high resolution PET scanners require specifically designed electronics which address the main challenges of traditional DAQ systems for PET cameras. This can be effectively achieved due to the reduction on the number of channels and detector blocks needed by small dedicated scanners. We have designed a coincidence processing module for a fully digital coincidence detection and processing scheme for a dual-head positron emission mammography camera, which will enable us to achieve the highest count rate requirements of this application providing also the flexibility of a dually (both FPGA and DSP) programmable digital system.
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[4]
[5]
VI. ACKNOWLEDGMENTS J.D. Martinez would like to thank the Generalitat Valenciana for its support under a pre-doctoral research fellowship.
[6] [7]
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