Proceedings of the 42nd IEEE Conference on Decision and Control Maui, Hawaii USA, December 2003
ThM09-2
Nonlinear Controller for a Single Phase One Quadrant Unity Power Factor RectiÞer A.K. Jain† , A. Behal‡ , and N. Mohan† †
Department of Electrical & Computer Engineering
‡
Department of Bioengineering
University of Minnesota
Clemson University
Minneapolis, MN 55455
Clemson, SC 29634-0915
email: akj,
[email protected],
[email protected]
rant ac-dc converter was analyzed and controlled using a passivity-based controller. The circuit analyzed consisted of four actively controlled switching devices that delivers superior performance at a higher cost. The controller obtains good power factor correction and reduces total harmonic distortion (THD). However, the treatment is theoretically unsatisfactory because the load estimator is never shown to converge to the actual value. Additionally, an assumption is made about the desired output being bounded away from zero to keep the control bounded. It is however known that overaggressive estimation of the load can cause transient dips in the output voltage.
Abstract
In this paper, a nonlinear control strategy is designed for a single quadrant unity power factor rectiÞer. Asymptotic (exponential) stability is demonstrated via a Lyapunov stability argument. 1 Introduction Unity power factor (UPF) rectiÞer circuits are a class of switch mode power electronic circuits used for converting input ac line voltage to a desired dc voltage while actively controlling the input current to provide close to unity power factor, i.e., shaping it to be sinusoidal and in phase with the input line voltage. These circuits thus avoid line current and voltage distortion which is common in uncontrolled diode bridge rectiÞers. Besides shaping the input current waveform, usually the role of the unity power factor rectiÞer is to act as a pre-regulator to a dc-dc converter that may be used to provide additional regulation and ohmic isolation [8] [1]. Such circuits are commonly used for a variety of applications including telecommunications, digital computers, and consumer electronics. They are increasing in importance due to the growing concern for power quality which is evident from formulation of IEEE 519 [5], and the adoption of IEC 1000-3-2 [4] as the EN61000-3-2 norm.
For applications in which bidirectional power transfer is not required, the single quadrant boost derived topology [8] is more commonly used due to its simpler implementation and lower cost. This paper deals with the control of a single quadrant boost derived unity power factor rectiÞer. Motivated by the methodology of [3], we design a Lyapunov based controller that achieves good power factor correction and signiÞcantly lower THD. By utilizing ideas from linear time varying systems, the controller is shown to exponentially drive the load estimation error to zero. With systems having high Þlter inductance/output current, saturation effects in the control can come into play at the zero crossing of the input voltage. With a simple redesign of the desired current trajectory at the input, we show that the control can be designed to be within its prescribed bounds in steady state.
Commonly, a linear controller for UPF rectiÞers is designed utilizing a small-signal model obtained by linearization about an operating point [8]. The operating point in this system varies continuously as the input voltage varies. Thus, the controller design effectively assumes a quasi-steady state condition at each point of the input sine wave. The system provides acceptable performance. However, the controller has an inherent drawback of third harmonic in the input current. This happens because the reference current signal is the product of output voltage error ampliÞer, that contains a second harmonic component, and the input voltage waveshape. Thus, the controller gain at 120 [Hz] effectively determines the level of third harmonic to be expected in the input voltage [8]. In [3], a four quad-
0-7803-7924-1/03/$17.00 ©2003 IEEE
In Section 2, we write the system dynamics and lay down the control objective. In Section 3, the control and the estimator are designed. Section 4 deals with a stability analysis. In Section 5, we present a procedure for redesigning the desired input current strategy to avoid controller saturation in steady-state. Conclusions are presented in Section 6. 2 Problem Formulation and Control Objective The schematic of the circuit is shown in Figure (1). The basic diode bridge rectiÞer is augmented by the induc-
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harmonics, while the magnitude I¯d (t) of the desired current trajectory is obtained by balancing the energy transferred from the input to the output in one half cycle of the line frequency. The total energy fed into the input over a half-cycle can be obtained as
tor, the controlled switch S, and the output diode D. Effectively, the output of the diode bridge is connected to a boost dc-dc converter. The controlled switch S is turned ON and OFF once in each switching cycle. Assuming the inductor current never goes to zero, the output diode D conducts whenever S is OFF and vice-versa. The input current can be shaped to provide unity power factor and its magnitude controlled to provide the desired output voltage, by controlling the duty-ratio of the switch. The output voltage is necessarily higher than the peak of the input line voltage. In this paper, the controller design accounts for dynamics much slower than the switching time period of the switch S, which is typically of the order of 10 [µs] or lower. Hence, a dynamic model of the converter which deals with quantities averaged over one switching cycle is sufficient. The averaged dynamics are given by (1) Lxú 1 = −ux2 + vi C xú 2 = ux1 − px2
Ein =
Z
π/ω
vi (τ ) x1d (τ ) dτ = E I¯d
0
Z
π/ω 0
sin2 (ωτ) dτ =
E I¯d π 2ω (4)
At the output the total energy consumed in one half cycle is given by Eout =
Vd2 pπ ω
(5)
Now equating the right hand sides of (4) and (5), we obtain the magnitude of I¯d (t) of (3) as follows 2V 2 I¯d = d p E Since the load p is assumed to be unknown, I¯d (t) is an unmeasurable signal. To get around this problem, we deÞne an estimated load pˆ (t) ∈
