PowWow : Power Optimized Hardware/Software Framework for ...

PowWow : Power Optimized Hardware/Software Framework for Wireless Motes Olivier Berder, Olivier Sentieys University of Rennes 1 / IRISA, France

Abstract An energy-efficient platform for wireless sensor networks and its dedicated software framework are described and optimizations are proposed at both hardware and software level. The hardware is based on low cost and low power components linked in a multilayer architecture. Some processing, such as error correcting codes, are accelerated by a low power FPGA and the platform offers the possibility to dynamically adapt the voltage and the frequency of the processor. Finally the software system implementing the protocols stack has a very small memory foot print. Some parameters optimizations are then proposed at lower protocol layers to decrease the global energy consumption of the platform. The medium access protocol relies on an asynchronous rendez-vous scheme initiated by the receiver, and the wake-up interval can be tuned to increase the lifetime of the network. The influence of error correcting codes on the energy consumption is evaluated and some promising cooperative strategies, based on relay and distributed space-time codes are proposed.

1 Introduction The huge variety of Wireless Sensor Networks (WSN) applications, ranging from environmental monitoring to healthcare and smart homes, requires modular and reconfigurable platforms. On the other hand, these equipments have to be low cost, to respect severe size constraints, and to propose a very high energy efficiency since the most important constraint in WSN remains the energy consumption. Filling all these requirements is a huge challenge and existing platforms generally try to make trade-offs or to focus on one of these aspects. Generator

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Figure 1: Generic WSN node hardware architecture The generic hardware architecture of a wireless sensor node is represented in Figure 1. Although energy scavenging solutions from various origins (heat, photovoltaic, electromagnetic, motion) are under study and seem very promising to reach the energetic autonomy, most of platforms are yet feeded by rechargeable chemical batteries. The most energy consuming part is the radio, and it has been shown that the energy consumed in transmitting one bit can be several thousand times more than the energy consumed in executing one instruction [1]. Algorithmic

solutions, such as MAC protocols and signal processing techniques, can be used to reduce respectively the time when radio transceiver is used and the output radiated power. On the other hand, the processing part is also quite expensive and new architectural solutions have to be proposed. Some of researchers address the architectural compactness of the platform to obtain a wearable solution representing less than 1 cm3 [2], but the energy efficiency of the platform is limited. Modular and expendable architectures have also been proposed, allowing the platform to adapt itself to the application. In [3] the total system is packaged in a modular 25mm cubed form factor and proposes the use of efficient power-saving modes. The architecture in [4] relies on a scalable high performance communication bus connecting the different modules of a node, allowing time-critical data to be shared without delay and supporting reconfigurability at the hardware level. The main goal addressed by our platform, PowWow (Power Optimized hardWare/software frameWOrk for Wireless motes), is the energy efficiency since it takes simultaneously profit of both hardware, software and protocols optimizations. The hardware solution remains low cost since the modular architecture embeds commercialoff-the-shelf (COTS) elements. A co-processor is used to accelerate some digital signal processing tasks and Dynamic Voltage and Frequency Scaling (DVFS) is provided to further minimize the power consumption. As far as the software is concerned, PowWow is based on Contiki operating system, and more precisely on its protothreads library, which allows to realize event-driven systems. The communication protocol stack has been designed to be very light and energy optimization is performed at each layer. The medium access protocol is re-

ceiver initiated and the wake-up interval can be tuned depending on the application. Several types of forward error coding were also studied at the link layer and energyefficient implementations were performed on the FPGA. Other promising cooperation strategies, based on relay and distributed space-time codes are under study but only simulation results can be provided since these techniques will need specific hardware designs. The rest of the paper is organized as follows. In Section 2 the hardware components of PowWow platform are detailed and the operating system is precised. Some hardware improvements as DVS and FPGA co-processing are proposed and validated by experimental results. Section 3 is dedicated to energy optimizations at algorithmic level. The effect of the wake-up interval on the network lifetime is shown and the energy efficiency of error correcting codes is investigated. Simulation results finally prove the interest of cooperative strategies, before conclusions and future works are proposed in Section 4.

2 PowWow HW/SW architecture PowWow is a hardware platform associated to a software architecture designed to handle a complete wireless sensor network (WSN) solution. The hardware platform is, like many others, based on a low-power microcontroller and a radio transceiver. However, PowWow also includes new features which improve the energy efficiency with regards to state-of-the-art platforms: dynamic voltage and frequency scaling (DVFS) of the digital processing part and also co-processing capabilities using a low-power FPGA (Field Programmable Gate Array). Based on the RICER (Receiver Initiated CyclEd Receiver) [5] Media Access Control (MAC) protocol, on a simple geographical routing and positioning [6] and on the protothread library [7] from Contiki operating system [8], PowWow software stack requires a lighter hardware system than Zigbee to be processed. The memory footprint is 6 kbytes for the stack layers and less than 11kbytes including an application of temperature sensing and mobile node tracking. Therefore, taking advantages of both hardware and software features, the network lifetime is increased while price per node node stays comparable to standard non-optimized solutions. The rest of this section details the hardware architecture and roughly presents the software stack.

The synoptic of the system using DVFS and co-processing is shown in Figure 2. The microcontroller (here a MSP430) is connected to a reconfigurable FPGA circuit (here an Igloo from Actel) which can act as a co-processor and which is also used for low-layer processing of packet issued from the radio transceiver (here a CC2420 from T.I.). Therefore, the transceiver is connected directly to the FPGA (and can also be connected to the MSP430 with a passthrough) which can processed the received packet (or the packet to transmit in the same manner) in order to wake-up the processor only when the packet is correct and has to be processed by the application layer. We will show later that this configuration will bring a lower power consumption thanks to the energy efficiency of FPGA packet processing. As output transmit power (Px ) is an essential parameter in the global power optimization of the network, Px can be dynamically tuned by the FPGA according to channel condition. Dynamic voltage scaling is provided by a DC/DC converter and applied to both the microcontroller and the reconfigurable circuit. Finally, a very lowpower watchdog timer can be used to orchestrate the all system and wake-up periodically the FPGA.

Figure 2: PowWow hardware architecture

2.1 Modular hardware architecture

PowWow motherboard is the central element of a sensor node. It embeds the main processor associated to its power and clock components (with no DVS). JTAG, RS232, and I2C interfaces are also available on this board. The processor is the MSP430 low-power consumption microcontroller from Texas Instruments. It consumes an average of 330 µA at 1 MHz and 2.2 V in the active mode, and only 1.1 µA in the standby mode. The board embeds the MSP430F1612 version including 55KB of flash memory and 5KB of on-chip RAM.

PowWow hardware platform has been designed with modularity and is composed of a central PCB (printed circuit board) and of different daughterboards. In this paper, we present the motherboard and two daughterboards: the 2.4GHz radio board and the co-processing and DVFS management board.

The radio daughterboard including a Texas CC2420 transceiver chip can easily be added on connectors. Figure 3 shows the motherboard connected to the radio board.

In order to adapt the voltage to hardware processing and increase power efficiency, dynamic voltage and frequency scaling can also be used in a PowWow node and DVFS management is issued by the co-processor. As it is classically stated, this power allocation allows interesting energy consumption reduction.

2.2 PowWow software architecture Figure 3: PowWow MSP430 motherboard with CC2420 radio board connected The CC2420 is a true single-chip 2.4 GHz IEEE 802.15.4 compliant RF transceiver designed for low-power and lowvoltage wireless applications. CC2420 includes a digital direct sequence spread spectrum baseband modem providing a spreading gain of 9 dB and an effective data rate of 250 kbps. The CC2420 also provides extensive hardware support for packet handling, data buffering, burst transmissions, data encryption, data authentication, clear channel assessment, link quality indication and packet timing information. Another daughterboard was designed and fabricated to allow reconfigurable co-processing and DVFS management. The current hardware version of PowWow integrates a lowpower Igloo FPGA from Actel corporation. The chip version is the AGL125 designed in 130nm which includes an equivalent of 125 kgates, 32kbits of on-chip RAM, 1 kbits Flash and PLL for clock management. It can operate at various supply voltages up to 1.65V. Power consumption is respectively 2.2uW, 16uW and 1 to 30mW in sleep mode, freeze mode and run mode depending on the routed design complexity. For example, we implemented a Viterbi decoder for link layer which consumes 5mW at 1.5V. As explained before, the FPGA will allow hardware acceleration for PowWow protocol features (see Section 3) and provide a higher energy efficiency. As a testbed to compare a software implementation on the MSP430 and a hardware implementation on the Igloo FPGA, we detail here the energy results on the popular and IEEE-recommended cyclic redundancy check (CRC) CRC32 algorithm used for error detection in the data-link layer of the PowWow software. A direct software implementation on the microcontroller requires an energy of Emsp = 150µs × 20mW = 3µJ (at 8MHz). A hardware implementation on the FPGA requires an energy of Eigloo = 0.8µs × 5mW = 0.004µJ (at 20MHz, including I/O transfer power). Therefore, in this case, energy saving is very high and an FPGA co20 processing has a benefit of 150 0.8 4 = 750. Figures reported here are directly issued from the direct current measurement on both hardware and software implementation solutions.

The software is based on the embedded system Contiki, and more precisely on the Protothread library which allows to realize event-driven systems. Indeed, it has been shown that asynchronous processing, well suited to sensor networks applications, perfectly fits event-driven programming. Protothreads are lightweight stackless threads designed for severely memory constrained systems, such as small embedded systems. Protothreads provide linear code execution for event-driven systems and a sequential flow of control without complex state machines or full multithreading.

3 Energy optimizations 3.1 Impact of wake-up interval in RDV schemes The MAC strategy has a particular impact on the performance of the whole system, since the consumption of the radio part is the most important. RICER (Receiver Initiated CyclEd Receivers) is a pseudo-asynchronous technique (also called cycled receiver) to realize rendez-vous between wireless nodes[5]. Among the many parameters to be tuned in order to optimize the energy efficiency of a wireless network, the influence of the wake up interval is particularly crucial for the MAC layer, as shown by Figure 4. If the wake-up interval for a particular node is rather short, then the global energy consumption is high because the density of rendez-vous is high, with many wake up cycles, most of them unsuccessful. A longer wake-up time lowers the average power of the network. The choice of a very long wake-up interval should intuitively allow trading reactivity for longer lifetimes. However, the curves of global energy increase again for long wake-up intervals.

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the transmission power is higher. As a consequence, the Packet Error Rate (PER) decreases and the retransmissions become rare, however, the energy per successfully transmitted bit increases with the transmission power since the transmission power consumes more energy. The best operating point locates at the minimum of the curves and depends on the quality of the channel and/or the distance between the nodes.

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Figure 4: Media access control timing for unsuccessful rendez-vous

3.2 Error correcting codes In order to have a larger optimization space, the system constituted by the link, medium access control, and physical layers is considered as a global system, in opposition to separate sub-systems. The objective of the link layer is to manage the automatic repeat request (ARQ) and the forward error coding (FEC) to ensure a reliable link. The forward error coding at the link layer can be done using several techniques among block and convolutional code. The ARQ scheme used is known as selective acknowledgment (SACK) where only erroneous packets are retransmitted. Considering a joint modelling of the energy consumption, it makes it possible to evaluate the influence of the coding technique, as illustrated by Figure 5. −5

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Space time codes can exploit the diversity gain in both transmission an reception to reduce transmission energy for the same information reliability and the same throughput requirement. Since a wireless sensor node can typically support one antenna due to the limited size and cost, the direct application of multi-antenna technique to distributed WSN is impractical. However, wireless sensor nodes can cooperate in transmission and reception in order to deploy a MIMO transmission, as illustrated by Figure 6. Phase 1

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Figure 6: Energy consumption of cooperative MIMO techniques The energy consumption comparison between SISO, multi-hop SISO and the cooperative MISO is presented on Figure 7 with the optimal hop distance dhop = 25m. When the transmission distance between source and destination is greater than dhop multi-hop SISO is more energy-efficient than SISO but still less energy-efficient than cooperative 21 MISO system. These cooperative MIMO techniques, as well as relay techniques, will be implemented in the next version of PowWow hardware.

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Figure 5: Energy per bit consumption for various coding schemes The three curves are represented for different type of FEC. On the left part, for low transmission power, the curves are decreasing. In this area, packets often have errors and therefore, the number of retransmissions increases, so more time is needed for the transmission of a given quantity of information. On the right part of the curves,

Figure 7: Energy consumption of cooperative MIMO techniques

4 Conclusions PowWow, an energy-efficient and low-cost platform for wireless sensor networks was described and energy optimizations were proposed in this paper. Since the energy optimization is a complex problem involving multiple parameters, optimizations were done at both hardware level and each protocol layer. Including a low-power FPGA in the core of the architecture allowed a significant gain in energy consumption. Error correcting codes were implemented on this FPGA and their efficiency were shown by experimentations. Furthermore, this FPGA is able to drive the dynamic frequency and voltage scaling of the processor. At the algorithmic level, the tuning of the wake-up interval of nodes allowed to decrease the time when radio transceiver is used and therefore the energy consumption. The potential of promising cooperative strategies, based on relay and distributed MIMO was finally illustrated by simulation results. The future architecture of the platform will include some independent hardware blocks that allow power gating, i.e., the possibility to turn completely off a part of the chip while the node is still active. Thanks to cooperative-compliant radio front-ends, distributed spacetime codes and relays techniques will also be implemented.

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of the International Workshop on Wearable and Implantable Body Sensor Networks (BSN), April 2006, pp. 162–165. [3] B. O’Flynn, A. Barroso, S. Bellis, J. Benson, U. Roedig, K. Delaney, and C. Sreenan, “The development of a novel miniaturised modular platform for wireless sensor networks,” in International Conference on Information Processing in Sensor Networks (IPSN), April 2005, pp. 370 – 375. [4] D. Lymberopoulos, N. B. Priyantha, and F. Zhao, “mplatform: A reconfigurable architecture and efficient data sharing mechanism for modular sensor nodes,” in International Conference on Information Processing in Sensor Networks (IPSN), April 2007, pp. 128 – 137. [5] E.-Y. Lin, A. Wolisz, and J. Rabaey, “Power-Efficient Rendez-vous Schemes for Dense Wireless Sensor Networks,” in IEEE International Conference on Communications (ICC), Paris, France, 2004. [6] J. Al-Karaki and A. Kamal, “Routing techniques in wireless sensor networks: a survey,” Wireless Communications, IEEE, vol. 11, no. 6, pp. 6–28, Dec. 2004. [7] A. Dunkels, O. Schmidt, and T. Voigt, “Using Protothreads for Sensor Node Programming,” in Proc. Workshop on Real-World Wireless Sensor Networks, Stockholm, Sweden, 2005. [8] A. Dunkels, B. Grönvall, and T. Voigt, “Contiki - a Lightweight and Flexible Operating System for Tiny Networked Sensors,” in Proc. IEEE Workshop on Embedded Networked Sensors, Tampa, Florida, USA, November 2004.