Practical Papers, Articles and Application Notes ... - IEEE Xplore

Practical Papers, Articles and Application Notes Kye Yak See, Technical Editor

I

t was my pleasure meeting many of you at the Asia Pacific EMC Symposium recently and I am sure that you had a fruitful conference in my home country, Singapore. As mentioned in the previous issue, there has been an increase in inquiries from potential authors to submit papers to this column. I am delighted to inform you that some of these inquiries have resulted in a number of interesting papers in the pipeline. Without exception, this issue covers three interesting papers addressing design, measurement and education aspects of EMC. The first paper, “Analysis and Mitigation Techniques for Broadband EMI from Synchronous Buck Converter,” is a joint effort by Keong Kam, David Pommerenke and Ankit Bhargava from Missouri University of Science and Technology; and Cheung-Wei Lam, Robert Steinfeld and Federico Centola from Apple Inc. It is well known that switched converters, such as synchronous buck converters, often cause EMI problems because of their high frequency switching. Numerous papers have discussed controlling conducted emissions from the switched converters but few have investigated broadband radiated emissions generated by them. This paper looks into the root cause, coupling paths as well as the mitigation techniques for broadband radiated emissions, typically in the 30 - 300 MHz range, from a synchronous buck converter. For those of you who work in the areas of switched converters, you will learn several useful design and layout tips shared by the authors. The second paper entitled “Using Polarization Diversity to Detect and Analyze Impulsive Noise,” is authored by Pablo Torio and Manuel G. Sanchez from Universidad de Vigo, Spain. They proposed a measurement technique to detect weak impulsive noise of a radio communication channel. The radio signal samples are measured at both horizontal and vertical polarizations simultaneously to obtain their characteristics

in terms of conditional amplitude probability distribution (APD), conditional probability density function (PDF) and conditional cumulative distribution function (CDF). For general environment, the conditional APD shows similar amplitude characteristics for horizontal and vertical polarizations. However, significant differences may appear when the individual characteristics of a single source are measured rather than a complex mixed environment. The conditional PDF and CDF measured in the experiment lead to the conclusion that the amplitude of the impulsive noise approximately follows a lognormal distribution. The results obtained are useful for implementing impulsive noise generators so as to simulate an environment affected by this kind of perturbation. The third paper, “A Serious Problem in Using the Jarvis Model for the Prediction of Crosstalk,” is contributed by the late Clayton R. Paul from Mercer University, who passed away on June 27, 2012. I read this paper with a heavy heart as this will be his last published work for the EMC community. In his usual style, with a good balance of theory and simulation work, he shared with us the problem of the Jarvis model, the most frequently used model for predicting crosstalk. It is based on the coupled transmission-line equations for a three-conductor, lossless transmission line. The crosstalk voltages are determined with three approximations, namely symmetric lines, weak-coupling and all terminations be matched. He highlighted potential problems for these simplifying assumptions, especially the approximation that all line terminations be matched, which is unrealistic for virtually all crosstalk problems. I look forward to receiving your feedback and comments, preferably through email to [email protected] so that we may continue to improve this column for the benefit of all readers. For potential authors who have innovative and practical ideas in solving EMC problems, feel free to discuss with me further.

Analysis and Mitigation Techniques for Broadband EMI from Synchronous Buck Converter Keong Kam (Corresponding Author), David Pommerenke, Ankit Bhargava [email protected], [email protected], [email protected] EMC Laboratory, Missouri University of Science and Technology Cheung-wei Lam, Robert Steinfeld, Federico Centola [email protected], [email protected], [email protected] Apple Inc. Abstract— Synchronous buck converters are known to cause broadband EMI typically in 30 - 300 MHz range. This paper treats the broadband EMI problem by analyzing the root cause, and coupling paths, and it proposes valuable broadband noise mitigation techniques that can be applied before, during, or after the development cycle allowing designers to design the synchronous buck converter with optimal EMC performance. The noise mitigation techniques suggested in this paper divides into three parts: Mitigations techniques that apply at the source level, coupling path level, and direct radiation level.

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I. Introduction Switched-mode power supplies (SMPS) are widely used in the industry because of their superior efficiency and ease of implementation [1]. One popular switched-mode DC-DC converter topology is the synchronous buck converter. This topology operates around two synchronized complementary switches (highand low-side FETs) to switch the input voltage with the appropriate duty cycle to step down the input voltage followed by output

©2012 IEEE Electromagnetic Compatibility Magazine – Volume 1 – Quarter 3

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ound two synchronized complementary switches (high- and low-side FETs) to switch the input voltage y cycle to step down the input voltage followed by output LC tank for DC output. Figure 1 shows a synchronous buck converter. + C1

C2 U1

II. Root Cause Analysis: L1

Kam et al. [4] offer practical root cause analysis methods and II. ROOT C AUSEfrom ANALYSIS : conclude that the broadband noise synchronous buck M2 converters is caused by parasitic LC resonance in the switchKam et al. C3 [4] offer practical root cause analysis methods and conclude that the broadband nois ing loop. Figure 3 shows the switching loop in the circuit converters is caused by parasitic LC resonance in the switching loop. Figure 3 showsand the switching the associated parasitics. associated parasitics. Vout

LOAD

Vin

M1

Figure 1. Synchronous Buck Converter Figure 1. Synchronous Buck Converter.

LLOOP

SMPSs, synchronous buck converters often cause EMI problems because of their high dv/dt or di/dt LC tank for DC output. Figure 1 shows a general schematic of the neral, such problems from switched converters involve either conducted or radiated emissions. Many synchronous buck converter. d conducted emissions from switched mode power supplies [2, 3]. This type of noise generally refers to harmonics through the input or output DC rails. The second type of EMI problem is C2 radiated emissions. Switching As with many other SMPSs, synchronous buck converters often d emissions occur as broadband spectrum in 30 - 300 MHz range. Figure 2 shows an example Loop of cause EMI problems because of their high dv/dt or di/dt switchd in the measured radiated emission from a synchronous buck converter in a computer system.

M2

L1

Switch Node

Measured Switching Waveform

20 15

Voltage [V]

ing nature. In general, such problems from switched converters involve either conducted or radiated emissions. Many studies have investigated conducted emissions from switched mode power supplies [2, 3]. This type of noise generally refers to the conducted switching harmonics through the input or output DC rails. The second type of EMI problem is radiated emissions. Typically, these radiated emissions occur as broadband spectrum in 30 - 300 MHz range. Figure 2 shows an example of broadband EMI observed in the measured radiated emission from a synchronous buck converter in a computer system.

M1

10

Field Strength [dBuV/m]

5 Several studies have addressed the problems related to broadband EMI from synchronous buck converters [4 - 7]. One study [4] 0 analyzed the root cause of the broadband EMI from synchronous buck converters and proposed methods to measure and analyze 650 700 750 the problem. Others [5 - 7] provided PCB layout guidelines based Time [ns] on experimental and simulation results. This paper summarizes all Figure 3. Synchronous Buck Converter with Parasitic Loop Inductance Figure 3. Synchronous Buck Converter with Parasitic Loop Inductance in the the relevant information in a hopefully meaningful fashion that in the Switching Loop (Top) and Measured Vphase Switching Loop (Top) and Measured Vphase permits designers to understand the root cause and coupling paths, and thus to design the converter minimizes Thethat parasitic LC broadband resonance in the switching loop is related to the parasitic loop inductance L LOOP, a 2which The parasitic resonance switching is related FET to is off, th EMI problems from synchronous of buck converters. the low-side FET. When the high-side FETLCswitches oninatthe point loop the low-side , and output capacitance the parasitic loop inductance L LOOP formed by the closest input decoupling capacitor, high-side FET (on), and low-side FET (off, i.e., Coss) of the low-side FET. When the FETthe switches on at of the sw Coss Measured Radiated EmissionCoss form a series LC resonant structure resulting in high-side ringing on rising edge the low-side 80 which point the low-side FET is off, the transient current loop is frequency is determined by this switching loop parasitic LC resonant frequency, whi broadband noise The ringing Horizontal Polarization formed by the closest input decoupling capacitor, high-side FET of interest frequency the observed broadband noise. The inductive impedance, jωL, of the loop is low at r 60 Verticalof Polarization (on), and low-side FET (off, i.e., Coss). The loop inductance and  CISPR Class Bresonance. Limit explains the23low-Q 40 the low-side Coss form a series LC resonant structure resulting in ringing on the rising edge of the switching waveform 20 (Vphase). The ringing frequency is determined by this switching 0 loop parasitic LC resonant frequency, which also matches the 50 100 150 200 250 300 peak frequency of the observed broadband noise. The inductive Frqeuency [MHz] III. MITIGATION TECHNIQUES: impedance, jωL, of the loop is low at resonant frequency, which Figure 2. Broadband Radiated Emission Root cause analysis shows thatexplains the parasitic LCresonance. resonance in the switching loop generates the bro from Synchronous Converter Figure 2. Broadband Radiated EmissionBuck from Synchronous Buck Converter. the low-Q

presents three types of mitigation techniques that apply at the source level (circuit, component, local dressed the problems related to broadband EMIpath from synchronous converters [4 - 7]. One studycoupling paths, e.g., filtering and PCB coupling level (techniques targeted to block or eliminate Several studies have addressed the problems related to broad-buck se of theband broadband EMI from synchronous buck converters and strategies proposed methods toTechniques: measure and from the circuit). direct radiation (layout to minimize direct radiation III. Mitigation EMI from synchronous buck converters [4 -level 7]. One study ers [5 - 7][4]provided layout based on analyzed PCB the root causeguidelines of the broadband EMIexperimental from syn- and simulation results. This paper A. Source Level Mitigation Techniques: cause analysis shows chronous buck converters and proposed to measure nt information in a hopefully meaningful fashion methods that permits designers toRoot understand the root causethat andthe parasitic LC resonance in the section introduces three main techniques for minimizing broadband the pressource level: lo switching loop the broadband noise.noise This at paper andconverter analyze the Others [5This - 7] provided PCB layout o design the thatproblem. minimizes broadband EMI problems from synchronous buckgenerates converters. of intentional loss, and component selections. ents three types of mitigation techniques that apply at the source guidelines based on experimental and simulation results. This

level (circuit, component, local PCB layout level), at the coupling paper summarizes all the relevant information in a hopefully 1) Local PCB Layout meaningful fashion that permits designers to understand theDesignpath level (techniques targeted to block or eliminate coupling shown in Section II above,paths, the parasitic LC and resonance in the switching is the main cause e.g., filtering PCB layout design), and atloop the direct root cause and coupling paths, andAs thus to design the convertparasitic LCfrom resonance is approximated bylevel a series RLC circuit,toasminimize illustrated byradiation the following radiation (layout strategies direct from equival er that minimizes broadband EMI problems synchronous 4. the circuit). buck converters.

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©2012 IEEE Electromagnetic Compatibility Magazine – Volume 1 – Quarter 3

A. Source Level Mitigation Techniques: This section introduces three main techniques for minimizing broadband noise at the source level: local layout design, addition of intentional loss, and component selections.

side FETs) must be placed as close together as possible. A solid ground plane underneath the switching loop also reduces loop inductance. The work reported in [7] demonstrated experimentally that a layout with a solid ground plane under the switching loop has lower broadband EMI noise coupling than one without. Figure 5 shows examples of layout improvements.

1) Local PCB Layout Design As shown in Section II above, the parasitic LC resonance in the switching loop is the main cause of broadband noise. This parasitic LC resonance is approximated by a series RLC circuit, as illustrated by the following equivalent circuit shown in Figure 4.

C1

LTRACE1

C2 C1

LDRAIN-M1 C2 C2

RDS(ON)-M1

Vin

Switching Loop Current

D L1

LDRAIN-M2

S

Vin

GND

M2

M2 D Vin

L1

S

M2GND D

C2

L1

M1

D Vin S

C2 M2 M1 GND D

D

L1

S

S

LSOURCE-M2

L1

M1

L1

D GND

D

M2(OFF)

ROSS-M2

D

L1

S

COSS-M2

S M1

Vin

M1

S

D

DD M2S S

M2

HIGH Z

LTRACE2

M1

C2

LSOURCE-M1

LC2-ESL

RC2-ESR

Vin C2

C2

M1(ON)

4

S 5. Examples of Loop Inductance Reduction S Figure Figure 5. Examples of Loop Inductance Reduction via PCB Layout C2 GND via PCB Layout Improvement C2 GND Improvement

Figure 5. Examples of Loop Inductance Reduction 2) Addition of Intentional Loss

VPULSE

via PCB Layout Improvement 2) Addition LLOOPof Intentional Loss Additional loss can be introduced into the switching loop to dampAdditional loss can be introduced into the switching loop to dampen resonance. An RC snubber Switching en resonance. An RC snubber circuit is a widely known solution in the switching loop to dampen ringing on the switch waveform Loop solution that adds intentional losses that adds intentional losses in the switching loop to dampen ring2) Addition of Intentional Loss Currentwith the RC snubber. Several researchers [e.g., 8, 9] have described methods to calculate optimal RC sn ing on the switch waveform. Figure 6 shows a circuit with the RC Additional loss can be introduced into the switching loop to dampen resonance. An RC snubber cir snubber. Several researchers [e.g., 8, 9] have described methods RLOSS M1 on the switch waveform. F solution that adds intentional losses in the switching loop to dampen ringing to calculate optimal RC snubber values. L1 optimal RC snub with the RC snubber. Several researchers [e.g., 8, 9] have described methods to calculate COSS-M2

C2

C2

M1 M2

L1

Figure 4. Full Equivalent Circuit for HS FET Turn-on (Top) Figure 4. Full Equivalent Circuit for HS FET Turn-on (Top) and Reduced and Reduced RLC Circuit (Bottom) RLC Circuit (Bottom)

M2 that reduction of parasitic loop inductance is advantageous in several respects. RC tance pushes the resonant frequency higher. A limited switching speed limits the energy at higher Snubber This model demonstrates that reduction of parasitic loop inducnce, and thus results in a lower level of broadband noise. In addition, the Q-factor of the series RLC tance is advantageous in several respects. quare root of L. Lower L reduces the Q of the resonance. Third, lower loop inductance means less RC switching loop and thus reduces the noise coupling from the source. Snubber Figure 6. RC Snubber First, smaller loop inductance pushes the resonant frequency minimized by optimal placement of the components and by minimizing the current loop; therefore, the higher. A limited switching speed limits the energy at higher freand the two switches (high- and low-side Todd FETs)[8] must be placed together as C possible. that as an close optimal value of used in A thesolid RC snubber is two to three times the C oss of quency to excite resonance, and thus results insuggests a lower level of e switching loop also reduces loop inductance. The work reported in [7] demonstrated experimentally Figure RC Snubber value R in theFigure RC 6. snubber should be 6. close to the characteristic impedance Z0 of t RC Snubber broadband noise. In addition, the suggests Q-factor ofthat the the series RLCof circuit ground plane under the switching loop has lowerthe broadband EMI noise coupling without. of the RC snubber will be of the sam loop is very small, than then one the inductance is proportional to square root of L.circuit. Lower LIfreduces theinductance Q of the layout improvements. Todd [8] suggests that an optimal value of C used in the RC snubber is two to three times the C of the resonance. Third, lower loop inductance means less magnetic reducing the effectiveness of the snubber. oss

the suggests that theand value of Retcouinal.the[10] RC snubber should beoptimal closewhich to the impedance coupling from the switching loop andTodd thus reduces the noise Todd [8] suggests thatsnubber, an value of is Ccharacteristic used in theof RC the snubber twoZ 0 of The [8] Kam describes RL a dual RCissnubber. circuit. If the loop inductance is very small, then the inductance of the RC snubber will be of the same of the low-side FET. He also suggests that the pling from the source. to three times the C advantages. First, it is less affected by parasitics, oss and can thus be implemented targeting higher frequeno reducing effectiveness of the snubber. valuealready of R in the RC snubber shouldbecause be close to theinductance characteristicitimpeduseful the when the loop inductance has been minimized the requires is sma LC resonance circuit. If theof loopthe inductance is ance Z0 of the Loop inductance can be minimized optimal placement the [10] describes Todd [8] trace and Kam etof al. RLparasitic snubber, which is a dual RC snubber. The R asby a PCB (see Figure7). very small, thenand the inductance of the RC snubber will be of the same components and by minimizingadvantages. the current loop; First,therefore, it is lessthe affected by parasitics, can thus be implemented targeting higher frequencie of magnitude, thus reducing the effectiveness of the snubber. input decoupling capacitor and the two switches (highand low- hasorder useful when the loop inductance already been minimized because the inductance it requires is small a as a PCB trace (see Figure7).

©2012 IEEE Electromagnetic Compatibility Magazine – Volume 1 – Quarter 3

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incorporating Ross. oss capacitance, Coss. Kam and Pommeren losses in VHF converters. This Ross is a loss related toCoutput GD CDS 8 shows the equivalen 6 loss. Figure natural attenuation of switch voltage ringing is strongly related to this incorporating Ross. L

Lgate

drain

CGS

Ldrain

CGD

C2

RL Snubber

M1

L1

ROSS

CDS Lsource ROSS CDS

Lgate CGD CGS

Figure 8. MOSFET Equivalent Circuit with Ross

Lgate observed in the switching Ross explains the self-damping of the MOSFET ROSS waveform. It can b M2 CGS measurement on a transmission line fixture using Vector Network Analyzer (VNA) as shown in Figure Lsource can be extracted from the calculated impedance from measured S21. C1

Vin Ross explains

It can be measurement on in Figure R Figure 8. MOSFET Equivalent Circuit with Ross . Ross can be extracted from the calculatedFigure impedance from measured S21with 8. MOSFET Equivalent Circuit M1 the self-damping of the MOSFET observed inDUT Ross the switching waveform. It can be D explains measurement on a transmission line fixture50Ω using Vector Network Analyzer (VNA)Line as shown in Figure Transmission Line 50Ω Transmission S Microstrip Trace Microstrip Trace can be extracted from the calculated impedance from measured S21. C2

PCB Trace Inductance

50Ω Transmission Line 50Ω Transmission Line Lsource Figure 8. MOSFET with Trace Ross Microstrip Trace Equivalent Circuit Microstrip Length =observed L1 Length = L2waveform. the self-damping of the MOSFET in the switching VNA VNA a transmission line fixture using Vector Network Analyzer (VNA) as shown Port1 Port2

Length = L1

Length = L2

50Ω Transmission DS(ON) Line

50Ω Transmission Line

Figure 9. Ross Measurement Setup VNA VNA L1 Port1 If there are MOSFETs with similar characteristics (R , Capacitances, Switching Port2 Speed, etc) with

D

M2 MicrostripitTrace Microstrip Trace would dampen the parasitic resonance that causes partSwith higher Ross would be most useful because Length = L1 Length = L2 DUT with two differe compares Vphase and radiated emission VNA from a synchronous buck converter test board VNA GND Port1 Port2 However, o FETs used in Figure 10 have similar Coss values, so the Vphase ringing frequency is similar. R , and thus results in lower V

ringing and radiated emission.

oss phase Figure 9. Ross Measurement Setup DUT 7. RL (Top) Snubber and PCB Implemented Inductor Figure 7.Figure RL Snubber and(Top) PCB Implemented Inductor for RL Snubber Figure 9. Ross Measurement Setup, Capacitances, Switching Speed, etc) with If there are MOSFETs with similar characteristics (RDS(ON) Vphase Comparison for RL Snubber (Bottom) (Bottom) dampen the parasitic resonance that causes part with higher Ross would be most useful because it would added on the source side of M2, allowing the source voltage to rise above ground potential during 20 Figure 9. Ross Measurement Setup

An RL snubber can also be added on the source side of M2, allowing the source voltage to rise above ground potential during the turn-on of M1 for a few nanoseconds, which can help prevent accidental turn-on of M2 due to coupled voltage to M2 gate. 3) MOSFET Selection Sagneri, Anderson and Perreault [11] introduced a MOSFET device parameter called Ross as a relevant device parameter for losses in VHF converters. This Ross is a loss related to output capacitance, Coss. Kam and Pommerenke [12] showed that the natural attenuation of switch voltage ringing is strongly related to this loss. Figure 8 shows the equivalent circuit of the MOSFET incorporating Ross. Ross explains the self-damping of the MOSFET observed in the switching waveform. It can be measured from an S21 measurement on a transmission line fixture using Vector Network Analyzer (VNA) as shown in Figure 9. The Ross of the device can be extracted from the calculated impedance from measured S21.

0 15 13.09 20 10

Vphase Comparison 13.11 13.13 13.15 Time [ s]

13.17

NTMFS4845, Coss = 650pF, Ross = 56m

15 5

FDMS8680, Coss = 690pF, Ross = 410m

10 0 13.09 5

13.11

13.13 Time [ s]

13.15

Radiated Emission Comparison

20 0 13.09 10

dB V/m

the inductance it requires is small and can be implemented as a PCB trace (see Figure7).

Votlage [V] Votlage [V]

Votlage [V]

so be compares Vphase and radiated emission from a synchronous buck converter test board with two differe ew nanoseconds, which can prevent turn-on of M2 to coupled voltage to M2 gate. Todd [8] and Kam et help al. [10] describes RL snubber, which a due Ifaccidental there are with similar characteristics , Capacitances, Switching Speed, etc) witho theDS(ON) Vphase ringing frequency is similar. However, FETs used in MOSFETs Figure 10 ishave C oss values, so (R 15 dual of the RC snubber. The RLpart snubber has several advantages. would be most useful because it would dampen the parasitic resonance that causes s with higher R Ross, and thus results oss in lower Vphase ringing and radiated emission. First, it is less affected by parasitics, and can thus be radiated implementand emission 10 from a synchronous buck converter test board with two differen compares Vphase ed targeting higher frequencies. In addition, is more10 useful Vphase Comparison ringing frequency is similar. However, on FETs used initFigure have similar Coss values, so theVphase 5 and radiated emission. when the loop inductance has R already been minimized because , and thus results in lower V ringing oss phase 20

13.17

NTMFS4845, Coss = 650pF, Ross = 56m FDMS8680 13.11 13.13 13.15 13.17 NTMFS4845 FDMS8680,Time Coss [= s]690pF, Ross = 410m

0

NTMFS4845, Coss = 650pF, Ross = 56m

-10

FDMS8680, Coss = 690pF, Ross = 410m

-20

50

100

150 200 250 300 Frequency [MHz] Figure Comparison of Vphase (Top) and Radiated Emission (Bottom) Figure 10.10. Comparison of Vphase (Top) and Radiated Emission (Bottom) for Two Different FETs with Similar Coss and Different Ross. for Two Different FETs with Similar Coss and Different Ross.

Recently, a variety of GaN transistors have been introduced into the market. They offer lower Coss an

a synchronous buck converter test board with two different If there are MOSFETs with similar characteristics (RDS(ON), problems. The information presented here will be updated as data becomes available. low-side FETs. These FETs used in Figure 10 have similar Coss Capacitances, Switching Speed, etc) with different Ross values, values, so the Vphase ringing frequency is similar. However, the part with higher Ross would be most useful because it would dampen the parasitic resonance that causes switch one FET has much higher Ross, and thus results in lower Vphase B. Coupling Path Level Mitigation Techniques ringing and radiated emission. ringing. Figure 10 compares Vphase and radiated emission from

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This section analyzes possible noise coupling paths and introduces corresponding mitigation techniq Root cause analysis has determined that parasitic LC resonance in the switching loop generates ©2012 IEEE Electromagnetic Compatibility Magazine – Volume 1 – Quarter 3 possible noise coupling paths can lead to radiation of this noise. In general, coupling paths can be categ

d coupling from the switching loop.

ugh Input DC Rail Measured Waveforms voltage waveform. with one 1uF Cin close to HS FET

clamps down the ringing on the falling edge. The conducted noise on theringing DC rail can problems, including conducted noise This type of It shows Falling that theEdge switch waveform andcause the input rail noise coincide in time. radiating from the cable, or board radiation, and power or signal occurs because of inadequate input decoupling or filtering. Further, the conducted noise on the input r 20 waveform. integrity problem. Broadband conducted noise on the power rail on the fa voltage Vphase rising edge of the phase voltage, because the low-side body diode clamps down the ringing can be mitigated input filters. Figureradiating 12 (Top) shows an This It shows that waveform ringing andusing theconducted input rail noise noise coincide in time. of c 15on the noise DCthe railswitch can cause problems, including from the cable,type or boar example of input filter implemented as a pi-filter. The pi-filter occurs because of inadequate input decoupling or filtering. Further, the conducted noise on the input ra signal integrity problem. Broadband conducted noise on the power rail can be mitigated using inpu 10 blocks thethe broadband conducted noise through the input side and on the fall rising edge of the phase voltage, because low-side body diode clamps down the ringing shows an example of input filter implemented as a pi-filter. The pi-filter blocks the broadband conduct results in including significantlyconducted lower radiated as shown in Figure 5 the noise on DC in rail can cause problems, noise radiating from the cable, or board side and results significantly lower radiated emission as shown inemission Figure 12 (Bottom). 12 (Bottom). signal integrity problem. Broadband conducted noise on the power rail can be mitigated using input

Rising Edge

Vphase

15

Voltage [V]

Voltage [V]

20

10 5 0

0

0

50

100

Time [ns]

100nH The pi-filter blocks the broadband conducte shows an example of input filter implemented as a pi-filter. Choke 150 600 650 side and 500 results550 in significantly lower radiated emission Las shown in Figure 12 (Bottom).

Time [ns]

π

Vin

+ CBULK 330uF Vin

12 10 8

0

50

100

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150

14

Vin

12 10 8

500

550

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Figure 11. Measured Vphase (Top) Figure 11. Measured Vphase (Top) andonConducted Noise on Vin Rail and Conducted Noise Vin Rail (Bottom) (Bottom)

Field Strength [dBuV/m] Field Strength [dBuV/m]

Vin

Voltage [V]

Voltage [V]

14

C100nH π1 Choke 33nF Lπ

Cπ2 33nF

+ CBULK

Cπ1

Cπ2

330uF

33nF

33nF

CIN 1uF

M1

L1

M2 M1

CIN 1uF

...

L1

...

Measured Radiated Emission M2

Without  Filter

20

Measured Radiated EmissionWith  Filter 0 20

Without  Filter With  Filter

-20 0 50

100

-20

150 200 Frqeuency [MHz]

250

300

Figure 12. Conducted Noise Reduction Using Input Pi-Filter (Top) 12. Conducted Noise Reduction Using Input Pi-Filter (Top) be conducted through the input DC rail to other parts of the system (power Figure plane, cables, and Vin soVin on) from and Measured Radiated Emission (Bottom) and Measured Radiated (Bottom) Recently, a variety GaN haveofbeen introduced buck converter, 50 100Emission 150 200 250 300 gure 11 shows observed noiseofon thetransistors input DC rail a synchronous along with the switch

Frqeuency [MHz] into the market. They offer lower Coss and may help to reduce The conducted noise in the input side can be also mitigated using appropriate capacitor Figure 12. Conducted Vin Noise Reduction Using Inputmitigated Pi-Filter (Top) values a EMI problems. The information presented here will be updated The conducted noise in the input side can be also and Measured Radiated Emission (Bottom) rail. shows the use of a filtering capacitor to reduce the conducted noise on a V in as data becomes available. using appropriate capacitor values and placements. Figure 13 shows the use of a filtering capacitor to reduce the conducted The conducted noise in the inputVin side can be also mitigated using appropriate capacitor values an noise on a Vin rail.

showsTechniques the use of a filtering capacitor to reduce the conducted noise on a Vin rail. B. Coupling Path Level Mitigation M1 This section analyzes possible noise coupling paths and introduces corresponding mitigation techniques.

Vin

+CBULK 330uF

+CBULK 330uF

Cfilter

5.6nF Cfilter 5.6nF

CIN 1uF

CIN 1uF

M1 M2

L1

L1

... ...

Root cause analysis has determined that parasitic LC resoFigure 13. Conducted Vin Noise Reduction Using nance in the switching loop generates broadband noise. SeverM2 a Filter Capacitor al possible noise coupling paths can lead to radiation of this Thebe1uF capacitor,asCeither IN forms the switching loop, along with M1 and M2. The largest value in a giv noise. In general, coupling paths can categorized Figure 13. Conducted Using a Filter Capacitor in Noise Reduction enough charge is provided switching (charging CossUsing and switching loop resonance cur Figure 13.for Conducted VinVNoise Reduction a Filter Capacitor conducted or field-coupled. Kamtoetensure al. [5] that divide the possible coupling paths into the followingCfilter four functions groups: as a filtering capacitor to filter out the conducted high-frequency broadband noise at The 1uF CIN forms at the switching loop, with M1 loop and M2. The largest value in a give ringing (switching resonance) frequency. The effe to capacitor, have self-resonance around Vphase The 1uF capacitor, Calong • conducted through input DCselected rail, IN forms the switching loop, along with M1 to ensure that enough charge is provided for switching (charging C and switching loop resonance curr oss and C , so its location is important. Figure 14 illustrat heavily on the mutual inductance between C and M2. TheINlargest filter value in a given package is used for CIN to • conducted through output DC rail, functions asand aperformance filtering capacitor filter out location the conducted broadband noise filterswitch . that Here, the of Cfilterhigh-frequency wasforvaried among positions a, b,atant inductance on the ofensure Cfilterto enough charge is provided switching (charging • electric field coupling fromCthe node, ringing (switching loop resonance) frequency. The effec selected to have self-resonance at around V phase , their mutual inductance decreases. Figure 14 (bottom) shows the measured transfer functio from C Coss and switching loop resonance current). The 5.6nF capaci• magnetic field coupling from the switching loop. IN and C , so its location is important. Figure 14 illustrate heavily theand mutual between C IN filter rail. As C is moved away from C , filtering becomes more effective. drain ofonM1 the Vinductance functions as a filtering capacitor to filter out the contor C in filter filter IN the location of Cfilter noise was varied among positions a, b, an on the performance of ducted Cfilter. Here, high-frequency broadband at the input rail. Its 1) Conducted through Input DCinductance Rail inductance decreases. Figure 14 (bottom) shows the measured transfer function from through CIN, their value is selected to have self-resonance at around Vphase Broadband noise can be conducted themutual input DC rail to rail.from As Cfilter is moved awayloop fromresonance) CIN, filtering becomes effective. drain of M1 and and the V ringing (switching frequency. Themore effectiveother parts of the system (power plane, cables, soinon) ness of Cfilter depends heavily on the mutual inductance which it can radiate. Figure 11 shows observed noise on the between CIN and Cfilter, so its location is important. Figure 14 input DC rail of a synchronous buck converter, along with the illustrates the effect of this mutual inductance on the perforswitch voltage waveform. mance of Cfilter. Here, the location of Cfilter was varied among positions a, b, and c. As Cfilter moves away from CIN, their mutuIt shows that the switch waveform ringing and the input rail noise al inductance decreases. Figure 14 (bottom) shows the meacoincide in time. This type of conducted noise coupling occurs sured transfer function using VNA between the drain of M1 and because of inadequate input decoupling or filtering. Further, the the Vin rail. As Cfilter is moved away from CIN, filtering becomes conducted noise on the input rail is more severe with the rising more effective. edge of the phase voltage, because the low-side body diode ©2012 IEEE Electromagnetic Compatibility Magazine – Volume 1 – Quarter 3

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10

GND

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[c] [b] [a]

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[2]

[1]

GND 0

CBULK

[3]

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2

10

Frequency [MHz]

Figure 14. Different Cfilter Positions [a], [b], and [c] (Top) and

Figure 14. Different Cfilter Positions [a], [b], [c]and (Top) Measured Transfer Function between M1 and Drain Vinand Rail (Bottom) Measured Transfer Function between M1 Drain and Vin Rail (Bottom)

3

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filter

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LOOP

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Frequency [MHz] t the mutual inductance between CIN and Cfilter is critical. Figure 15 (Top) shows some possible effective Figure 15. Effective Locations and and [3] (top) and shows the mutual CINthe andmutual Cfil- inductance Figure 15. Effective Locations [2], [1], and [2], [3] (top) Position 1,Figure Cfilter 14 is on the that opposite side ofinductance CIN, thus between minimizing between them.forInCfilterfor[1],Cfilter Measured Transfer Function between M1 Drain and Vin Rail (Bottom) Transfer Function between M1 Drain and Vin Rail (Bottom) is critical. Figure 15 (Top) shows some possible effective posi- 2 isMeasured mm away ter from CIN where mutual inductance is also minimized. Position two capacitor widths away ce was minimum between1,CCIN and Cfilter which side filtering was similar to that in is on the at opposite of CINeffectiveness , tions of Cdistance filter. In Position filter The three locations of Cfilter shown in Figure 15 (Top) are all similarly effective, as shown in Figu thus minimizing the mutual inductance between them. In Position The switch node is typically placed on the top or bottom layer of noise time domain andand its output FFT magnetics spectrum.are The shows measured conducted V 3, Cfilter is 15mm away from CIN where mutual inductance is also inthe boardinbecause the switches con-noise on the demonstrated by the transfer function measured in Figure 15 (Bottom). minimized. Position 2 is two capacitor widths away from CIN. This nected to the node. Depending on the size of the switch node, it is distance was minimum distance between CIN and Cfilter at which possible to have an electric field coupling from the exposed filtering effectiveness was similar to that in Positions 1 and 3. switch node island. Several studies [4, 13, 15] describe a method to measure electric field coupling using a TEM cell. This method The three locations of Cfilter shown in Figure 15 (Top) are all simiinvolves creation of a test board on a 10 ×10 cm PCB with a conlarly effective, as shown in Figure 15 (Bottom). Figure 16 shows verter circuit on one side. The board is mounted as part of the measured conducted Vin noise in time domain and its FFT specTEM cell with the converter side facing the inside of the cell. The trum. The noise on the input rail is filtered out demonstrated by the output of the two ports of the TEM cell is combined in phase using transfer function measured in Figure 15 (Bottom). a broadband hybrid. More details on this testing procedure are available in [13] and [15]. 2) Conducted through Output DC Rail In the case of a synchronous buck converter, output is isolated by Figure 17 (Top) shows layout with different switch node island a large output inductor, which makes high frequency broadband sizes. The measured E-coupling using the TEM cell as shown in conductive noise less likely to pass through the output DC rail. Figure 17 (Bottom) shows the reduction in electric field coupling However, a similar technique applies for mitigating noise conductwith reduced switch node island size. ed through the output side. 4) Magnetic Field Coupling from Switching Loop 3) Electric Field Coupling from Switch Node The switching loop in a synchronous buck converter contains high In a synchronous buck converter, the switch node contains high RF current not only because of the fast switching, but also dv/dt waveforms with, in most cases, high frequency oscillation. because of the parasitic LC resonance in the switching loop. This

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©2012 IEEE Electromagnetic Compatibility Magazine – Volume 1 – Quarter 3

shows the spectrum of measured Hx at the strongest location. It also shows the broadband noise centered aro C filter frequencyNoof this converter. 12 C

at Location [1]

C

at Location [2]

filter

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Figure 16. Measured Conducted Vin Noise in Time Domain (Top) and FFT Spectrum (Bottom) for Cases shown in Figure 15 10 Rail8180

1000 1000 8200 8220 8240 8260 8280 8300 8320 Output DC Time [ns] onous buck converter, output is isolated by a large output inductor, which makes high frequency 800 800 800 1000 1400 600 800 1000 1200 1400 Measured VinDC (FFT Spectrum) e less likely to pass through the output rail. However, a similar technique600 applies for 1200 mitigating X X e output side. Measured H at Strongest Location No C x -20 filter

[dBm]

Voltage [dBV]

C at Location [1] ling from Switch Node -40 filter converter, the-40switch node contains high dv/dt Cwaveforms with, in most cases, high frequency at Location [2] filter e is typically placed on the top or bottom layer of the because the switches C board at Location [3] -60 and output magnetics filter Depending on-60 the size of the switch node, it is possible to have an electric field coupling from the d. Several studies [4, 13, 15] describe a method to measure electric field coupling using a TEM cell. -80 -80 on a 10 ×10 cm PCB with a converter circuit on one side. The board is mounted as ion of a test board he converter side facing the inside of the cell. The output of the two ports of the TEM cell is combined -100 50 100 150 200 250 300 50 100 150 hybrid. More details on this testing procedure are available in [13] and [15]. Frequency [MHz]

200 250 300 Frequency [MHz] Figure Measured x Near-field Map at Vphase Ringing Frequency (Top) Figure switch 16. Measured Vin Noise Time Domain (Top) ayout with different nodeConducted island sizes. Theinmeasured E-coupling using18.the TEM H cell as shown and Local Spectrum at Strongest Location (Bottom) Figure 16. Measured Conducted Vin Noise Time Domain FFT Spectrum (Bottom) forinCases shownswitch in(Top) Figurenode 15 islandFigure ws the reduction in and electric field coupling with reduced size. 18. Measured Hx Near-field Map at Vphase Ringing Frequency (Top) and FFT Spectrum (Bottom) for Cases shown in Figure 15 and Local Spectrum at Strongest Location (Bottom)

ugh Output DC Rail Figure 19 illustrates the effect ofhigh switching looptosize on coupling. two different compared in magnetic other regions. FigureThe 18 (Bottom) showsC IN location nchronous buck converter, output is isolated by a large output inductor, which makesthat high frequency Larger Switch is further away from M1 drain (makin shown in Figure 19 (Top). Figure 19 (Bottom) shows that when C IN spectrumapplies of measured Hx at the strongest location. It also noise less likely to pass DC rail. However, a similarthe technique for mitigating Nodethrough Island the output larger), the magnetic field spreads over a larger region, increasing the likelihood of magnetic shows the broadband noise centered around the Vphase ringingfield coupling. h the outputC1 side. C1 Vin

M1

Vin

D oupling from Switch Node

M1

frequency of this converter.

D

19 illustrates the effect of switching loop size on magnetic S S uck converter, the switch node contains high dv/dt waveforms with,Figure in most cases, high frequency coupling. The two different C IN locations, 1 and 2 are used as node is typically placed top or bottom layer of D on theL1 D the board L1 because the switches and output magnetics shown in Figure 19 (Top). Figure 19 (Bottom) shows that when CIN ode. Depending M2 on the M2it Sis possible to have an electric field coupling from the S size of the switch node, is further away from M1 drain (making the switching loop larger), land. Several studies [4, 13, 15] describe a method to measure electric field coupling using a TEM cell. the magnetic field spreads over a larger region, increasing the GND reation of a test board on a 10 ×10 cm PCB with GND a converter circuit on one side. The board is mounted as 13 likelihood of magnetic field coupling. th the converter side facing the inside of the cell. The output of the two ports of the TEM cell is combined and hybrid. More details on this testing procedure are available in [13] and [15]. C2

C2

Figure 20 shows the measured radiated emission from the test board with two different capacitor positions shown in Figure 19. -70 ws layout with different switch node island sizes. The measured E-coupling using the TEM cell as shown Large V Plane The effect of input capacitor position on both peak frequency and phase -75 hows the reduction in electric field coupling with reduced switch node island size. Reduced V Plane magnitude can be observed. phase E-coupled Power [dBm]

Measured E-Coupling from Exposed Vphase Plane Using TEM Cell

-80 -85 -90 -95

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Magnetic field coupling from the switching loop can also be measured using a TEM cell similar to electric field coupling by subtracting the signals from the two ports of the TEM cell using a broadband hybrid instead. More detailed measurement procedures are described in [4], [14], and [15].

C2 17. Example of V Figure Island Reduction Figure 17. Example of Vphase Islandphase Reduction (Top)C2 S(Top) S and Measured Electric Field Coupling using Cell (Bottom) and Measured Electric Field Coupling using TEM TEM Cell (Bottom)

D D L1 L1 M2 M2 S S resonance causes more current at the resonant frequency. The

C. Direct Radiation Level Mitigation Techniques

oupling from Switching Loop The last path for the noise coupling is the direct radiation from spectrum of theGND measured magnetic near-field around the switchGND a synchronous buck converter contains highofRF current because the of the fastitself. switching, but the alsophysical size of the switching circuit Typically, ing loop illustrates higher magnitude RF current atnot theonly resonant LC resonance in theFigure switching loop. Thistheresonance more map current at theofresonant frequency. loop a synchronous buckThe converter is too small to be an effifrequency. 18 (Top) shows measuredcauses Hx near-field d magneticaround near-field around the switching loop illustrates higher magnitude of RF currentantenna. at the resonant the switching loop of a synchronous buck converter at cient resonant However, because of high resonant converter p) shows Vthe measured Hx near-field map around the switching loop of a synchronous current in thebuck switching loop, at the direct radiation from the phase ringing frequency. Hx is mainly due to the current flowing in Hx is mainly due to the current flowing in the y-direction, with which the switching loop is aligned. Thebe disregarded, especially in an the y-direction, with which the switching loop is aligned. The mag- switching loop cannot always sity near the FETs and switching loopthe is FETs very and highswitching compared to isthat in other regions. Figure 18 (Bottom) netic near-field intensity near loop very open system. easured Hx at the strongest location. It also shows the broadband noise centered around the Vphase ringing er. ©2012 IEEE Electromagnetic Compatibility Magazine – Volume 1 – Quarter 3

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He showed that when the switching loop is designed in such a way that the ground plane function 14 compensation loop, the peak radiation is minimized because the radiation pattern becomes more isotropic as in other cases.

GND

[1], [2] Two Different CIN Locations

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Figure 21. Simulated LayoutLayout 1 (Left) Layout 2 (Right) Figure 21. Simulated 1 and (Left) and Layout 2 (Right)

[1], [2] Two Different CIN Locations

M1 GND Figure 21 compares two sample layouts of a switching loop and their simulated patterns. Note Simulated Radiation Pattern - Layoutradiation 1 S

CIN

Y

a solid ground plane on the next layer, but not shown in the figure 1uF 0 for clarity. In layout 1, in Figure 21 Hx CapacitorL1 PositionD1 Hx Capacitor Position 2 oriented vertically (Its normal direction is parallel to the ground plane.). On330 the other hand, in the layout 2 30 M2 2200 2200 S oriented horizontally (Its normal direction is normal to the ground plane.). In this case, the ground plane a 50 [dB V/m] magnetic flux generated by the current GND 2000loop, canceling out a significant portion of the original 2000 canceling 40 60 300 Hx Capacitor Position 1 H Capacitor 2 X 10cm board in a free space with two different switching loop layouts was s Radiated field fromPosition a 10cm x 30 1800 1800 2200 2200 electromagnetic simulation tool. Figure 21 shows the simulated radiated field (normalized to 1W inpu 20 2000 2000 1600 1600 different layouts at 3m away from the board. 1800

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and(Top) [2] (Top) and Figure 19. CIN Two Different CIN Locations Figure 19. Two Different Locations [1] and[1][2] and Simulated Radiation Pattern - Layout 2 Measured Hx Near-fieldC Map at Vphase Ringing [1]Frequency and [2](Bottom) (Top) and Figure 19. Two Different IN Locations Measured Hx Near-field Map at Vphase Ringing Frequency (Bottom) 0 e 20 shows the measured radiated emission from the test board with two different capacitor positions shown in Figure 19. Measured Hx Near-field Map at Vphase Ringing Frequency (Bottom)

ct of input capacitor position on both peak frequency and magnitude can be observed.

20 10 0

Field Strength [dB V/m]

easured radiated emission from the test board with two different capacitor positions shown in30Figure 19. Measured Radiated Emission tor position on both peak frequency and magnitude can be observed. 50 [dB V/m] Capacitor Position 1 20 Measured Radiated Emission 40 60 Capacitor Position 2

10

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20 10

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Figure 20. Measured Radiated Emission with Different Input Capacitor Positions

240

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etic field coupling the switching loop can also bewith measured using a TEM cell similar to electric field coupling by Figurefrom 20. Measured Radiated Emission Different Input Capacitor Positions -10

150

210 180

ng the signals from the two ports of the TEM cell using a broadband hybrid instead. More detailed measurement Figure 22.Simulated SimulatedRadiation RadiationPatterns Patterns Layout 1 (Top) 2 (Bottom) Figure 22. forfor Layout 1 (Top) andand 2 (Bottom) res are described in [4], [14], and [15].

Bhargava [16] analyzed and presented effective layout strategies Figure 22 showsbuck that conlayout 2 solid (with a horizontally loop) results for reducing broadband radiation from a synchronous ground plane on theoriented next layer,switching but not shown in the figurein forlower peak 50 100 150 pattern of200 250 in Figure300 layoutlayout 1 shown 22 In(Top) of a magnetic dipole, vertias expected. On verter. His investigation compared a few different schemes clarity. layoutis1,similar in Figureto21that the switching loop is oriented Frequency [MHz] results infocusing more isotropic radiationcally pattern, whichdirection resultsisinparallel lowertopeak radiation, as On shown with similar loop inductances (minimized); on their radia(Its normal the ground plane.). the in Figure 2 Figure 20. Measured Radiated Emission with Different Input Capacitor Positions suggests solid ground plane other used hand, as a magnetic flux-canceling loop effectively reduce radiatio tion characteristics and equivalent electricthat andamagnetic dipoles in the layout 2, the switching loopcan is oriented horizontalg from theusing switching loop can also be measured using a TEM cell similar to electric field coupling by both measurements and full-wave simulations. He showed ly (Its normal direction is normal to the ground plane.). In this case, om the two of switching the TEMloop cellis using a broadband measurement that ports when the designed in such a wayhybrid that theinstead.theMore grounddetailed plane acts as a magnetic flux-canceling loop, canceling n [4], [14], and [15]. ground plane functions as a magnetic flux compensation loop, the out a significant portion of the original magnetic flux generated by peak radiation is minimized because the radiation pattern the current in the switching loop. Radiated field from a 10cm X 10cm becomes more isotropic rather than dipole-like as in other cases. board in a free space with two different switching loop layouts was simulated in Full-wave electromagnetic simulation tool. Figure 21 Figure 21 compares two sample layouts of a switching loop and shows the simulated radiated field (normalized to 1W input power) their simulated radiation patterns. Note that both designs have a for the two different layouts at 3m away from the board.

-20

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©2012 IEEE Electromagnetic Compatibility Magazine – Volume 1 – Quarter 3

Figure 22 shows that layout 2 (with a horizontally oriented switching loop) results in lower peak radiation. The radiation pattern of layout 1 shown in Figure 22 (Top) is similar to that of a magnetic dipole, as expected. On the other hand, layout 2 results in more isotropic radiation pattern, which results in lower peak radiation, as shown in Figure 22 (Bottom). This pattern suggests that a solid ground plane used as a magnetic flux-canceling loop can effectively reduce radiation from the circuit itself.

IV. Conclusion This paper discusses the root cause, coupling paths, and mitigation methods for broadband noise from a synchronous buck converter. Root cause of the broadband noise is the parasitic LC resonance in the switching loop formed by loop inductance and LS FET Coss. Three types of EMI mitigation techniques were discussed; circuit level, coupling-path level, and direction-radiation level. Circuit-level techniques include optimization of local layout and component placement to reduce loop inductance, addition of losses using snubber circuits, and selection of LS FET device based on Ross. The noise coupling paths include conducted and field coupled paths. Conducted noise can be mitigated by a proper filtering structure such as pi-filter or filtering capacitor. Filtering capacitor placement is crucial because the mutual inductance between CIN (which completes the switching loop) and Cfilter is critical for filter performance. Field-coupling paths were divided into electric field coupling from exposed switch node island and magnetic field coupling from switching loop resonance current. Electric field coupling can be reduced by reducing the size of the exposed switch node island. A magnetic near-field map around the switching loop shows that a smaller loop results in a more confined magnetic field, which lowers the chance of magnetic field coupling. Finally, this paper discussed layout optimization for direction radiation from the circuit. Of the two layout variants studied, a solid ground plane as a magnetic flux-cancelling loop proved most effective layout strategy to reduce peak radiation from the converter circuit. This work evaluated a variety of methods for reducing broadband noise from a synchronous buck converter. Careful design and layout optimization using these methods permit design of a converter with better EMC performance. EMC

References [1] Pressman; K. Billings; T. Morey, Switching Power Supply Design (3rd ed.), McGraw-Hill, 2009. [2] K. Mainali; R. Oruganti, "Conducted EMI Mitigation Techniques for SwitchMode Power Converters: A Survey," Power Electronics, IEEE Transactions on , vol.25, no.9, pp.2344-2356, Sept. 2010 [3] H. Li; D. Pommerenke; W. Pan; S. Xu; H. Ren; F. Meng; X. Zhang; , "Conducted EMI simulation of switched mode power supply," Electromagnetic Compatibility, 2009. EMC 2009. IEEE International Symposium on , vol., no., pp.155-160, 17-21 Aug. 2009 [4] K. Kam; D. Pommerenke; C. Lam; R. Steinfeld, "EMI analysis methods for synchronous buck converter EMI root cause analysis," Electromagnetic Com-

patibility, 2008. EMC 2008. IEEE International Symposium on , vol., no., pp.1-7, 18-22 Aug. 2008 [5] K. Kam; D. Pommerenke; F. Centola; C. Lam; R. Steinfeld, "EMC guideline for synchronous buck converter design," Electromagnetic Compatibility, 2009. EMC 2009. IEEE International Symposium on , vol., no., pp.47-52, 17-21 Aug. 2009 [6] Bhargava; D. Pommerenke; K. Kam; X. Chang; F. Centola; C. Lam; R. Steinfeld, "EMI prediction in switched power supplies by full-wave and non-linear circuit co-simulation," Electromagnetic Compatibility, 2009. EMC 2009. IEEE International Symposium on , vol., no., pp.41-46, 17-21 Aug. 2009 [7] K. Koo; J. Kim; M. Kim; J. Kim, " Impact of PCB Design on Switching noise and EMI of Synchronous DC-DC buck Converter," presented at 2010 IEEE International Symposium on Electromagnetic Compatibility, Fort Lauderdale, FL, Jul. 2010 [8] P. Todd, Snubber Circuits- Theory , Design and Application, Available: http:// focus.ti.com/lit/an/slup100/slup100.pdf [9] Z. Zhang, RC Snubber Design in EZBUCK Circuit, Available: http://www. aosmd.com/pdfs/appNotes/PIC-005.pdf [10] K. Kam; D. Pommerenke; F. Centola; C. Lam; R. Steinfeld, “Method to Suppress the Parasitic Resonance Using Parallel Resistor and Inductor Combination To Reduce Broadband Noise from DC/DC Converter”, presented at EMC'09/ Kyoto, Kyoto International Conference Center, Kyoto, Japan, July 20-24, 2009 [11] A. Sagneri; D. Anderson; D. Perreault, "Optimization of transistors for very high frequency dc-dc converters," Energy Conversion Congress and Exposition, 2009. ECCE 2009. IEEE , vol., no., pp.1590-1602, 20-24 Sept. 2009 [12] Kam, K.; Pommerenke, D.; Bhargava, A.; Steinfeld, B.; Lam, C.; Centola, F.; , "Quantification of Self-Damping of Power MOSFET in a Synchronous Buck Converter," Electromagnetic Compatibility, IEEE Transactions on , vol. PP, no.99, pp.1-3, 0 [13] S. Deng; T. Hubing; D. Beetner, "Characterizing the Electric Field Coupling from IC Heatsink Structures to External Cables Using TEM Cell Measurements," Electromagnetic Compatibility, IEEE Transactions on , vol.49, no.4, pp.785-791, Nov. 2007 [14] S. Deng; T. Hubing; D. Beetner, "Using TEM Cell Measurements to Estimate the Maximum Radiation From PCBs With Cables Due to Magnetic Field Coupling," Electromagnetic Compatibility, IEEE Transactions on , vol.50, no.2, pp.419-423, May 2008 [15] V. Kasturi; S. Deng; T. Hubing; D. Beetner, "Quantifying electric and magnetic field coupling from integrated circuits with TEM cell measurements," Electromagnetic Compatibility, 2006. EMC 2006. 2006 IEEE International Symposium on , vol.2, no., pp.422-425, 14-18 Aug. 2006 [16] Bhargava, “EMI suppression of DC-DC synchronous buck converters by layout optimizations and EMI prediction using non-linear and SPICE circuit co-simulation”, M.S. thesis, Dept. of Elect. and Comp. Eng., Missouri S&T, Rolla, MO, 2010 [17] Bhargava, A.; Pommerenke, D.; Kam, K. W.; Centola, F.; Lam, C.; , "DC-DC Buck Converter EMI Reduction Using PCB Layout Modification," Electromagnetic Compatibility, IEEE Transactions on , vol.53, no.3, pp.806-813, Aug. 2011

Biographies: Keong W. Kam (M’07) was born in South Korea in 1986. He received the B.S.E.E degree in electrical engineering, in 2007, from the University of Missouri – Rolla, MO, which is now Missouri University of Science and Technology. He is currently pursuing the Ph.D. degree in electrical engineering from the EMC Laboratory at Missouri University of Science and Technology. His current research interests include EMC of switched power converters, intra-system RF interference, and RF system design. Dr. David Pommerenke received the Ph.D. from the Technical University Berlin, Germany in 1996. After working at Hewlett Packard for five years he joined the Electromagnetic Compatibility Laboratory at the University Missouri Rolla in 2001 where he is currently a professor. He has published more than 100 papers and is listed as an inventor on 11 patents. He researches EMC with emphasis on measurement and instrumentation, electronics and immunity of electronic circuits, for example, ESD.

©2012 IEEE Electromagnetic Compatibility Magazine – Volume 1 – Quarter 3

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Ankit Bhargava (M’05) was born in India in 1985. He received his B.S.E.E in 2007 in Electronics and Communication from University of Nagpur – India. He finished his Masters in Electrical Engineering from EMC Laboratory in University of Missouri – Rolla which is now Missouri University of Science and Technology. His research interests include EMI in switched power supplies, co-simulations (full-wave + SPICE), RF system and power design. He worked with Research in Motion in Chicago as a power design engineer full power design for low power handheld, current drain and battery and power management. He is currently working with Nvidia (Santa Clara) as a power designer for Tegra based smart phones and tablets. Cheung-Wei Lam received the B.S. degree in electronics from the Chinese University of Hong Kong, Shatin, Hong Kong, in 1987, and the S.M. and Ph.D. degrees in electrical engineering and computer science the Massachusetts Institute of Technology, Cambridge, MA, in 1989 and 1993, respectively. He is currently the Chief EMC Technologist at Apple Inc., Cupertino, CA. Prior to joining Apple, he was a Co-Founder and Principal Engineer at Transcendent Design Technology and, earlier, a Principal Engineer at Viewlogic’s Advanced Development Group (formerly Quad Design Technology). From 1988 to 1993, he was with the MIT Research Laboratory of Electronics, where his focus was on modeling of high-speed interconnects and superconducting transmission lines. He has authored or presented numerous technical papers and presentations on electromagnetic compatibility and signal integrity related subjects in the US, in Europe and in Asia. 037-Gb IEEE No Boundaries HALF 12/1/05 11:28 Page His research interests include board and system level design and analysis for electromagnetic compatibility, radio frequency inter-

ference, and signal integrity. Dr. Lam was a co-recipient of the best paper award at the 1996 IEEE International Symposium on EMC. He is a past IEEE EMC Society Distinguished Lecturer and currently serves in the IEEE EMC Society Respected Speakers Bureau. He has also served on the IEEE EMC Society TC-9 Computational Electromagnetics committee, the IEEE EMC Society TC-10 Signal Integrity committee, and the SAE EMC Modeling Task Force committee. Federico Pio Centola received his Laurea degree in electrical engineering from the University of L'Aquila, Italy and the M.S. degree in electrical engineering in 2003 from the Missouri Science and Technology University (formerly known as University of Missouri Rolla). From 2003 to 2008, he worked for Flomerics Inc. as a Senior Application Engineer. Since 2008 he has been an EMC Technologist for Apple. His research interests include 3D full-wave numerical simulations, electrostatic discharge and shielding techniques. Robert Steinfeld received his Industrial Technology degree from San Jose State University in 1972. He has worked for Apple for the past 29 years in the EMC Engineering Group in various capacities from EMC Engineer, EMC Technology Engineer, Wireless Compliance Manager, and EMC Manager. Robert has presented at numerous EMC Symposia, and holds two patents in the area of EMC. Prior to Apple, he worked at Anderson Jacobson for 10 years, designing data communications equipment. His current interests include automating ESD and emis1 sions testing, intra-system interference resolution, and mechanical design for EMC.

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©2012 IEEE Electromagnetic Compatibility Magazine – Volume 1 – Quarter 3