Prediction of Microelectronics Thermal Behavior in ... - CiteSeerX

Prediction of Microelectronics Thermal Behavior in Electronic Equipment: Status, Challenges and Future Requirements 1

Peter Rodgers1, Valérie Eveloy2 CALCE Electronic Products and Systems Center, University of Maryland, College Park, MD 20742, USA Internet: www.calce.umd.edu E-mail: [email protected] 2 Electronics Thermal Management Ltd., Upper Quay, Westport, Co. Mayo, Ireland Internet: www.etmcooling.com E-mail: [email protected]

Abstract Developing virtual performance- and reliability predictive techniques has become essential for the development of (micro)electronic systems. This paper provides an overview of current predictive methodologies, challenges and requirements for the modeling of microelectronics thermal behavior. Critical modeling issues are discussed, from optimizing Integrated Circuit (IC) packaging thermal performance to predicting operational temperature in application environments. A systematic assessment of numerical predictive accuracy for board-mounted electronic component heat transfer is presented. From this evaluation, perspective is given on the current capabilities of Computational Fluids Dynamics (CFD) as a design tool to predict component operational temperature in electronic systems. Potential development areas are discussed for improved analysis. 1. Introduction Many Integrated Circuit (IC) packaging failure mechanisms have been found to be dependent upon spatial temperature gradients, temperature cycle magnitude, rate of temperature change, or absolute temperature [1], while die circuit electrical performance can be highly sensitive to operating temperature [2]. Therefore, temperature must be controlled to meet both performance and reliability requirements. While temperature gradients can be difficult, if not impossible to measure experimentally, numerical analysis can be used to estimate these variables. Such predictions may then be applied as boundary conditions in Physics-of-Failure (PoF) reliability prediction methods [1,3-6]. Over the last decade, thermal design practices within the electronics industry have progressed from basic analytical and semiempirical calculations, applicable to simple systems in tandem with extensive physical prototype characterization, to a high reliance on virtual prototyping using numerical predictive techniques. Their use has been enabled by increases in computational power, and can contribute to significantly reduce both prototyping costs and development cycle times. Their application ranges from optimizing IC packaging thermal performance [7], to predicting operational temperature in application environments. This paper aims to provide an overview of the challenges posed for the modeling of thermal phenomena in microelectronics. While focus is placed on the prediction of component operational temperature, the optimization of package design,

assembly processes and reliability tests by numerical analysis are also discussed. The author makes no claim to cover the whole field, but endeavors to best treat the topic within the space constraints allowed for this article. 2. Predictive Methodologies IC package level analysis. The role played by component vendors in the overall thermal design process of electronic systems has typically been confined to optimizing IC packaging steady-state thermal performance within prescribed reliability constraints. Standardized approaches [8-10] are used to characterize package thermal performance as single valued thermal resistances. These ‘figures-of-merit’ values are derived from either singly board-mounted components analyzed in still-air [11,12] and wind tunnel environments [12,13], or cold plate-mounted conduction-cooled packages [14]. Numerical tools now permit these standardized tests to be simulated, with experimental prototyping reduced to verifying optimized packaging solutions. Such an analysis is typically undertaken using numerical codes having unstructured grid modeling capabilities, but restricted to solid modeling of conductive heat transfer. The prescribed convective heat transfer coefficient is calculated from semi-empirical correlations [15-18] or derived from calibration of junction temperature predictions with measurement [19,20]. This approach offers considerable computational savings when compared against Computational Fluids Dynamics (CFD)-based methods, but has limited applicability. The modeling approximations involved have been found to be sufficiently robust in free convection conditions [15,18], which primarily results from insensitivity of the heat transfer to convective boundary conditions [21]. However, their limitations are more critical for forced convection, where the convective heat transfer coefficients can vary considerably over the component/board surfaces [22]. Apart from yielding erroneous thermal performance estimates, inaccurate modeling of the temperature distribution within the component body can adversely impact on the accuracy of thermo-mechanical analysis [23]. With advances in both computational power and CFD meshing/gridding technology, permitting the modeling of finer architectural detail, the motivation for integrating CFD-based analysis into the design/qualification process of IC packaging is therefore more evident. A variety of IC packaging modeling methodologies generically applicable in CFD

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codes dedicated to the thermal analysis of electronics have been developed for different package types [24-39]. These methodologies can easily be adapted to the analysis of new packaging technologies. Many electronic parts are subjected to transient operating conditions in the course of their life, due to dynamic power operation or varying ambient conditions. The majority of numerically-based thermal analyses performed on electronic equipment in recent years, however, have been steady-state [40]. This is essentially attributed to previous reliability prediction methods, such as MIL-HDBK-217F, focusing on steady-state temperature, as well as design for continuous operation and prohibitive computational requirements for transient analysis. Previously reported numerical studies on transient component heat transfer have generally been confined to the analysis of conduction-cooled devices, with user-prescribed temperature boundary conditions at the domain boundaries [41-44]. Eveloy et al. [45] analyzed the thermal behavior of an air-cooled board-mounted component using CFD, and found junction temperature to be accurately predicted for dynamic power dissipation, in both fixed and varying ambient air temperature conditions. This evaluation showed that CFD analysis could play an important role in providing critical boundary conditions for component electrical and thermo-mechanical behavior analyses requiring transient boundary conditions. To date, the electronics industry has essentially relied upon experimental testing and the acquisition of field experience to optimize both component assembly processes and reliability testing. This suggests two other potential application areas for CFD analysis. The thermal stresses induced during assembly processes, such as surface-mount soldering, have been well documented [46]. Unless optimized, assembly conditions may result in the package failing during assembly or having in-built defects that can later affect operational performance and reliability [47]. As the heat transfer processes involved are typically highly conjugate, realistic temperature predictions can only be obtained using CFD methods. On the other hand, PoF approach-based reliability prediction methods rely on the accurate determination of testing parameters, which must accelerate the same failure mechanisms as those taking place in the application environment. Warner et al. [48] point out that it is difficult to include, for example, the temperature difference within the package and board in an experimental accelerated environment, and that to accelerate this temperature difference requires the knowledge of the application environment. In such instances, and on the premise that sufficient predictive accuracy can be obtained, CFD analysis could more accurately provide the necessary boundary conditions. The growing popularity of numerical tools has also influenced thermal performance characterization methods for IC packaging. The limited applicability of single valued thermal resistances to predict component operational temperature in application environments has been well documented [49,50]. Such limitations are most

evident for junction-to-ambient parameters, whereas junction-to-board thermal resistances have been found to be more robust [51] although not fully reliable. In this regard, the key role that CFD analysis now plays in the thermal design of electronic equipment has helped to motivate a radical change in philosophy. Rather than just providing single ‘figure-of-merit’ values to characterize thermal performance, component vendors are encouraged to provide so-called ‘reduced’ or ‘compact’ thermal models (CTMs) [52,53]. Such models are simplified few parameter-based representations of the package conductive domain, typically consisting of thermal resistor networks for steady-state heat transfer [52-58]. The use of such representations can provide estimates of electronic component operating temperature at rack- or system level, which may be computationally unfeasible using detailed component geometry modeling. This modeling approach can therefore also contribute to improved design productivity by reducing modeling efforts. In turn, CTMs may also help overcome other issues associated with detailed component modeling, such as uncertainties in packaging material thermo-physical properties, and proprietary package architecture. Although compact modeling techniques are promising, a number of issues are still to be resolved before CTMs can be routinely adopted for the prediction of component operating temperature in electronic systems [59]. With ever-rising heat fluxes, system miniaturization and emerging technologies, such as Micro-ElectroMechanical Systems (MEMs), the modeling of micro- (11000 um) and nano- (sub-micron) scale heat transfer is becoming an increasingly important area of development for both the design of microelectronics, and the integration of micro cooling systems at chip level [60]. Devoe [61] reviews critical thermal issues in micro-scale systems technology, which generally involves coupledfield behavior, and thus a multi-physics modeling approach. Sabry [62] highlights the need for new physical models at micro-scale, as fluid flow and heat transfer characteristics have been shown to deviate from traditional models. New computational techniques are also required for the simulation of sub-micron thermal conduction [63]. Concurrently, advanced experimental techniques capable of fully and accurately characterizing microchannel fluid flows require development [64], as traditional methods are impractical at micro-scale. Their development would permit both new modeling techniques to be validated and the qualification of product thermal performance. The boundaries of thermal analysis for microelectronics are therefore clearly enlarging, as modeling will have to focus on many more distinct hierarchical levels of the heat transfer chain, from ‘thermal source’, modeled at nanoor micro-scale, to the system external environment as ‘sink’, which may extend to a data center. While these considerations are prevailing for the design of microlectronics, predicting component operational temperature in application environments poses other challenges.

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Prediction of operational temperature in electronic equipment In the early to intermediate design phase, where the aim is to select a cooling strategy and refine a thermal design by parametric analysis, the benefits of CFD analysis as a virtual prototyping tool are undisputed. In this phase, the productivity of design analysis is considered to be more critical than predictive accuracy [65-68]. This is on the premise that qualitative predictions can be relied upon, an assumption that should be considered on a case-by-case basis. A number of methods to automate parametric design synthesis have been recently proposed [69,70]. Cullimore [71] also suggests numerical model calibration to experimental data, combined with statistical analysis, to deal with uncertainties in boundary conditions in the design process. Considering the computational expenses incurred with CFD modeling, other design methods, such as semi-empirical analysis and flow network modeling are also of value in providing an initial design to be refined by CFD analysis [72]. Cole et al. [73] propose a novel thermal design methodology, based upon the adjustment of components’ standard junction-to-ambient thermal resistances using aerodynamic and thermal influence factors. The method utilizes numerical predictions for system level flow characterization, and the adjusted thermal characteristics for board- and component level modeling. Moffat [74] outlines how to use CFD codes as diagnostic tools to improve thermal designs. These examples suggest other approaches for optimizing the use of CFD for design productivity. Responding to the demand for improved design productivity, CFD code vendors over the last five years have therefore primarily focused on enhancing code preand post-processing capabilities. However, the suitability of CFD analysis for generating temperature boundary conditions to be used in subsequent product performance and reliability analyses has been questioned [21,75]. This concern stems from a predictive accuracy requirement of ±3ºC or 5% for component operating temperature [76]. In this context, the present paper also aims to provide a perspective on the potential of CFD analysis as a design tool, to provide critical temperature predictions used for strategic product design decisions or reliability calculations. Two case studies are presented, in which numerical predictive accuracy for board-mounted component heat transfer was systematically assessed. Before discussing these results, it is worth reflecting on the constraints imposed on CFD analysis for the prediction of component operating temperature in a typical forced-air cooled rack-mounted electronic system, and therefore the challenges posed. Despite increases in computational power, discretization constraints still prohibit the explicit modeling of length scales from micron to meter at component to cabinet level respectively within a single numerical model. The large grids/meshes required to resolve these disparities result in computational times that would be excessive in a design

environment. Although component compact thermal modeling methodologies ease discretization constraints, computational constraints still have to be overcome for adequately resolving the impact of local flow field features on component heat transfer [21,77]. In such instances, an alternative two-tier analysis strategy is typically employed [78], whereby (i) coarse computations of temperature distributions and global flow field features are performed using a system level model and (ii) the subsystem of interest, such as Printed Circuit Board (PCB), is analyzed in isolation using a detailed model to predict component operating temperature. System level boundary conditions, which are extracted from a control volume enclosing the region of interest, are applied at the domain boundaries of the sub-system model. However, computational limitations may still be prohibitive for subsystem analysis, as found in the case studies presented. Furthermore, considerable uncertainties in both physical and applied numerical boundary conditions at system level, are propagated through the prescribed boundary conditions. Physical uncertainties include, for example, power dissipation for the various system units, and grilles and vents pressure loss coefficients [75]. In addition, the capability of the CFD code to predict complex flow phenomena, such as fan-induced, and its impact on heat transfer needs to be considered [79,80]. This is often compounded by the fact that in the absence of a physical prototype, the CFD user may have no à priori knowledge of the flow regime, and whether it is steady or unsteady. These factors combined clearly highlight the difficulty of accurately predicting microelectronics operating temperature in electronic systems. In the case studies presented, system level uncertainties are eliminated by assessing numerical predictive accuracy for PCB-mounted component heat transfer in still-air enclosures and wind tunnel airflows. This permitted the PCB thermofluids to be experimentally characterized accurately and modeled using well-defined boundary conditions. 3. CFD Predictive Accuracy for Board-Mounted Electronic Component Heat Transfer A review of previous benchmark studies on boardmounted component heat transfer is given in [21,39]. The majority of these studies have focused on either singleboard mounted components or replicas of operational multi-component PCBs consisting of either heatdissipating metal cuboid blocks, ribs or flush mounted elements on a low thermal conductivity substrate. However, the test vehicles employed did not permit to translate the full implications of the findings to the analysis of multiple, non-isothermal PCB-mounted components, for which heat transfer is highly conjugate. The following two case studies, referred to as A and B, present more a realistic evaluation of CFD predictive accuracy by analyzing populated boards incorporating real electronic components, in both natural and forced convection. The test vehicles used are shown in Figs. 1 and 2 for Studies A and B respectively.

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Reversed airflow direction

Block obstruction 3

SO16-e Block obstruction 2

PQFP 208

SO16-m

TSOP 48

Block obstruction 1 Forward airflow direction Note: PCB size = 200 x 138 x 1.6 mm.

Fig. 1 Test PCB, showing component locations and airflow direction, Study A. Airflow direction

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Note: PCB size = 233 x 178 x 1.6 mm. The position of each component on the PCB is identified by the lettering, A to O. A, F and K are leading edge components.

Fig. 2 Test PCB, Study B. Benchmark Strategy A methodical approach is employed to permit both the modeling methodology applied and solver capability to be carefully evaluated. Test case complexity is incremented in controlled steps from i) single board-mounted components, to ii) individually powered components on the populated boards and iii) simultaneously powered configurations, where all components are powered. The single board-mounted component cases serves to validate the component and PCB modeling methodology. The step from i) to ii) enables the impact of aerodynamic conditions on junction temperature prediction accuracy to be quantified, while stepping from ii) to iii) permits the ability of the code to predict component thermal interaction to be assessed. Davies et al. [81] undertook an experimental investigation of the aerodynamic and thermal factors influencing component operational thermal resistance on the board shown in Fig 2. Benchmark criteria are based on component junctionand component-board surface temperatures, measured using thermal test dies and infrared thermography respectively. While junction temperature is used as the

primary criterion, component/board surface temperature distributions serve to validate the component and PCB modeling methodologies. These measurements were taken with the test vehicles mounted in still-air enclosures and wind tunnel airflows for free and forced convection characterization respectively. The forced airflows over the boards were experimentally visualized to help assess predictive accuracy. To establish confidence in the data supplied by component manufacturers, component internal geometry and structural integrity were verified using destructive and non-destructive testing techniques. High measurement accuracy and reproducibility for all variables, with minimal thermal resistance variation between samples, established the suitability of the experimental data to be used as benchmark data. Numerical analysis was undertaken using Flotherm [82], a CFD code dedicated to the thermal analysis of electronic equipment. The component and PCB modeling methodologies are based on Rosten’s et al approach [25] with minor alterations [21,39]. Reflecting the constraints imposed on a thermal designer in an industrial environment, a pragmatic approach was adopted, whereby all component/board geometry dimensions and constituent material thermo-physical properties corresponded to nominal vendor specifications. In this approach therefore, no calibration is made to the numerical models in a possible attempt to improve predictive accuracy. This therefore also permitted the suitability of the pragmatic modeling strategy employed to be assessed for use in a design environment. The test vehicles were firstly analyzed in free convection conditions, thereby eliminating the variable of turbulence modeling on predictive accuracy. Acknowledging the difficulties in defining a characteristic dimension [27,83], hence transition Reynolds number, that adequately describes the heat transfer characteristic over the PCB, the fluid domain for forced convection was solved as both laminar, and turbulent using the secondorder high Reynolds number k-e differential model [84] with a revised wall function formulation [82]. Component junction temperature prediction accuracy is categorized based on the guidelines proposed by Rodgers et al. [39] for the various phases of the thermal design cycle. These accuracy requirements are ±10ºC or 20%, ±5ºC or 10% and ±2ºC or 5% of measurement for the early, intermediate and final design phases respectively. Due to space constraints, discussion is confined to a selection of results, from which industry perspective can be derived on the current capabilities of CFD for the prediction of electronic component operating temperature in air-cooled systems. Study A The benchmark analyses undertaken with the test vehicle shown in Fig. 1 are detailed in [21,39,85-87]. The results presented here are confined to the 2 m/s forced airflow. The PCB topology incorporated four package types, (SO16, TSOP 48 and PQFP 208), which were

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firstly analyzed individually on JEDEC standard boards. The multi-component PCB in Fig. 1 had both the same copper tracking- and component layouts, and component powering configuration on both sides. This design permitted numerical modeling to be confined to one PCB side, with an adiabatic plane applied along the PCB central in-plane axis. This topology was analyzed in two opposite airflow directions parallel to the PCB surface, Fig. 1, to assess the impact of the flow phenomena on predictive accuracy. Perspex block obstructions were mounted on the PCB to introduce different degrees of aerodynamic disturbance in either flow direction. The placement of two SO16 devices at different locations permitted the combined effects of local thermal and flow interaction to be further assessed. As greatest prediction errors and discrepancies between flow models occurred in these regions of the board, the following discussion focuses on the SO16s’ predictions. Component junction temperature predictive accuracy for the respective test configurations is presented in Table 1. Table 1 Component junction temperature prediction accuracy on the single- and multi-component PCBs in a 2 m/s airflow, Study A. Multi-component PCB, Fig. 1 Forward flow Reversed flow Individually Simultaneously Simultaneously powered powered powered Lam k-e Lam k-e Lam k-e Lam k-e TSOP 48 -4.0 -4.3 -9.7 -10.2 -8.9 -9.3 -7.6 -11.8 (11%) (12.3%) (18%) (19%) (17%) (18%) (12%) (19%) PQFP208 -2.3 -2.6 +3.1 -0.2 +1.8 -1.5 -2.1 -3.1 (8.4%) (9.5%) (6.3%) (0.4%) (3.4%) (2.8%) (4.0%) (5.8%) SO16-m -2.8 -10.3 -1.0 -11.0 -4.3 -6.1 -3.0 (3.5%) (13%) (1.1%) (13%) (5.3%) (7.5%) -2.5 SO16-e (5.9%) (7.0%) +4.2 -2.6 +7.2 -0.8 -6.5 -7.2 (6.1%) (3.8%) (9.5%) (1.1%) (9.4%) (10%) Note: Lam (laminar) and k-e refer to flow model. Percentage prediction error in parenthesis ( ) is calculated based on measured component junction temperature rise above ambient air temperature, 20ºC. Airflow directions defined in Fig. 1. Component power dissipation = 0.5W for both TSOP 48 and SO16’s, 2W for PQFP 208. Comp.

Single componentPCBs

In both airflow directions on the simultaneously powered multi-component PCB, using either the laminar or k-e flow model, predictive accuracy is overall within ±10% of measurement for the SO16 and PQFP 208 components, when accounting for experimental uncertainty. This accuracy would be acceptable at an intermediate product design phase, but not sufficient for temperature predictions to be used as boundary conditions in subsequent reliability and electrical performance analyses. For such analyses, predictive accuracy would need to be within ±3ºC or ±5% of measurement. Based on structural analysis and numerical parametric studies, the lower accuracy for the TSOP 48 component was primarily attributed to an uncertainty in encapsulant thermal conductivity value. While the TSOP model predictions must therefore be considered with some skepticism, the good agreement between measured and predicted PCB surface temperature in vicinity of this component [21,39,85,86], indicated that the component-

PCB thermal interaction was correctly captured, both on the single- and multi-component PCBs. While in the forward airflow direction, the laminar and k-e flow models yield comparable predictions for the TSOP and PQFP components, significant differences exist between flow model predictions for the SO16 devices. This has nothing to do with the component type, which is only used to define the location on the board. The greatest deviation between flow model predictions occurs in the SO16-m region, which experimental measurements showed to be the most sensitive to aerodynamic disturbance [21,39]. Neither flow model is found to be accurate for all components, indicating that the rules governing the application of a laminar or turbulence model are not clear. By contrast, junction temperature predictions on the single-component PCBs are flow model insensitive, and their accuracy would overall qualify for reliability- and electrical performance analyses. This demonstrates the applicability of the component-PCB modeling strategy adopted, with greater prediction error on the populated PCB being therefore attributable to a weakness of the flow models used to predict these more complex flows. For the multi-component PCB, aerodynamic factors significantly influence flow model predictive accuracy in both airflow directions. Differences between flow model predictions increase with distance from the PCB leading edge. These differences are more pronounced in the forward flow direction, indicating proportionality to the amount of flow disturbance introduced in the flow field upstream of the component. Note that the leading edge obstruction in the forward flow direction was significantly wider and taller than in the reversed flow direction. In this flow direction, the laminar model produces better predictive accuracy for all components, possibly reflecting the effect of milder flow disturbance being generated upstream. The results suggest that ultimately a transitional flow model may be required to predict the complete flow field over populated PCBs, hence yield best predictive accuracy for all components. Comparison of component junction temperature predictions between the individually- and simultaneously powered configurations in Table 1, reveals that prediction error is in part associated with component thermal interaction not being fully captured. This is most striking for the SO16-e component, for which prediction error increases by 3ºC between the individually- and fully powered configurations using the laminar flow model. As its measured temperature rise between the two powering configurations was of only 6.8ºC, possible variation of temperature dependent material- or fluid property arising from the change of powering configuration does not explain the SO16 discrepancy. It therefore must be related to inherent limitations of the CFD code to predict downstream component powered off temperature rise, that is its temperature rise due solely to component thermal interaction. The impact of this limitation on predictive accuracy in multi-component PCB applications

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having a high degree of component thermal interaction will be discussed for Study B. Although differences in flow field predictions were not quantified by flow field measurements, numerical energy balance analyses of component heat transfer provided the link between junction temperature- and flow field prediction errors [21,87]. While the laminar and k-e predictions differed by 10ºC and 8ºC for SO16-m and SO16-e respectively, the predicted energy balances were very similar for both components. This clearly indicates that the component internal conductive domain is only weakly sensitive to flow model. Therefore, prediction error for these components is related to the representation of the convective domain. Study B To further investigate the predictive discrepancies highlighted in Study A, PCB test vehicles generating higher degrees of component thermal interaction, and exposed to airflows from 0 to 10 m/s were analyzed [77, 88-90]. The PCB shown in Fig. 2 was populated in incremental steps with one, seven and fifteen thermally enhanced 160-lead PQFP packages. Their location on the PCB is identified by the lettering A to O, Fig. 2. In free convection, junction temperature and component/board surface temperature predictions were overall within +5ºC (7%) of measurement for all PCBs [89,90]. This accuracy held independently of package type and location on the board, demonstrating the suitability of the component and board modeling methodology. In forced convection, to generate a higher degree of component thermal interaction present in double-sided PCB applications, the fifteen-component PCB was also analyzed with an adiabatic boundary condition imposed along its noncomponent side using a thermally-insulating block. Its geometry, machined to a semi-elliptical profile, induced a complex, unsteady flow field over the PCB leading edge at 2 m/s. The induced flow disturbance, visualized in Fig. 3, served to mimic those encountered in electronic systems, but retained well-defined boundary conditions for numerical modeling. It therefore permitted predictive accuracy to be assessed for system level flow conditions that are more realistic than uniform free-stream conditions. The results presented are confined to this test configuration and the central row components, F to J. Individually powered components. In Table 2, the greatest prediction errors occur for component G using the k-e flow model, which is located in a region identified as aerodynamically sensitive by flow visualization, Fig. 3. The flow separates upstream of the insulated PCB leading edge and re-attaches in a region just downstream of the leading row components A, F and K. The flow models therefore display different sensitivities to the aerodynamic conditions on the insulated PCB, with the laminar model being more accurate. The poor accuracy of the k-e model for component G is attributed to the limited applicability of the wall functions used for the prediction of wall shear stress, hence heat transfer in re-attaching flow conditions [91].

Airflow

(a) Front view PCB insulation

Component

(b) Plan view - still 1

(c) Plan view - still 2 Note: Time lapse between stills 1 and 2 is approximately 230 ms. Smoke introduced 4 mm upstream and flush with the PCB surface, and in plan view, aligned with the central stream-wise axis of component F.

Fig. 3 Experimentally visualized flow field on the insulated fifteen-component PCB at 2 m/s. Table 2 Component junction temperature prediction accuracy on the insulated multi-component PCB, Fig. 2, in a 2 m/s airflow, Study B. Comp.

F G H I J

Prediction discrepancy (ºC) Individually powered Simultaneously powered Laminar k-e Laminar k-e +2.6 (4.7%) +4.1 (7.4%) +6.5 (11%) +11.0 (18%) +4.1 (7.7%) +11.9 (22%) +12.2 (19%) +22.4 (35%) +2.9 (5.2%) +5.9 (11%) +13.2 (18%) +15.6 (22%) +1.5 (2.7%) +3.0 (5.3%) +15.5 (21%) +12.4 (16%) -2.1 (3.8%) -2.0 (3.6%) +12.8 (17%) +5.5 (7.3%)

Note: F and J are leading and trailing edge components respectively. Percentage prediction error in parenthesis ( ) is calculated based on the measured component junction temperature rise above ambient air temperature, 20ºC. Component power dissipation = 3W.

It should also be noted that the k-e model is not suited to the analysis of the unsteady flow over the insulated board at 2 m/s, as it does not capture flow unsteadiness. This is due in this instance to an overprediction of the turbulent viscosity damping out any transient flow features [89]. However, the k-e model was assessed to reflect normal design scenarios, where there is no à priori knowledge of the flow regime, and whether it is steady or unsteady. Though the k-e predictions should therefore be

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Temperature rise (C)

considered with skepticism, this model yields accuracy similar to that of the laminar model for the downstream components H to J. Simultaneously powered components. When account is taken of measurement uncertainty, prediction accuracy in Table 2 ranges from +2°C to +22°C (up to 35%) depending on component location and flow model. In line with Study A, neither flow model yields best accuracy for all components. For example, the laminar model more accurately predicts the junction temperatures of the first two leading edge row component rows, whereas the k-e predictions are more accurate for the downstream components, I and J. For both flow models, predictive accuracy for the downstream components H to J, decays relative to the corresponding individually powered configurations. This is attributed to inaccurate prediction of the downstream component temperature rise between the individually- and simultaneously powered configurations. These errors are more pronounced than for Study A due to a higher degree of component thermal interaction. Measurements and predictions of the component powered-off temperature rise are compared in Fig. 4. Both flow models, particularly the laminar, considerably overpredict this variable for the downstream components, thereby resulting in junction temperature discrepancies increasing with distance from the PCB leading edge. Therefore, the accuracy obtained for the simultaneously powered PCB in Table 2 are only net values, and a function of component power dissipation. Overall, the laminar and k-e flow model temperature predictions would only be sufficient for the early design phase. 35

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Fig. 4 Comparison of measured and predicted component junction temperature rise between the individually- and simultaneously powered configurations for the central stream-wise row components (F - J) on the insulated multi-component PCB in a 2 m/s airflow, Fig. 2. Predictive discrepancies in downstream component thermal interaction are in line with Anderson’s results [92] for an air-cooled array of heated blocks. Using the same CFD code, significant errors in the prediction of downstream module adiabatic temperature rise were

reported. This was attributed to incorrect prediction of downstream fluid flow mixing, as good agreement between predicted and measured adiabatic heat transfer coefficient was found. Inaccurate prediction of the component powered-off temperature rise is a significant limitation as many PCB applications are densely packed multi-component boards, with more than one component having significant power dissipation. Overall, Studies A and B highlight critical modeling issues for the prediction of component operational temperature on real electronic boards. These limitations need to be considered when relying on numerical predictions for strategic product design decisions without supporting experimentation. 4. Closure Challenges posed for the modeling of thermal phenomena in microelectronics were discussed, from optimizing IC packaging thermal performance, assembly processes and reliability testing to predicting operational temperature in application environments. A systematic assessment of numerical predictive accuracy for PCBmounted component heat transfer was presented, based on two independent case studies. Using a CFD code dedicated to the thermal analysis of electronic systems, component operating temperature prediction accuracy ranged from +2°C to +22°C (up to 35%) of measurement, depending on PCB topology, component location, airflow velocity and flow model applied. Based on this evaluation, the following conclusions can be made: 1. For multi-component PCB applications analyzed in isolation, component operating temperature prediction accuracy would only be sufficient for the early design phase. Prediction accuracy is anticipated to decay in real electronic systems, where both more complex flow conditions and modeling uncertainties would exist [93]. This highlights that component junction temperature would need to be experimentally measured when used for strategic product design decisions and reliability predictions. Therefore, a balanced combination of experimental and numerical efforts is required. 2. The inability of either the laminar or turbulent k-e flow models to resolve the complete forced airflows over the boards suggests the need for a flow model capable of modeling transition. Although in-depth analysis of the CFD code calculation strategies and turbulence modeling capabilities is beyond the scope of this paper, the potential shortcomings of the turbulence modeling typically employed by codes dedicated for the analysis of electronics cooling should be pointed out for the analysis of component-PCB heat transfer. The turbulence models typically available in dedicated CFD codes generally consist of laminar, zero-order algebraic, and standard two-equation high-Reynolds k-e flow model. However, fluid flow over populated PCBs is usually classified as low-Reynolds number flows due to the small velocities and length scales encountered [94,95]. As turbulence is confined within the shear layers in vicinity of the components, and the overall flow field remains essentially

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laminar, neither the laminar or standard high-Reynolds ke flow model are specific for the analysis of this type of flows. Also, for turbulent flow calculations the prediction of heat transfer is extremely sensitive to the wall boundary conditions, hence wall treatment [96]. The use of “law-of-the-wall” wall functions to calculate the surface heat transfer coefficient is justified for boundary layer type flows, but is inadequate for separating, reattaching or recirculating flow conditions. This is highlighted by Ferziger & Peric [91] who caution on the applicability of wall functions when such flow features exist over a large portion of the wall boundaries, and point out that serious modeling errors may result. These flow conditions however are typical of populated PCBs [21,88]. Overall therefore, using the standard k-e turbulence model with wall function treatment, prediction accuracy for component-PCB surface heat transfer coefficient will depend both on how far the flow conditions deviate from boundary layer flow, and on the sensitivity of heat transfer to these conditions. As RANS-based computations are unlikely to be superseded by Large Eddy Simulation (LES) or Direct Numerical Simulation (DNS) techniques in design environments for the foreseeable future, other candidate two-equation eddy viscosity turbulence models should be considered for implementation in CFD codes dedicated to the thermal analysis of electronic equipment. Despite the limitations of the standard k-e turbulence model and wall function approach, vendors of CFD codes dedicated for the analysis of electronics cooling argue that the use of more sophisticated turbulence models is generally not justified for the majority of industrial analyses undertaken with their software. Ignoring computational constraints, advanced models may only offer a small improvement in predictive accuracy, providing that both the exact geometry of the problem and all boundary conditions are known to high degree of accuracy. As such detailed information is generally not available during the design phase, approximations are required which only enable global flow field and temperature predictions to be obtained. By contrast, standard turbulence models provide efficient analysis and solution stability on simple grids. However, this view may soon become outdated with further increases in computational power, which should facilitate the application of more sophisticated turbulence models to electronic system thermal design. The electronics industry should therefore allow code vendors to re-deploy some of their resources, often focused on developing pre- and post processing capabilities for enhanced design productivity, to improve predictive accuracy through improved numerics and fluid flow modeling. 3. A need exists for realistic benchmark data at component-, board- and system levels, to assist the development of more accurate codes and modeling techniques. Nakayama [65-67] presents good examples. 4. Until flow modeling is improved in CFD codes dedicated to the thermal analysis of electronics, the use of flow visualization on mock-up prototypes in the early

design phase can help identify aerodynamically sensitive regions on the board, where temperature predictions should be considered with caution. The experimental methods and approach advocated are described in [21,88,97]. 5. The computational grid volumes required in Study B, on order 4 Million grid cells, would be considered impractical in a design environment. Grid refinement analyses suggested that even finer grids may be required to resolve the flow fields, which would be incompatible with typical computational resources. Embedded subgridding technology [98] in conjunction with the current Cartesian grid system used, could contribute to overcome these difficulties, in terms of finely discretizing regions of interest and eliminating superfluous grid in the far field. This could both yield improved accuracy and reduce computational time through improved convergence. On the other hand, for the current test cases predictive accuracy was found to deteriorate significantly with lower grid volumes. This highlights considerable difficulties to undertake meaningful system level analysis. 6. Specialist expertise is required for the thermal analysis of electronics, to build the CFD models, define the grids and obtain both well-converged and gridindependent solutions. This demands significant resources in terms of manpower and solution time, which can extend to days. This is at odds with the current design requirements for efficient analysis. 7. The level of predictive accuracy achievable with detailed modeling should bring balanced expectations from component compact thermal modeling methodologies. Many issues are still to be resolved before such models can be routinely adopted for the prediction of component operating temperature. 8. With ever-rising heat fluxes, system miniaturization and emerging technologies, such as MEMs, managing thermal phenomena in microelectronics will become an increasingly complex task requiring new modeling techniques. Acknowledgments Flomerics, UK, is gratefully acknowledged for the use of Flotherm and their technical support. The test vehicles for Studies A and B were thermally characterized at Nokia, Finland and the Stokes Research Institute, Ireland, respectively. The flow visualizations for Study B were performed at the Galway-Mayo Institure of Technology, Ireland.

References 1. Lall, P., Pecht, M., and Harkim, E., “Influence of Temperature on Microelectronics and System Reliability,” CRC Press, New York, 1997. 2. Kirschman, R. K., “Low Temperature Electronics”, IEEE Circuits and Devices, Vol. 6, Part 2, pp. 12-24, 1990. 3. Pecht, M., “Why Traditional Reliability Prediction Models Do Not Work – Is there an Alternative,” Electronics Cooling, Vol. 2, No. 1, pp. 10-12, 1996. 4. Das, D., “Use of Thermal Analysis Information in Avionics Equipment Development,” Electronics Cooling, Vol. 5, No. 3, pp. 28-34, 1999. 5. Osterman, M., “We Still Have A Headache With Arrhenius,” Electronics Cooling, Vol. 7, No. 1, pp. 53-54 , 2001.

Page 8 of 11

6. Dasgupta, A., “The Physics-of-Failure Approach at the University of Maryland for the Development of Reliable Electronics,” Proc of the 3rd International Conf on Thermal and Mechanical Simulation in (Micro)Electronics (EuroSimE), pp. 10-17, 2002. 7. Guenin, B., “Packaging: Designing for Thermal Performance,” Electronics Cooling, Vol.3, No.2, pp. 14-19, 1997. 8. SEMI International, 3081 Zanker Road, San Jose, CA 95134, USA, http://www.semi.org/ 9. JEDEC Solid State Technology Association, 2500 Wilson Blvd, Arlington, VA 22201-3834, USA, http://www.jedec.org/ 10. Guenin, B. M., “Component Thermal Characterization,” Electronics Cooling, Vol. 7, No. 1, pp. 36-44, 2001. 11. EIA/JESD51-2, “Integrated Circuits Thermal Test Method Environmental Conditions - Natural Convection (Still-Air),” Electronic Industries Association, Engineering Department, 2500 Wilson Boulevard, Arlington, VA 22201, USA, http://www.jedec.org/ 12. SEMI G38-0996, “Test Method for Still and Forced Air Junction-to-Ambient Thermal Resistance Measurements of Integrated Circuits,” SEMI International Standards, Packaging Volume, http://www.semi.org/ 13. EIA/JESD51-6, “Integrated Circuit Thermal Test Method Environmental Conditions –Forced Convection (Moving Air),” Electronic Industries Association, Engineering Department, 2500 Wilson Boulevard, Arlington, VA 22201, USA, http://www.jedec.org/ 14. SEMI G30-88, “Test Methods for Junction-To-Case Thermal Resistance Measurements of Ceramic Packages,” SEMI International Standards, Packaging Volume, , http://www.semi.org/ 15. Zahn, B. A., and Stout, R. P., “Evaluation of Isothermal and Isoflux Natural Convection Coefficient Correlations For Utilization in Electronic Package Level Thermal Analysis,” Proc of 13th IEEE Semiconductor Thermal Measurement and Management Symp (SEMI-THERM XIII), pp. 24-31, 1997. 16. Zahn, B. A., “Using Design of Experiment Simulation Responses to Predict Thermal Performance Limits of the Heat Sink Small Outline Package (HSOP) Considering Both Die Bond and Heatsink Solder Voiding,” Proc of 14th IEEE Semiconductor Thermal Measurement and Management Symp (SEMI-THERM XIV), pp.153-160, 1998. 17. Zahn, B. A., “Optimizing Cost and Thermal Performance: Rapid Prototyping of a High Pin Count Cavity-Up Enhanced Plastic Ball Grid Array (EPBGA) Package,” Proc of 15th IEEE Semiconductor Thermal Measurement and Management Symp (SEMI-THERM XV), pp.133-141, 1999. 18. Pape, H., “Treatment of Convection and Radiation without CFD in Thermal Resistance Calculations,” Proc of 7th International Workshop on Thermal Investigations of ICs and Systems (THERMINIC), pp. 43-49, 2001. 19. Lall, B. S., Guenin, B. M., Mars, R. C., and Molnar R. J., “Parametric FEA Thermal Model for QFP Packages,” Proc of 12th IEEE Semiconductor Thermal Measurement and Management Symp (SEMI-THERM XII), pp. 105-110, 1996. 20. Edwards, D., and Hundt, P., “Thermal Performance of Tape Based Ball Grid Array Over Molded Packages, Proc of the 14th IEEE Semiconductor Thermal Measurement and Management Symp (SEMI-THERM XIV), pp. 169-175, 1998. 21. Rodgers, P., “An Experimental Assessment of Numerical Predictive Accuracy for Electronic Component Heat Transfer,” Ph.D. Thesis, University of Limerick, Limerick, Ireland, 2000. 22. Ortega, A., “Conjugate Heat Transfer in Forced Air Cooling of Electronic Systems,” in Air Cooling Technology for Electronic Equipment, Editors Kim, S. J., and Lee, S. W., CRC Press, New York, 1996, pp. 103-171, 1996. 23. Wakil, J., and Ho., P. S., “Nonuniform Temperature and Strain Fields in a Powered Package,” IEEE Trans on Components and Packaging Technologies, Vol. 23, No 3, pp. 521-527, 2000.

24. Rosten, H. I. and Viswanath, R., “Thermal Modelling of the PentiumTM Processor Package,” Proc of 44th Electronics Components and Technology Conf., pp. 1140-1150, 1994. 25. Rosten, H., Parry, J., Addison, J., Viswanath, R., Davies, M., and Fitzgerald E., “Development, Validation and Application of a Thermal Model of a PQFP,” Proc of 45th Electronics Components and Technology Conf, pp. 1140-1150, 1995. 26. Argento, C., and Kromann, G., “The Development of Threedimensional Computational Fluid Dynamics Models of PBGA Interconnect Technology for Moderate Air-Cooled Systems,” Proc of International Flip Chip, Ball Grid Array, TAB, and Advanced Packaging Symp, pp. 218-24, 1995. 27. Burgos, J., Manno, V. P. and Azar, K., “Achieving Accurate Thermal Characterisation Using a CFD Code – A Case Study of Plastic Packages,” IEEE Trans on Components, Packaging, and Manufacturing Technology – Part A, Vol. 18, No. 4, pp. 732738, 1995. 28. Teng, S., Lee, T. Y. T., Mahalingam, M., and Joiner, B., “Thermal Model of a Component Package for System Level Applications,” Journal of Electronics Manufacturing, Vol. 7, No.2, pp. 115-127, 1997. 30. Johnson, Z., Ramakrishna, K., Joiner, B., and Eyman, M., “Thermal Sub-Modelling of the Wirebonded Plastic Ball grid Array Package,” Proc of 13th Annual IEEE Semiconductor Thermal Measurement and Management Symp (SEMI-THERM XIII), pp. 1-9, 1997. 31. Johnson, Z., and Eymann, M., “Design-Based Thermal Simulation Methodology for Ball Grid Array Packages,” Proc of 6th Intersociety Conf on Thermal and Thermomechanical Phenomena in Electronic Systems (ITHERM’98), pp. 82-87, 1998. 32. Ramakrishna, K., Thomas, T. R., Lee, T. Y., Trent J. R., and Hause, J. V., “Thermal Performance of an Air-Cooled Plastic Ball Grid Array Package in Natural and Forced Convection,” Proc of 6th Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITHERM’98), pp.27-34, 1998. 33. Zahn, B. A., “Evaluating Thermal Characterisation Accuracy Using CFD Codes - A Package Level Benchmark Study of IcePaK and Flotherm,” Proc of 6th Intersociety Conf on Thermal and Thermomechanical Phenomena in Electronic Systems, pp. 322-329, 1998. 34. Adams, V.H., Ramakrishna, K., Lee, T.Y.T., Hause, J.V., and Mahalingam, M., “Design-based Thermal Performance Evaluation of a GaAS MMIC Device in a Plastic Ball Grid Array Package,” Advances in Electronic Packaging; Proc of the Pacific Rim/ASME International Intersociety Electronic & Photonic Packaging Conf (InterPACK’99), EEP-Vol. 26-1, pp. 277-285, 1999. 35. Chiriac, V. A., and Lee, T. Y. T., “Thermal Strategy for Modelling The Wirebonded PBGA Packages,” Advances in Electronic Packaging; Proc of the PACIFIC RIM/ASME International Intersociety Electronic & Photonic Packaging Conf (InterPACK'99), EEP-Vol. 26-1, pp. 287-293, 1999. 36. Lee, T.Y.T., “An Investigation of Thermal Enhancements on Flip Chip Plastic BGA Packages Using CFD Tool,” IEEE Trans on Components and Packaging Technologies, Vol. 23, No. 3, pp. 481-489, 2000. 37. Ying, T.M., and Toh, K.C., “A Heat Spreading Resistance Model for Anisotropic Thermal Conductivity Materials in Electronic Packaging,” Proc of 7th Intersociety Conf on Thermal and Thermomechanical Phenomena in Electronic Systems (ITHERM 2000), pp. 314-321, 2000. 38. Lohan, J., Tiilikka, P., Rodgers, P., Fager, C.M., and Rantala, J., “Experimental and Numerical Investigation into the Influence of Printed Circuit Board Construction on Component Operating Temperature in Natural Convection,” IEEE Trans on Components and Packaging Technology (CPT), Vol. 23, No. 3, pp. 578-586, 2000.

Page 9 of 11

39. Rodgers, P., Eveloy, V., and Davies, M., “An Experimental Assessment of Numerical Predictive Accuracy for Electronic Component Heat Transfer in Forced Convection: Parts I and II,” Trans of the ASME, Journal of Electronic Packaging, Vol. 125, No. 1, 2003. 40. Parry, J., Rantala, J., and Lasance, C. J. M., “Enhanced Electronic System Reliability – Challenges for Temperature Prediction,” Proc of 7th International Workshop on Thermal Investigations of ICs and Systems (THERMINIC), pp. 29-35, 2001. 41. Kathir, Z.,and Lefebvre, S., “Thermal Analysis of Power Cycling Effects on High Power IGBT Modules by the Boundary Element Method,” Proc of 17th IEEE Semiconductor Thermal Measurement and Management Symp (SEMI-THERM XVII), pp. 27-34, 2001. 42. Igic, P. M., Mawby, P. A., Towers, M. S., and Batcup, S., “Dynamic Electro-Thermal Physically Based Compact Models of the Power Devices for Device and Circuit Simulations,” Proc of 17th IEEE Semiconductor Thermal Measurement and Management Symp (SEMI-THERM XVII), pp. 35-42. 2001. 43. Wen, S., and Lu., “Finite Element Modeling of Thermal and Thermomechanical Behavior for Three-dimensional Packaging of Power Electronics Modules,” Proc of 7th Intersociety Conf on Thermal and Thermomechanical Phenomena in Electronic Systems (ITHERM’2000), Vol. II, pp. 303-309, 2000. 44. Sarvar, F., and Whalley, D. C., “IGBT Package Design for High Power Aircraft Electronic Systems,” Proc of 7th Intersociety Conf on Thermal and Thermomechanical Phenomena in Electronic Systems (ITHERM’2000), Vol. II, pp.391-397, 2000. 45. Eveloy, V., Rodgers, P., and Lohan, J., “Comparison of Numerical Predictions and Experimental Measurements for the Transient Thermal Behavior of a Board-Mounted Electronic Component,” Proc of 8th Intersociety Conf on Thermal and Thermomechanical Phenomena in Electronics Systems (ITHERM’02), pp. 36-45, 2002. 46. Down, W. H., “Achieving Consistency in IR Reflow,” Electronic Packaging and Production, pp. 110-113, 1991. 47. Bailey, C., “The Effect of Temperature on Performance and Reliability – A Review,” Proc of 19th IEEE Semiconductor Thermal Measurement and Management Symp (SEMI-THERM XIX), 2003. 48. Warner, M., Parry, J., Bailey, C., Marooney, C., Reeves, H., and Pericleous, K., “Flo/Stress: An Integrated Stress Solver for the CFD Tool Flotherm,” Proceedings of IPACK’01: The Pacific Rim/ASME International Electronic Packaging technical Conf and Exhibition, Paper No. IPACK2001-15740, 2001. 49 Lohan, J., and Davies, M., “Thermal Interaction Between Electronic Components,” 31st ASME National Heat Transfer Conf, HTD-329, Vol. 7, pp. 73-82, 1996. 50. Lasance, C. J. M., “Thermal Resistance: An Oxymoron?,” Electronics Cooling, Vol. 3, No. 2., pp. 20-22, 1997. 51. Lohan, J., Tiilikka, P., Rodgers, P., Fager, C.M., and Rantala, J., “Using Experimental Analysis to Evaluate the Influence of Printed Circuit Board Construction on the Thermal Performance of Four Package Types in both Natural and Forced Convection,” Proc of 7th Intersociety Conf on Thermal and Thermomechanical Phenomena in Electronic Systems (ITHERM’2000), pp. 213-225, 2000. 52. Rosten, H., Lasance, C.J.M., and Parry, J., “The World of Thermal Characterization According to DELPHI-Part I: Background to DELPHI,” IEEE Trans on Components, Packaging & Mfg. Technology, Part A, Vol. 20, No.4, pp. 384391, 1997. 53. Lasance, C.J.M., Rosten, H., and Parry, J., “The World of Thermal Characterization According to DELPHI-Part II: Experimental and Numerical Methods,” IEEE Trans on Components, Packaging & Mfg. Technology, Part A, Vol. 20, No.4, pp. 392-398, 1997.

54. Aranyosi, A., Ortega, A., Griffin, R. A., West, S., and Edwards, D., “Compact Thermal Models of Packages used in Conduction Cooled Applications,” IEEE Trans on Components and Packaging Technology (CPT), Vol. 23, No. 3, pp. 470-480, 2000. 55. Bosch, E. G. T., “Thermal Compact Models: An Alternative Approach,” Proc of 7th International Workshop on Thermal Investigations of ICs and Systems (THERMINIC), pp. 197-202, 2001. 56. Gerstenmaier, Y. C., Pape, H., and Wachutka, G., “Rigorous Model and Network for Static Thermal Problems,” Proc of 7th International Workshop on Thermal Investigations of ICs and Systems (THERMINIC), pp. 203-208, 2001. 57. Sabry, M. N., “Compact Thermal Models for Electronic Systems,” Proc of 7th International Workshop on Thermal Investigations of ICs and Systems (THERMINIC), pp. 197-202, 2001. 58. Boyalakuntla, D. S., and Murthy, J. Y., “COBRA-Based Compact Models for Simulation of Electronic Chip Packages”, Proc of The Pacific Rim/ASME International Electronic Packaging Technical Conf and Exhibition (IPACK’01), July 8– 13, 2001, Kauai, Hawaii, USA, Paper Number IPACK200115534, 2001. 59. Eveloy, V., Rodgers, P., DeVoe, J., Ortega, A., and Hashmi, M.S.J., “An Experimental Assessment of Compact Thermal Models for Board-Mounted Electronic Component Heat Transfer,” Proc of 19th IEEE Semiconductor Thermal Measurement and Management Symp (SEMI-THERM XIX), 2003. 60. Chowdhury, S., Darabi, J., and Ohadi, M., “Chip Integrated Micro Cooling System for High Heat Flux Electronic Cooling Applications,” Proc of the International Conf on Thermal Challenges in Next Generation Electronic Systems (THERMES 2002), pp. 85-93, 2002. 61. DeVoe, D. L., “Thermal Issues in MEMS and Microscale Systems,” Proc of the International Conf on Thermal Challenges in Next Generation Electronic Systems (THERMES 2002), pp. 25-34, 2002. 62. Sabry, M. –N., “Scale Effects on Fluid Flow and Heat Transfer in Microchannels,” IEEE Trans on Components and Packaging Technology (CPT), Vol. 23, No. 3, pp. 562-567, 2000. 63. Murthy, J, Y., and Mathur, S., “Computational Techniques for Simulation of Sub-Micron Thermal Conduction,” Proc of the International Conf on Thermal Challenges in Next Generation Electronic Systems (THERMES 2002), pp.45-60, 2002. 64. Wereley, S., Hohreiter, V., and Chung, J., “Simultaneous, Spatially-Resolved Temperature and Velocity Measurements in Micro-Channel Flows,” Proc of the International Conf on Thermal Challenges in Next Generation Electronic Systems (THERMES 2002), pp. 95-102, 2002. 65. Nakayama, W., “Emerging New Roles of CFD Simulation in Competitive Market Environment,” Proc of 7th International Workshop on Thermal Investigations of ICs and Systems (THERMINIC), pp. 223-229, 2001. 66. Nakayama, “An Approach to Fast Thermal Design of Compact Electronic Systems: a JSME Project,” Advances in Electronic Packaging; Proc of The PACIFIC RIM/ASME International, Intersociety Electronic Packaging Technical/Business Conf & Exhibition (IPACK’01), Paper No. IPACK2001-15532, 2001. 67. Nakayama, W., Behnia, M., and Soodphakdee, D., “A Novel Approach to the Design of Complex Heat Transfer Systems: Portable Computer Design – A Case Study,” IEEE Trans on Components and Packaging Technology (CPT), Vol. 24, No. 2, pp. 199-206, 2001. 68. Shapiro, B., “Creating Reduced-Order Models for Electronic Systems: An Overview and Suggested Use of Existing Model Reduction and Experimental System Verification Tools,” Proc of the International Conf on Thermal Challenges in Next Generation Electronic Systems (THERMES 2002), pp. 299-306, 2002.

Page 10 of 11

69. Cullimore, B., “Nonlinear Programming Applied to Thermal and Fluid Design Optimization,” Proc of 8th Intersociety Conf on Thermal and Thermomechanical Phenomena in Electronics Systems (ITHERM 2002), pp. 54-60, 2002. 70. Parry, J., Bornoff, R., Stehouwer, P., Driessen, L., Stinstra, E., “Simulation-based Design Optimization Methodologies applied to CFD,” Proc of 19th Annual IEEE Semiconductor Thermal Measurement and Management Symp, (SEMI-THERM XIX), 2003. 71. Cullimore, B., “Dealing with Uncertainties and Variations in Thermal Design,” Proc of IPACK’01: The Pacific Rim/ASME International Electronic Packaging technical Conference and Exhibition, Paper No. IPACK2001-15516, 2001. 72. Minichiello, A., and Belady, C., “Thermal Design Methodology for Electronic Systems,” Proc of 8th Intersociety Conf on Thermal and Thermomechanical Phenomena in Electronics Systems (ITHERM 2002), pp. 696-704, 2002. 73. Cole, R., Dalton, T, Punch, J., Davies, M. R., and Grimes, R., “Forced Convection Board Level Thermal Design Methodology for Electronic Systems,” Trans. of the ASME, Journal of Electronic Packaging, Vol. 123 No. 2, 2001, pp. 120-126. 74. Moffat, R. J., “Getting the Most Out of Your CFD Program,” Proc of 8th Intersociety Conf on Thermal and Thermomechanical Phenomena in Electronics Systems (ITHERM 2002), pp. 9-14, 2002. 75. Lasance, C. J. M., “The conceivable Accuracy of Experimental and Numerical Thermal Analysis of Electronic Systems,” Proc of 17th IEEE Semiconductor Thermal Measurement and Management Symp (SEMI-THERM XVII), pp.180-198, 2001. 76. Lasance, J. M., 1995, “The need for a change in Thermal Design Philosophy,” Electronics Cooling, Vol. 1, No. 2, pp. 2426. 77. Eveloy, V., Rodgers, P., and Hashmi, M.S.J., “Numerical Prediction of Electronic Component Heat Transfer: An Industry Perspective,” Proc of 19th IEEE Semiconductor Thermal Measurement and Management Symp (SEMI-THERM XIX), 2003. 78. Tang, L. and Joshi, Y. K., “A Multi-Scale Conjugate Thermal Modeling Approach for Air Cooled Electronic Enclosures,” Advances in Electronic Packaging; Proc of The PACIFIC RIM/ASME International Intersociety Electronic & Photonic Packaging Conf (InterPACK’99), EEP-Vol. 26-1, pp. 295-304, 1999. 79. Grimes, R., Davies, M., Punch, J., Dalton, T., and Cole, R., “Modeling Electronic Cooling Axial Fan Flows,” Trans of the ASME, Journal of Electronic packaging, Vol. 123, No. 2, pp. 112-119, 2001. 80. Baelmans, M., Meyers, J., and Nevelsteen, K., “Flow Modeling in Air-Cooled Electronic Enclosures,” Proc of 19th Annual IEEE Semiconductor Thermal Measurement and Management Symp, (SEMI-THERM XIX), 2003. 81. Davies, M. R., Cole, R., and Lohan, J., “Factors Affecting the Operational Thermal Resistance of Electronic Components,” Trans of the ASME, Journal of Electronic Packaging, Vol. 122, No. 3, pp. 185-191 2000. 82. Flotherm, Reference and User Manuals, Flomerics Limited, Bridge Road, Hampton Court, Surrey, KT8 9HH, United Kingdom, 2001. 83. Saulnier, J. B., 1995, “The Numerical Modelling of Heat Transfer in Electronic Systems: Challenges and Ideas for Answer,” Proc of EUROTHERM Seminar 45: Thermal Management of Electronic Systems II, Editors, Beyne, E., Lasance C. J. M., and Berghmans, J., Kluwer Academic Publishers, Dordrecht, pp. 3-15.

84. Launder, B. E. and Spalding, D. B., 1974, “The Numerical Computation of Turbulent Flows,“ Computer Methods in Applied Mechanics and Engineering, Vol. 3, pp. 269-289. 85. Rodgers, P., Eveloy, V., Lohan, J., Fager, C.M., Tiilikka, P., and Rantala, J., “Experimental Validation of Numerical Heat Transfer Predictions for Single- and Multi-Component Printed Circuit Boards in Natural Convection Environments,” Proc of 15th IEEE Semiconductor Thermal Measurement and Management Symp (SEMI-THERM XV), pp. 55-64, 1999. 86. Rodgers, P., Lohan, J., Eveloy, V., Fager, C.M., and Rantala, J., “Validating Numerical Predictions of Component Thermal Interaction on Electronic Printed Circuit Boards in Forced Convection Air Flows by Experimental Analysis,” Advances in Electronic Packaging; Proc of The PACIFIC RIM/ASME International Intersociety Electronic & Photonic Packaging Conf (InterPACK’99), EEP-Vol. 26-1, pp. 999-1009, 1999. 87. Eveloy, V., Lohan, J., and Rodgers, P., “A Benchmark Study of Computational Fluid Dynamics Predictive Accuracy for Component-Printed Circuit Board Heat Transfer,” IEEE Trans on Components and Packaging Technology (CPT), Vol. 23, No. 3, pp. 568-577, 2000. 88. Lohan, J., Eveloy, V., and Rodgers, P., “Visualization of Forced Air Flows over a Populated Printed Circuit Board and their Impact on Convective Heat Transfer,” Proc of 8th Intersociety Conf on Thermal and Thermomechanical Phenomena in Electronics Systems (ITHERM 2002), pp. 501-511, 2002. 89. Eveloy, V., Ph.D. thesis, to be submitted to Dublin City University, Ireland, 2003. 90. Eveloy, V., Rodgers, P., and Hashmi, M. S. J., “Numerical Heat Transfer Predictive Accuracy for an In-Line Array of BoardMounted PQFP Components in Free Convection,” in review for possible publication in the Trans of the ASME, Journal of Electronic Packaging, 2003. 91. Ferziger, J., H., and Peric, M., “Computational Methods for Fluid Dynamics,” Springer, Berlin, pp. 276-279, 1997. 92. Anderson, A., “A Comparison of Computational and Experimental Results for Flow and Heat Transfer from an Array of Heated Blocks,” Trans of the ASME, Journal of Electronic Packaging, Vol. 119, March, pp. 32-39, 1997. 93. Grimes, R., Kehoe, E., and Davies, M., “Experimental and Numerical Investigation of Mixed Convection Flow over a Horizontal Cylinder and a PCB,” Proc of 7th International Workshop on Thermal Investigations of ICs and Microstructures (THERMINIC), pp. 83-86, 2001. 94. Meinders, E.R., “Experimental Study of Heat Transfer in Turbulent Flows over Wall-Mounted Cubes,” Ph.D. Thesis, Faculty of Applied Physics, Delft University of Technology, The Netherlands, pp. 19-36, 1998. 95. Cole, R., Dalton, T., Punch, J., Davies, M. R., and Grimes, R., “A Thermal Design Methodology for Electronic Systems - Part I: Board and Component Level,” Proc of 33rd ASME National Heat Transfer Conf, NHTD99-152, 1999. 96. Behnia, M., Nakayama, W., and Wang, J., “CFD Simulations of Heat Transfer from a Heated Module in an Air Stream: Comparison with Experiments and a Parametric Study,” Proc of 6th Intersociety Conf on Thermal and Thermomechanical Phenomena in Electronic Systems (ITHERM’98), pp. 143-151, 1998. 97. Azar, K., and Rodgers, P., “Vizualisation of Air Flows in Electronic Systems,” Electronics Cooling, Vol. 7, No. 2, pp. 2633, 2001. 98. Tatchell, T., “Grid Systems for CFD and their Application to Electronics Thermal Analysis,” Flomerics Limited, Bridge Road, Hampton Court, Surrey, KT8 9HH, United Kingdom, 1998.

Page 11 of 11