Solar Array Emulator

Solar Array Emulator Takudzwa B Tapfumanei1 , H.D.T Mouton2 ,Arnold J. Rix3 1

2

Stellenbosch University, Department of Electrical and Electronic Engineering; E-Mail: [email protected]

Stellenbosch University, Department of Electrical and Electronic Engineering,Stellenbosch; E-Mail: [email protected] 3

Stellenbosch University, Department of Electrical and Electronic Engineering,Stellenbosch; E-Mail: [email protected]

Abstract In this paper a technique designed and developed to evaluate and certify the performance of photovoltaic energy production systems such as battery chargers, DC/AC and grid-tie inverters, maximum power point trackers, etc. is presented. The technique is employed using an indoor-test system called the Solar Array Emulator (SAE). The developed SAE system is composed of a DC/DC synchronous buck converter, load, graphical user interface (GUI) running on personal computer (PC), and an FPGA device. The FPGA device runs the current feedback control architecture of the SAE system and controls the switching behaviour of the power converter based on the pulse width modulation (PWM) principle. The SAE system, using the GUI allows the user to define PV array parameters, weather conditions and the extent of shading. A 20 kW SAE prototype is built and tested using a variable resistor and a grid-tie inverter. The experimental results indicate that the proposed SAE prototype emulates the current-voltage operating points of the DC/DC converter with an accuracy averaging 1.05% relative to the I-V curve characteristics of an array defined by user. Keywords: FPGA; PWM; SAE; GUI; DC/DC; MPPT. 1. Introduction Interest in renewable energy has proliferated in recent years due to increased energy demand across the world. The production of photochemical pollutants, green house gasses, resulting in global warming is largely associated with conventional means of generating electricity i.e. by the use of fossil fuels. These damage the environment, henceforth renewable energy e.g., photovoltaic and wind, etc. is perceived to be the alternative that is naturally replenished, sustainable and environmentally friendly. Nonetheless renewable energy production systems succumb to non-linear output characteristics greatly influenced by factors such as temperature, solar irradiation, wind speed, altitude, etc. As a result the production systems

are interfaced either by a properly matched load or by developed power electronic systems implementing maximum power point tracking (MPPT). The developed power electronic systems such as power converters, DC/AC inverters, battery chargers, maximum power point trackers, etc. should be evaluated and certified according to specific performance standards prior to commercialisation. In order to facilitate the evaluation process, a developed device/system known as Solar Array Emulator (SAE) is employed during the prototyping phase. The purpose of the SAE system is to provide a controllable indoor test facility that can emulate current-voltage profiles of actual PV arrays under different temperature, solar irradiation and shading conditions. Moreover, the SAE system is able to recreate solar array performance in extreme but currently unachievable environmental conditions such as extra-terrestrial solar irradiation, cold temperature in hot climate and vice versa. This allows the PV power electronics systems to be tested for normal operation and also tested for operations in boundary conditions and faulty scenarios thus enabling thorough evaluation. The conventional approach of PV systems’ evaluation involves outdoor field testing processes that are expensive, time consuming and largely dependent on weather conditions. The SAE system overcomes the shortcomings associated with the conventional approach and moreover reduces operational test costs and failure risks. By using the emulator, calculations related to the PV energy production are made prior to commercialisation or installation on site, thereby allowing room for further optimisation where deemed necessary, of the systems under test . This ensures that the evaluated, improved and certified systems will operate at maximum efficiency, thereby improving the amount of electricity generated by the PV technology. Several techniques have been employed in developing emulator systems including: (i) using an analogue adjustable I-V curve generator to simulate solar array characteristics

Rs

q is the electronic charge (1.602 × 10−19 C) and Vd is the voltage across the diode.

I +

+

ISC

Rp

Vd −

Id

V

Ip

 qVd  Id = Io e kT − 1

The term Io denotes the reverse saturation current of the diode. By analysing the circuit and using Equation 2 and Equation 1, the current flowing through the load is described by the expression in Equation 4 where Vd is given by Equation 3.

−

Fig. 1: PV cell one diode model

[1], (ii) magnifying independently the output voltage and current of a PV cell [2], (iii) using PWM power converters controlled by digital micro- controllers to emulate I-V curves of solar arrays [3], (iv) using a PSPICE PV intergrated model with MPPT capability[4]. In this paper, a Solar Array Emulator based on a Field Programmable Gate Arrays (FPGA) is presented. The SAE system is comprises of a synchronous DC/DC buck converter with its gate signals being controlled by the FPGA. The control algorithm running in the FPGA is programmed in the VHDL language and controls the converter based on the Pulse Width Modulation (PWM) principle. The FPGA digital technology offers complex but flexible and fast parallel signal processing. This technology has been embraced in power electronics for implementation in digital control algorithms. Moreover, the sampling rate in the FPGA technology is significantly higher, which enables rapid prototyping of systems.

2. PV cell equivalent model In order to help predict the performance of solar cells, engineers designed an equivalent circuit that ideally characterises the behaviour of solar cells. Fig. 1 depicts the one diode model of a PV cell. The current source in parallel with a diode, delivers current in proportion with the solar irradiation incident on the cell. There are two crucial parameters in PVs, namely short circuit current Isc and open circuit voltage Voc . The parallel leakage resistance Rp provides an alternative current path in the event that a cell is shaded. The series resistance Rs , partially represents semiconductor resistance and contact resistance associated with the attachment between the cell and its wire leads. The current flowing to the load is given by Equation 1.

I = Isc − Id − Ip

(2)

Load

(1)

The voltage-current characteristics curve for the p-n junction diode is described by the Shockley diode equation in Equation 2 where k is the Boltzmann constant (1.381 × 10−23 J K−1 ), T is the junction temperature (K),

Vd = V + IRs

(3)

 q   V + IR  s I = Isc − Io e kT (V +IRs ) − 1 − Rp

(4)

3. PV cell equivalent model under partial shading PV cells are very sensitive even to small amounts of shading [5]. When one cell in a module is shaded, the output of the entire module can be significantly reduced. The performance of a string of modules can be greatly affected if a single module has a small fraction of its area shaded. Complete shading of a cell results in the current source Isc of that cell falling to zero. If a cell is shaded, the only path for current flow is through Rp and the voltage drop across Rp causes the cell diode to be reverse biased resulting in the diode current becoming zero. This means that the current flowing to the load passes through Rs and Rp . This shows that the shaded cell reduces the output voltage instead. This entails that the output voltage of one cell shaded module produces an output voltage VSH which is determined by the expression in Equation 5 where n, is the number of cells in a module.   n−1 VSH = V − I(Rp + Rs ) (5) n In order to mitigate the significant voltage drop due to shading, ideally a bypass diode is added across each cell as shown in Fig. 2. However for commercial viability, manufactures use a single diode to cover a certain number of cells in a module. When the cell is exposed to the sun, voltage rise across the cell, cuts off the bypass diode resulting in no current flowing through it. However when the solar cell becomes shaded, no current flows through the cell and the bypass diode is turned on, diverting all the current through that diode [6]. An ordinary diode has a voltage drop of about 0.6 V, thereby controlling and limiting the voltage drop across the cell to 0.6 V instead of the large voltage that could have otherwise been dropped according to Equation 5. The use of bypass diodes not only improves the cell’s performance but also prevents the development of hot spots on shaded cells [7, 8].

Rs +

−

PC I, V I FPGA Controller

+

Rp

Vd

ISC = 0

I

Ip

Id = 0

n − 1 cells

PWM

DC/DC

Grid tie Inverter

I, V I

. . .

DC Power Supply

. . .

Fig. 4: Solar Array Emulator block diagram

VSH

Load

+

I−V curve characteristics

Vn−1

1.6

PV module output characterstics curve

1.4

−

−

1.2

* Iref

1

Iact

Current [A]

Fig. 2: Bypass diode placed in parallel with a cell

P k

P 1

0.8

DC/DC converter output characteristiics, Load line

0.6

DC/DC converter operating point 0.4

0.2

L Vdc

rL

i

C

0 − +

Vc

C +

Vin −

Vo rc

R

−

Fig. 3: Synchronous Buck converter topology

4. DC/DC converter topology The converter topology implemented by the SAE is shown in Fig. 3. The converter offers robustness in overload conditions and is designed to operate under a variety of different load characteristics. It is rated at 20 kW and is carefully designed to thwart any electrical fault. The converter input voltage, Vdc is an unregulated DC voltage. The FPGA unit controls the switching of both switches in Fig. 3 in order to modulate the DC input voltage Vdc into high frequency wave Vin . The DC output voltage is regulated to a value of interest by adjusting the PWM duty cycle, D according to the expression in Equation 6. Vo = DVdc

0

1

2

3

4

5

6

7

8

9

10

Voltage [V]

+

(6)

5. PWM Controller design strategy In order to design a controller with optimal performance, an accurate model of the pulse width modulator is of utmost importance. In this paper a current controller is designed since a solar cell/module acts as a current source. A small

Fig. 5: Emulation technique description

signal model that employs z-domain techniques is used for the design of the pulse width modulator [9]. An analysis of the stability of the controller is conducted under different load characteristics. Using the small signal model, a ? reference current Iref , is injected into the current feedback R of the loop controller. Multiply simulations in Matlab current controller in Fig. 6 are conducted in order to design for parameters that ensure the controller operates within the designed stability margins. 6. Description of the Solar Array Emulator The SAE system operates in two operational modes namely the simulation mode and the emulation mode. The simulation mode simply simulates and plots the I-V and P-V characteristics curves of the PV module/array of interest based on the user-defined parameters and weather conditions. The SAE emulation mode emulates the current-voltage profiles of the solar module of interest as defined by the user. The system is rated at 20 kW with a maximum current of 18 A and a maximum voltage of 900 V. Moreover the system can thus operate and emulate the size of an array that falls within the specified limits. The SAE system takes into consideration the effect of shading and mismatch of modules or strings that produce multiple maximum power points. However it depends on the performance of the gridtie or MPPT tracking inverter under test whether the SAE will emulate the global or the local maximum power point.

PWM small-signal model PI Controller ∗ Iref (s)+

−

Ideal Sampler

Impulse Generator

z-domain

Gc (s) Ts

Kss

Vd

Vin (s)+ −

G1 (s)

I(s)

G2 (s)

Vo (s)

Ts

Fig. 6: z-domain model of pulse width modulator current regulator

I

I

+

+

V

V

− −

Fig. 7: 1 X 2 array with one top shaded

The SAE system set-up is shown in Fig. 4 and is composed of four sub-systems namely: • The synchronous buck converter. • The control system that consist of the FPGA unit with A/D converters. • The resistive load or grid tie inverter. • The PC running an algorithm with GUI. The DC/DC converter is described in Section 4. The digital current regulator runs in the FPGA. The DC output current flowing through the load is measured by a LEM current sensor. The output voltage is measured using a voltage divider circuit connected to op-amp based voltage follower circuits. The measured current and voltage values are interfaced with the FPGA device using a 12 bit A/D converter. Running on the PC is an algorithm with a graphical user interface, (GUI). The GUI in Fig. 14, is interfaced with the FPGA unit via an 8 bit wide serial communication port. The GUI allows the user to define the operating conditions such as temperature, irradiation, short circuit current, open circuit voltage and percentage shading. The algorithm running on the PC creates the I-V and P-V characteristics curves according to the user-defined specifications. The load voltage and current in case of ohmic load are related according to the linear characteristics in Fig. 5. The simulated current-voltage I-V characteristics curve is shown in Fig. 5, in this case at user-defined conditions of 25 ◦ ◦C,

Fig. 8: 45 X 5 array with one module shorted

1000 W m−2 , Voc of 10 V, Isc of 1.5 A and 0% shading. The algorithm running on the PC initially communicates with the FPGA in order to find the current and voltage values that define the load line. The point Pk is the point of intersection between the load line and the user-defined I-V curve characteristics. This point defines the operating point ? and reference current Iref of the solar PV module. The ? value Iref is sent to the FPGA unit which then controls the PWM duty cycle so that the DC/DC converter can successively regulate the load current to operate at point Pk . At each operating point, the SAE output current, Iact , is ? compared with the corresponding PV module current Iref . Their difference is used by the FPGA unit to control the PWM duty cycle until a point of convergence is reached at point Pk . The algorithm running in the FPGA unit constantly adjusts the duty cycle so that the operating point of the DC/DC converter is moved from the point labelled P1 to point Pk . The FPGA maintains the operating point at Pk , and at this point, the emulator output voltage and current are equal to the corresponding values of the simulated PV module. 7. Simulation mode results In simulation mode, the user can define an array with one module in series and two in parallel as shown in Fig. 7. The operation conditions are defined at 25 ◦C, irradiation of 1000 W m−2 , Voc of 20 V, Isc of 3.5 A, 60 cells and with

Shading in mismatched modules I−V Curve using blocking diodes

Shading in mismatched modules P−V Curve using blocking diodes 100

100% shading 75% shading 50% shading 25% shading No shading

7

6

80

70

Power [W]

5

Current [A]

100% shading 75% shading 50% shading 25% shading No shading

90

4

3

60

50

40 2

30

1

20

10 0 0

2

4

6

8

10

12

14

16

18

20

Voltage [V]

0

0

2

4

6

8

10

12

14

16

18

20

Voltage [V]

Fig. 9: 1 X 2 array shading effect of one cell on I-V curve

I

+

V −

Fig. 11: Shaded cell in module with bypass diodes

one cell shaded at different shading levels. The blocking diodes at the top of the modules, prevent reverse current drawn by the shaded module [11]. A bypass diode is added for every 10 cells. The I-V and P-V characteristics curves are shown in Fig. 9 and Fig. 10, respectively. A mismatch configuration in Fig. 8, with one module shorted is simulated. The mismatch can be caused by a module that is broken, etc. The array size in series-parallel configuration is 45 X 5 modules. The set-up implements blocking diodes and also a bypass diode for every 10 cells. The simulated I-V and P-V curves are shown in Fig. 12 and Fig. 13 respectively. 8. Emulation mode Experimental results The SAE prototype system was developed using the methodology described and tested in the laboratory. The FPGA on-board clock speed is 50 MHz and the target PWM frequency was 20 kHz. The FPGA unit sampled the SAE system output current and voltage at 196 kHz. Simulations R of the control systems in Fig. 6, verified with in Matlab high accuracy the current feedback control architecture running in the FPGA unit.

Fig. 10: 1 X 2 array shading effect of one cell on P-V curve

The operation of the SAE system in emulation mode was tested for the module in Fig. 11. Fig. 14 shows the emulation of an I-V curve simulated with weather conditions and percentage shading defined by the user as shown on the graphical user interface. The DC/DC converter currentvoltage operating point marked by a red star, emulates the I-V curve at 100% efficiency. The load voltage and the current flowing are shown in the GUI. In another experiment, the operation conditions and the module properties were defined by the user at 25 ◦C, irradiation of 1000 W m−2 , Voc of 20 V, Isc of 2.5 A, 60 cells and with one top cell shaded at different shading levels. Two different load characteristics of the SAE system namely a variable resistor and a grid-tie inverter were tested. The variable resistive load was varied from 0.6 Ω to 77.6 Ω, and the SAE system plotted 400 points of the current-voltage operating points of the DC/DC converter. The emulated I-V and P-V characteristics curves are shown in Fig. 15 and Fig. 16, respectively at 0% shading. The blue line indicates the theoretically simulated I-V characteristics curve based on the user-defined operating conditions. The red stars indicate the current -voltage operating points of the DC/DC converter as the load characteristics are varied. The SAE system emulated the theoretical I-V curve with an average current deviation of approximately 0.5% as can be observed in Fig. 15. The system was tested using the same operating conditions with shading of one cell at 25%. The emulated I-V and P-V characteristics curves are shown in Fig. 17 and Fig. 18, respectively. The variable resistor was replaced with a grid-tie inverter. The grid-tie inverter employs a method called Constant Voltage technique that allows it to deliver as much power as possible to the grid. The SAE system was used to test the performance of the grid-tie inverter. The user defined specifications for the module in Fig. 11 were at a temperature of 25 ◦C, irradiation of 1000 W m−2 , Voc of 20 V, Isc of 2.5 A, 60 cells and with one top cell shaded at different

Mismatched modules I−V Curve using blocking diodes

Mismatched modules P−V Curve using blocking diodes

18

12000 No shorting 5 modules shorted

16

No shorting 5 modules shorted

10000 14

8000

Power [W]

Current [A]

12

10

8

6

6000

4000

4 2000 2

0

0

100

200

300

400

500

600

700

800

0

900

0

100

200

300

400

Voltage [V]

500

600

700

800

900

Voltage [V]

Fig. 12: Effect of shorted module on I-V curve

Fig. 13: Effect of shorted module on P-V curve

Fig. 14: The SAE system graphical user interface (GUI) Emulation of I−V curve using SAE at 0% shading

Emulation of P−V curve using SAE at 0% shading

3

40

35 2.5 30 2

Power [W]

Current [A]

25

1.5

20

15 1 10 0.5 5

0

0

2

4

6

8

10

12

14

16

18

20

Voltage [V]

Fig. 15: Operating points with varying resistance

0

0

2

4

6

8

10

12

14

16

18

Voltage [V]

Fig. 16: Power curve at each operating point

20

shading levels. The SAE system emulated the operating points of the grid-tie inverter. The emulated I-V and P-V characteristics curves at 0% shading of one cell are shown in Fig. 19 and Fig. 20 respectively.

[3] E. Koutroulis, K. Kalaitzakis, and V. Tzitzilonis, “Development of an fpga-based system for real-time simulation of photovoltaic modules,” Microelectronics journal, vol. 40, no. 7, pp. 1094–1102, 2009.

Current-voltage operating points of the DC/DC converter were plotted with the grid-tie inverter connected as the load. The grid-tie inverter operated at an average of 96% of the theoretical maximum power point. The current deviation was an average of 0.9%. Another performance test of the grid-tie inverter was conducted using the same userdefined operating condition as before but with a partial shading of 25%. The grid-tie inverter operated at 94% of the global maximum power point. The current deviation was an average of 0.8%.

[4] K. P. Kiranmai and M. Veerachary, “Maximum power point tracking: a pspice circuit simulator approach,” in 2005 International Conference on Power Electronics and Drives Systems, vol. 2. IEEE, 2005, pp. 1072– 1077.

9. Conclusion Solar Array Emulators are very fundamental in laboratory tests of photovoltaic energy production systems such as battery chargers, maximum power point trackers, DC/AC inverters and also grid tie inverters. This enables further optimisation of the aforementioned systems for best performance prior to commercialisation or installation on-site. The conventional approach of out-door testing, is time consuming, expensive procedure and also limited to certain weather conditions. Thus enough tests in order to validate the tested systems are not conducted . During this research, a Solar Array Emulator based on FPGA device was designed and built. The system is composed of DC/DC converter, FPGA unit and graphical user interface running on the PC. The simulation mode results indicated that the system was able to accurately simulate an I-V and P-V characteristics curve for different weather conditions and also considering partial shading. The emulation mode experimental results indicate that using the developed SAE system, the photovoltaic module/array current-voltage characteristics are emulated with an accuracy of approximately 1.05%. Acknowledgement Scatec Solar company for its financial support. References [1] D. Smith, G. A. O’Sullivan, and F. K. O’Sullivan, “The design and performance of an 11 kw solar array simulator,” in Power Electronics Specialists Conference, 1980. PESC. IEEE. IEEE, 1980, pp. 220–225. [2] H. Nagayoshi, “I–v curve simulation by multi-module simulator using i–v magnifier circuit,” Solar energy materials and solar cells, vol. 82, no. 1, pp. 159–167, 2004.

[5] M. Alonso-Garcia, J. Ruiz, and F. Chenlo, “Experimental study of mismatch and shading effects in the i–v characteristic of a photovoltaic module,” Solar Energy Materials and Solar Cells, vol. 90, no. 3, pp. 329–340, 2006. [6] E. Karatepe, M. Boztepe, and M. Colak, “Development of a suitable model for characterizing photovoltaic arrays with shaded solar cells,” Solar Energy, vol. 81, no. 8, pp. 977–992, 2007. [7] W. Herrmann, W. Wiesner, and W. Vaassen, “Hot spot investigations on pv modules-new concepts for a test standard and consequences for module design with respect to bypass diodes,” in Photovoltaic Specialists Conference, 1997., Conference Record of the TwentySixth IEEE. IEEE, 1997, pp. 1129–1132. [8] E. Molenbroek, D. Waddington, and K. Emery, “Hot spot susceptibility and testing of pv modules,” in Photovoltaic Specialists Conference, 1991., Conference Record of the Twenty Second IEEE. IEEE, 1991, pp. 547–552. [9] T. Mouton, A. de Beer, B. Putzeys, and B. Mcgrath, “Modelling and design of single-edge oversampled pwm current regulators using z-domain methods,” in ECCE Asia Downunder (ECCE Asia), 2013 IEEE. IEEE, 2013. [10] L. Risbo, M. C. Høyerby, and M. A. Andersen, “A versatile discrete-time approach for modeling switchmode controllers,” in Power Electronics Specialists Conference, 2008. IEEE. [11] S. Li, T. A. Haskew, D. Li, and F. Hu, “Integrating photovoltaic and power converter characteristics for energy extraction study of solar pv systems,” Renewable Energy, vol. 36, no. 12, pp. 3238–3245, 2011.

Emulation of P−V curve using SAE

Emulation of I−V curve using SAE at 25% shading 35

3

30

2.5

25

Power [W]

Current [A]

2

1.5

20

15

1

10

0.5

0

5

0

2

4

6

8

10

12

14

16

18

0

20

0

2

4

6

8

Voltage [V]

10

12

14

16

18

20

18

20

Voltage [V]

Fig. 17: Operating points at 25% shading

Fig. 18: Power curve at 25% shading

Grid−tie inverter MPP tracking P−V curve using SAE

Grid−tie inverter MPP tracking I−V curve using SAE 45

3

40 2.5

35

30

Power [W]

Current [A]

2

1.5

1

25

20

15

10 0.5

5

0

0

2

4

6

8

10

12

14

16

18

0

20

0

2

4

6

8

Voltage [V]

10

12

14

16

Voltage [V]

Fig. 19: Grid-tie inverter operating points

Fig. 20: Power tracking with grid-tie inverter

Grid−tie inverter MPP tracking P−V curve using SAE at 25% shading

Grid−tie inverter MPP tracking I−V using SAE at 25% shading 35

3

30

2.5

25

Power [W]

Current [A]

2

1.5

20

15

1

10

0.5

0

5

0

2

4

6

8

10

12

14

16

18

Voltage [V]

Fig. 21: Inverter operating points at 25% shading

20

0

0

2

4

6

8

10

12

14

16

18

Voltage [V]

Fig. 22: Inverter power tracking at 25% shading

20