SPWM for Current-Sensorless Control of H-Bridge ...

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SPWM for Current-Sensorless Control of H-Bridge Based PFC Rectifier Considering Voltage Sag Condition Juan Ramón Rodriguez-Rodrıguez a,*, Edgar Lenimirko Moreno-Goytia a Vicente Venegas Rebollar a, David Campos-Gaona b, Ramon A. Felix c, Luis Eduardo Ugalde a. a b c

Ingeniería Eléctrica, Instituto Tecnológico de Morelia, Morelia, Michoacán, México. University of British Columbia, Electrical and Computer Engineering. University of Colima, at the Faculty of Mechanical and Electrical Engineering.

Abstract: This paper presents H-Bridge PFC as a step forward in sensorless current control schemes for performance improvements of single-phase bidirectional rectifiers. This control scheme is designed based on a single PI controller loop fed by DC reference signals. Regarding dynamic operating conditions, the PFC proposed control rectifier synergy can maintain a regulated DC voltage under various input conditions (voltage sags) and output (load step changes) ports while maintaining a unitary power factor (PF) and constant THD current input. In contrast to other investigations, this proposal is based on SPWM, does not require a variable transformation into the dq0 reference frame, and the complex compensators after the PI controller stage are no longer needed. Therefore, this study attempts to reduce the complexity of the control scheme and improving the response of the PFC rectifier. The experimental results obtained from the scaled-down prototype setup, which was built for research purposes, validate the control law, mathematical model and quantitative comparison between simulation and experiment, considering the parasitic resistances of the inductor and semiconductor switches. Index Terms- AC-DC power conversion, PFC converter, SPWM rectifier, sensorless current, single-loop PI, dc regulation, input regulation.

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I. INTRODUCTION The AC to DC conversion process is a process included, as a single stage or paired to other conversion stages, in a wide variety of medium- and low-voltage industrial applications such as DC arc furnaces, battery chargers, motor drivers and power supplies for various other applications [1]-[2]. In addition, in the field of distributed generation, active rectifiers play an important role in micro and nano wind power generation systems [3]. Along with the increasing penetration of active PWM rectifiers into distribution grids, concerns about power quality (PQ) have also grown [4]-[5]. Several IEEE and IEC standards and recommendations specify regulations for PQ phenomena. In particular, the IEC 1000-3-2 establishes limits to harmonic current emission from electronic and electrical equipment connected to public low-voltage supply systems [6]-[7]. The pursuit of compliance with this standard has motivated the development of active methods for power factor correction, PFC, and PQ improvements [8]. To address this, various topologies for PFC have been proposed in the literature [9]-[10]. Examples of these are boost converters [18-21], Vienna rectifiers [22]-[23] and H-bridge converters [13]-[15]. It should be mention that the latter is the only topology with bi-directional flow [8]. Table I presents a comparison between various single-phase PFC rectifiers and the proposed scheme. TABLE I A COMPARISON OF SINGLE PHASE PFC RECTIFIER CHARACTERISTICS AC or DC Single PI DC Signals SPWM Without dq0 Bidirectional Current in PI Modulation Demodulator flow Sensorless Proposed Technique [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [22] [23] [22] [23]

√

√

√

√

√

√

√

√ √

√ √

√

√ √

√ √ √ √

√ √ √ √ √ √

√ √ √ √

√ √ √

√ √ √ √ √ √ √

√ √

√ √ √ √ √

√ √ √ √ √ √ √ √

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The current trend, in relation to the mass production of power electronics, is to develop low-cost and reduced-volume PFC rectifiers. In this sense, sensorless techniques represent an attractive option to meet these requirements as long as the complexity of the control algorithms and the computational processing required is not an obstacle. In Table I, a number of rectifiers are listed including sensorless techniques [19-23], but these are applied only to unidirectional boost topologies. The boost PFC topology contains discontinuities in the zero-crossing current waveform [24]. Such characteristics increase the total harmonic distortion (THD) injected into the AC network. The increment in the commutation frequency helps to reduce the THD, but this action implies an efficiency reduction [25]. An alternative approach for THD reduction is the use of LCL filters [26]-[27]; however, the use of these filters increases the rectifier’s volume and cost. The most common technique implemented in single-phase rectifiers having an H-Bridge topology is fully described in [1] and [13]. This technique uses a single-loop feedback. The input current and the input and output voltages are used as the feedback variables. The application of sinusoidal signals in the PI controls causes a phase shift between the control variable and the reference variables. To avoid this shift, a number of authors recommend the application of lead and lag compensators. However, these compensators increase the order of the controller transfer function and subsequently the complexity of the control algorithms [28]. In contrast, in the case of PI controls for single-phase rectifiers that use DC variables, a number of authors choose to apply the dq0 frame with demodulators and thus obtaining three-phase variables from single-phase variables and vice versa as demonstrated in [11]-[14]. This technique is a solution to the phase shift, but the higher complexity of the system and algorithms makes necessary the use of three feedback loops. Regarding the rectifiers control PFC for H-Bridge, applying only two voltage sensors, one of the few available options in the open literature is [15]. This rectifier commutes by force only two of the four switches. The switch to commute is selected based on the estimated IDC polarity (DC-side). According to this operational procedure, which is based on the principle of operation of the dual boost PFC rectifier - also known as bridgeless PFC boost rectifier [18] - both a mathematical model and a control rule are obtained. In general, PFC rectifiers -based on boost, boost-bridgeless or dual boost control- can hardly deal with voltage sags and its THD has great variations depending on the input

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voltage level and rectifier power [18][15]. Both characteristics lower the PQ and the PF. Contrary to the technique aforementioned, in this paper the H-Bridge is modelled using an AC source, and a control rule is obtained using the basic theory of bidirectional power flux between two CA sources connected by an inductance [29]. With this technique, the input current is maintained with low harmonic distortion regardless of the current direction or rectifier power. The most relevant advantages obtained with the proposed rule control, when comparing to [15] and [19-23] for instance, are: i) Continuous regulation of VDC and PF=1 under normal and abnormal conditions (voltage sags for instance) at the AC-side ii) The control system is represented by a PI and four additional mathematical operations, as shown in Fig. 1 b) iii) SPWM without need of additional commutations rules or algorithms for commuting the IGBT. In this way commutation losses are reduced and the resulting THD for steady current is lower than 5% under different input and output conditions. An additional advantage is that the proposed control for the rectifier is less complex than other options, having at the same time, better performance in relation to the PQ. The latter is obtained without the usage of current sensors or DC-side current estimation. Using VDC as the feedback variable, the magnitude and angle of the voltage at the inductor terminals VL can be controlled. This control action also helps to control the flow direction and magnitude of IL, and from here, the charge and discharge of capacitor C can be managed. The following sections detail the proposed technique, small-signal model of the PFC rectifier, developed control scheme, case studies and the experimental results.

II. PRINCIPLE OF OPERATION A. H-Bridge Modeling Fig. 1 shows the H-bridge-based, single-phase rectifier connected to the grid, at a voltage VGRID, with impedance L+ Rp+RDSON. L is the line inductance, Rp is the line’s parasitic resistance and RDSON considering the average losses conduction on power switches. The fundamental current IL flows from the grid to the rectifier. VPWM is the voltage at the ACside of the rectifier, and VDC is the DC voltage across a capacitor C. The load current IRL is related to the capacitor current IC by I DC  I C  I RL . IDC is the H-bridge output current. The proper operation of the rectifier, along with its boost converter, requires that VDC > |VGRID|.

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L

Rp

I DC

RDSON

S1

VGRID

S3

D1

IC

D3

RL

C

VPWM

IL

I RL

S4

S2

D2

 



VDC

D4

a) H-Bridge PFC Rectifier

VDCref

Sat 



PI

PLL cos

b) Control System Proposed

Voltaje Sensors





D

3 Level SPWM

S1,2,3,4

Triangle

VGRID

VDC

Fig. 1. Active SPWM, H-bridge rectifier with the proposed control method.

For a 3-level SPWM scheme, the commutation functions S1 and S2 of the converter are defined as shown in Table II. TABLE II THREE-LEVEL SPWM COMMUTATION FUNCTIONS VPWM IDC S3  S 4 S1  S 2 1 0 VDC IL 1 1 0 0 0 0 0 0 0 1 -VDC -IL

Assuming a commutation frequency fcom ten times higher than the line frequency fline, that is, fcom > 10 fline, the duty cycle D can be used to represent the average voltage and current relations of the rectifier. Using Table II, these are 𝑉𝑃𝑊𝑀 = (𝑆1 − 𝑆3 )𝑉𝐷𝐶 ≈ 𝐷 ∗ 𝑉𝐷𝐶

(1)

𝐼𝐷𝐶 = (𝑆1 − 𝑆3 )𝐼𝐿 ≈ 𝐷 ∗ 𝐼𝐿

(2)

The time-domain voltage equations of the rectifier are: 𝑑(𝐼𝐿 ) 𝑑𝑡

=−

𝑅𝐷𝑆 𝑜𝑛 +𝑅𝑝

𝑑(𝑉𝐷𝐶 ) 𝑑𝑡

𝐿 1

𝐼𝐿 −

𝑉𝐷𝐶 𝐿

1

𝐷 𝐿 𝑉𝐺𝑅𝐼𝐷

𝑉

𝐷𝐶 = 𝐶 𝐼𝐷𝐶 − 𝐶∗𝑅 𝐷 𝐿

(3) (4)

Using (3) and (4), the rectifier-equivalent AC and DC circuits can be represented with dependent sources as shown in Fig. 2. The input-output power transfer (between the delivery node at VGRID and the reception node at VPWM) along with IL can be obtained using equivalent equations.

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B. Vector Operation for VPWM Assuming the VGRID vector is parallel to the imaginary axis of the complex plane, it can take the form 𝑉𝐺𝑅𝐼𝐷 = 𝑉 ∗ sin(𝜔𝑡).

(5)

VL leads IL. To calculate a unitary power factor PF regardless of the magnitude of VL, IL should have the form

𝑉𝐿 ≈ 𝐴𝑥 ∗ 𝑐𝑜𝑠(𝜔𝑡)

(6)

and 𝑉

|𝐼𝐿 | ≈ | 𝐿 |.

(7)

𝑋𝐿

L VGRID

Rp

RDSON

H  BRIDGE

VPWM

IL

I RL

IC

I DC

C

RL

VDC

I-1

Fig. 2. Equivalent circuit of the active H-bridge PWM single-phase rectifier.

In (6), Ax represents the magnitude of the voltage vector applied to L as depicted in Fig. 3 for a lossless system (Rp + RDSON = 0). The magnitude and phase of vector VPWM can be dynamically varied to maintain VL and VGRID in quadrature. P, Q

VGRID

VPWM

IL VLn  Axn  cos(t )

j VPWMn

V L1 VPWM 1 n

VL 0

1

VPWM 0

0

I L0

I L1 VGRID

I Ln

re

Fig. 3. VPWM vector space for single-phase rectifier.

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Figure 3, it is possible to confirm that the voltage across the inductor VL is dependent on the input voltage VGRID and small increases in phase and magnitude of VPWM, preserving the sinusoidal waveform, thus ensuring low current THD in IL, independently its magnitude. To compensate for the reactive power at the AC side of the circuit of Fig. 2, the voltage across the rectifier is controlled by the vector VPWM using 𝑉𝑃𝑊𝑀 ≈ 𝑉𝐺𝑅𝐼𝐷 − 𝐴𝑥 ∗ 𝑐𝑜𝑠(𝜔𝑡).

(8)

Fig. 3 shows the vector diagram of the main variables of the AC circuit at different magnitudes and angles (φ) for the VPWM vector located in the first quadrant, which is defined as |𝑉𝑃𝑊𝑀 | = √𝑉𝐺𝑅𝐼𝐷 2 + 𝑉𝐿 2 ∅ = 𝑡𝑎𝑛−1 (

𝑉𝐺𝑅𝐼𝐷 𝑉𝐿

).

(9) (10)

If VGRID = const. (in magnitude and phase), then the active power magnitude injected into the rectifier AC side can be controlled, based on (8), by Ax. This can be expressed as

𝑃=

𝑉𝐺𝑅𝐼𝐷 ∗𝑉𝑃𝑊𝑀

sin(∅)

(11)

𝑊𝐷𝐶 = C ∗ 𝑉𝐷𝐶 2 .

(12)

2𝑋𝐿

Where Ax remains as the only control variable. C. Plant Model The stored energy in the capacitor WDC of Fig. 2 is 1 2

WDC depends on the difference between the power injected at the input of the DC circuit PDCin and the power at its output PDCout, which is 𝑑(𝑊𝐷𝐶 ) 𝑑𝑡

1

= 𝐶∗ 2

𝑑(𝑉𝐷𝐶 2 ) 𝑑𝑡

= 𝑃𝐷𝐶𝑖𝑛 − 𝑃𝐷𝐶𝑜𝑢𝑡

(13)

PDCin is given by

𝑃𝐷𝐶𝑖𝑛 = 𝐼𝐷𝐶 ∗ 𝑉𝐷𝐶 .

(14)

𝑃𝐷𝐶𝑖𝑛 = 𝐷 ∗ 𝐼𝐿 ∗ 𝑉𝐷𝐶 .

(15)

Substituting (2) into (14), PDCin is

PDCout is the power delivered to RL, which is

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𝑃𝐷𝐶𝑜𝑢𝑡 =

𝑉𝐷𝐶 2

.

𝑅𝐿

(16)

Substituting (15) and (16) into (13), solving for VDC, and applying a Laplace transform, we find:

𝑉𝐷𝐶 (𝑠) = 1 2

𝐷∗𝐼𝐿 𝑠𝐶+

1. 𝑅𝐿

(17)

Solving (17) for IL, we find 𝐼𝐿 (𝑠) = 𝑠𝐿+𝑅

𝑉𝐿

.

(18)

.

(19)

𝐷𝑆 𝑜𝑛 +𝑅𝑝

Substituting (6) and (1) into (18), we find 𝐼𝐿 (𝑠) =

𝑉𝐺𝑅𝐼𝐷 −𝐷∗𝑉𝐷𝐶

𝑠𝐿+𝑅𝐷𝑆 𝑜𝑛 +𝑅𝑝

Equation (19) expresses IL as a function of VGRID and D. Equations (17) and (18) represent the AC-side and DC-side of the rectifier, respectively.

D. Control Law Before obtaining a control law dedicated to regulating VDC and maintaining the rectifier at PF = 1, it is necessary to first determine an approach for determining D. This can be done by equating (1) to (8), which gives

𝐷≈

𝑉𝐺𝑅𝐼𝐷 −𝐴𝑥∗cos(𝜔𝑡)

(20)

𝑉𝐷𝐶

Let D be expressed in the frequency domain 𝑠

𝐷≈

𝑉𝐺𝑅𝐼𝐷 (𝑠)−𝐴𝑥 2 2 𝑠 +𝜔 𝑉𝐷𝐶 (𝑠)

(21)

The active power flowing through the circuit of Fig. 2 depends on VGRID, a voltage that in turn depends on Ax. For this reason, Ax is the variable of interest for controlling VDC in closed-loop conditions. As a method to improve controllability, a new reference variable VDC _ ref and a PI block are introduced in the control loop. Under these considerations, Ax can be expressed as: 𝐴𝑥 ≈ (𝑉𝐷𝐶 𝑟𝑒𝑓 − 𝑉𝐷𝐶 ) [𝐾𝑝 By substituting (22) into (21), D can be rewritten as:

(𝑠+𝐾𝑖⁄𝐾𝑝) 𝑠

]

(22)

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Compensato r

VDC _ref



s  Ki Kp  Kp



Sat

s

Controller

Ax

 





D(s)



 

VPWM



VL

s

IL

 

L Rp L

I DC

VDC (s)

Plant Model

H  BRIDGE

Voltaje Sensors

1 C

s  1RL *C RL  C

Rp  L

cos(wt )

VGRID  V sin(t )

1

Fig. 4. Controller and Plant model for the single-phase PFC rectifier using the proposed technique.

𝐷(𝑠) ≈

𝑉𝐺𝑅𝐼𝐷 (𝑠)−(𝑉𝐷𝐶 𝑟𝑒𝑓 −𝑉𝐷𝐶 (𝑠))[𝐾𝑝

(𝑠+𝐾𝑖⁄𝐾𝑝) 𝑠

𝑠

] 2 2 𝑠 +𝜔

𝑉𝐷𝐶 (𝑠)

(23)

Because VDC is always larger in magnitude than VGRID, (23) shows that D < 1 with the same operating vector space as VPWM. The full control scheme is shown in Fig. 4. The scheme, built using VDC from (17) and (19), considers the dynamic characteristics of the voltage and current in the H-bridge topology. The external feedback loop is a PI that is implemented according to (23), using VDCref and VDC as constant references, to control the DC bus voltage. This scheme also allows PF=1 (the working vector space of VPWM assures a unity power factor) to be maintained for a wide range of load values using a single feedback loop. In this condition, no current sensors are required for IL. This provides the sensorless characteristic for this control scheme. The PI controllers have no compensation system (as is necessary if the references are sinusoidal) and do not require a dq0 transformation. The control structure, which is implemented based on equations (17), (19) and (23), is shown in Fig. 4. The system is nonlinear and cannot be analyzed using Laplace transforms. Therefore, a small-signal model of the system is carried out in Section III. III. SMALL-SIGNAL MODEL AND PI TUNING A well-designed linear control system based on PI regulators usually requires a smallsignal model of the converter [30]-[31]. For the purposes of this study, this type of model can be obtained for the rectifier by linearizing (3) and (4) about a static operating point. To achieve this linearization, the following averaging operation is carried out 𝐼𝐿 = 𝑥1 𝑉𝐷𝐶 = 𝑥2 𝐷=𝑢 𝐴𝑥 = 𝐴1 𝑉𝐺𝑅𝐼𝐷 = 𝑉1 sin(𝜔𝑡)

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Using the average values, the new plant model is described by

𝑥̇ 1 = −

𝑅𝐷𝑆 𝑜𝑛 +𝑅𝑝 𝐿

𝑉𝐷𝐶

𝑥1 −

𝐿

1

𝑢+

𝑉 𝐿 1

𝑢

1

𝐶

𝐶∗𝑅𝐿

𝑥̇ 2 = − 𝑥1 −

sin(𝜔𝑡)

(24)

𝑥2

(25)

The proposed averaged control law indicates that

𝑢≈

𝑉1 sin(𝜔𝑡)+𝐴1 cos(𝜔𝑡)

(26)

𝑥2

By using (26), (24) and (25), it can be proved that 𝑅𝐷𝑆 𝑜𝑛 +𝑅𝑝

𝑥̇ 1 =

𝐿

𝑥1 + 𝐴1 cos(𝜔𝑡)

𝑥

𝑥

2

2

𝑥̇ 2 = − 𝑥 1𝐶 𝑉1 sin(𝜔𝑡) + 𝑥 1𝐶 𝐴1 cos(𝜔𝑡) − 𝑅

(27) 1 𝐿 ∗𝐶

𝑥2

(28)

As shown in (27) and (28), the plant model depends on sinusoidal functions. The linearization of these equations can be carried out by manipulating the amplitudes, or peak values, of these sinusoidal expressions. The latter can be done only if such amplitudes are multiplied by a unity sinusoidal signal as shown in [32]. To accomplish this, it is necessary to take into account the phase difference between the two terms of the equation (28). For this case, a suitable trigonometric identity is: 𝑎

a ∗ sin(𝜔𝑡) + 𝑏 ∗ cos(𝜔𝑡) = √𝑎2 + 𝑏 2 ∗ sin (𝜔𝑡 + 𝑡𝑎𝑛−1 (𝑏))

(29)

Applying (29) to (28), the averaged plant model, without sinusoidal functions, gives: 𝑥̇ 1 ≈ 𝐹1 (𝑥1 , 𝑥2 , 𝐴1 ) =

𝑅𝐷𝑆 𝑜𝑛 +𝑅𝑝 𝐿

𝑥̇ 2 ≈ 𝐹2 (𝑥1 , 𝑥2 , 𝐴1 ) = − 𝑅

𝑥1 + 𝐴1 cos(𝜔𝑡)

1 𝐿

𝑥

𝑥 + 𝑥 1𝐶 √𝑉1 2 + 𝐴1 2 ∗𝐶 2 2

(30) (31)

To complete the linearization process, the Jacobian is applied to the averaged model, which is evaluated at the operation point (IL ≈ x10, VDC* ≈ x20, Ax ≈ A10), and we find 𝑥1 = 𝐴1 𝑅

𝐿

(32)

𝐷𝑆 𝑜𝑛 +𝑅𝑝

A10 can be obtained by substituting (32) into (21) and letting F2 = 0, which gives: 1

−𝑅

𝐿𝐶

𝑥2 + 𝑅

𝐴1 4 + 𝐴1 2 − (𝑅 The positive root of (34) is:

𝐿

𝐴1

𝐷𝑆 𝑜𝑛 +𝑅𝑝

1 𝐿

𝑥2 𝐶

√𝑉1 2 + 𝐴1 2 = 0

2 (𝑅 𝐷𝑆 𝑜𝑛 +𝑅𝑝)

𝑥 ) ( 𝐶 2

𝐿

(33)

2

𝑥2 𝐶) = 0

(34)

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1

𝐴10 = √− 2 + (𝑅

2 2 (𝑅 𝐷𝑆 𝑜𝑛 +𝑅𝑝) 𝑥 𝐶) 2 𝐿

1

𝑥 ) ( 𝐶 2

𝐿

1

+ 4.

(35)

The operation points in x10, x20, and A10 are taken into the Jacobian of F1 and F2, which gives 𝜕(𝐹1 )

𝜕(𝐹1 ) 𝜕𝑥

𝜕(𝐹1 )

𝜕𝑥2 ] 𝜕(𝐹2 ) 𝑥1 =𝑥10 𝜕𝑥2 𝑥2 =𝑥20 𝐴=𝐴10

𝐴𝑠 = [𝜕(𝐹1) 2

𝜕𝑥1

𝜕𝐴

𝐵𝑠 = [𝜕(𝐹1)]

(36)

1

𝑥1 =𝑥10 𝜕𝐴1 𝑥2 =𝑥20 𝐴=𝐴10

From (36), the resulting state equations of the small-signal model are

− 𝐴𝑠 = [

𝑅𝐷𝑆 𝑜𝑛 +𝑅𝑝

0

𝐿

√𝑉1 2 +𝐴10 2 𝑥20 𝐶

−

1 𝑅𝐿 ∗𝐶

−

𝑥10 𝑥20 2 𝐶

0

2

√𝑉1 + 𝐴10

𝐶𝑠 = [0 1]

2

]

𝐵𝑠 = [

𝐷𝑠 = 0

𝑥10 𝐴01 𝑥20 𝐶 √𝑉1 2 +𝐴10 2

]

(37)

As is a full-rank controllability matrix; therefore, the system is controllable. It is also verifiable that the transfer function is Hurwitz and, therefore, the poles of interest in the closed-loop control can be located at any point on the left side of the s plane. With this condition, the stabilization of the converter can be achieved, by means of the feedback, at points near the designed operation point. The frequency domain representation of the rectifier is obtained by applying a Laplace transform to the state equations in (37); this is: 𝐺(𝑠) = [𝐶𝑠(𝑠𝐼 − 𝐴𝑠)−1 𝐵 + 𝐷]𝑈(𝑠).

(38)

The small-signal transfer function in (39) is obtained by a) giving design values to the state equations As and Bs and b) transforming (37) to the s domain using (38). To tune the compensator parameters (Kp and Ki) and to reduce the order of the closed-loop transfer function, the most significant pole (s2) of the system is canceled with the zero of the PI compensator. Therefore, 𝐾𝑖 𝐾𝑝

=

𝑅𝐷𝑆 𝑜𝑛 +𝑅𝑝 𝐿

.

(40)

Once the response time ti is set, which is determined by taking the most significant pole, then Kp = L/ti and Ki = Rp/ti as indicated in [33]. L and Rp are regarded as fixed parameters in the design of a rectifier. Because of this, it can be established that the dynamic response of the system depends on the load resistor RL; therefore, such a response

12

can be modified without increasing the order of the transfer function. This effect is discussed in Section VI.

IV. AVERAGED MODEL SIMULATIONS A. Rectifier Design Table III presents the parameters for the design and simulation of the rectifier as well as the equations associated with the design process of the active rectifier of Fig 2 a). 2

𝐺(𝑠) = [

𝑥10 𝐴01

]

2

𝑅𝐷𝑆 𝑜𝑛 +𝑅𝑝 𝐴 +𝑉1 + (𝑠1 + 10 ) 𝐴10 𝑥10 𝐿

𝑅𝐷𝑆 𝑜𝑛 +𝑅𝑝 1 𝑥 2 √ 2 𝑥20 𝐶 √𝑉1 2 +𝐴10 2 (𝑠2 + )(𝑠3 +𝑅 ∗𝐶+ 10 2 𝐶 𝑉1 +𝐴10 ) 𝐿 𝑥 𝐿 20

(39)

Calculated

Proposed

TABLE III PARAMETER VALUES FOR THE SIMULATION OF THE PROPOSED RECTIFIER Parameter Value Eq. PB_sim 10 kW VDC 400 V |D| 0.5 VGRID 180sin(ωt) ω 120π rad/s VL 87.177cos(ωt) V (1)(9) VPWM 200sin(ωt+25.84) V (1)(10) |IL| 111.17 A (7) L_sim 20.8 mH (10) RL 16 Ω (16)

IDC is obtained from (2). For Rp = 0.1 Ω and a ripple voltage lower than 15% of VDC, the capacitance is set to C = 1880 µF by using the averaged H-bridge model of the rectifier shown in Fig. 2 a). To increase the tolerance of variations of RL, VDC_ref and VGRID, the small-signal linear model of the rectifier is used. For the operation point (IL ≈ x1 = 111.17, VDC* ≈ x2 = 400, Ax ≈ A10 = 87.1789), the transfer function is 𝐺(𝑠) = 18.5631 (𝑠

(𝑠1 +99.37)

.

2 +48.08)(𝑠3 +67.59)

(41)

If the speed response of the closed-loop system of the rectifier is set to ti = 0.1s, then Ki = 1 and Kp = 0.208, and K(s) is 𝐾(𝑠) = 0.208

(𝑠𝑘 +48.08) 𝑠

.

(42)

13

B. Closed-loop Tests Simulation results confirm the continuous regulation of VDC and PF=1, after the settling period. The input harmonic distortion is below 5% under various operational conditions. Fig. 5 illustrates the evolution of the voltages and the currents resulting from the forced response of the rectifier closed-loop operation (from the start to a steady state). Table II shows the parameters of the rectifier. According to Fig. 5, the settling time for VDC is 0.1 s. By using this value and the magnitude of IL, the validity of (7) is demonstrated (PF = 0.998 at RL = 16 Ω). VGRID (V) IL (Amps) VDC ref VDC (V)

Magnitude

400 200 0 -200 0

0.05

0.1

0.15

0.2

0.25

0.3

0.35

0.4

Magnitude

1.005

PF

1 0.995 0.99 0

0.05

0.1

0.15

0.2 Time (s)

0.25

0.3

0.35

0.4

Fig. 5. Rectifier closed-loop operation.

The frequency of the VDC ripple, as observed in Fig. 6, doubles the frequency of VGRID (at the fundamental frequency). The ripple frequency corresponds to IL and D and validates (17). Finally, the magnitude and relative phase of VL indicate that (6) is satisfied.Sudden variations can also be present at the load side. Fig. 6 also shows the waveforms resulting from a step change of RL.

Magnitude

400

VDC ref

200

VDC (V)

0 -200 0.35

Magnitude

VGRID (V) IL (Amp)

0.4

0.45

0.5

0.55

0.6

0.65

0.7

0.75 PF

1 0.995 0.99 0.35

0.4

0.45

0.5

0.55 Time (s)

0.6

0.65

0.7

0.75

Fig. 6. VDC, IL and PF dynamics for a load step change (28 Ω to 16 Ω).

14

As a response to the load change (28 Ω to 16 Ω) at t = 0.5 s, the rectifier control tends to increment the magnitude of IL in a short lapse of time (0.1 s) with a maximum error = 18% of VDC with respect to VDC_ref. As shown in Fig. 6b), the power factor changes from 0.9975 to 0.999. This change is discussed in Section V. The case study shown in Fig. 6 is the most common operating condition for a rectifier. In addition, the power supply’s load can also vary. In the presence of external disturbances at the rectifier input, the control should maintain Pin ≈ Pout. Fig. 7 shows the rectifier performance in the presence of a 30% voltage sag in VGRID. VGRID (V) IL (Amps) VDC ref VDC (V)

Magnitude

400 200 0 -200 0.35

0.4

0.45

0.5

0.55

0.6

0.65

0.7

Magnitude

1.005

0.75 PF

1 0.995 0.99 0.35

0.4

0.45

0.5

0.55

0.6

0.65

0.7

0.75

Time (s)

Fig. 7. VDC, IL and PF dynamics for a 30% voltage sag in VGRID.

The voltage sag forces the control to raise IL. This action maintains VDC at its level. The magnitude reduction of VDC causes a maximum deviation of 8.75%. The steady state is reached in 0.1 s. The power factor varies slightly at steady state. A step up change in VDC_ref results in an increment of both VDC and IL. This also results in an increment of the rectifier power transfer as shown in Fig. 8. VGRID (V) IL (Amps) VDC ref VDC (V)

Magnitude

400 200 0 -200 0.4

0.45

0.5

0.55

0.6

0.65

0.7

0.75

Magnitude

1.005

0.8 PF

1 0.995 0.99 0.4

0.45

0.5

0.55

0.6

0.65

0.7

0.75

0.8

Time (s)

Fig. 8. VDC, IL and PF dynamics for a VDC_ref step up change (320 to 460).

The simulation results presented in this section evidence the performance of the rectifier and its control scheme.

15

V. EXPERIMENTAL RESULTS The experimental setup based on DSP and AC programmable power source, are shown in Fig 9, the elements values are exposed on Table IV.

b) c) d)

a)

f)

e)

Fig. 9. Laboratory prototype H-SLSCC. a) Power source, b) impedance L+Rp, c) RL, d) H-bridge and Capacitor C, e) DSP-based control, and f) voltage sensors.

A. Simulation and Experimentation PU equivalents systems A scaled-down 1:100 laboratory prototype (0.1 kW) has been built for the purpose of experimentally verifying the performance of the single-phase rectifier with H-SLSCC. As a way to contrast the dynamic responses obtained in the experiment to those from the simulations, the parameter L and RL quantities are transformed to PU. Under this consideration, it is assumed that the relation between the base impedance and the inductive reactance of the theoretical and practical circuits is equivalent. Consequently, the following is true: 𝑋𝐿 10𝑘𝑊 𝑍𝐵 10𝑘𝑊

=

𝑋𝐿 0.1𝑘𝑊 𝑍𝐵 0.1𝑘𝑊

.

(43)

Where 𝑍𝐵 10𝑘𝑊 is the base impedance value for simulation Defined as :

𝑍𝐵 10𝑘𝑊 =

𝑉𝐺𝑅𝐼𝐷 𝐼𝐿

(44)

The value of the inductance (𝐿0.1𝑘𝑊 ) required for laboratory prototype is defined as 𝑍𝐵 0.1𝑘𝑊 𝑋𝐿 0.1𝑘𝑊 𝜔 𝑍𝐵 10𝑘𝑊

= 𝐿0.1𝑘𝑊 .

(45)

The value for load resistance can be defined as: 𝑉𝐷𝐶_𝑒𝑥𝑝 2 𝑃𝐵_𝑒𝑥𝑝

= 𝑅𝐿_𝑒𝑥𝑝

The parameter values for 0.1kW laboratory prototype are given in Table IV.

(46)

16

Hardware

Proposed scale

TABLE IV PARAMETER VALUES AND HARDWARE FOR THE IMPLEMENTATION OF THE RECTIFIER PROTOTYPE Parameter Value Eq PB_exp 0.1 kW VDC_exp 80 V VGRID_exp 60sin(ωt) ω 120π rad/s RL 60 Ω (44) L0.1kW 23.1465 mH (45) H-Bridge Lab-Volt 8837-A0 Programmable Agilent 6834B Power Source DSP TMF320F28335

B. Experimental Test For Rp = 1.01 Ω and a ripple voltage less than 15% of VDC, the capacitance is C = 300 µF. Figure 10a illustrates the three-level voltage output of the full-bridge converter (designed based on values from Table I). The converter is controlled using the discontinuous modulation technique that is described in [34]. The switching frequency is 1.8 kHz, For a current harmonic distortion is 5% as shown in Fig. 9b.

a) VGRID, IL and VPWM at steady state b) IL THD Fig. 10. Steady-state measurements.

Figure 10a shows the relation between the voltage VPWM, input voltage VGRID and input current IL. We can also see the effect of the voltage ripple, produced by the converter, on VPWM. We also see that VGRID and IL are in phase (PF = 1). Figure 10 illustrates the control response to two step changes in the load: 80 Ω to 50 Ω and back to 80 Ω. During a load rise, the power transferred to the output increases with increasing IL. These actions maintain VDC at its nominal level, while VGRID and IL remain in phase as shown in Fig. 11a) and b).

17

a) Load variations of 80 Ω to 48 Ω to 80 Ω b) Zoomed-in load step change Fig. 11. Load step changes.

From Fig. 11, we see that the system response time to the step up change is approximately 100 ms and that VGRID and IL remain in phase. The maximum VDC error with respect to VDC_ref is 18%. Figure 12 shows the rectifier response to a voltage sag of 30% (from VGRID to 0.7 VGRID) lasting 0.7 s.

a) 30% voltage sag for 0.7 s b) Zoomed-in VGRID step change initial front Fig. 12. VGRID step changes.

The control response to the voltage sag increases IL. This maintains Pin ≈ Pout as well as VDC = 80 and PF = 1, it is noteworthy that the proposed control in [15], not shown DC output regulation for voltage sags in AC. As the final case, Fig. 13 presents the effect on the voltage VDC_ref from a change in the reference. As can be observed, the recovery time is approximately 90 ms. This is 10 ms greater than the time obtained in the simulations. This difference is explained by considering the differences between the IGBT parameters in the simulation and those of the physical prototype.

a) VDC_ref changes (70 V to 90 V to 80 V) b) Zoom VDC_ref step changes Fig. 13. VDC_ref step changes.

18

The 4% voltage overshoot in the transient response, which is not present in simulations, is caused by the stray impedances’ values present in the experimental prototype, which are not taken into account in the simulation. Worth noting that in all studies cases analyzed on simulation and experiment, the input current always maintains a sinusoidal waveform, for several operation scenarios, this due to the proposed control law that is analyzed in Figure 3, unlike to [18][15] where the current is distorted, at different operation scenarios.

VI. DISCUSSION A. Analysis of Experimental and Simulation Results In Section V, the relation (43) equates the base impedance of the simulated circuit to that of the physical approach. From this perspective, it is possible to match the dynamic responses of both circuits. Fig. 15 illustrates the quantitative differences between circuits for the same study case. 400

VGRID (V) IL (Amp) VDC ref VDC (V)

Δvs Δts

300

Δve

200 100 0

Δte

-100 -200

0.45

0.5

0.55

0.6

0.65

0.7

0.75

0.8

a) Simulation load step (28 Ω to 16 Ω) b) Experiment load step (80 Ω to 48 Ω) Fig. 15. VDC and IL dynamics for load step changes on simulation and prototype equivalent circuits.

As can be observed in the figure, the simulated and experimental results show similar dynamics. The time responses of both circuits are approximately 100ms (Δts = Δte) and have voltage overshoots of 18% (Δvs = Δve), this is assumed due to the relation between the base impedance and the inductive reactance of the theoretical and practical circuits is equivalent for 10kW and 0.1kW, as was previously established in equations 43 to 45. The similarity between the waveforms illustrates the effectiveness of the proposed analysis. B. RL Effect The linearization of the rectifier model and the tuning of the PI compensator are obtained by considering the maximum load value of the rectifier (RL). Under these conditions, it is expected that the dynamic range of response varies if the values of the load changes.

19

Magnitude

500

400

300

200 0

Magnitude

VDC ref VDC RL VDC 2RL VDC 5RL VDC 10RL

0.05

0.1

0.15

0.2

0.25

0.3

0.35

0.4

0.5

PF RL PF 2RL PF 5RL PF 10RL

1 0.95 0.9 0

0.45

0.05

0.1

0.15

0.2

0.25

0.3

0.35

0.4

0.45

0.5

Time (s)

Fig. 16. Closed-loop operation for different RL activations.

Figure 16 shows the variation in VDC and PF for five different values from Load = RL to Load = 10 RL. It can be noted that the largest deviation corresponds to the case of one tenth of the nominal power (at 10RL), showing an underdamped response with an overshoot voltage of 11% and a power factor deviation of 7.5%. From a design point of view, the load is normally closely related to the physical power limit of the rectifier; therefore, the dynamic responses of the rectifier operating under the control scheme described in this paper are satisfactory for the rated load values. C.- Inductor Effect Having as main objective show the same transient responses in simulation and experiment (Fig. 15), in this paper a 23mH inductance is calculated and applied to laboratory prototype, based on PU scaling process for 10kw to 0.1kW, with Vin = 60v, shown by equations 43 to 45. Given that increasing the inductance allows a reduction in the switching frequency, it is notable that for specific applications, the value of the switching frequency and inductance may vary at the discretion of the designer. Finally the goal cases shown study demonstrates that the proposed sensorless method, is capable of operating for any different ratio of power input voltage and inductance. D.- Analysis of Applications Note that this research focuses on reducing costs through the elimination of the current sensor for converting AC/DC low power applications (1-10kw) without losing the characteristics of unity power factor and low harmonic current distortion , eg industrial speed drives, UPS systems, power supplies on CD, residential wind turbines etc, Moreover this type of control is not applicable for high power rectifiers where current monitoring is necessary for the operation of their protections.

20

VII. CONCLUSION AC-to-DC power converters are present in a large number of industry and household application. These converters are also a building block in the next-to-come Smart Grid scenarios. In this context, strategies for improving performance, while reducing, of singlephase PFC rectifiers can increase the production of high-performance PFC rectifiers with increased efficiency. The proposed control strategy presented in this work improves the overall performance of PFC rectifiers and reduces the computational-burden for the control because of its sensorless characteristic. The Proposed control strategy is also suitable for other rectifier-based applications such as voltage power sources, motor drives or low-power wind generators. Finally, the authors expect that the alternative control option and modeling of PFC rectifiers presented in this study will become useful references for researchers and developers in the field of AC-DC converters. VIII. REFERENCES [1] J.R. Rodriguez, J.W. Dixon, J.R. Espinoza, J. Pontt, P. Lezana, “PWM regenerative rectifiers: state of the art,” IEEE Trans. Ind. Electron., vol. 52, no. 1, pp. 5-22, feb. 2005. [2] A. Siebert, A. Troederson, and S. Ebner, “AC to DC power conversion now and in the future,” IEEE Trans. Ind. Appl., vol. 38, no. 4, pp. 934–940, Jul./Aug. 2002. [3] O. Carranza, E. Figueres, G. Garcera, L.G. Gonzalez, F. Gonzalez-Espin, “Peak Current Mode Control of a Boost Rectifier with Low Distortion of the Input Current for Wind Power Systems based on Permanent Magnet Synchronous Generators,” Power Electronics and Applications, 2009. EPE '09. 13th European Conference on , vol., no., pp.1,10, 8-10 Sept. 2009. [4] Caramia, P.; Carpinelli, G.; Pezza, F.; Verde, P., "Power quality degradation effects on PWM voltage source inverter with diode bridge rectifier," Harmonics and Quality of Power, 2000. Proceedings Ninth International Conference on, vol.2, no., pp.570, 576 vol.2, 2000. [5] J. J. Mesas, L. Sainz, J. Molina, “Parameter Estimation Procedure for Models of Single-Phase Uncontrolled Rectifiers,” IEEE Trans. Power Del. vol. 26, no. 3, pp. 1911-1919, July 2011 [6] S. Buso, G. Spiazzi, “A line-frequency-commutated rectifier complying with IEC 1000-3-2 standard, ” IEEE Trans. Ind. Electron vol. 47, no. 3, pp. 501-510, Jun 2000. [7] J. Sebastian, A. Fernandez, P.J. Villegas, M.M. Hernando, M.J. Prieto, “New active input current shapers to allow AC-to-DC converters with asymmetrically driven transformers to comply with the IEC-1000-32,” IEEE Trans. Power Electron., vol. 17, no. 4, pp. 493-501, Jul 2002 [8] B. Singh, B.N. Singh, A. Chandra, K. Al-Haddad, A. Pandey, D.P. Kothari, “A review of single-phase power quality AC-DC converters,” IEEE Trans. Ind. Electron, vol. 50, no. 5, pp. 962-981, Oct. 2003 [9] J.W. Kolar, T. Friedli, “The Essence of Three-Phase PFC Rectifier Systems—Part I,” IEEE Trans. Power Electron., vol. 28, no.1, pp. 176-198, Jan. 2013 [10] T. Friedli, M. Hartmann, J.W. Kolar, “The Essence of Three-Phase PFC Rectifier Systems—Part II,” IEEE Trans. Ind. Electron vol. 29, no. 2, pp. 543-560, Feb. 2014 [11] M. Khazraei, H. Sepahvand, M. Ferdowsi, K.A., “Hysteresis-Based Control of a Single-Phase Multilevel Flying Capacitor Rectifier,” IEEE Trans. Power Electron., vol. 28, no. 1, pp.154-164, Jan. 2013 [12] P. Chaudhary, P. Sensarma, “Front-End Buck Rectifier With Reduced Filter Size and Single-Loop Control,” IEEE Trans. Power Electron., vol. 60, no. 10, pp. 4359-4368, Oct. 2013 [13] Yi-Hung Liao, “A Novel Reduced Switching Loss Bidirectional AC/DC Converter PWM Strategy With Feedforward Control for Grid-Tied Microgrid Systems,” IEEE Trans. Power Electron.,vol. 29, no. 3, pp. 1500-1513, March 2014

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