People usually hear about FITs in the context of HARD errors with typically acceptable values being 1-100 FIT. SOFT error rates, typically 10s of kFIT can cause ...
computationally demanding codes. The graphics ... a new GPU memory test methodology and show results of ... findings based on testing over 500 NVIDIA Tesla GPUs. II. ..... paper, 2004. http://www.tezzaron.com/about /papers/papers.html.
Oct 11, 2009 - microbiology laboratories rely heavily on automated systems for identification and ... Mailing address: Infectious Disease Ser- vice, San Antonio ...
sign. The radiation sources inducing soft errors are alpha particles. (from wafer and package materials) and cosmic neutrons. The two types of particles require ...
Jun 20, 2009 - Jason A. Blome, Shantanu Gupta, Shuguang Feng, and Scott. Mahlke. ... G. Memik, M. H. Chowdhury, A. Mallik, and Y. I. Ismail. En- gineering ...
very cost-effective protection of register files against soft errors. 1 Introduction. Due to continuous .... 4 New Vulnerability Representation. To break this context ...
[2] Robert Bauman, Texas Instruments, TRC: Oct 25-27, 2004. [3] E. Normand, âSingle Event Upset at Ground Levelâ, in IEEE Trans. On. Nucl. Sc., vol.43, no.6, ...
of the effects of transient errors on two micro- processors: a DLX ... bit flip in sequential elements or a transient volt- ... quantifying the soft-error impact on micro-.
sors, it can support thousands of outstanding global memory operations. ... Each BlackWidow processor interfaces with 16 custom- designed memory controller ...
Oct 2, 2004 - From the *Sarcoma Service, Huntsman Cancer. Institute, University of Utah School of Medicine,. Salt Lake City, Utah; and the â Department of.
being written in memory) a sanity check is executed. In case the sanity check is passed, indicating that the processor-based system is fault-free, a checkpoint is ...
achieve very cost-effective protection of register files against soft errors. I. INTRODUCTION .... NEW VULNERABILITY REPRESENTATION. To break this context ...
the soft-error rate attributed to the data paths and combinational logic of processors is increasing.2. This article presents an experimental study of the effects of ...
I. INTRODUCTION s the dimensions and operating voltages of electronic devices are reduced to satisfy the ever-increasing demand for higher density and lower ...
Static Analysis to Mitigate Soft Errors in Register Files. Jongeun Lee and Aviral Shrivastava. Department of Computer Science and Engineering. Arizona State ...
and is heavily utilized, making it vulnerable to logic soft errors. This paper analyzes a parallel decoder using gate-level modeling and statistical fault injection, ...
Mar 1, 2018 - The laboratory is equipped with automated instruments in the. Clinical Chemistry section, such as Mindray - BS. 120 Auto Chemistry Analyzer, ...
Jan 26, 2011 - automated testing and manual testing for susceptibility to doripenem were very inaccurate, with VME rates ranging ... Mailing address: LTC, MC, USA, Infec- tious Disease Service, Brooke Army Medical Center, 3551 Roger.
for example, benzodiazepines and anaesthetics (Block et al., 1988;. Curran and Birch, 1991; ...... Broks P, Preston G C, Traub M, Poppleton P, Ward C, Stahl S M.
Aug 19, 2014 - the testing of probabilistic forecasting models for ontological errors: the ..... will call {Fm(x), Ïm} the experts' distribution to recognize this ..... Earthquake Center (SCEC) under National Science Foundation Cooperative.
Calculate pstar, the probability that the. # probability of a Type II error will not. # exceed p. local eqn, ustar, u, uL, pstar: global beta_cdf, beta_erfc, U1, u0, CL:.
Email: [email protected]. Internet: www.erim.eur.nl. Bibliographic data and classifications of all ... We develop a nonparametric test of productive efficiency that accounts for the possibility of ...... MKT Decision Making in Marketing Management.
only detected after execution is complete, and very hard to .... ti. Checkpoint interval. Can be adjusted to minimize overhead. k. Number of .... reset detected ..... 73â84. [11] C. Engelmann and S. Böhm, âRedundant execution of hpc applications
to 0.3 V. We reveal that the soft error rate (SER) at 0.3 V is eight times higher than SER at 1.0 V, and the ratio of MCUs to the total upsets increases as the supply ...
Our current work tries to characterize the soft error susceptibility for different ... Soft error rate (SER) testing of devices has been performed for both neutron and ...
TESTING NEUTRON-INDUCED SOFT ERRORS IN SEMICONDUCTOR MEMORIES Participants:
N. Vijaykrishnan, Prof. of Computer Science and Eng. Dept. M. J. Irwin, Prof. of Computer Science and Eng. Dept. K. Ünlü, Prof. of Mechanical and Nuclear Eng. Dept. V. Degalahal, Ph.D. student at Computer Science and Eng. Dept. S. M. Çetiner, Ph.D. student at Mechanical and Nuclear Eng. Dept.
Services Provided:
Neutron Beam Laboratory -Penn State Breazeale Nuclear Reactor
Sponsor:
Department of Energy, INIE Mini Grant, NSF
INTRODUCTION Soft errors are transient circuit errors caused due to excess charge carriers induced primarily by external radiations. Radiation directly or indirectly induces localized ionization that can flip the internal values of the memory cells. Our current work tries to characterize the soft error susceptibility for different memory chips working at different technology node and operating voltage. BACKGROUND AND RELATED WORK Advances in VLSI technology have ensured the availability of high performance electronics for a variety of applications. The applications include consumer electronics like cellular phones and HDTVs; automotive electronics like those used in drive-by-wire vehicles, and million dollar servers used for storing and processing sensitive and critical data. These varied applications require not only higher throughput but also dependability. Even if a microprocessor is shipped without any design errors or manufacturing defects, unstable environmental conditions can generate temporary hardware failures. These failures, called transient faults, cause the processor to malfunction during operation time. The major sources of transient faults are electromagnetic interference, power jitter, alpha particles, and cosmic rays. Studies in [1, 2] have shown that a vast majority of detected errors originate from transient faults. Even a single-bit error may eventually lead to a computation failure. Therefore, managing the soft errors is a critical problem to solve in fully realizing dependable computing.
Figure 1. Test chip as seen from the narrow opening in the polyethylene/lead shield.
Soft error rate (SER) testing of devices has been performed for both neutron and alpha particles. Beam 30L of Weapon Neutron Research at the Los Alamos National Laboratory is a JEDEC prescribed test beam for soft errors, and is the only one of its kind. This beam is highly stable and it closely replicates the energy spectrum of terrestrial neutrons in the 2-800 MeV range while providing a very high neutron flux. The SER testing reported in literature recently were performed at this facility [4, 5]. However, the beam availability
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3 1. Neutron Beam Port 2. Test Board 3. Polyethylene/lead shield with opening
Figure 2. (Left) Simplified layout of the test board, beam tube and the reactor. (Right) Test chip placed in front of the beam tube with the polyethylene/lead shield.
is limited. Alternatively in the past, experiments were carried out with alpha particles originating from Th foil on 0.25 µm-generation SRAMs [7]. Elimination of borophosphosilicate glass (BPSG) and 10B from the process flow in the 180-nm generation has made the low-energy (
