5-GHz Oscillator Array With Reduced Flicker Up ... - IEEE Xplore

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Forcing several LC oscillators to run in phase is a valuable means of achieving the wanted phase noise with practical values of inductances and capacitances.
IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 41, NO. 11, NOVEMBER 2006

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5-GHz Oscillator Array With Reduced Flicker Up-Conversion in 0.13-m CMOS Luca Romanò, Andrea Bonfanti, Salvatore Levantino, Member, IEEE, Carlo Samori, Member, IEEE, and Andrea L. Lacaita, Senior Member, IEEE

Abstract—Voltage supply scaling in CMOS processes requires lower inductance and higher capacitance in conventional LC oscillators. Forcing several LC oscillators to run in phase is a valuable means of achieving the wanted phase noise with practical values of inductances and capacitances. However, in-phase oscillator arrays suffer from the up-conversion of transistors’ flicker noise, in the presence of oscillator mismatches. A multitank oscillator topology is proposed, which has superior tolerance to mismatches and removes this mechanism of noise degradation. In order to assess such topology, an 802.11 a-compliant VCO with four coupled oscillators has been designed in a 0.13- m CMOS technology. A phase noise better than 120 dBc/Hz at 1-MHz offset has been achieved along the 4.7–5.9-GHz tuning range. Index Terms—Coupled oscillator, IEEE 802.11a, in-phase oscillators, multiphase oscillators, multiresonator, multitank, oscillator, phase noise, quadrature oscillators, voltage-controlled oscillators (VCOs), wireless LAN, Wi-Fi.

I. INTRODUCTION N RECENT years, cost and device-size reduction have driven research efforts towards the complete integration of CMOS radio frequency (RF) transceivers. Having less external devices simplifies the application board, cuts the bill of material, and eliminates power-hungry buffers. Moreover, CMOS technology scaling enables transceivers at higher and higher frequency bands at costs considerably lower than compound semiconductors. CMOS technologies nowadays provide deexceeding 100 GHz [1]. However, such an vices with increase in the operating frequency is compromised against the voltage supply reduction, and it is not associated with a corresponding decrease of device noise. Both white and flicker noise are higher at lower channel lengths, thus decreasing even more the achievable signal-to-noise ratios (SNRs). Among other blocks, voltage-controlled oscillators (VCOs) suffer more from voltage supply reduction. A tradeoff between phase noise and power consumption has been widely demonstrated. Hence, the voltage supply shrinkage has to be compensated by higher bias current and, consequently, by lower resonator impedance and lower inductance. In many applications,

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Manuscript received September 27, 2005; revised July 15, 2006. This work was supported by the Italian Ministry of University (MIUR) in the frame of the Italian National Project FIRB under Contract RBNE01F582. L. Romanò was with the Dipartimento di Elettronica e Informazione, Politecnico di Milano, Milan I-20133, Italy. He is now with Ericsson Lab Italy, Vimodrone (MI) I-20090, Italy (e-mail: [email protected]). A. Bonfanti, S. Levantino, and C. Samori are with the Dipartimento di Elettronica e Informazione, Politecnico di Milano, Milan I-20133, Italy (e-mail: [email protected]). A. L. Lacaita is with the Dipartimento di Elettronica e Informazione, Politecnico di Milano, Milan I-20133, Italy, and also with the IFN-CNR Sez. Milano, Milan I-20133, Italy (e-mail: [email protected]). Digital Object Identifier 10.1109/JSSC.2006.883315

exploiting the oscillator noise–power tradeoff may become impractical, because the required inductance is too small. This feasibility issue may represent an even bigger impairment operating at higher frequency. In an -ary QAM modulation, the tolerable phase noise of the local oscillator depends only on . Therefore, assuming to maintain the same spectral efficiency, the same phase noise has to be guaranteed at higher frequencies which needs again more power dissipation and lower inductance. An unconventional solution for phase noise reduction is couLC-tank oscillators, which are forced to run in phase. pling As demonstrated in [2], the phase noise is decreased by a factor . Even if the noise–power tradeoff is not better than in a of single oscillator, the inductance does not have to be scaled down to uncontrollable low values. The total bias current is increased by coupling more oscillators without varying the bias current per stage and the impedance of each single resonator. The proposed concept is proven by comparing the phase noise of a multitank oscillator and that of a stand-alone LC oscillator, both integrated in a 0.13- m CMOS technology and having a 5–6-GHz tuning range. This paper is organized as follows. Section II describes the limitations of the noise–power tradeoff in low-voltage oscillators, and Section III discusses the main difference between quadrature oscillators and in-phase coupled oscillators. Section IV describes the flicker noise up-conversion mechanism arising in oscillator arrays and introduces the novel multitank topology, which is less susceptible to this phenomenon. Section V provides the phase-noise analysis of the proposed circuit, discussing the noise correlation and the coupling bandwidth. The design of the test circuits is described in Section VI, and the experimental results are presented in Section VII. Finally, Section VIII draws the conclusions. II. OSCILLATORS PERFORMANCE AND TECHNOLOGY SCALING The single-sideband phase noise of a generic LC oscillator at an offset from the carrier can be expressed as (1) where angular frequency of oscillation; is the tank quality factor; parallel resistance modeling the tank losses; oscillation amplitude; noise factor accounting for the active device noise.

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Since phase noise can be traded against power consumption, it is customary to rate oscillators in terms of the following figure of merit (FoM) [3]: (2) where is the power dissipation in milliwatts. The best performance is achieved by operating the oscillator at the border between the current- and the voltage-limited regimes. In this particular condition, the oscillation amplitude is proportional to both the product and the power supply

(3) Combining the second part of (1) and (2) and all of (3), we obtain the main parameters affecting the FoM (4) The FoM can improve by increasing the tank quality factor or reducing the noise contribution of the active element. Therefore, after and have been optimized by careful design, only consuming more power can be effective to reduce phase noise. in (1), In fact, as is evident from the first expression of 3-dB lower phase noise can be theoretically achieved by doubling the tank’s capacitance and halving the inductance (at constant , , and ). Doing so, the tank parallel resistance is reduced by a factor of two. The bias current has to be doubled, in order to get the same amplitude . On this theoretical basis, any noise performance could be achieved if enough power is dissipated. In practice, feasibility issues impose a practical limit to this noise–power tradeoff. These issues are mainly related to the robustness of the LC tank and of against parasitic resistances. The quality factors the tank’s capacitance and inductance are: and , respectively, where and are the series resistances of and . As these -factors are at first-order independent of the value of the reactive components, both the reduction of and the increase of lead to smaller series resistances. The interconnection and via resistances which may be inaccurately modeled become dominant. In fact, the routing cannot be short since the capacitance is large, and it cannot be large since it would add more parasitics and the tuning range would be degraded. In addition to that, the routing may add parasitic inductance to the tank, which makes it very difficult to control the tank inductance . It is interesting to analyze how the size of the inductance of oscillators will be affected by the technology scaling and by the increase in operating frequencies. Using the second expression of phase noise in (1) and expressing the parallel resistance as , we obtain

(5)

Such an expression highlights that the technology trend towards the reduction of the voltage supply calls for smaller value of inductance. From the 0.25- m to 0.13- m CMOS processes, the voltage supply is approximately halved; thus, the required inductance for given performance has to be reduced by a factor of four and the capacitance increased by the same factor. Moreover, as frequency increases, the phase noise requirement may become more demanding. In practice, the oscillator must remain constant. According to integral noise and (5), that also reduces inductance value. As an example, let us consider an LC oscillator for the 24-GHz ISM band with a noise dBc/Hz at 1 MHz. In 0.13- m CMOS requirement of , the required inductance and cawith a tank quality factor pacitance would be 10 pH and 4.4 pF, respectively. The physical realization of such an LC resonator would be extremely critical for the above-described reasons. The general trend expressed by (5) indicates that the value of is expected to decrease and to become almost unfeasible. inductors in parallel In theory, designing an oscillator with could solve this problem. Each inductor can be made into a smaller possible that still ensures a good control of its value and losses. This is, clearly, an academic solution because connecting inductors to a single transconductor add significant stray capacitances and losses. What seems instead more practical is distributing not only the resonator but also the active element and its bias current. The effectiveness of using more parallel signal paths has been discussed in general terms in [4]. In this specific case, a possible solution is coupling more oscillators running in phase. III. QUADRATURE VERSUS IN-PHASE OSCILLATOR COUPLING The oscillator-coupling technique for phase-noise reduction is recognized in the field of microwave circuits. In [2], several microwave oscillators are coupled by transmission lines; in [5], a low-noise quartz oscillator is designed by series-connecting several identical crystal resonators; in [6], two coupled inductors force two oscillators to run with same phase. In the field of silicon integrated circuits, oscillator coupling is instead used only for the generation of quadrature signals. As shown in Fig. 1(a), two LC oscillators are forced to run in quadrature, typically by means of two coupling transconductors [7]. The currents injected into the resonators are proportional to the sum and the difference of the oscillating voltages and , if ]. [ and are identical for symmetry, Since the amplitudes of is in quadrature with . A phasor diagram is the voltage shown in Fig. 1(a), which illustrates this concept [7]. This same concept has been extended to coupled oscillators generating output phases, with the purpose of lowering the phase noise in [8]. As demonstrated by several publications (see, for instance, [9]), quadrature oscillators do not achieve the expected attenuation of the phase noise by a factor of . The idea of in-phase coupling is illustrated in Fig. 1(b) [10]. Two oscillators are again coupled by means of two transconductors, but the currents injected by the two coupling transconductors are both proportional to the sum of the two oscillating . Thus, using again the arvoltages: gument based on symmetry, the oscillating voltages have to be

ROMANÒ et al.: 5-GHz OSCILLATOR ARRAY WITH REDUCED FLICKER UP-CONVERSION IN 0.13- m CMOS

Fig. 1. Coupled oscillator differing for the sign of the coupling transconductance

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: (a) quadrature coupled oscillator and (b) in-phase coupled oscillator.

identical: . Differently from quadrature oscillators, in-phase oscillators oscillate at the resonant frequency of their tanks. This eliminates the up-conversion of low-frequency noise typical of quadrature oscillators. However, in the practical implementation of in-phase oscillator arrays, a new mechanism of up-conversion of low-frequency noise takes place in the presence of mismatches or resonators. This phenomenon, which coupling among the may be not that severe in bipolar processes, can represent a serious limitation in scaled CMOS technologies where flicker noise is typically higher. A new topology of a multitank oscillator is presented in this paper, which eliminates this up-conversion mechanism and maintains all of the advantages of in-phase coupled oscillators. IV. OSCILLATOR ARRAYS A. Transconductor-Coupled Oscillators integrated oscillators is The simplest way to couple using active transconductors , as sketched in Fig. 2(a). injects a current proportional to the The transconductor th LC tank. Stable voltage across the th tank into the oscillation occurs when the phase delay along the loop is an integer multiple of . Calling the phase shift between two , with consecutive voltage outputs, it must be . It follows that the phase delay of each possible values: . Even if block has oscillation modes are theoretically possible, simulations show that only the mode with all of the oscillators running in phase, , prevails at the steady state independently of the i.e., initial conditions. In fact, the mode with oscillators in phase

N

Fig. 2. (a) Block schematic of in-phase coupled oscillators. (b) Current phasors with matched tanks. (c) Current phasors in the presence of mismatches among the tanks.

N

is the most favorable from an energetic standpoint. The whole current from adds in phase to the current from and contributes entirely to compensate for losses. In this oscillation mode, the Barkhausen condition requires that the oscillation and that . frequency is A subtle problem of this circuit is the up-conversion of flicker noise taking place when the resonance frequencies of the tanks are mismatched. Fig. 2(b) and (c) shows the phasors of the current injected in the th tank, when the tanks are identical and

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Fig. 3. Block schematic of the proposed multitank oscillator.

when they are mismatched, respectively. In the first case, all of the currents from the transconductors are in phase. In the second case, since the tank resonance frequencies are different and the oscillation frequency is unique, a phase shift must arise between the current injected into the th tank and the voltage across it. As a consequence, the shift between two consecutive outputs must be still zero. is different from zero, but the sum of all The angle between and the total current injected into the th tank is the phase of the impedance of the th tank and it is related to the oscillation frequency by the phase-frequency characteristic of the tank impedance itself. If low-frequency noise modulates one of the two transconductor currents or ), the angle and then the oscillation fre( quency of the th tank fluctuate. However, since the oscillation frequency must be unique for all the tanks, the loop compensates for the variation of by changing all of the angles and by modulating slowly the oscillation frequency. If the original source, it is up-converted in phase noise. noise is a In quadrature and, in general, in multiphase coupled osciland must be out of phase. lators, the currents from Hence, this up-conversion effect appears even in the absence of resonator mismatches [9].

B. Multitank Topology Fig. 2(b) and (c) shows that no up-conversion would occur, if the current fluctuations did not alter the impedance angle . This consideration suggests the multitank topology in Fig. 3, in which only one current is injected into the tank. In this case, both compensates for losses and acts as the transconductor coupling element. This topology resembles that of a ring oscillator, but with the fundamental difference that all of the outputs oscillation oscillate in phase. In the case of ideal matching, modes exist, as for the circuit in Fig. 2(a), but only the mode featuring zero-phase-shift survives. For the sake of completeness, we briefly show the analytical derivation of the oscillation condition. Linearizing the transconductor, the open-loop gain of the system in Fig. 3 can be written as (6)

Fig. 4. Simplified circuit schematic of the four-stage oscillator: (a) proposed multitank circuit with cell and (b) conventional transconductor-coupled oscillator with cell.

is the tank resonant frequency and is the tank quality factor. The Barkhausen criterion im, poses the open-loop gain to be equal to unity: and . Thus, all of the which happens for outputs run in phase at the tank resonance frequency and balances the resonators’ losses. In practice, the gain is made greater than one, so that the oscillation starts up. Then, the transconductors’ nonlinearities lead to stable oscillation amplitude. The model described thus far is still valid when these must be replaced by nonlinearities are taken into account. the effective transconductance, defined as the ratio between the fundamental harmonic of its output current and the fundamental harmonic of its input voltage. It is evident that this circuit does not show the up-conversion mechanism discussed in the previous section. In the presence of mismatches, even if the phase between two consecutive outis different from zero, any fluctuation of only affects puts amplitude and not the voltage of the other outputs [11]. Of course, other AM-to-FM conversion mechanisms such as the presence of nonlinear capacitances can still convert amplitude noise into phase noise. However, these other effects can be found in any LC oscillator [12]. The superior immunity to resonator mismatches has been verified by simulating the circuit in Fig. 4 in SpectreRF. This ciroscillators has been cuit that implements an array of first simulated using the stage in Fig. 4(a). This corresponds to the proposed multitank oscillator. Then, the cell in Fig. 4(b) has been substituted into the four-stage array, realizing the classical transconductor coupling topology. In both cases, the differential oscillation amplitude is about 2.5 V (zero-peak). Each resonator has inductance nH, capacitance pF (thus, the resonance Grad/s) and quality factor angular frequency is . No varactor has been used, in order to eliminate other mechanisms of flicker noise up-conversion. Introducing a 5% mismatch among the resonant frequencies of the four tanks, the phase noise of the classical transconductor-coupled topology where

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k

Fig. 6. Thermal noise injected into the th tank of the multitank oscillator and resulting voltage noise at the outputs.

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the lossy tank, featuring a bandpass shape around . Calling the bandwidth of the RLC tank, this impedance can be approximated as (8) at small offsets from the resonance frequency The open-loop gain can be written as

.

(9) Fig. 5. SpectreRF phase-noise simulations of the four-stage oscillator. (a) Multitank circuit in the presence of 5% mismatch among tank resonant frequencies (solid line) and the conventional transconductor-coupled oscillator in the presence of mismatch (dashed line). (b) Phase noise of a single output voltage in the multitank oscillator (solid line) of the sum of the four output voltages (dash-dotted line) and of the single-stage oscillator (dashed line).

[dashed line in Fig. 5(a)] departs from that of the proposed multitank oscillator (solid line). The multitank circuit exhibits a flicker-induced phase noise, which is about 12 dB lower than that for the conventional transconductor-coupled topology. The proposed multitank topology can also be used to generate multiphase outputs, if a signal inversion is added within the loop. It is a simple crossed connection if differential circuits are ) produce quadraused. An even number of stages (with ture signals. Even in this case, the proposed topology is superior to the conventional quadrature one, since it does not show the up-conversion mechanism typical of the topology in Fig. 1(a). V. PHASE-NOISE ANALYSIS A. Thermal Noise The thermal noise associated to th resonator can be modeled as a noise current generator with power spectral density (PSD) , as shown in Fig. 6. The PSD of the voltage noise superimposed to the th output is given by times the squared magnitude of the impedance at the th node: (7) In order to calculate at the impedance

, we first derive the open-loop th node. It is the impedance of

Therefore, the closed-loop impedance node is

at the th

(10) We can simplify the previous expression for two limit cases. , we have For large offsets (11) which is identical to the impedance of a lossless tank, as in the case of a standard LC oscillator. For small offsets , (10) can be approximated as

(12) for . Equation (12) states that the where impedance at the th node is times lower than the impedance of a single-tank oscillator for small frequency offsets. In practice, coupling reduces the impedance only within the LC tanks’ bandwidth . Current noise injected into the th tank affects not only the voltage at th node, but also the voltages at the other nodes [see Fig. 6]. The transimpedance from the current th node is injected in the th node to the voltage at the given by (13)

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For small offsets , it holds that meaning that the transimpedance does not depend on . Hence, the total voltage noise at the th node due to the uncorrelated current noise sources at the nodes is . For large offsets , it holds that , where . In practice, the noise injected at one node does not affect the other nodes, because bandpass filters separate the th and th nodes. Thus, the voltage noise at the th output is the . Using (7) and (11), the total output voltage noise can be written as Fig. 7. Circuit schematic of the integrated four-stage multitank oscillator.

if if (14) Thus, coupling reduces noise by a factor of only for frequency offsets smaller than . Outside , the circuit behaves as a single-tank oscillator. Therefore, the bandwidth can be seen as a coupling bandwidth. B. Noise Correlation From the above discussion, it turns out that the noise at a given output is fully correlated to the noise at any other output for , while it is uncorrelated for . One could think to sum the output voltages of the multitank , the voltage oscillator. The carrier power would increase by , while the out-of-band noise within would increases by noise would increase only by . Since half of the voltage noise power affects its amplitude and the other half affects its phase, the phase noise is given by the ratio of half the voltage noise and the carrier power. Combining the previous considerations and (14), we get the phase noise of outputs the sum of the

if

(15) The result is that the phase noise of the sum of the outputs is reduced by a factor of at any offset frequency.1 In practice, the quality factor is of the order of tens. Thereis often so large fore, the coupling bandwidth that the phase noise outside is not of interest. In such a case, the voltage summation can be avoided and only one oscillator output can be taken for further use. The proposed phase-noise analysis of the multitank oscillator has been verified in SpectreRF. The simulated circuit depicted in Fig. 4(a) has the same parameter as that discussed in the previous section. The chosen high-quality factor of 20 limits the coupling bandwidth to 250 Mrad/s, thus allowing to highlight we substitute S

= 4 kT=R and N = 1, (15) reduces to (1).

C. Noise–Power Tradeoff With respect to a single LC oscillator with the same tank and transconductor, the noise–power product of the proposed muland the titank oscillator is unchanged. The noise scales as power scales as . Differently from conventional LC oscillators, the multitank topology allows using practical values of passive components even at low voltages. The phase noise is improved by coupling resonators instead of shrinking the inductor and enlarging the capacitor of a single resonator by . VI. CIRCUIT DESIGN

if

1If

the noise correlation phenomena. The resulting phase noise, in ) reFig. 5(b) (solid line), exhibits the expected 6-dB (i.e., duction with respect to a single-tank oscillator (dashed line). As expected, for offsets larger than , the phase noise of the oscillator array tends to that of the single oscillator. Out of the coupling bandwidth, the oscillators are no more coupled. Phase not only in the region, but also noise is attenuated by region of the phase spectrum, where the upconverin the sion of low-frequency noise dominates. The noise attenuation of the up-converted noise can be rigorously demonstrated by using a phase-domain model of the multitank oscillator, as shown in the Appendix. As demonstrated in this section, the phase noise of the sum of the four outputs [dash-dotted curve in Fig. 5(b)] is attenuated at any offset frequency. by

In order to prove the proposed concept, a four-stage oscillator has been designed in STM CMOS 0.13- m process, together with a stand-alone companion. The simplified circuit schematic of the oscillator array is depicted in Fig. 7. Each stage has an LC tank resonating at around 5.5 GHz (with differential inductransconductor (with tance of 370 pH) and a differential nMOS aspect ratio of 100/0.28). No bias current generator has been employed because of the small available voltage headV . A tail inductor of 1.6 nH resonates at room 11 GHz with the parasitic capacitance in order to synthesize a high impedance at the tail of the differential pair [13]. This tail resonator helps in increasing the oscillation amplitude and provides degeneration to the transistor pair, which reduces their noise injection into the resonator. Both facts contribute to reducing the oscillator phase noise [14]. Frequency tuning is achieved by using a thick-oxide accumulation-mode pMOS varactor. The tuning voltage can be varied

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Fig. 9. Chip microphotograph.

Fig. 8. SpectreRF phase noise simulations of the four-stage oscillator in Fig. 7. (a) Multitank oscillator at the two edges of the tuning range (solid lines) and a single-stage oscillator (dashed lines). (b) Multitank circuit in the presence of 5% mismatch among tank resonant frequencies (solid line) and the conventional transconductor-coupled oscillator in the presence of mismatch (dashed line).

from ground to 2.5 V and the oscillation frequency spans between 4.6–6.0 GHz (or 26.4% of the center frequency). Such a wide tuning range obtained with only one varactor makes the oscillator prone to AM–FM effects, which causes noise up-conversion. The use of switched metal–metal capacitors would solve this issue. The solid lines in Fig. 8(a) show the simulated phase noise of the multitank oscillator at the two margins of the tuning range (4.57 and 5.98 GHz). Those curves are compared to those of the stand-alone oscillator (dashed lines). At both frequencies, and rethe 6-dB phase-noise abatement is evident in gions. Phase noise has been also simulated in the presence of resonator mismatches. The resonance frequency of one of the four tanks has been offset by 5%. The resulting phase noise is shown in Fig. 8(b) for the multitank (solid line) and for the noise transconductor coupled topology (dashed line). The is 5 dB higher, if the transconductor coupling is employed instead of the multitank topology. Such degradation is lower than that obtained in the previous section, where no varactor was used, but still significant. VII. EXPERIMENTAL RESULTS The four-stage multitank oscillator has been designed and fabricated in STM 0.13- m CMOS technology. The four-stage oscillator core occupies 0.4 mm . The microphotograph of the fabricated chip is shown in Fig. 9. Since the resonators run in

Fig. 10. Experimental setup of low-frequency tone insertion.

phase, multitank oscillators suffer from reciprocal magnetic or electric coupling much less than quadrature oscillators do [15]. Therefore, no particular care has been taken in shielding the oscillator inductors and avoiding the overlap between metal wires. The presence of the tail inductors has required more separation among the tank inductors. The single-stage oscillator, designed with same circuit topology and LC tank, is integrated in the same technology, but in a different chip (not shown in the photograph). In order to prove the beneficial effect of the multitank oscilMHz, i.e., within the lator, a sinusoidal voltage tone at coupling bandwidth, has been injected into the tail node of one of the oscillator arrays. The experimental setup is diagrammed in Fig. 10. The same measurement has been repeated for the single-stage oscillator. The resulting output spectra are shown up-converts into two PM sidebands in Fig. 11. The tone at . The PM sidebands in the four-tank oscillator are at 13 dB lower than that for the stand-alone oscillator, which is

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TABLE I SUMMARY OF THE PERFORMANCE OF STATE-OF-THE-ART 5-GHZ VCOS IN STANDARD CMOS PROCESSES

Fig. 11. Resulting spectra after insertion of low-frequency voltage tone into the tail node of (a) the stand-alone oscillator and (b) one of the four stages of the multitank oscillator. Fig. 12. Measured phase noise of the multitank oscillator, compared with that of the stand-alone oscillator at both edges of the tuning range.

close to the theoretical -dB factor. Moreover, identical PM sidebands are observed at the four outputs, further confirming the analytical framework introduced in Section IV. The phase-noise measurements shown in Fig. 12 show the expected 6-dB noise reduction due to coupling, along the whole tuning range. Such result confirms the robustness of the proposed topology against mismatches and parasitic EM coupling. The discrepancy in the noise absolute values between simulations and measurements is likely due to incorrect modeling of the nMOS flicker. Lower flicker-induced noise can be achieved by employing pMOS in place of nMOS transistors [16] and a set of switched metal–metal capacitors.

Regarding the four-stage oscillator, the worst case phase noise at 1 MHz ranges between 123 and 120 dBc/Hz along the 26% tuning range (between 4.7–5.9 GHz). The close-in phase noise at 10 kHz ranges between 68 and 58 dBc/Hz. Both tuning range and noise performance make this oscillator suitable for wireless LAN 802.11a transceivers. The total power consumption is about 24 mW for the four-stage oscillator, while the single stage dissipates about 6 mW. Therefore, the FoM defined in (2) ranges between approximately 183 dB at the lower edge of the tuning range and

ROMANÒ et al.: 5-GHz OSCILLATOR ARRAY WITH REDUCED FLICKER UP-CONVERSION IN 0.13- m CMOS

180 dB at the upper edge. Table I compares the performances of this oscillator against the best published 5-GHz oscillators in standard CMOS technology. Other publications, such as [16] or [22], show even higher FoMs, but do not use the standard supply voltage of their technology. The generation of a lower voltage supply needs an efficient low-noise regulator, whose power dissipation and noise contribution should be considered in the computation of the oscillator FoM. Moreover, oscillators with high FoM usually have narrow tuning ranges. The comparison table shows that the presented multitank achieves both wide tuning range and low phase noise, despite the low-voltage technology. A conventional single-stage topology in the same process, achieving the same phase noise, would have required less controllable values of the resonator elements. The cost of the proposed topology in terms of area occupation is negligible, since it is comparable to the other realizations.

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Fig. 13. (a) Single cell of the multitank oscillator. (b) Equivalent phase-domain model.

must be transformed into its low-pass equivalent VIII. CONCLUSION The voltage supply scaling and the increase in operating frequencies pose new challenges in the design of integrated VCOs. In particular, the inductor value may become too low. In order to circumvent this problem, we propose a novel structure of in-phase coupled oscillators, which take full advantage of the noise–power tradeoff. Such an oscillator array does not show the flicker up-conversion effect inherent in conventional topologies of coupled oscillators. These concepts have experimentally verified by comparing a 5-GHz oscillator array employing four resonators in 0.13- m CMOS technology and an analogous stand-alone LC oscillator. The multitank circuit, operating in the 5–6-GHz band and compliant with the IEEE 802.11a standard, exhibits the expected phase-noise reduction due to coupling.

response

(A1) Referring to the phase-domain model in Fig. 13(b), the phase of the single cell of the oscillator is transfer function . The ring-coupled oscillator is made of cells. Hence, the open-loop gain of the overall oscillator is (A2) The effect of the phase disturbance can be quantified by calculating the closed-loop transfer function between the perturbation (at the input of the th oscillator) and the phase at th node

APPENDIX The phase-noise performance of an oscillator can be assessed by considering the phase of the signal as a state variable [23]. It is essentially the approach adopted to study the dynamic behavior of a phase-locked loop. In the following, we are going to apply this approach to the proposed circuit. Fig. 13(a) depicts a single cell of the topology in Fig. 1. It comprises the resonator centered at , with 3-dB bandwidth and the coupling transconductor . The current generator represents the noise source injected at a frequency offset from . Fig. 13(b) shows the phase-domain equivalent model of such a cell. The phases of the voltages at the th and the th nodes are and , respectively. Assuming that the transconductor adds no delay, is also the phase of the transconductor output current . Since the output voltages of the ring-coupled oscillators are ideally in phase, the steady-state values of and are zero. The current noise injected into the tank adds a phase perturbation, with magnitude to . In order to evaluate the transfer function of the phase signal, the tank impedance

(A3) Inside and outside the loop bandwidth, (A3) can be approximated as follows:

(A4)

If we relate the phase perturbation to the noise generator and we remember that there are uncorrelated noise sources, we obtain a result, which matches the conclusions drawn in Section III-A5. However, this result is more general, since it can be applied also to sources by representing them as a slow phase perturbation . REFERENCES [1] C. H. Doan, S. Emami, A. M. Niknejad, and R. W. Brodersen, “Millimeter-wave CMOS design,” IEEE J. Solid-State Circuits, vol. 40, no. 1, pp. 144–155, Jan. 2005.

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[2] H. Chang, X. Cao, U. K. Mishra, and R. A. York, “Phase noise in coupled oscillators: Theory and experiment,” IEEE Trans. Microw. Theory Tech., vol. 45, no. 5, pp. 604–615, May 1997. [3] P. Kinget, “Integrated GHz voltage controlled oscillators,” in Analog Circuit Design: (X)DSL and Other Communication Systems; RF MOST Models; Integrated Filters and Oscillators, W. Sansen, J. Huijsing, and R. van de Plassche, Eds. Boston, MA: Kluwer, 1999, pp. 351–381. [4] A. Hajimiri, “Distributed integrated circuits: An alternative approach to high-frequency design,” IEEE Commun. Mag., vol. 40, no. 2, pp. 168–173, Feb. 2002. [5] M. M. Driscoll, “Reduction of quartz crystal oscillator flicker-of-frequency and white phase noise (floor) levels and acceleration sensitivity via use of multiple resonators,” IEEE Trans. Ultrason., Ferroelectr. Freq. Control, vol. 40, no. 4, pp. 427–429, Jul. 1993. [6] H. Jacobsson, B. Hansson, H. Berg, and S. Georgovian, “Very low phase-noise fully-integrated coupled VCOs,” in IEEE MTT-S Dig., Jun. 2002, vol. 1, pp. 577–580. [7] A. Rofougaran et al., “A single-chip 900-MHz spread spectrum wireless transceiver in 1-m CMOS—Part I: Architecture and transmitter design,” IEEE J. Solid-State Circuits, vol. 33, no. 4, pp. 515–534, Apr. 1998. [8] J. J. Kim and B. Kim, “A low-phase-noise CMOS LC oscillator with a ring structure,” in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, San Francisco, CA, Feb. 2000, pp. 430–431. [9] P. Andreani, A. Bonfanti, L. Romanò, and C. Samori, “Analysis and design of a 1.8-GHz CMOS LC quadrature VCO,” IEEE J. Solid-State Circuits, vol. 37, no. 12, pp. 1737–1747, Dec. 2002. [10] L. Romanò, V. Minerva, S. Cavalieri d’Oro, C. Samori, and M. Politi, “5-GHz in-phase coupled oscillators with 39% tuning range,” in Proc. IEEE Custom Integr. Circuits Conf., Oct. 2004, pp. 269–272. [11] L. Romanò, C. Samori, S. Levantino, A. Bonfanti, and A. L. Lacaita, “A multi-tank LC-oscillator,” in Proc. IEEE Int. Conf. Electron. Circuits Syst. (ICECS), Tel Aviv, Israel, Dec. 2004, pp. 29–32. [12] S. Levantino, C. Samori, A. Bonfanti, S. L. J. Gierkink, A. L. Lacaita, and V. Boccuzzi, “Frequency dependence on bias current in 5 GHz CMOS VCOs: Impact on tuning range and flicker noise upconversion,” IEEE J. Solid-State Circuits, vol. 37, no. 8, pp. 1003–1011, Aug. 2002. [13] E. Hegazi, H. Sjoland, and A. A. Abidi, “A filtering technique to lower LC oscillators phase noise,” IEEE J. Solid-State Circuits, vol. 36, no. 12, pp. 1921–1930, Dec. 2001. [14] S. L. J. Gierkink, S. Levantino, R. C. Frye, C. Samori, and V. Boccuzzi, “A low-phase-noise 5-GHz CMOS quadrature VCO using superharmonic coupling,” IEEE J. Solid-State Circuits, vol. 38, no. 7, pp. 1148–1154, Jul. 2003. [15] P. Andreani and X. Wang, “On the phase noise and phase-error performances of multiphase LC CMOS VCOs,” IEEE J. Solid-State Circuits, vol. 39, no. 11, pp. 1883–1893, Nov. 2004. [16] Z. Li and K. K. O, “A low-phase-noise and low-power multiband CMOS voltage-controlled oscillator,” IEEE J. Solid-State Circuits, vol. 40, no. 6, pp. 1296–1302, Jun. 2005. [17] C. Samori, S. Levantino, and V. Boccuzzi, “A 94 dBc/Hz@100 kHz, fully-integrated, 5-GHz, CMOS VCO with 18% tuning range for Bluetooth applications,” in Proc. IEEE Custom Integr. Circuits Conf., 2001, pp. 201–204. [18] J. Bhattacharjee, D. Mukherjee, E. Gebara, S. Nuttinck, and J. Laskar, “A 5.8 GHz fully integrted low power low phase noise CMOS LC VCO for WLAN applications,” in IEEE MTT-S Dig., Jun. 2002, vol. 1, pp. 585–588. [19] Y. K. Chu and H. R. Chuang, “A fully integrated 5.8 GHz U-NII Band 0.18-m CMOS,” IEEE Microw. Wireless Compon. Lett., vol. 13, no. 7, pp. 287–289, Jul. 2003. [20] A. Jerng and C. G. Sodini, “The impact of device type and sizing on phase noise mechanisms,” IEEE J. Solid-State Circuits, vol. 40, no. 2, pp. 360–369, Feb. 2005. [21] D. Linten et al., “Low-power 5 GHz LNA and VCO in 90 nm RF CMOS,” in IEEE Symp. VLSI Circuits Dig. Tech. Papers, Jun. 2004, pp. 372–375. [22] N. H.W. Fong et al., “Design of wideband CMOS VCO for multiband wireless LAN applications,” IEEE J. Solid-State Circuits, vol. 38, no. 8, pp. 1333–1342, Aug. 2003. [23] G. Sauvage, “Phase noise in oscillators: A mathematical analysis of Leeson’s model,” IEEE Trans. Instrum. Meas., vol. IM-26, no. 12, pp. 408–410, Dec. 1977.

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Luca Romanò was born in Milan, Italy, in 1976. He received the Laurea degree in electronics engineering and the Ph.D. degree in electronics and communications from the Politecnico di Milano, Milan, Italy, in 2001 and 2005, respectively. His research activity was mainly oriented towards the development of frequency synthesizers for wireless broadband communications. He is now with Ericsson Lab Italy, Vimodrone (Milan), working on MMIC design for millimeter-wave applications.

Andrea Bonfanti was born in Besana B.za (Milan), Italy, in 1972. He received the Laurea degree in electronics engineering and the Ph.D. in electronics and communications from the Politecnico di Milano, Italy, in 1999 and 2003, respectively. Currently, he is a Postdoctoral Researcher with the Politecnico di Milano. His research interests are in the field of fully integrated oscillators, RF frequency synthesizers and delta-sigma analog-to-digital converters. He is coauthor of approximately 20 papers published in journals or presented at international conferences.

Salvatore Levantino (S’98–M’02) was born in 1973. He received the degree of Ingegnere and the Ph.D. degree in electrical engineering from the Politecnico di Milano, Milan, Italy, in 1988 and 2001, respectively. During his doctoral work, he studied noise-generation mechanisms in oscillators and topologies for agile frequency synthesis. In 2001, he spent one year at Agere Systems (formerly Bell Laboratories), Murray Hill, NJ, on IF-sampling receiver architectures. During 2002–2004, he was a Post-Doctoral Researcher with the Politecnico di Milano where, since 2005, he has been an Assistant Professor, teaching a course on integrated radio systems. His research interests are now focused on integrated millimiter-wave circuits for radars and high-capacity communication systems. He is the coauthor of approximately 30 papers published in journals or presented at international conferences.

Carlo Samori (M’98) was born in 1966 in Perugia, Italy. He received the Laurea degree in electronics engineering and the Ph.D. degree in electronics and communications from the Politecnico di Milano, Milan, Italy, in 1992 and 1995, respectively. In 2002, he was appointed an Associate Professor of Electronics with the Politecnico di Milano. He was involved with solid-state photodetectors and the associated front-end electronics. His current research interests include design and analysis of integrated circuits for communications in bipolar and CMOS technologies, noise analysis in oscillators, and frequency synthesizer architectures. Since 1997, he has been a consultant to the Wireless Communication Circuit Research Department, Agere Systems, Murray Hill, NJ.

Andrea L. Lacaita (M’89–SM’94) was born in 1962. He received the Laurea degree in nuclear engineering from the Politecnico di Milano, Milan, Italy, in 1985. From 1989 to 1990, he was Visiting Scientist with AT&T Bell Laboratories, Murray Hill, NJ, where he was involved with photorefractive effects in superlattices for optical switching. In 1992, he became an Associate Professor of Electronics with the Politecnico of Milano and, since then, he has been teaching courses on electronics, electron devices,

ROMANÒ et al.: 5-GHz OSCILLATOR ARRAY WITH REDUCED FLICKER UP-CONVERSION IN 0.13- m CMOS

optoelectronics, and solid-state physics. In 1999, he was an Academic Visitor with the IBM T. J. Watson Research Center, Yorktown Heights, NY, where he contributed to the development of optical systems for IC testing. In 2000, he was appointed a Full Professor of Electronics at the Politecnico di Milano and Head of the Microelectronics Lab. As researcher, he contributed to analog IC design with studies of phase noise in integrated LC-tuned oscillators and with the development of novel architectures of frequency synthesizers in RF front-ends. He has contributed to advances in microelectronics and optoelectronics, with particular emphasis on physics of single photon avalanche detectors and characterization and modeling of semiconductor devices. Within the field of ULSI microelectronics, he has studied carrier transport and quantum effect in scaled MOS transistors and technology and reliability of nonvolatile memories. He is

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the coauthor of approximately 150 papers published in journals or presented at international conferences. He is also the author of two books on electronics. Prof. Lacaita was the recipient of the Award of the Italian Association of Electrical and Electronic Engineers (AEI) in 1993 for his research on hot carrier effects. During 1998–2000, he served as Coordinator of the Committee on micro- and nano-electron devices of the Italian National Group of Electronics Engineers. Since 2000, he has been a consultant for the European Commission in the evaluation on review of research projects in micro- and nano-electronics. Since 2001, he has been serving in the program committee of the IEEE International Electron Device Meeting (IEDM) and he is now the European Chair.