A Direct Digital Synthesizer With A Tunable Error Feedback Structure

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A Direct Digital Synthesizer with a Tunable Error Feedback Structure Jouko Vankka

Abstract—A basic premise for a direct digital synthesizer (DDS) with an error feedback (EF) is that the output frequency being generated is low with respect to the used clock frequency. This is necessary because the transfer function of the EF has zero(s) at dc. In the proposed architecture the clock frequency need only be much greater than the bandwidth of the output signal, whereas the output frequency could be any frequency up to somewhat below the Nyquist frequency. In this novel method, the coefficients of the EF filter are tuned according to the output frequency. Index Terms— Air feedback, direct digital synthesizer, frequency synthesizers, direct digital synthesis, tuning.

I. INTRODUCTION

T

HE drawback of the direct digital synthesizer (DDS) is the high level of spurious frequencies [1]. In this letter, we only concentrate on spurs, which are caused by finite wordlength representation of phase and amplitude samples. The number of words in the sine ROM (phase-to-amplitude converter) will determine the phase quantization error, while the number of the bits in the digital-to-analog converter (D/A converter) will determine the amplitude quantization error. Therefore, it is desirable to increase the resolution of the ROM and the D/A converter. Unfortunately, larger ROM and D/A converter resolutions mean higher power consumption, lower reliability, lower speed, and greatly increased costs. Sine memory compression techniques could be used to alleviate the problem, but the costs of the compression techniques are paid by increased circuit complexity and distortions [2]. The analysis of the different compression techniques is beyond the scope of this paper. Additional digital techniques may be incorporated in the DDS in order to reduce the presence of spurious signals at the DDS output [3]. Nonsubtractive dither is used to destroy the coherence of the undesired spurious components, but the penalty is that the broad-band noise level is quite high after dithering [1], [4]. The error feedback (EF) technique is used to suppress low-frequency quantization spurs [5], [6]. The drawback of conventional EF structures is that the output frequency is low with respect to the clock frequency. This problem is alleviated by the technique described in this paper. II. CONVENTIONAL DIRECT DIGITAL SYNTHESIZER The direct digital synthesizer is shown in simplified form in Fig. 1. The digital phase increment value is entered in the frequency register. At each clock pulse, this value is summed Paper approved by E. Panayirci, the Editor for Synchronization and Equalization of the IEEE Communications Society. Manuscript received December 25, 1995; revised July 25, 1996. The author is with the Laboratory of Signal Processing and Computer Technology, Helsinki University of Technology, FIN-02150 Espoo, Finland. Publisher Item Identifier S 0090-6778(97)02183-1.

with the data previously held in the phase register, and the new data are stored into the phase register. The phase value overflowing property of is generated by using the modulo a -bit phase accumulator. The rate of overflows is the output frequency (1) where is the phase increment word, is the clock frequency, and is the output frequency. The constraint in (1) comes from the sampling theorem. The ROM is a sine function table, which converts the phase information into the values of the sine wave. The ROM output is presented to the D/A converter, which develops a quantized analog sine wave. The low-pass filter removes the high-frequency sampling components and provides a pure sine-wave output. A. Amplitude Quantization Error The spurs are introduced by the finite precision of the amplitude samples presented to the D/A converter. The sequence of the amplitude quantization errors is periodic, repeating every samples where [3] (2) denotes the greatest common divisor where of and (the total number of the possible states in the phase accumulator). In the Nicholas phase accumulator, the least significant bit is forced to 1, so that the phase increment word is always relatively prime to [7]. This causes the phase accumulator output sequence to have maximal period for all values of [because then the denominator is always 1 in (2)]. In this way, all of the possible values of the phase accumulator output sequence are generated, before any values are repeated [7]. The number of bits in the phase accumulator is usually large to achieve good output frequency resolution [2], so the period is long in the Nicholas phase accumulator. In the long period case the amplitude quantization error results in what appears to be a white noise floor, but is actually a “sea” of very finely spaced discrete spurs [3]. The signal power of the sine wave is where is the amplitude of the sine wave. When the amplitude error is evenly distributed over the amplitude error power is where and is the wordlength of the D/A converter. In the case of the long period, the amplitude errors are assumed to be independent and evenly distributed over

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IEEE TRANSACTIONS ON COMMUNICATIONS, VOL. 45, NO. 4, APRIL 1997

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Fig. 1. Simplified block diagram of the direct digital synthesizer.

Fig. 2. Phase and amplitude error feedback in the DDS.

is approximately [7]

so the signal-to-noise ratio is given by (3)

(5) The DDS output is an odd function; therefore, the spectrum of the amplitude error only contains odd frequency components spurs). The sinusoid generated is a real signal, so its power is equally divided into two spectral components (negative and positive frequency components). Using these facts and assuming that the spectrum is calculated over the period the ratio of the carrier-to-spur power spectral density is given by

(4)

B. Phase Truncation Error Since the amount of memory required to encode the entire bits) would be usually width of the phase accumulator prohibitive, only of the most significant bits of the accumulator output are generally used to calculate the sine-wave samples. The carrier-to-spur ratio due to the phase truncation

III. TUNABLE ERROR FEEDBACK

IN

DDS

The high-quality sine wave requires long ROM address and D/A-converter wordlengths (3), (5), but the error feedback (EF) technique could be applied to suppress low frequency quantization spurs without increasing the resolutions of the ROM address and the D/A converter [5], [6]. In the proposed DDS with the tunable EF filter, the output frequency band is much wider than that in the DDS with fixed coefficients in the EF filter. The idea of the EF is to save the errors created in the quantization operation, feeding them back through a separate filter, in order to correct the result at the following sampling instants. The EF filter can be a second-order finite impulse response (FIR) filter (Fig. 2). The filter creates zero(s), which decrease(s) the quantization noise and spurs in a certain part of the frequency band. The output frequency of the DDS changes with the phase increment word and therefore we can make the EF filter tunable. This is carried out by changing the This will move the zero(s) of values of the coefficients the EF filter to different frequency(ies). The zero(s) should be

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FILTER

F (z )

TABLE I

b z01 + b2 z 02

= 1+ 1

placed as near as possible to the desired output frequency. The zero frequency(ies) can be computed by solving the roots of the filter in the plane. Often the coefficient is constrained (so that the to have powers-of-2 values or zero implementation will only require binary shift operations plus adding/subtractions). The coefficient only could get values . Table I lists the properties of the filter with different and constrained like this. In Table I, is the wordlength of the error. A. Tunable Phase Error Feedback in DDS The phase EF filter is placed between the phase accumulator and the ROM in Fig. 2. It is possible to derive the following expression for the synthesizer output signal:

(6) where is the phase quantization error, is the is the amplitude wordlength of the phase error, and quantization error. The phase EF is described by the expression (6). Truncation causes a secondary quantization error in the EF network. However, simulations showed that the phase EF works only when the DDS output frequency is low with respect to the used clock frequency. So, the coefficients of the phase EF filter cannot be tunable because the phase EF does not work in higher frequencies. If the phase error is assumed small relative to the phase, then the output signal (6) can be approximated by

(7) where and

is the DDS output frequency, is the DDS clock frequency. The phase EF above is in

Fig. 3. Optimal frequency bands for Table I EF filter coefficients.

the form of an amplitude-modulated sinusoid. The modulation translates the error spectrum up and down in frequency by which explains the simulation results at higher frequencies. B. Tunable Amplitude Error Feedback in DDS The amplitude EF filter is located after the ROM in Fig. 2. It is possible to derive the following expression for the synthesizer output signal:

(8) where is the wordlength of the amplitude error. The amplitude EF is only analyzed in (8). The output frequencies of the DDS with the amplitude EF are divided to the frequency bands (Fig. 3), so that the amplitude error variance is minimized (the error term is assumed white). In the DDS (Fig. 2), the Nicholas phase accumulator is used (and then the period is long (2), so the amplitude error is approximately white (4) [see Fig. 4(a)]. The amplitude EF filter coefficients, which are given in Fig. 3, are chosen according to the output frequency of the DDS.

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(a)

(b)

(c) Fig. 4. (a) Without the amplitude EF. The ratio of the carrier-to-spur power spectral density is approximately 80.15 dBc per FFT bin [80.02 dBc (4)]. ; b2 : (c) The amplitude EF filter with coefficients b1 ; b2 : (Simulation parameters (b) The amplitude EF filter with coefficients b1 the same as Fig. 4(b), except  ; fout kHz.)

1 = 1365

= 02 = 1  333

The penalty of the amplitude EF is a more complex circuit and reduced dynamic range. The size of the ROM increases where is the wordlength of the phase address and as is the wordlength of the amplitude error. The output of the ROM must be reduced (scaled) so that the original signal plus the maximum value of the EF stay within the nonsaturating region. The loss is small when the number of the quantization levels is large. A computer program has been created to simulate the DDS in Fig. 2 with EF structures. In Fig. 4, the simulation parameters are: the Nicholas phase accumulator wordlength and . The phase accumulator wordlength is equal to the phase address wordlength (no phase truncation) to avoid confusing the sources of the spurious. The output of the sine ROM is scaled with the maximum value of the EF

=1

=1

in Table I). All spectra filter magnitude response presented in this paper were generated using a 4096-point FFT with a Hanning window. In Fig. 4, the amplitude EF filter coefficients, which are chosen from Fig. 3, are tuned according to the output frequency of the DDS. The tunable amplitude EF filter shapes the amplitude quantization noise present at the DDS output, so that most of the noise lies outside the band of interest and will be removed by a tunable analog bandpass filter. The quantization noise at the DDS output is reduced in Fig. 4(b) and (c) so that one would obtain a high signalIn Table I, the tunable to-noise ratio in a band around therefore, the noise filter has two zeros at dc and one at is better in Fig. 4(b) than in Fig. 4(c). reduction around The noise reduction properties of the EF depend on the wordlength of the error, the degree of the EF structure, and the passband width of the analog filter at the output of the D/A

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converter [8]. The architecture (Fig. 2) used second-order EF, but the use of higher order EF is possible. A higher order EF structure improves noise reduction in a band around and gives better coverage of the DDS output bandwidth, but the penalty is a more complex circuit and more noise further away from the DDS output. A narrower passband in the analog filter gives a better signal-to-noise ratio. The cost of narrowing the passband is that the frequency switching time of the DDS system will become slower. The proposed DDS gets three input parameters: a phase increment word, the coefficients of the amplitude EF filter, and the bandpass of the analog filter (as in Fig. 2, but no phase EF filter). The tunable analog bandpass filter could be implemented, for example, with a phase-locked-loop, which will tune automatically. IV. CONCLUSION In the proposed novel architecture, the output frequency band is much wider than that in the DDS with the fixed coefficients in the amplitude EF filter. The DDS with the amplitude EF allows the use of a coarse resolution, highly linear D/A converter because spur performance is not limited

by the number of bits in the D/A converter, but rather by the linearity of the D/A converter. In purely digital applications, the reduced wordlength allows the use of narrower data paths. REFERENCES [1] V. S. Reinhardt, “Spur reduction techniques in direct digital synthesizers,” in Proc. 1993 IEEE Int. Frequency Cont. Symp., June 1993, pp. 230–241. [2] J. Vankka, “ Methods of mapping from phase to sine amplitude in direct digital synthesis,” in Proc. 1996 IEEE Frequency Contr. Symp., June 1996, pp. 942–950. [3] ——, “Spur reduction techniques in sine output direct digital synthesis,” in Proc. 1996 IEEE Frequency Contr. Symp., June 1996, pp. 951–959. [4] M. J. Flanagan and G. A. Zimmerman, “Spur-reduced digital sinusoid synthesis,” IEEE Trans. Commun., vol. 43, pp. 2254–2262, July 1995. [5] P. O’Leary and F. Maloberti, “A direct-digital synthesizer with improved spectral performance,” IEEE Trans. Commun., vol. 39, pp. 1046–1048, July 1991. [6] P. O’Leary, M. Pauritsch, F. Maloberti, and G. Raschetti, “An oversampling-based DTMF generator,” IEEE Trans. Commun., vol. 39, pp. 1189–1191, Aug. 1991. [7] H. T. Nicholas and H. Samueli, “An analysis of the output spectrum of direct digital frequency synthesizers in the presence of phaseaccumulator truncation,” in Proc. 41st Annu. Frequency Contr. Symp., 1987, pp. 495–502. [8] J. C. Candy and A.-N. Huynh, “Double interpolation for digital-toanalog conversion,” IEEE Trans. Commun., vol. 34, pp. 77–81, Jan. 1986.