A New Single-Phase Transformerless Current Source Inverter ... - MDPI

energies Article

A New Single-Phase Transformerless Current Source Inverter for Leakage Current Reduction Xiaoqiang Guo *, Jianhua Zhang, Jiale Zhou and Baocheng Wang Department of Electrical Engineering, Yanshan University, Qinhuangdao 066004, China; [email protected] (J.Z.); [email protected] (J.Z.); [email protected] (B.W.) * Correspondence: [email protected]; Tel.: +86-137-8507-0194





Received: 1 June 2018; Accepted: 20 June 2018; Published: 22 June 2018

Abstract: A new single-phase transformerless current source inverter is proposed in this paper. The proposed inverter can achieve leakage current reduction, which is crucial for the conventional current source inverter. The basic concept of the proposed solution is to develop the new inverter by the duality principle from the voltage source inverter. The theoretical analysis is carried out to determine the switching states of the proposed inverter for the leakage current reduction. Also, a new modulation strategy is presented to achieve the optimized switching states. Finally, the experimental results are presented. Comparing with conventional single-phase current source inverter, the leakage current can be significantly reduced by the proposed inverter, which verifies the effectiveness of the proposed solution. Keywords: single-phase inverter; current source inverter; leakage current

1. Introduction Power generation with solar energy is one of the most attractive solutions towards the utilization of renewable energy sources [1]. Typically, the inverter is used to interface the solar photovoltaic (PV) panel to the grid via a transformer. This kind of transformer is bulky, low-efficient and not cost-effective. This is the reason why transformerless PV inverters have been developed in recent years [2–4]. In practice, however, leakage current would arise due to a lack of galvanic isolation. The leakage current leads to the electromagnetic interference and potential safety issues [5,6]. Therefore, the VDE standard specifies that the leakage current should be less than 300 mA. Otherwise, the grid-connected inverter should be disconnected from the grid. Typically, the inverter is used to interface the PV panel and grid. In order to solve the above mentioned problem, many solutions have been proposed in the last decades. To reduce the common-mode voltage (CMV), the novel modulation methods have been proposed [7–14]. An improved modulation with modified reference was proposed in [7]. Another modified modulation for reducing the CMV with specified vectors was proposed in [8]. Lian et al. reduce the CMV by introducing the average-value-reduction space vector modulation method. It applies the specified switching states with less CMV. Bradaschia et al. [15,16] proposed effective methods to reduce leakage current which only need additional fast-recovery diodes. To increase the optional switching states, the extra switch can also be added to the system. The principle of this method is to isolate the PV array and the grid during the zero switching states [17–24]. The methods may result in extra cost, losses, and increases control complexity. However, the electromagnetic interference (EMI) filter that is used to improve the output current quality could be removed from system if the leakage current is eliminated effectively. Thus, the cost of the EMI filter will be saved and the size of the inverter will be decreased. Miveh et al. [25–27] proposed four-wire inverters which only need extra neutral wire. For this reason, the direct current (DC)-link Energies 2018, 11, 1633; doi:10.3390/en11071633

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neutral of grid, the between the PV array the are limited midpoint connects with theand neutral point of the grid, and between the PV array andto theaa neutral point point of the the grid, and the voltages voltages between the the PV voltages array and and the ground ground are limited to constant value. So, the leakage current can be reduced effectively. Some scholars proposed inverters ground are limited to a constant value. So, the leakage current can be reduced effectively. Some scholars constant value. So, the leakage current can be reduced effectively. Some scholars proposed inverters which the terminal with the The voltage between PV and proposed inverters which connect the PV array terminal with the terminal. Thethe voltage between which connect connect the PV PV array array terminal with the grid grid terminal. terminal. Thegrid voltage between the PV array array and the ground clamped. Therefore, the current be the arrayis the ground is clamped. Therefore, thecan leakage current[28–32]. can be reduced [28–32]. thePV ground isand clamped. Therefore, the leakage leakage current can be reduced reduced [28–32]. The two-stage power conversion would be complicated and have An alternative The efficiency. Thetwo-stage two-stagepower powerconversion conversionwould wouldbe becomplicated complicatedand andhave haveaalow lowefficiency. efficiency.An Analternative alternative solution is proposed using the current source inverter [33–36]. However, the leakage current could solution is proposed using the current source inverter [33–36]. However, the leakage current could not solution is proposed using the current source inverter [33–36]. However, the leakage current could not be well suppressed with the conventional current source inverter, which is the motivation of be well suppressed with the conventional current source inverter, which is the motivation of the paper not be well suppressed with the conventional current source inverter, which is the motivation of the the paper in solving this problem. in solving this problem. paper in solving this problem. The objective of the paper is to present new single-phase transformerless current source The The objective objective of of the the paper paper is is to to present present aaanew newsingle-phase single-phase transformerless transformerless current current source source inverter with leakage current reduction. Like the VH6 inverter [3], the proposed inverter only needs inverter with leakage current reduction. Like the VH6 inverter [3], the proposed inverter only inverter with leakage current reduction. Like the VH6 inverter [3], the proposed inverter onlyneeds needs a bidirectional switch which in serial with the alternating current (AC) side. When the inverter works aabidirectional switch which in serial with the alternating current (AC) side. When the inverter works bidirectional switch which in serial with the alternating current (AC) side. When the inverter works in will work to the PV and the The in switching states,the theextra extraswitch switch will work to isolate PV array the grid. Thepaper rest in zero zero switching switching states, states, the extra switch will work to isolate isolate thethe PV array array andand the grid. grid. The rest rest paper is organized as follows. Section 2 provides the theoretical analysis as to why the conventional singlepaper is organized as follows. Section 2 provides the theoretical analysis as to why the conventional is organized as follows. Section 2 provides the theoretical analysis as to why the conventional singlephase source inverter fails reduce the current. The solution for single-phase inverter to reduce the leakage The new solution for the phase current currentcurrent sourcesource inverter fails to tofails reduce the leakage leakage current.current. The new new solution for the the leakage leakage current reduction is presented in Section 3. The simulation and experimental results are provided in leakage current reduction is presented in Section 3. The simulation and experimental results are current reduction is presented in Section 3. The simulation and experimental results are provided in Section 4. provided Section 4.in Section 4. 2. Conventional Current Source Inverter 2. 2. Conventional Conventional Current Current Source Source Inverter Inverter The conventional single-phase current source inverter is illustrated in Figure 1, which consists The The conventional conventional single-phase single-phase current source inverter is illustrated illustrated in Figure Figure 1, 1, which which consists consists of four in an an H-bridgeformat. format. Therefore,it itis is called a CH4 inverter. order In order evaluate to evaluate of of four switches switches in in an H-bridge H-bridge format. Therefore, Therefore, it is called called aa CH4 CH4 inverter. inverter. In In order to to evaluate the the the leakage current reduction capability, the common-modeloop loop modelisisestablished, established, as shown in leakage leakage current current reduction reduction capability, capability, the the common-mode common-mode loop model model is established, as as shown in in Figure 2. Figure 2. Figure 2. L I S L11 IS

CPV CPV o o

p p

S3 S3

Lf 1 Lf 1

S1 S1

IL IL

PV PV

Cf Cf

C C

o o CPV CPV

S4 S4 L2 L2

Lf 2 Lf 2

S2 S2

Vg Vg o o

n n

Figure 1. 1. The CH4 CH4 inverter. Figure Figure 1.The The CH4inverter. inverter.

LL1 1

C CPV PV

o o o o

PV PV

C CPV PV

C C LL2 2

 VVpo  po   VVno no  

pp

oo

nn

LLf 1 f1 I ILL

IIa a

C Cff IIb b

LLf 2 f2

VVg g oo

Figure 2. 2. of the the CH4 inverter. inverter. Figure Figure 2.Circuit Circuitmodel modelof of theCH4 CH4 inverter.

In Figure 2, VVpopoand represent or negative rail and the ground, In V representthe thevoltage voltage between between the positive InFigure Figure2, 2,V and V Vno no represent betweenthe thepositive positiveor ornegative negativerail railand andthe theground, ground, po and no respectively. They can be regarded as the controllable voltage sources, which are regulated by the respectively. respectively. They They can can be be regarded regarded as asthe thecontrollable controllablevoltage voltage sources, sources, which which are areregulated regulatedby bythe the switching states s i (i = 1, 2, 3, 4). Lf1, Lf2, L1, and Lf2 are the input and output inductors, respectively. IL switching , andLf2Lf2are are the input and output inductors, respectively. switchingstates statesssii (i(i == 1, 2, 3, 4). Lf1f1,, LLf2f2, ,LL1,1and the input and output inductors, respectively. IL is the output inductor current. V g is the grid voltage. Ia and Ib can be regarded as the controllable is the output inductor current. Vg is the grid voltage. Ia and Ib can be regarded as the controllable current current sources, sources, which which are are determined determined by by the the switching switching states states ssii (i(i == 1, 1, 2, 2, 3, 3, 4). 4).

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IEnergies output inductor current. Vg is the grid voltage. Ia and Ib can be regarded as the controllable L is the 2018, 11, x 3 of 12 current sources, which are determined by the switching states si (i = 1, 2, 3, 4). Note current is mainly determined by thebycommon-mode behavior of the inverter. Note that thatthe theleakage leakage current is mainly determined the common-mode behavior of the Therefore, the differential-model variables, e.g., I and I , are neglected for simplicity. In this a inverter. Therefore, the differential-model variables, e.g., bIa and Ib, are neglected for simplicity. Inway, this the simplified common-mode loop model can becan obtained, as shown in Figure 3. way, the simplified common-mode loop model be obtained, as shown in Figure 3.

L1

2CPV o L2

V po Vno

p



Z



2CPV

 

I cm

o





Vm

o

n

Figure CH4 inverter. inverter. Figure 3. 3. Simplified Simplified common-mode common-mode model model of of the the CH4

In Figure 3, the equivalent impedance Z and equivalent voltage Vm can be expressed as follows, In Figure 3, the equivalent impedance Z and equivalent voltage Vm can be expressed as follows, according to Thevenin’s theorem. according to Thevenin’s theorem. LL1 ·LL2 s· s Z= (1) Z = L1 +2 L (1) L11  L2 2 ( L2 − L1 )(Vpo − Vno ) L1 · Vno + L2 · Vpo = Vcm + (2) Vm = LL1 + L+2L V 2V( L1+ L)2 ) V ( L  L )( V 1 no 2 po 2 1 po no (2) Vm = =Vcm  In Equation (2), the Vcm represents L1the  L2CMV. 2( L1  L2 ) In Equation (2), the Vcm represents the CMV.(Vpo + Vno ) Vcm = 2 (V

(3)

V )

po no (3) The Vm would be equal to Vcm on the Vcondition that L1 and L2 have the identical inductances, cm  2 which are generally designed the same in practical applications. The voltage Vm would equal to Vbe cm on the condition that L1 and L2 have the identical inductances, The Vpobe and Vno can derived as follows: which are generally designed the same in practical applications. The voltage Vpo andVpo Vno=can derived as follows: ( L be f 1 · s1 − L f 2 · s3 )( s2 + s4 ) s · IL + s1 ( s2 + s4 )Vg (4) Vno = (VLpof 1·(sL2f 1− ILs1+  s1L-fL2f 2· ss43)( )(ss21 +s4s)3s)sI L·  (s2s2(ss41)V+g s3 )Vg (4) Vno  ( L f 1  s2 -L f 2  s4 )(s1  s3 )s  I L  s2 (s1  s3 )Vg where: ( 1 , when ON where: (i = 1, 2, 3, 4) (5) si = 0 , when OFF

1, when ON

i=1,2,3,4） i =  Lf1 = Lf2 = Lf（ In the condition that L1 = L2 = L sand 0, when OFF , Vm can be represented as follows: 

Vg In the condition that L1 = L2 = L and Lf1 = Lf2 = Lf, Vm can be represented as follows: Vm = Vcm = (s1 · s2 − s3 · s4 )s · L f · IL + (2s1 · s2 + s2 · s3 + s1 · s4 ) 2 Vm =Vcm =( s1  s2  s3  s4 )s  L f  I L  (2s1  s2  s2  s3  s1  s4 )

Vg

The leakage current Icm can be derived from Figure 3 as follows:

(5) (6)

(6)

2

The leakage current Icm can be derived from Figure Vm 3 as follows: Icm = 1 Z + 2CPV Vm ·s I cm = 1 Then, the common-mode current of Icm canZbe  calculated by using Equations (6) and (7): 2CPV  s

(7)

(7)

V

(s1 · current s2 − s3 · of s4 )Iscm· can L f · be IL + (2s1 · s2 +bys2using · s3 +Equations s1 · s4 ) 2g (6) and (7): Then, the common-mode calculated Icm = L·s 1 2 + 2CPV ·s Vg I cm 

( s1  s2  s3  s4 ) s  L f  I L  (2s1  s2  s2  s3  s1  s4 ) Ls 1  2 2CPV  s

2

(8)

(8)

From Equation (8), it can be observed that Icm is dependent on many factors, such as the parasitic capacitance CPV, the grid voltage Vg, input filter inductance L, output filter inductance Lf, and

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From Equation (8), it can be observed that Icm is dependent on many factors, such as the parasitic capacitance CPV , the grid voltage Vg , input filter inductance L, output filter inductance Lf , and switching states si . In practice, the switching states vary at a high frequency, which will have an impact on the CMV. According to the Equation (6), the switching states and the corresponding CMV is analyzed as follows. When the switches S1 and S4 are ON, the CMV can be obtained as Equation (9). Vcm =

Vg 2

(9)

When the switches S1 and S2 are ON, the CMV can be obtained. Considering the voltage drop across the inductor is much smaller than grid voltage, the CMV is approximately equal to the grid voltage as follows: Vcm = L f · s · IL + Vg ≈ Vg (10) When the switches S2 and S3 are ON, the CMV can be obtained as follows: Vcm =

Vg 2

(11)

When the switches S3 and S4 are ON, the CMV can be obtained. Note that the voltage drop across the inductor is much smaller than the grid voltage. Therefore, it can be neglected, and the CMV is approximately equal to zero as follows: Vcm = − L f · s · IL ≈ 0

(12)

Based on the above analysis, the switching states and the corresponding voltage are listed in Table 1. Table 1. The switching states and their voltages. S1

S2

S3

S4

Vpo

Vno

Vcm

1 1 0 0

0 1 1 0

0 0 1 1

1 0 0 1

Vg Vg 0 0

0 Vg Vg 0

Vg /2 Vg Vg /2 0

From Table 1, it can be observed that the CMV varies with the switching states in a high-frequency way. That is the reason why the conventional CH4 inverter fails to reduce the leakage current. 3. New Current Source Inverter As discussed in the previous section, the leakage current is not able to be reduced by the conventional current source inverter. In order to solve the problem, a new current source inverter is proposed in this paper. The idea of the proposed solution is based on the duality principle. Inspired by the voltage source inverter named VH6 [3], the new current source inverter is proposed. In Figure 4, the VH6 inverter has two switches in parallel with the AC side to improve the common-mode behavior, in order to reduce the leakage current. According to the duality principle, the proposed inverter has an additional switch that is in serial with the upper or lower side of the AC.

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p

CPV Energies 2018, 11, x

S3

o

p

CPV o

Lf 1

S1

PV

C

S5

S3

S1

o

CPV PV CPV

CPV

S2

Sn3

S1

5 of 12

Vg

S5

Sp4

C

o

Lf 2 S6

Lf 1

Vg o

Figure 4. The The VH6 inverter. inverter. L f 2 S4 4. S2VH6 Figure S5

o p L CAs PV shown I in1 Figure 5,

Lf 1

S6

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o

5 of 12

n

PV

p L C the VH6 inverter, S6 proposed CPV the different from inverter only needs one extra IS 1 Vg L f 1 4. The VH6oinverter. Lf 1 S3 S1 inverter.Figure switch. Thus, it is called CH5 S3 S1 o S

S5

o CPV PV o

IS C

p

L1

S4

CPV

S3

Cf

S1

S4

CPVPV CPV

C LL21 IS

CPV

Lf 2

L2

o

(a)S1

S4

S2

S5

CPVPV CPV

Lf 1 Lf 2

Vg

L C L21 IS

o o

o

Figure 5. The proposed inverter. L C

2

PV

n

L1

o

Cf

S3

IS C

p

S3

S1

S4

S2

Cf

Lf 1

Figure 4. The VH6 inverter.

S2

np

o o

Lf 1

Vg

S5

o

CPV PV o

n

o

Lf 2

S2

o

Cf

np S3 S4

Lf 2

S5

Vg

Vg

(b)S1 S2

S5

Lf 1 Lf 2

o

n

PV

PV

Cf C In the zero switching inverter would operateC in the same way as theCCH4 inverter, f (a)state, the new (b) Vg Vg if the switch S5 is ON. However, when the switch S5 is OFF, the CH5 inverter would operate in a new Figure 5. The proposed inverter. o Figure L5.f 2 The oproposed L f 2 and S3 o inverter. S5 mode, 6. In this new mode, SS14 and SS22 are turned ON, o and the circuit S4 model S2 is shown in Figure and CSPV4 are turned OFF. 2 PV 2 n In the zeroLswitching state, the new inverter wouldCoperate inLthe same way as the CH4 inverter, n In order to demonstrate the leakage current reduction capability of the proposed inverter, if the switch S5 is ON. However, when the switch S 5 is OFF, the CH5 inverter would operate in a new (b)section. Note that the the operation principle (a) and common-mode behavior are Spresented in this 5 mode, and the circuit model is shown in Figure 6. In this new mode, S1 and S2 are turned ON, and S3 new inverter in Figure 5 is similar to the original, and thus only shown in Figure 5a is Figure 5. The proposed  the inverter inverter. and S4 are turned OFF. Lf L CPV V S5 discussed for simplicity. o In state, In the the zero zero switching switching state, the the new new inverter inverter would would operate operate in the same way as the CH4 inverter, S5 in p(n) ifif the switch switch SS55isisON. ON. However, when switch is OFF, the CH5 inverter would operate in However, when thethe switch S5 isS5OFF, the CH5 inverter would operate in a new PV Cf L o C L mode, CPVcircuit amode, new mode, and the is shown in Figure 6. In new mode, S are turned ON, and the circuit modelmodel is shown in Figure 6. In this new S 1 and 2 and are turned ON, and S3 f SS 1 2 VSthis S53 Vg Lf CPV OFF. L and S4 are oturned and SS34 and are turned OFF.

PV

o

CCPV PV o

S4  S5  VS3 (SVS4 ) 3 V  SS5

p(n)

C LL

o

Cf

Figure 6. Circuit model of CH5 in4new mode.



p(n)

V (V )

Lf Lf

Vg o



S3 S4 PV 6, the voltages Vpo and Vno would As shown inoFigure be the same, C f as shown in Equation (13). C S Also, the CMV is half of the grid voltage, as shown in Equation (14). So, this operation Vg mode can be Figure 6. Circuit model of CH5 in 3new mode. L f CPV used as the zero switching state ofLthe inverter to keep the CMV over half of the grid o voltage.

S4

Vg As shown in Figure 6, the voltages Vpo and Vno would be the same, as shown in Equation (13). V po  Vno   V (V )  (13) Also, the CMV is half of the grid voltage, as shown in Equation 2 S3 S4 (14). So, this operation mode can be used as the zero switching state of the inverter to keep the CMV over half of the grid voltage.

Figure Figure6. 6. Circuit Circuit model model of ofCH5 CH5in innew newmode. mode. (Vpo  VnoV) Vg (14) g Vcm Vpo  Vno   (13) 2 2 2 As shown in Figure 6, the voltages Vpo and Vno would be the same, as shown in Equation (13).

Also, the CMV is half of the grid voltage, as shown in Equation (14). So, this operation mode can be  Vno ) the used as the zero switching state of the inverter(Vto VgCMV over half of the grid voltage. (14) po keep Vcm 

2

 Vg 2

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As shown in Figure 6, the voltages Vpo and Vno would be the same, as shown in Equation (13). Also, the CMV is half of the grid voltage, as shown in Equation (14). So, this operation mode can be used as the zero switching state of the inverter to keep the CMV over half of the grid voltage. Vpo = Vno = Energies 2018, 11, x

Vg 2

(13) 6 of 12

(Vpo + Vno ) Vg = the corresponding voltage are listed(14) cm = Based on the above analysis, theVswitching states and in 2 2 Table 2. Based on the above analysis, the switching states and the corresponding voltage are listed in Table 2. Table 2. The switching states and their voltages. Table 2. The switching states and their voltages.

Vector Vector

S1 S1

I1 I1 I2 I2 I3 I3 I4 I4 I5 I5

1 0 1 0 1

S2 S2

1 0 1 0 1

0 1 1 0 1

0 1 1 0 1

S3 S3

0 0 1 1 00 11 0 0

S4 S4

1 1 0 0 00 11 0 0

S5 S5

1 1 1 1 11 11 0 0

Vpo

Vno

Vcm

Vpo

Vno

cm Vg/2 Vg /2 V g/2 Vg /2 VVgg 00 Vg /2 Vg/2

Vg Vg 0 0 V Vgg 00 Vg /2 Vg/2

0 V0g Vg V Vgg 00 Vg /2 Vg/2

V

As shown in Table Table 2, 2, itit can can be be observed observed that that the the high-frequency high-frequency CMV CMV can can be be totally totally eliminated eliminated on the the condition condition that that the the vectors vectors of of II11,, II22, and II55 are applied, leaving only the the low-frequency low-frequency grid grid voltage. It should should be be noted that the leakage current is mainly determined by the high-frequency voltage. It high-frequency components of CMV, CMV, and and the the low-frequency low-frequency component has a slim impact on the leakage current. Therefore, are used used for for controlling controlling the the proposed proposed inverter. Therefore, the the vectors vectors of of II11, I22 and I55 are The control control structure structure of of the the proposed proposed inverter inverter isis shown shownin inFigure Figure7.7.

CPV

IS

L1

p

S3

o

Lf 1

S1 S5

PV

C

Cf

o

S4 L2

CPV

FPGA

Vg Lf 2

S2

o

n

Vector Alloccation and Pulse Generation

DSP Vector Synthesis

Io

PR Controller

I o

Reference Current

Zero Crossing Detection

Figure 7. 7. Control of the the proposed proposed inverter. inverter. Figure Control structure structure of

As shown in Figure 7, the zero crossing detection is used for the grid synchronization to provide As shown in Figure 7, the zero crossing detection is used for the grid synchronization to provide the reference angle for the grid current. The proportional resonant (PR) controller [37] is used to the reference angle for the grid current. The proportional resonant (PR) controller [37] is used regulate the grid current with zero-steady state error. The gating signals are generated by the modulation strategy. And the detailed modulation procedure is presented, as shown in Figure 8.

I2

I5

0

I ref

I1

Synthesis

I o

Controller

Current

Detection

Figure 7. Control structure of the proposed inverter. Energies 2018, 11, 1633

7 of 12 As shown in Figure 7, the zero crossing detection is used for the grid synchronization to provide the reference angle for the grid current. The proportional resonant (PR) controller [37] is used to regulate thethe grid current the to regulate grid currentwith withzero-steady zero-steadystate stateerror. error. The Thegating gatingsignals signals are are generated generated by by the modulation strategy. And the detailed modulation procedure is presented, as shown in Figure 8. modulation strategy. And the detailed modulation procedure is presented, as shown in Figure 8.

I2

I5

I ref

I1

0 Energies 2018, 11, x

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(a) a  m  sin( ) ti  rem(t , Ts ) T1  a  Ts T2  (1  a )  Ts

YES

YES

I  I1

0  ti  T1

NO

0   YES

NO

I  I5

I  I2

0  ti  T1

NO

I  I5

(b) Figure 8. 8. The The schematic schematic diagram. diagram. (a) (a) The The vector vector synthesis; synthesis; (b) (b) The The vector vector allocation. allocation. Figure

In Figure 8a, during the positive half cycle, the reference vector Iref is synthesized by the active In Figure 8a, during the positive half cycle, the reference vector I is synthesized by the active vector I1 and zero vector I5. While in the negative half cycle, the Iref is ref synthesized by active vector I2 vector I1 and zero vector I5 . While in the negative half cycle, the Iref is synthesized by active vector and zero vector I5. The process of vector allocation is shown in Figure 8b. m represents the modulation I2 and zero vector I5 . The process of vector allocation is shown in Figure 8b. m represents the index. t represents the operation time. Ts represents the switching period. T1 represents the dwell time modulation index. t represents the operation time. Ts represents the switching period. T1 represents of active vector. And T2 represents the dwell time of zero vector. a stands for the modulation signal the dwell time of active vector. And T2 represents the dwell time of zero vector. a stands for the which can be obtained from the output variable through the PR controller. As shown in Figure 8, the modulation signal which can be obtained from the output variable through the PR controller. As shown dwell time of vectors is allocated based on the modulation signal. in Figure 8, the dwell time of vectors is allocated based on the modulation signal. In the positive half cycle, the range of vector angle θ is from 0 to π. Iref can be represented as In the positive half cycle, the range of vector angle θ is from 0 to π. Iref can be represented as Equation (15). Equation (15). (15) Iref ·Iref Ts  T =s T1T1·II11 +T2T2I5· I5 (15) In the the negative negative half half cycle, cycle, the the range range of of vector vector angle angle θθ is is from from ππto to2π. 2π.Iref Iref can can be be represented represented as as In Equation (16). Equation (16). Iref ·Iref Ts T=s TT11· II22  +TT ·I (16) (16) 2 2I5 5 4. Simulation and Experimental Results 4. Simulation and Experimental Results The simulation and experimental tests are carried out to verify the effectiveness of the proposed The simulation and experimental tests are carried to Hz. verify theinput effectiveness of the proposed solution. In the simulation test, the grid voltage is 220 out V/50 The current source is 12.5 A. solution. the simulation test, the is 220isV/50 Hz.The Theswitching input current sourceisis10 12.5 A. The filter In inductance is 2.5 mH. Thegrid filtervoltage capacitance 9.4 uF. frequency kHz. The filter inductance is 2.5 mH. The filter capacitance is 9.4 uF. The switching frequency is 10 kHz. The grid current is 10 A. And the parasitic capacitance is 75 nF. The grid current is 10the A. And the parasitic is 75 nF. CH4 inverter and proposed CH5 Figure 9 shows simulation resultscapacitance of the conventional Figure 9 shows the simulation results of the conventional CH4 inverter proposed with CH5 inverter. As shown in Figure 9a, influenced by the leakage current, the grid currentand is superposed inverter. As shown in Figure 9a, influenced by the leakage current, the grid current is superposed the high-frequency harmonics. The CMV of the CH4 is shown in Figure 9g; it is obvious that CMV with theofhigh-frequency Thewhich CMV results of the CH4 shown in Figure 9g;current, it is obvious that consists high-frequencyharmonics. components, in theisundesirable leakage as shown CMV consists of high-frequency components, which results in the undesirable leakage current, as in Figure 9i. The amplitude of the leakage current is far beyond 300 mA, which fails to comply with shown in Figure 9i. The amplitude of the leakage current is far beyond 300 mA, which fails to comply VDE-0126-1-1 standard. On the right, it is the waveforms of proposed inverter that correspond to the with VDE-0126-1-1 standard. On the right, it is the waveforms of proposed inverter that correspond to the CH4. As shown in Figure 9b, the high frequency harmonics of the grid current is significantly reduced, compared with Figure 9a. The CMV is free of any high-frequency harmonics, and thus the leakage current is significantly reduced well below 300 mA, which meet the VDE-0126-1-1 standard.

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CH4. As shown in Figure 9b, the high frequency harmonics of the grid current is significantly reduced, compared with Figure 9a. The CMV is free of any high-frequency harmonics, and thus the leakage Energies 2018, 11, x 8 of 12 current is significantly reduced well below 300 mA, which meet the VDE-0126-1-1 standard. 10 Io (A)

Io (A)

10 0 -10 0.1

0.11

0.12 0.13 Time (s) (a)

0.14

-10 0.1

0.15

0.11

Vpo (V)

0

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0.12 0.13 Time (s)

0.14

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0.14

0.15

0.14

0.15

0.14

0.15

0 -155.5 -311 0.1

0.15

0.11

0.12 0.13 Time (s)

(d) 311 Vno (V)

311 Vno (V)

0.15

155.5

(c)

0 -311 0.1

0.11

0.12 0.13 Time (s)

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155.5 0 -155.5 -311 0.1

0.15

0.11

(e) 311

311

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0 -155.5 -311 0.1

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0.12 0.13 Time (s)

0.14

0 -155.5 -311 0.1

0.15

0.11

(g)

0.12 0.13 Time (s)

(h)

1 Icm (A)

0.05

0.3 0 -0.3 -1 0.1

0.12 0.13 Time (s)

(f) Vcm (V)

Vcm (V)

0.14

311

-311 0.1

Icm (A)

0.12 0.13 Time (s)

(b)

311 Vpo (V)

0

0 -0.05

0.11

0.12 0.13 Time (s) (i)

0.14

0.15

0.1

0.11

0.12 0.13 Time (s)

(j)

Figure 9. 9. Simulation conventional CH4 CH4 inverter inverter and and proposed proposed CH5 CH5 inverter. inverter. (a) Grid Figure Simulation results results of of conventional (a) Grid current of CH4; (b) Grid current of proposed one; (c) V po of CH4; (d) Vpo of proposed one; (e) Vno of current of CH4; (b) Grid current of proposed one; (c) Vpo of CH4; (d) Vpo of proposed one; (e) Vno of CH4; (f) (f) V Vno of proposed one; (g) common-mode voltage (CMV) of CH4; (h) CMV of proposed one; CH4; no of proposed one; (g) common-mode voltage (CMV) of CH4; (h) CMV of proposed one; (i) Leakage Leakage current current of of CH4; CH4; (j) (j) Leakage Leakage current current of of proposed proposed one. one. (i)

In order to further verify the effectiveness of the proposed solution. The experimental prototype In order to further verify the effectiveness of the proposed solution. The experimental prototype is established. The experimental parameters are listed as follows. The input current source is 8 A. The is established. The experimental parameters are listed as follows. The input current source is 8 A. filter inductance is 2.5 mH. The filter capacitance is 9.4 uF. The switching frequency is 10 kHz. The grid current is 10 A. And the parasitic capacitance is 75 nF. The control and modulation algorithm are implemented in the DSP (TMS20F28335, Texas Instruments, Dallas, TX, USA) plus FPGA (XC6SLX9 2TQG144, Xilinx, San Jose, CA, USA) digital control platform Figure 10 shows the experimental results of CH4 inverter and proposed CH5 inverter. It can be observed that the output currents are unipolar and sinusoidal before and after the filter as shown in

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The filter inductance is 2.5 mH. The filter capacitance is 9.4 uF. The switching frequency is 10 kHz. The grid current is 10 A. And the parasitic capacitance is 75 nF. The control and modulation algorithm are implemented in the DSP (TMS20F28335, Texas Instruments, Dallas, TX, USA) plus FPGA (XC6SLX9 2TQG144, Xilinx, San Jose, CA, USA) digital control platform Figure 10 shows the experimental results of CH4 inverter and proposed CH5 inverter. It can be observed that in Energies 2018,the 11, xoutput currents are unipolar and sinusoidal before and after the filter as 9shown of 12 Figure 10a. On the other hand, the CMV is time-varying with high-frequency components as shown Figure10c. 10a.Consequently, On the other hand, CMV is time-varying with high-frequency components as shown in Figure the the leakage current of CH4 inverter is as high as 1.2 A, which fails to in Figure 10c. Consequently, the leakage current of CH4 inverter is as high as 1.2 A, which fails to comply with the VDE-0126-1-1 standard, as shown in Figure 10e. On the right, it is the experimental comply with the VDE-0126-1-1 standard, as shown in Figure 10e. On the right, it is the experimental waveforms of proposed inverter that correspond to the CH4. It can be observed that the high-frequency waveforms of proposed inverter that correspond to the CH4. It can be observed that the highcomponents of CMV are significantly suppressed, compared with the experimental results of the CH4 frequency components of CMV are significantly suppressed, compared with the experimental results inverter. Consequently, the leakagethe current the proposed CH5 CH5 inverter is much of the CH4 inverter. Consequently, leakageofcurrent of the proposed inverter is muchsmaller smaller than that of CH4 inverter. The amplitude of the leakage current is well below 300 mA, which meets the than that of CH4 inverter. The amplitude of the leakage current is well below 300 mA, which meets VDE-0126-1-1 standard. the VDE-0126-1-1 standard.

I ac

I ac

Io

Io

VCM

VCM

(a)

(b)

V po

V po

Vno

Vno

VCM

VCM

(c)

I CM

(d)

I CM

VCM

(e)

VCM

(f)

Figure 10. Experimental results of conventional CH4 inverter and proposed CH5 inverter. (a) Grid

Figure 10. Experimental results of conventional CH4 inverter and proposed CH5 inverter. (a) Grid current and CMV of the CH4 inverter; (b) Grid current and CMV of the proposed inverter; (c) Vpo and current and CMV of the CH4 inverter; (b) Grid current and CMV of the proposed inverter; (c) Vpo and Vno of CH4; (d) Vpo and Vno of the proposed inverter; (e) Leakage current and CMV of CH4; (f) Leakage Vno ofcurrent CH4; (d) of the proposed po and no proposed andVCMV of V the inverter.inverter; (e) Leakage current and CMV of CH4; (f) Leakage current and CMV of the proposed inverter.

The further dynamic experimental tests are carried out as shown in Figure 11. From 0 to 20 ms, S5 is further kept on.dynamic It operates as the CH4 tests inverter. 20out to 40 S5 isinactive with proposed The experimental are From carried as ms, shown Figure 11.the From 0 to 20 ms, modulation. It operates as the CH5 inverter. The dynamic experimental results show that the leakage S5 is kept on. It operates as the CH4 inverter. From 20 to 40 ms, S5 is active with the proposed current with the CH5 inverter is much lower than that with the CH4 inverter, which again verifies the effectiveness of the proposed solution.

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modulation. It operates as the CH5 inverter. The dynamic experimental results show that the leakage current with the CH5 inverter is much lower than that with the CH4 inverter, which again verifies the effectiveness Energies 2018, 11,of x the proposed solution. 10 of 12

V po

I CM

Vno

VCM

(a)

VCM

(b)

Figure 11. The The dynamic dynamic experimental experimental results results from from CH4 CH4 to toCH5 CH5inverter. inverter.(a) (a)VVpo and and V Vno;; (b) Leakage Figure 11. po no (b) Leakage current and CMV. current and CMV.

5. Conclusions 5. Conclusions This paper has presented a new single-phase transformer-less current source inverter. It can This paper has presented a new single-phase transformer-less current source inverter. It can achieve the leakage current reduction which is crucial for the PV inverter. The new current source achieve the leakage current reduction which is crucial for the PV inverter. The new current inverter with the improved common mode behavior is established by the duality principle. The source inverter with the improved common mode behavior is established by the duality principle. proposed solution only needs one extra switch to break the common-mode loop of the system for the The proposed solution only needs one extra switch to break the common-mode loop of the system for leakage current reduction. Aside from that, a new one-dimensional space vector modulation is the leakage current reduction. Aside from that, a new one-dimensional space vector modulation is presented for eliminating the high-frequency common-mode voltage, so as to reduce the leakage presented for eliminating the high-frequency common-mode voltage, so as to reduce the leakage current. The experimental results reveal that the leakage current can be significantly reduced from current. The experimental results reveal that the leakage current can be significantly reduced 1.2 to 0.19 A with the proposed solution. Therefore, it is an attractive solution for the single-phase from 1.2 to 0.19 A with the proposed solution. Therefore, it is an attractive solution for the transformerless PV systems. It should be noted that IGBT is used for the proposed inverter. There is single-phase transformerless PV systems. It should be noted that IGBT is used for the proposed a limitation regarding the switching frequency. With the rapid development of the wide-bandgap inverter. There is a limitation regarding the switching frequency. With the rapid development of the semiconductors such as the commercially available silicon carbide and GaN power device, the wide-bandgap semiconductors such as the commercially available silicon carbide and GaN power switching frequency would be high for a better techno-industrial level, which is the subject of our device, the switching frequency would be high for a better techno-industrial level, which is the subject future research. of our future research. Author Contributions: X.G. and J.Z. (Jianhua Zhang) designed the main parts of the study. J.Z. (Jiale Zhou) and Author Contributions: X.G. and J.Z. (Jianhua Zhang) designed the main parts of the study. J.Z. (Jiale Zhou) and B.W. helped in the fabrication. B.W. helped in the fabrication. Funding: This research was supported by the National Natural Science Foundation of China (Grant: 51777181), Funding: This research was supported by the National Natural Science Foundation of China (Grant: 51777181), Hundred ExcellentInnovation Innovation Talents Support Program of Province Hebei Province (SLRC2017059), Science Hundred Excellent Talents Support Program of Hebei (SLRC2017059), and Scienceand Foundation Foundation for Returned Scholars of Hebei Province (CL201622). for Returned Scholars of Hebei Province (CL201622). Acknowledgments: The author would like to thank Yanshan Yanshan University University for for supporting supporting this this research. research. Conflicts of Conflicts of Interest: Interest: The The authors authors declare declare no no conflict conflict of of interest. interest.

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