LTI. LPTV Our approach. Jitter from white noise. X. *. Flicker/coloured jitter. X ? *. Supply interference jitter X. *. VCO frequency control. *. Injection locking. X. X.
Advanced Tools for Simulation and Design of Oscillators/PLLs
Xiaolue Lai and Jaijeet Roychowdhury
University of Minnesota, Minneapolis, USA
ASP-DAC 2007. Copyright © 2001-2006, J Roychowdhury and ASVG, Univ of Minnesota
Slide 1
Oscillators: A Special Simulation Challenge ●
Computation/size/accuracy: much greater than for amps/mixers ●
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inefficient for even 1-transistor oscillators ● long startups: many cycles ● tiny timesteps needed per cycle integrated RF: 100s to 1000s of transistors errors dependent on size of timesteps, integration method, size of perturbations fundamental cause: marginal phase stability of all oscillators ● numerical errors integrate over time
SPICEbased perturbation analysis of oscillators is not a good idea ASP-DAC 2007. Copyright © 2001-2006, J Roychowdhury and ASVG, Univ of Minnesota
Slide 2
Alternatives to SPICE-level simulation ●
Use simplified phase macromodels ●
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Obtain effects of external perturbations on phase directly without simulating the full circuit (Linear Time-Invariant (LTI) models) Linear VCO macromodel
Ken Kundert, Cadence
ASP-DAC 2007. Copyright © 2001-2006, J Roychowdhury and ASVG, Univ of Minnesota
Slide 3
Limitations of Linear Phase Macromodels ●
Linear models are not generally applicable for all effects LTI model: narrow applicability LPTV models, including: Kaertner's LPTV IRF Hajimiri's closedform ISF better, but validity depends on circuit/dynamical effects Eg, cannot capture nonlinear phenomena
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injection locking, jitter, cycle slips, power grid noise effects, ...
ASP-DAC 2007. Copyright © 2001-2006, J Roychowdhury and ASVG, Univ of Minnesota
Slide 4
Automatically-extracted Oscillator Macromodel works for ALL effects, ALL oscillators Injection locking
Coupled oscs
Phase noise, timing jitter
PLL design methodology
Power/ground interference jitter
Early design tools/formulae
PLL Lock/Capture PLL cycle slipping Automated Extraction Algorithms
ONE Small, Nonlinear
phase/amplitude macromodel (fast to simulate)
Nano/Bio applications Fast Simulation Algorithms
(Ring, LC, biological, ...)
Fast envelope methods
(SPICE-level circuit, or differential equations)
Oscillator AC
ANY oscillator
ASP-DAC 2007. Copyright © 2001-2006, J Roychowdhury and ASVG, Univ of Minnesota
Slide 5
Automatically Extracted Nonlinear Oscillator Macromodel
Perturbation Projection Phase Vector (PPV/NISF) error/ jitter
Noise “Input”
Phase macromodel is nonlinear and scalar (nonlinear = captures complex dynamics) (scalar = small, fast to evaluate) Drop-in replacement for linear phase models ASP-DAC 2007. Copyright © 2001-2006, J Roychowdhury and ASVG, Univ of Minnesota
Slide 6
Feature Comparison with Existing Methods LTI
LPTV Our approach
Jitter from white noise Flicker/coloured jitter Supply interference jitter VCO frequency control Injection locking PLL lock/capture Cycle slipping Amplitude effects
i i i NA
Model generation speed Model gen. robustness Model simulation speed
Poor i Poor Excellent Poor Mediocre Good i Excellent Excellent Excellent
i i i i NA
ASP-DAC 2007. Copyright © 2001-2006, J Roychowdhury and ASVG, Univ of Minnesota
Slide 7
PLL Capture and Lock Transients
ASP-DAC 2007. Copyright © 2001-2006, J Roychowdhury and ASVG, Univ of Minnesota
Slide 8
PLL Capture/Lock: fref=1.07f0 >1000x speedup over full simulation
Reference (full simulation) LTI Nonlinear ASP-DAC 2007. Copyright © 2001-2006, J Roychowdhury and ASVG, Univ of Minnesota
Slide 9
PLL Capture/Lock: fref = 1.074 f0 Nonlinear
Reference (full simulation)
LTI
>1000x speedup over full simulation
ASP-DAC 2007. Copyright © 2001-2006, J Roychowdhury and ASVG, Univ of Minnesota
Slide 10
PLL Capture/Lock: fref = 1.083 f0
LTI
Nonlinear
Reference (full simulation)
>1000x speedup over full simulation
ASP-DAC 2007. Copyright © 2001-2006, J Roychowdhury and ASVG, Univ of Minnesota
Slide 11
Oscillator and PLL jitter due to Supply Interference
ASP-DAC 2007. Copyright © 2001-2006, J Roychowdhury and ASVG, Univ of Minnesota
Slide 12
Ring Oscillator: Per-cycle jitter as a function of sinusoidal supply interference frequency PPV, used in LPTV equation
Nonlinear
Reference (full simulation)
Closed-form (LPTV) ISF
~100x speedup over full simulation
ASP-DAC 2007. Copyright © 2001-2006, J Roychowdhury and ASVG, Univ of Minnesota
Slide 13
PLL: Max jitter as function of supply interference frequency Closed-form (LPTV) ISF
Nonlinear
Reference (full simulation) >1000x speedup over full simulation ASP-DAC 2007. Copyright © 2001-2006, J Roychowdhury and ASVG, Univ of Minnesota
Slide 14
PLL Cycle Slipping
ASP-DAC 2007. Copyright © 2001-2006, J Roychowdhury and ASVG, Univ of Minnesota
Slide 15
PLL: cycle slipping (5mA, 10T shock)
Nonlinear
LTI
Reference (full simulation)
>1000x speedup over full simulation ASP-DAC 2007. Copyright © 2001-2006, J Roychowdhury and ASVG, Univ of Minnesota
Slide 16
PLL: cycle slipping (3mA, 10T shock) Reference (full simulation)
Nonlinear
LTI >1000x speedup over full simulation ASP-DAC 2007. Copyright © 2001-2006, J Roychowdhury and ASVG, Univ of Minnesota
Slide 17
Impact of Nonlinear Macromodels on PLL Design Process
ASP-DAC 2007. Copyright © 2001-2006, J Roychowdhury and ASVG, Univ of Minnesota
Slide 18
Injection-aided PLL structure HPF Reference frequency
PFD
switch
LPF LPF
VCO
1 N
Lock acquisition time reduction is important ● High-pass path: induces injection locking ●
speeds lock acquisition ● Once locked, HPF path is switched out of the loop ● to lower phase noise in lock ●
ASP-DAC 2007. Copyright © 2001-2006, J Roychowdhury and ASVG, Univ of Minnesota
Slide 19
PLL Capture (freq shift vs time)
With HPF path Without HPF path
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~3x faster lock acquisition due to injection aiding
ASP-DAC 2007. Copyright © 2001-2006, J Roychowdhury and ASVG, Univ of Minnesota
Slide 20
Nonlinear PLL Macromodel: Benefits for Design ●
Linear macromodels: wrong results (though fast) ●
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can mislead, waste design time
Nonlinear macromodels: can be trusted during design ●
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sanity checking via SPICE-level simulation: still indispensable ● ~80 simulations in all ● ~5 full SPICE-level simulations ● macromodel offers 100-1000x speedup over full ● few minutes/simulation (including macromodel generation) Enables much more thorough exploration of design space ● many combinations of parameters, injection paths, ... ● Impractical using full simulation alone Design exploration completed in ~1 week ● Estimate: 10x saving in design time vs prior methodologies ● (with much more complete exploration)
ASP-DAC 2007. Copyright © 2001-2006, J Roychowdhury and ASVG, Univ of Minnesota
Slide 21
Coupled Oscillator Systems
ASP-DAC 2007. Copyright © 2001-2006, J Roychowdhury and ASVG, Univ of Minnesota
Slide 22
Brusselator biochemical oscillators Coupling (diffusion) terms Brusselator biochemical oscillators
“Network model” of coupled oscillators
ASP-DAC 2007. Copyright © 2001-2006, J Roychowdhury and ASVG, Univ of Minnesota
Slide 23
Spontaneous Pattern Formation: 160,000 coupled Brusselator oscillators (g=1/15)
Simulation time: 200 minutes for 160 cycles (MATLAB); est speedup 1200x Slide 24
ASP-DAC 2007. Copyright © 2001-2006, J Roychowdhury and ASVG, Univ of Minnesota
Summary
Nonlinear oscillator macromodel captures:
injection locking PLL lock and capture PLL cycle slipping phase noise and jitter in oscillators and PLLs pattern formation in biochemistry
Productivity enhancer for in design flows
10x faster?
Better, more completely explored designs
ASP-DAC 2007. Copyright © 2001-2006, J Roychowdhury and ASVG, Univ of Minnesota
Slide 25
