An IRAM-Based Architecture for a single-Chip ATM

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IsDN), the high-speed transfer of voice, video and data over a single network. In addition, ATM technol- ogy is an excellent choice for network backbones that.
   

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Fiber

Fiber

Routing and Switch Control

Input Port 0

Input Port 1

32

Internal Control Unit

1

Serial->Parallel

Serial->Parallel

4

4

4

Input Port 31

1

Serial->Parallel

Serial->Parallel

Fiber

Input Port 2

1

1

(e.g., i960)

Fiber

4

Input Distribution Circuitry (for bundling) 8 8 8 accum/mux accum/mux accum/mux 6 6 6

8 accum/mux 6

Output Port/ VC Lookup Output Port/ VC Lookup

Address Control

0

Output Port/ VC Lookup Output Port/ VC Lookup Output Order Preservation (for bundling)

addr

addr

addr

0

Cell Header Memory Banks

7

62

2

1

63

Main DRAM Bank For Cell Body Divided into 64 banks, each 6 bits wide. Each cell split across 64 banks. Pipelined so that all input and output ports can access it simultaneously. Write addresses from control unit, read addresses from output queues.

addr

6

6

6

6

Data Condenser/Unloader (for bundling) 6 accumulator

4

6 accumulator

4

Parallel->Serial

Parallel->Serial

Output Port 0

Output Port 1

6 accumulator

4

6 accumulator

4

Parallel->Serial

Parallel->Serial

Output Port 2

Output Port 31

Figure 2: Block diagram of single-chip ATM switch. The diagram shows a switch with 32 full-duplex ports.

          

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