Anomaly Detection and Classification for PHM of ... - IEEE Xplore

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IEEE TRANSACTIONS ON COMPONENTS, PACKAGING AND MANUFACTURING TECHNOLOGY, VOL. 2, NO. 11, NOVEMBER 2012

Anomaly Detection and Classification for PHM of Electronics Subjected to Shock and Vibration Pradeep Lall, Fellow, IEEE, Prashant Gupta, and Arjun Angral

Abstract— Failures in electronics subjected to shock and vibration are typically diagnosed using the built-in self test (BIST) or using continuity monitoring of daisy-chained packages. The BIST, which is extensively used for diagnostics or identification of failure, is focused on reactive failure detection and provides limited insight into reliability and residual life. In this paper, a new technique has been developed for health monitoring and failure mode classification based on measured damage precursors. A feature extraction technique in the joint-time-frequency analysis (JTFA) domain has been developed along with pattern classifiers for fault diagnosis of electronics at the product level. The Karhunen Loéve transform (KLT) has been used for feature reduction and de-correlation of the feature vectors for fault-mode classification in electronic assemblies. Euclidean, and Mahalanobis, and Bayesian distance classifiers based on JTFA, have been used for classification of the resulting feature space. Previously, the authors have developed damage precursors based on time and spectral techniques for health monitoring of electronics without reliance on continuity data from daisy-chained packages. Statistical pattern recognition techniques based on wavelet packet energy decomposition have been studied by authors for quantification of shock damage in electronic assemblies and auto-regressive moving average; time-frequency techniques have been investigated for system identification, condition monitoring, and fault detection and diagnosis in electronic systems. However, identification of specific failure modes is not possible. In this paper, various fault modes, such as solder interconnect failure, interconnect missing, chip delamination, chip cracking etc., in various packaging architectures have been classified using clustering of feature vectors based on the KLT approach. The KLT de-correlates the feature space and identifies dominant directions to describe the space, eliminating directions that encode little useful information about the features. The clustered damage precursors have been correlated with underlying damage. Several chip-scale packages have been studied with lead-free second-level interconnects, including SAC105, SAC305 alloys. Transient strain has been measured during the drop event using digital image correlation and high-speed cameras operating at 100 000 frames/s. Continuity has been monitored simultaneously for failure identification. Fault-mode classification has been done using KLT and JTFA analysis of the experimental data. In addition, explicit finite element models have been developed, and various kinds of failure modes have been simulated, such as solder ball cracking, trace fracture, package falloff, and solder ball failure. Models using cohesive elements present at the solder joint-copper pad interface at both the printed circuit Manuscript received January 3, 2011; revised February 2, 2012; accepted April 24, 2012. Date of publication September 14, 2012; date of current version October 30, 2012. Recommended for publication by Associate Editor S. Liu upon evaluation of reviewers’ comments. The authors are with the Department of Mechanical Engineering, NSF Center for Advanced Vehicle and Extreme Environment Electronics, Auburn University, Auburn, AL 36849 USA (e-mail: [email protected]; [email protected]; [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TCPMT.2012.2207460

board and package side have also been created to study the traction-separation behavior of solder. Fault modes predicted by simulation-based precursors have been correlated with those from experimental data. Index Terms— Electronic assemblies, failure mode classification, health management, leadfree, prognostics, reliability, solder joints.

I. I NTRODUCTION

C

URRENTLY in electronic packaging, built-in self test (BIST), fuses and canaries are extensively used for failure detection in electronics. These forms of failure detection procedures in integrated circuits (ICs) ensure high level of product functionality. The goal of monitoring electronics is a tradeoff between the effectiveness and cost/time involved in the process of design/manufacturing and maintenance. BIST has several advantages, which provide reduction of cost and time. For example, BIST reduces dependence on automatic test equipment, which reduces the effect of current in the design. BIST is also effective in many ways. It provides speed in system testing of circuit under test (CUT) [1]. It also overcomes the limitation of pins in the packaging and utilizes the extra area available on the chip thereby more information about faults is obtained. BIST is used in several forms, such as on-line-BIST and off-line-BIST. On-line BIST is mostly used for electrical monitoring of the chips or functionality of the IC. On-line BIST is used for monitoring whether the circuit is behaving correctly or not. For detecting and monitoring of actual physical damage in the circuit, off-line BIST is used. Structural faults in the circuit are mainly due to external loads experienced by the packages in manufacturing and field operations. Ideally, a BIST should have high fault coverage and low overheads on its circuit design. But there always exists a tradeoff, which leads to compromising the effectiveness of the BIST. One of the major concerns for a packaging and design engineer is the size of the BIST logic. Fault coverage and overheads are directly driven by size of the BIST. 100% fault coverage will also lead to increase in the overheads involved in the design and implementation of the BIST. Hence, application of BIST is always a compromise of cost and effectiveness. Fuses and Canaries are also used for detecting and controlling faults in electronic system. Fuses [2] are used to sense any abnormality, such as surge and fluctuations in voltage and temperature limits in the system and restore normal operating conditions. Canaries are special devices, which are mounted on the standard device, which is being monitored. Canaries

2156–3950/$31.00 © 2012 IEEE

LALL et al.: ANOMALY DETECTION AND CLASSIFICATION FOR PHM OF ELECTRONICS

Data Acquisition

Data Organization Classification Matrix

Feature Extraction

Experiment Data Matrix ⎡ x11 ⎢x ⎢ 21 ⎢ x 31 ⎢ ⎢ x 41 ⎢ . ⎢ . Pattern-n⎢⎢ ⎣ x n1

Pattern-1 Pattern-2

Experimental (Drop Testing) JEDEC Drop Simulation (Drop Phenomena)

TFR Analysis

Pristine Chip Cracking Solder Cracking

Chip Delamination

⎡ x11 ⎢x ⎢ 21 ⎢ x 31 ⎢ ⎢ x 41 ⎢ . ⎢ ⎢ . ⎢x ⎣ n1

x12 x 22 x 32 x 42 . . xn2 x12 x 22 x 32 x 42 . . xn2

. . x 1M ⎤ . . x 2 M ⎟⎟ . . x 3M ⎟ ⎟ . . x 4M ⎟ . . . ⎟ ⎟ . . . ⎟ . . x nM ⎦⎟ . . x 1M ⎤ . . x 2 M ⎥⎥ . . x 3M ⎥ ⎥ . . x 4M ⎥ . . . ⎥ ⎥ . . . ⎥ . . x nM ⎥⎦

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Clustering & De-correlation By Karhunen Loéve transform Experiment feature space

Simulation feature space

Overlap of Feature Space

Simulation Data Matrix (Manual Error Seeding) Simulation Space, Guides Identification Of Different regions belonging to each Failure Mode Fig. 1.

Flowchart of framework for PHM of electronics.

have an accelerated form of same failure mechanism as that of standard device on which it is mounted. Hence they fail faster. This property of canaries is used for measuring the actual time to failure [3] of the standard device. Canaries are used for identification of physics of failure in electronic packages. They are used for studying low-cycle fatigue (solder joint fatigue) [2], corrosion, changes, and sudden exposure to temperature and vibration transients. One of the major challenges in use of fuses and canaries is that they need frequent replacements and repairs. Hence, it is difficult to integrate them with the main system. The health monitoring techniques discussed above in electronic packaging have limited scope. They are all based on reactive failure and hence they are primarily diagnostic in nature. They do not give any information on remaining residual life, how and when the damage starts initiating, what is trend of damage progression, or what kind of failure mode is dominant in the electronic system. These questions are better tackled and answered by techniques that are predictive in nature. Previously, authors have developed techniques driven by statistical pattern recognition for structural health monitoring of electronics. These studies quantified damage initiation and progression [4]–[6] in electronics subjected to drop and shock. Statistical pattern recognition techniques based on wavelet packet energy decomposition [4] have been studied by authors for quantification of shock damage in electronic assemblies, and auto-regressive moving average, and time-frequency techniques have been investigated for system identification, condition monitoring, and fault detection and diagnosis in electronic systems [6]. Leading indicators for system-level damage in portable electronics are developed based on wavelet packet energy decomposition [4], joint time

frequency analysis (JTFA) [5], and auto-regressive moving average, and time-frequency techniques have been investigated for system identification, condition monitoring, and fault detection and diagnosis in electronic systems [6]. Currently, damage quantification is based on electrical continuity, which limits visibility into damage initiation and progression. Damage precursors based on time and spectral techniques for health monitoring of electronics do not rely on continuity data from daisy-chained packages. This technique of structural health monitoring involves extensive off-line processing of data obtained from the sensors strategically placed at various target points. Techniques such as digital image correlation [7] are also used for data acquisition of global and local responses of the electronic system subjected to drop and shock. Structural health monitoring, i.e., assessing the current state of the system and establishing a knowledge data based on predictions about the system state has previously been used in various engineering fields, such as delamination in composites [8], damage detection in aerospace structures [9], [10], and off-shore structures [11]. These methods of structural health monitoring have found application in performance assessment of machinery systems [12], [13]. Structural health has been previously applied in other scientific disciplines, such as biology [14], psychology [15], medicine [16], motors [17]–[19], hybrid electric vehicles [20], hydraulic actuators [21], marketing [22], artificial intelligence [23], computer vision [24], etc. Simple harmonic motion of electronics by statistical pattern recognition is relatively new. In this paper, various dominant failure modes occurring with every drop and shock event in electronics are classified using pre-failure feature space. Damage due to drop and shock in electronic packages can have a wide variety of failure

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(a)

(b)

Fig. 2. Test vehicle A packages, 1156 FPGA. (a) 35 × 35 mm with 34 × 34 solder array. (b) Interconnect array configuration.

modes occurring at various competing locations in different packaging architectures. The damage is due to overstresses developed by repetitive loading occurring with each drop event. Previously, the authors have developed damage precursors based on time and spectral techniques for health monitoring and damage detection in electronics without reliance on continuity data from daisy-chained packages. This paper focuses on classification of failure modes based on leading indicators in pre-failure space. The methodology developed in this paper is based on de-correlation of JTFA feature space by Karhunen Loéve transform (KLT). The classification of failure modes performed in this paper is based on exploiting the variance in the high-dimensional multivariate data sets (experimental and error seeded). The fundamental idea of KL transform is to minimize variance within each class (fault mode) and maximize variance between different classes (fault modes). Previously, the authors and other researchers have used Mahalanobis distance (MD) approach, a metric-based approach for classification. MD is based on the proximity of the patterns in the feature space, and inference or decision on classification is drawn based on the distance metric form by comparing patterns in the data stream. The interested reader is referred to [4]–[6], [25], and [26]. Various fault modes, such as solder interconnect failure, interconnect missing, chip delamination, chip cracking, etc., are classified. These fault modes are found as most frequently occurring in electronic packages subjected to drop and shock. Fault-mode classification for assessing system-level damage of electronics subjected to drop and shock is relatively new. II. T EST V EHICLES Two test vehicles have been used to study classification of failure mechanisms and modes in electronics under shock-impact loading. The test vehicles have been labeled as test boards A and B. The test vehicle A is a multilayer FR4 printed circuit board (PCB) with four 1156 I/O field programmable gate arrays (FPGAs). The packages are fully functional FPGA and not daisy-chained devices. The FPGA test board has been connected to a LabView data-acquisition system through a NI 6541 Digital generator and CB 2162 connector board to collect the digital data. The set-up enables each FPGA to write a square-pulse across the solder interconnects, charge an external capacitor, and read the square-pulse back from the second pair of second-level interconnects for the package being tested.

Fig. 3.

Test vehicle A printed circuit assembly. TABLE I ATTRIBUTES OF T EST V EHICLES A AND B

Package

FG1156

TABGA100

TABGA132

Size

35 × 35

10 × 10

8×8

I/O

1156

100

132

1

0.8

0.5

Ball size (mm)

0.6

0.46

0.3

Pad opening

0.46

0.3

0.28

Pitch (mm)

Pad type

SMD

SMD

Thru-Flex

Die size (mm)

23 × 21 × 0.3

5×5

3.98 × 3.98

Substrate thickness (mm)

0.56

0.5

0.1

Fig. 2(a) shows the location of FPGA solder interconnects being tested for detection of damage initiation and propagation. The solder interconnects being tested have been strategically selected based on the location of failure under thermo-mechanical loads and shock, vibration loads. Area-array packages often fail in the die-shadow area under thermo-mechanical loads, while the corner interconnects fail under shock and vibration loads. Fig. 2(b) shows the interconnect array configuration of the 1156 I/O FPGA package. The package is 35 × 35 mm in size, and has a full array of solder interconnects in a 34 × 34 array configuration at 1-mm pitch. The packages have Sn3Ag0.5Cu solder interconnects. The test board has mounting holes at the board corners to enable board test in the JEDEC configuration (Fig. 3). Package substrate is multilayer glass-epoxy substrate with solder-mask defined package-side pads. The die is 0.3 mm thick with in-plane dimensions 23 × 21 mm. Solder interconnects are 0.6 mm in diameter. The pads are solder mask defined 0.46-mm diameter. The package substrate is 0.56-mm thick, four-layer FR4. Test board B consists of ball-grid array (BGA) and chip-scale packages (CSP). Two versions of the test vehicle were constructed, including 8-mm flex-substrate chip packages with 132 I/O, 0.5-mm pitch and 10-mm flex-substrate chip-scale packages with 100 I/O, 0.8-mm pitch. The printed circuit assembly is made up of FR4 with SAC405 interconnects. Fig. 4 shows the test vehicle and interconnect configuration. Table I gives the summary of the package attributes for test vehicles A and B.

LALL et al.: ANOMALY DETECTION AND CLASSIFICATION FOR PHM OF ELECTRONICS

TABGA 100

TABGA 132

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high sampling-rate data-acquisition card and digital storage oscilloscope. Strain gauges have been mounted on the board side at various target points of interest. High-speed imaging of the drop event has also been acquired at a frame rate of 50 000 frames/s. The printed circuit assemblies have been speckle coated. Transient strain histories have been acquired from both strain gages and high-speed imaging using digital image correlation. The high-speed cameras have been placed on rigid floor with an angle of 25° between them while facing the speckle of the board. The board displacement has been measured by calibrating the cameras before the drop experiment. Fig. 6 shows the strain contours acquired during the drop event of test vehicle A. Fig. 7 shows the sample strain history of test vehicle B along with the daisy chain continuity, which is also used to monitor the packages during drop events. IV. D EVELOPMENT OF F EATURE V ECTORS FOR FAILURE M ODE C LASSIFICATION

Fig. 4. (a) Test vehicle B printed circuit assembly. (b) BGA interconnect configuration.

Different fault modes for health monitoring of test vehicles subjected to drop and shock have been classified using KLTs of feature vectors based on JTFA. A comprehensive data set of assembly response in JEDEC configuration has been obtained from time-frequency distributions of the strain histories obtained from different error seeded simulations and experimental measurements from strain sensors and high-speed imaging-based digital image correlation of test assemblies. Transient response of the circuit board assemblies has frequency content that varies over time in the signal. JTFA of the signal has been used to study the temporal behavior of the frequency content. Previously authors have implemented JTFA for early failure detection. In this paper, time-frequency distribution has been used to form a combined feature space of different drop events. The combined feature space is used for classifying dominant failure modes during drop events [27]–[30]. A. Time-Frequency Analysis

Fig. 5.

Lansmont drop table with test vehicle A.

III. D EVELOPMENT OF T RAINING S IGNAL The test boards are subjected to horizontal orientation 0° drop according to JEDEC standards. Fig. 5 shows the Lansmont drop table used for drop testing of the test vehicles. Both the test vehicles have been mounted in face-down configuration specified by the JEDEC test standard JESD22-B111. The shock-impact test for test vehicle A has been carried out with all the four FPGAs in powered-up state. The waveform generated by the FPGAs has been acquired using a

In this paper, the Cohen class of transforms has been applied to compute the JTFA distribution. A reduced interference distribution (RID) kernel has been used as an auxiliary function to reduce cross-terms and thereby reducing the interference, which is seen in other popular JTFA techniques, such as Wigner–Ville transforms [30]–[32]. In this paper, the binomial time-frequency kernel proposed by [33] and [34] has been applied to study the drop and shock characteristics of an electronic assembly.The binomial time-frequency distribution defined by [33] and [34] is ν=+|τ τ =∞  | g(ν)  2 |τ |  h(τ ) TFR(n, ν) = 22|τ | |τ | + ν τ =−∞ ν=−|τ | ∗

× f (n + ν + τ ) f (n + ν − τ )e−i4πωτ

(1)

where h(τ ) and g(ν) is the time smoothing window and the frequency smoothing window, respectively, and f (n) represents the signal where n = 1, 2, . . . , N, ν is instantaneous frequency, τ is the instantaneous time, θ is the angle in the ambiguity plane. Time–frequency representation (TFR)

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Fig. 6.

IEEE TRANSACTIONS ON COMPONENTS, PACKAGING AND MANUFACTURING TECHNOLOGY, VOL. 2, NO. 11, NOVEMBER 2012

time= 0 ms

time= 2.5 ms

time= 4.8 ms

time= 5.7 ms

3-D contour of strain in longitudinal direction from DIC of FPGA test board in 0° orientation.

distribution is a complex function with a real and imaginary axis. θ is the angle in complex plane. The term ν = θ τ , and is used to define the RID kernel as the RID kernel constraint is that θ τ >> 0. The frequency smoothing window g(ν) and the time smoothing window h(τ ) used here is a hamming window of size (N) as outlined in [32]–[35]. Fig. 8 shows a time-frequency distribution of a transient strain history obtained from the JEDEC drop of the test vehicle. The time-frequency analysis of the signal has been used to obtain the frequency content of the transient strain signal at each given time instant. The time-frequency signature is based on transient strain signal obtained from two sources, including the strain sensors placed on the electronic assembly and digital image correlation based on high-speed imaging during the shock event. The time moment and frequency moment distributions shown are unique to a given signal, and represent the strain signals in the JTFA spectrum. The first-order moments, in time and in frequency, of a time-frequency energy distribution, TFR, describe the averaged positions and spreads in time and in frequency of the signal. The time moment represents an estimation of instantaneous frequency at a given time instant during the drop event [30], [36], [37]. The frequency moment

represents an estimation of the group delay of the signal for each frequency in the signal [30], [38], [39]. As the time moment and frequency moment, feature vectors are unique for each signal they are an appropriate choice for prognostics of electronic assemblies in drop and shock. Once the JTFA distribution of the drop events has been calculated, a comprehensive data set has been developed using the TFR distributions of several drop events for each test assembly from pristine-state to failure. A 2-D image has been made by stacking the TFR distribution of each drop events side by side (Fig. 9). The TFR distribution for each transient strain history has been binned by frequency. A sample plot of combined TFR distributions is shown in Fig. 9. Fig. 9(a) shows the image of the combined TFR distributions, and Fig. 9(b) presents the data matrix, which is used as an input data for fault-mode classification. B. Decorrelation of Feature Space Using KLTs KLT is a statistical classifier, which has been used for de-correlation of feature space of damage progression in package interconnects during successive drop events.

LALL et al.: ANOMALY DETECTION AND CLASSIFICATION FOR PHM OF ELECTRONICS

Strain

2 1 0 -0.01 -1

0.04

-2

9 7 5 3 1 -1 0.09-3 -5 -7

correlation matrix, R, the unit vector in de-correlated space, q, and standard deviation, σ ψ(q) = σ 2 = q T Rq. Voltage (V)

3

The eigenvalues have been arranged in descending order λ1 > λ2 > λ3 > · · · > λm .

Continuity

Fig. 7. Sample strain history and damage detection by daisy chain monitoring.

The de-classification of feature space has been done based on the variability of the data. The time-frequency feature space has been clustered into most dominant directions of variability. Previously, KLT has been used for data compression in classical communication theory [40]–[42]. The use of KLT for failure-mode classification of electronic modules is new. The data set described in Fig. 9 has been de-correlated using KL transform (Fig. 1). Let X be the representation of the variable-space in the environment of interest. JTFA distributions of the strain histories from successive drop events from pristine assembly configuration to failure for each board assembly has been used as the input matrix, X. A de-classified feature space Z has been obtained using the KL transform of the matrix, X [43], [44]. The de-classified set of vectors is a linear combination of principal components with decreasing order of importance. The initial k-vectors are important as they account for most of the variance in the data. KLT

[X]m−dimensions → [Z ]m−dimensions.

(2)

The data set X has been centered and scaled to eliminate a nonzero mean of matrix X. Since, the input matrix has been centered and scaled, the expected value of the input matrix is zero E[X] = 0. (3) The input matrix X has been projected on a unit vector, q in the de-correlated feature space, also of dimension-m. The projection is represented as an inner product of vectors X and q is the matrix of principal components, A A = X T q = q T X.

(4)

The variance of A has been represented as a function of unit vector, q σ 2 = E[ A2 ] = E[(q T X)(X T q)] = q T E[X X T ]q = q T Rq.

(6)

The equation that governs the unit vectors, q, and variance probe  is an eigenvalue problem, which has a nontrivial solution, q = 0 Rq = λq. (7)

Time(sec) Strain

1907

(5)

Where, the outer product of X, has been represented as R. The variance probe,  has been computed, since it relates

(8)

The eigenvector matrix Q is orthogonal consisting of column-vectors, which satisfy the condition of orthonormality   Q = q1 q2 q3 . . . qn (9)  j 1, = i qiT q j = (10) j = i. 0, Using eigen-decomposition, the correlation matrix R has been written in terms of eigenvalues and eigenvectors as R=

m 

λi qi qiT.

(11)

i=1

The eigenvectors of the correlation matrix R represent the principal directions along which the variance probes (q j ) have extreme values. The associated eigenvalues define the extreme values of the variance probe (q j ). There are m possible projections of x, corresponding to m possible solutions of unit vectors q. Projections a j , which are the principal components, have been combined into a single vector as follows: A = [a1 , a2 , a3 , . . . , am ]T

(12)

A = [x T q1 , x T q2 , x T q3 , . . . , x T qm ]T A = Q T x.

(13)

The original data-vector has been synthesized from the transformed feature space of principal components by pre-multiplying the above equation by Q X = QA m  ajqj. X=

(14)

j =1

The original data vector x has reduced dimensions from the transformed feature space a as ⎡ ⎤ a1  ⎥  ⎢  ⎢ a1 ⎥ a j q j xˆ = q1 q2 · · · q ⎢ . ⎥ xˆ = (15) ⎣ .. ⎦ j =1 a where l < m. The KL transform has been used to create a linear projection of feature space from m-dimensions to l-dimensions, which approximates the original data x. Dominant directions of the de-correlated feature space have been determined by first few largest eigenvalues. The principal components entering transformation are also determined by the dominant eigenvalues.

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Fig. 8.

JTFA feature space of a transient strain signal.

4 3.5

2 COMBINED TFR FEATURE SPACE OF DIFFERENT DROP EVENTS

Drop Events

4

3 2.5 2

6

1.5 1

8

0.5 0

10

-0.5 -1

12 0

200

400

600

Frequency Bin

800

1000

(a)

retrieved from the model predictions for studying fault-mode classification. Since drop impact failures are accompanied by competing failure modes, including solder interconnect failure, trace fracture, chip delamination, and chip fracture, each failure mode has been modeled by error-seeding the pristine configuration model. Various package locations have been modeled for each test vehicle. Strain histories have been extracted for each case. The board has been modeled using reduced integration conventional shell S4R elements. The solder interconnects have been modeled using two node element Timoshenko beam elements (B31). Various elements of the package, including the copper pad, mold, die, BT-epoxy substrate have been modeled using C3D8R elements. The floor of impact has been modeled using R3D4 element. The JEDEC orientation for test vehicle A and test vehicle B is shown in Fig. 10. Fig. 11 shows the cross-sectional detail of the modeled packages for the test vehicles. The faults occurring in the test vehicle during drop event are simulated in the simulation by error seeding the assembly manually. This manual error seeding is used to form a data set, which can be used to classify the actual fault modes occurring due to the physical damage taking place in experimental data.

(b) Fig. 9. Representative sample. (a) Image of combined TFR feature space. (b) Data matrix of combined TFR feature space.

V. M ODELING OF C OMPETING FAILURE M ODES BY E XPLICIT F INITE E LEMENTS S IMULATION Explicit finite element models have been developed for shock-impact of both test vehicles in the JEDEC configuration. Interconnects have been modeled with conventional shell-beam elements. In order to reduce computational time, only one package has been modeled in the detailed configuration at one time, while the rest have been modeled using smeared properties. Details of the smearing scheme can be found in [7] and [45]. Competing failure modes have been modeled for the detailed package. One package has been modeled in detailed format in turn for each package on the test assembly. Strain histories during the drop event have been

A. Solder Ball Failure and Cracking The solder balls in the drop event are subjected to mechanical shock. During shock-impact, the board undergoes considerable bending for small duration. Therefore, the shock event is transient in nature. Due to repeated drop events of the board assembly, the solder balls undergo fatigue failure leading to complete failure or solder interconnect missing. The explicit finite element models of the board assembly have been error seeded to simulate the effect of solder ball fracture and failure. Corner-most solder balls in the package experience maximum shear strain making the corner-most solder interconnects most likely to fail during shock events. Commercial packages may use one or more corner-interconnects as redundant grounds. It is therefore feasible to sustain damage in the corner interconnects while the package continues to function normally. Solder ball damage and failure has been simulated in the explicit

LALL et al.: ANOMALY DETECTION AND CLASSIFICATION FOR PHM OF ELECTRONICS

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Mold Chip

(a)

Die-attach Solder Interconnects

Substrate PCB

Cu Pad (a)

Mold

PCB (b) Fig. 11.

model by reduction in the cross-section area of the corner interconnects followed by elimination of the corner interconnects from the package. Fig. 12 shows a schematic of solder interconnect array simulated with each solder ball cracking and solder ball missing for test vehicle A and test vehicle B. Interconnects with simulated damage in the test vehicle have been selected sequentially on the periphery for each package in the test assembly. A comprehensive simulation data set has been developed by simulation of more interconnects with sustained damage in the test vehicle. Transient strain histories have been obtained for the simulated shock-impact at the center of the package-location on top of the mold-compound as well as on PCB side. Experimental strain histories have been extracted from high-speed data-acquisition in conjunction with strain gages and high-speed imaging using digital image correlation.

C. Chip Delamination

Chip fracture has been simulated in the detailed package on both test vehicles on the silicon die. The fracture on the chip has been modeled as a crack occurring in the underside of the chip. The crack has been modeled by removing elements at location of the crack and replacing them with contact elements, which form a fracture surface. The contact surfaces present in the chip represent a crack. The chip fracture mode of failure is shown in Fig. 13.

Solder Interconnect Substrate

(b)

Fig. 10. JEDEC drop orientation of (a) test vehicle A and (b) test vehicle B.

B. Chip Fracture

Chip

Die attach

Modeling details. (a) Test vehicle A. (b) Test vehicle B.

Chip delamination during shock-impact has been modeled by progressive detachment of the bond between the chip and package substrate. Contact elements have been used to represent the fracture surface between the package substrate and the die-attach. Fig. 14 shows the model of chip delamination. VI. VALIDATION OF C LUSTERING The feature space formed by time-frequency distribution has been de-correlated using KLT into clusters. These clusters have been formed from both the simulation data set as well as experimental data sets. For simulation data set, since the explicit finite element models are error seeded with a specific failure mode, it is known ahead of time which region of the feature space belongs to which failure mode. The simulation data set clusters have been overlapped on the clusters formed by experimental data to quantify the type of failure mode. In a practical scenario, there are multiple failure modes that can occur in the test vehicle when subjected to repeated shock-impact phenomenon. Hence, the overlapping of the clusters helps in finding the most dominant direction of the failure mode occurring in the test vehicle. Correlation of the prediction from the simulation and experimental data sets has been quantified using the similarity factor, SPCA . Objects or classes grouped together in a cluster have been verified to be similar, and objects placed in different clusters

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Two Interconnects with Damage

One Interconnect with Damage

Three Interconnect with Damage

Contact Surface Representing Die fracture

Four Interconnects with Damage

Y X

Z

Fig. 13.

(a)

Simulated chip fracture in drop event.

Two Interconnects with Damage

One Interconnect with Damage

Y X

Z Three Interconnect with Damage

Delamination between Chip and Substrate

Four Interconnects with Damage

Fig. 14.

Simulation of chip delamination in the package.

Fig. 12. Simulation of solder interconnect damage for (a) test vehicle A and (b) test vehicle B.

have been verified to be dissimilar in their inherent failure modes. To see the statistical resemblance of KL coefficients of first three principal components for different types of failure modes in simulation and experimentation, the Mahalonobis distance classifier along with SPCA has been used [46], [47]. The similarity factor SPCA provides a single value for quantification of similarity between the two data sets. First k-principal components, which account for at least 95% of the total variance in the data, have been selected from both simulation and experimental data sets. A value of zero indicates no similarity, while a value of one signifies identical data sets trace(E T SS T

E) (16) k where, [E] and [S] are k most important principal component matrix of the two n-dimensional data sets from experimental and simulation, respectively. SPCA =

0.996 0.994 0.992 0.99 0.988 0.986 0.984 0.982 0.98 0

1

2

3

4

5

6

7

8

9

10

11

Principal Components

(a) 1 0.9998 Cumulative Percentage Contribution

(b)

Cumulative Percentage Contribution

1 0.998

0.9996 0.9994 0.9992 0.999 0.9988 0.9986 0.9984 0

1

2

3

4

5

Principal Components

(b)

A. Mahalonobis Distance Classifier Mahalonobis distance classifier has been used to quantify the statistical difference between the KL coefficients of the healthy transient strain history and different error seeded models. It is also used to calculate the statistical difference for the experimental data set, where drop-1 is the healthy training signal and subsequent drops are the unhealthy signals with

Fig. 15. Test vehicle A scree plot of cumulative contribution of principal components. (a) Simulation data. (b) Experimental data.

some damage initiation and progression in them. Mahalonobis distance is defined as the measure of dissimilarity between two random variables X and Y which have same distribution

LALL et al.: ANOMALY DETECTION AND CLASSIFICATION FOR PHM OF ELECTRONICS

1911

Cumulative Percentage Contribution

1 0.9998 0.9996 0.9994 0.9992 0.999 0.9988 0.9986 0

1

2

3

4

5

6

7

8

9

10

11

12

13

Principal Components

(a)

Cumulative Percentage Contribution

1 0.9

(a)

0.8 0.7 0.6 0.5 0.4 0.3 0

10

20

30

40

50

Principal Components

(b) Fig. 16. Test vehicle B scree plot of cumulative contribution of principal components. (a) Simulation data. (b) Experimental data.

of covariance matrix  d( x , y) =

x − y)T (



−1 ( x

− y).

(17) (b)

VII. R ESULTS OF C LASSIFICATION OF FAILURE M ODES In this section, the potential of the presented methods for failure mode classification has been investigated. Data from test assemblies with multiple failure modes have been collected with a combination of high-speed data acquisition and high-speed video in conjunction with digital image correlation. Simulation models have been error seeded with specific failure modes. Time-frequency analysis-based feature vectors have been created based on both experimental data and the model predictions. Experimental data sets have been acquired for both pristine assemblies and after each drop to capture the damage progression in the assemblies. The feature space has been populated with the response from pristine assemblies, assemblies with progressive damage, and failed assemblies. Error seeding of the simulation models with specific failure mode has been used to guide the identification of the region in the pre-failure feature space belonging to the particular failure mode. Dominant locations of each failure mode in the feature space have been identified based on the overlap between the error-seeded simulation models and experimental data sets in the feature space. Experimental data sets from both pristine assemblies and assemblies with impending failure have been analyzed. Feature space in this paper has been defined based on the first three principal components. The first three principal components have been chosen because they account for 95% of the

Fig. 17. (a) De-correlated pre-failure feature space of test vehicle A. (b) Dominant direction of failure mode in pre-failure feature space in test vehicle A.

variability in the input data. Figs. 15 and 16 show the scree plot for test vehicle A and test vehicle B, respectively. The scree plots demonstrate that majority of the variability in the data is explained by the first three principal components of the data set. This has been found to be true for feature vectors developed from both the experimental and simulation data sets. Figs. 17 and 18 show the de-correlated feature space of test vehicle A and test vehicle B for simulation data. Figs. 17(a) and 18(a) show the clusters of different failure modes for test vehicle A and test vehicle B, respectively. Figs. 17(b) and 18(b) show the surfaces defined by the three principal components. The descent direction in the surface gradient has been used to detect the progression direction of a specific failure mode in feature space for both test vehicles. Since feature vectors from multiple assemblies have been plotted in feature space and failure modes verified by cross-sectioning, the results are repeatable and representative of the failure modes. In addition, movement of the Karhunen Loéve Coefficients in a particular direction signifies the expected migration of the assembly response in feature space with damage progression.

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chip delamination

chip cracking

four_interconnec t crack

three_interconne ct crack

two_interconnect crack

one_interconnect crack

four_interconnec t miss

three_interconne ct miss

two_interconnect miss

one_interconnect miss

1.2 1 0.8 0.6 0.4 0.2 0 Healthy

(a)

Confidence Value

Fig. 20. Test vehicle B overlap of simulation and experimental feature spaces.

Failure Mode

(b)

Package Fall-off

chip delamination

chip cracking

four_interconnect crack

three_interconnect crack

two_interconnect crack

one_interconnect crack

four_interconnect miss

three_interconnect miss

two_interconnect miss

one_interconnect miss

1.2 1 0.8 0.6 0.4 0.2 0 Healthy

Confidence Value

(a)

Failure Mode

(b) Fig. 18. (a) De-correlated pre-failure feature space of test vehicle B. (b) Dominant direction of failure mode in pre-failure feature space of test vehicle B.

Fig. 19. Test vehicle A overlap of simulation and experimental feature spaces.

The migration direction of the KL coefficients in the feature space has also been used to identify the relative dominance of failure modes in the test assemblies with accrued latent damage. In this paper, the dominant failure modes, i.e., failure modes which are most likely to occur with subsequent drop events have been identified in pre-failure feature space. Figs. 19 and 20 show the superimposed feature space of

Fig. 21. Confidence plot based on Mahalonobis distance classifier for simulation data set. (a) Test vehicle A. (b) Test vehicle B.

the simulation on experimental feature space. Correlation between of the experimental and simulation feature vectors has been statistically quantified using principal component similarity factor (S PC A ). A similarity factor (SPCA ) between the first three principal components for experimental and simulation data sets for test vehicle A is 0.9521 (>0.95) and for test vehicle B is 0.9689 (>0.95). The high value of SPCA indicates that simulation feature space is statistically similar to experimental feature space at a confidence level of 95%. Hence, the superposition of the feature space is statistically validated. Since simulation has been performed exclusively for a particular failure mode, the superposition of simulation and experimental KL coefficients validates the predicted failure modes and their classification in the feature space. In addition, the Mahalonobis distance classifier has been used to quantify the statistical dissimilarity between the various KL coefficients. The confidence values computed for various failure modes based on MD have been plotted in Figs. 17 and 20. Since the cutoff level in this paper is 95%, the confidence plot shown in Fig. 21(a) and (b) indicates that statistically there exists a significant difference between the

Confidence Value

LALL et al.: ANOMALY DETECTION AND CLASSIFICATION FOR PHM OF ELECTRONICS

1913

1.2 1 0.8 0.6 0.4 0.2 0 Drop-1

Drop-5

Drop-10

Drop-15

Drop Number

(a)

(b)

Fig. 23. Test Vehicle-B. Solder joint failures near IMC layer on (a) package side and (b) board side.

(a)

Confidence Value

1.2 1 0.8 0.6 0.4

(a)

0.2

Drop-44

Drop-40

Drop-35

Drop-30

Drop-25

Drop-20

Drop-15

Drop-10

Drop-5

Drop-1

0

Drop Number

(b) Fig. 22. Combined confidence plot based of mahalonobis distance classifier for experimental data set. (a) Test vehicle A. (b) Test vehicle B.

KL coefficients of the healthy strain signal and error seeded strain signals from the simulation. Similarly a statistically significant difference has been demonstrated between in the experimental data set for both the test vehicles, where drop-1 is taken as the healthy signal and the subsequent drops are studied to see any damage initiation and progression in them. Fig. 22(a) and (b) shows the combined confidence plot of Mahalonobis distance classifier for experimental data set for test vehicle A and test vehicle B. Similarity factor is also calculated between various specific failure modes for three cases for both test vehicles A and B. SPCA has been calculated for following cases to show the statistical similarity or dissimilarity between them: 1) simulation versus simulation; 2) experimental versus experimental; and 3) experimental versus simulation. Table II(a) and (b) shows the SPCA calculation for the simulation data set with different cases of failure modes. Statistical significance has been computed at a confidence value of 90%. A value of S PC A > 0.90 will indicate statistical similarity where as S PC A < 0.90 will indicate statistical dissimilarity. Table III(a) and (b) shows the SPCA calculation of experimental data set for test vehicles A and B. Table IV(a) and (b) shows the SPCA calculation between the experimental and simulation data sets for each drop and failure mode case in simulation. A SPCA value greater than 0.9 shown in Table IV(a) and (b) indicates statistically when healthy simulation is compared with pristine

(b)

Fig. 24. Failure modes. (a) Interface cracks near the PCB pad. (b) Solder on PCB-side.

experimental shock, they are statistically similar at a cutoff level of 90%. This also validates that overlapping of feature spaces, as it is used for identification of regions belonging to specific failure mode. For other SPCA values is, Table IV(a) and (b) are significantly lower than 1, indicating that when different drop events are compared with different error seeded failure modes they are found to be moderately similar. This is also true as error seeded data set consists of information of models error seeded exclusively with one particular failure mode, whereas experimental features will have multiple failure modes initiated and propagating with drop events in time. Test vehicles with respective failure modes are validated with cross sections of the failed samples. The cross sectioning of the samples is performed after the package has completely failed and lost functionality. The samples are cross sectioned and scanning electron microscope (SEM) images are used to determine different failure cites for test vehicle A and test vehicle B. Figs. 23–25 show the failure modes observed based in the experimental cross sections of the test vehicles after failure. Five types of failure modes (A–E) are classified (Fig. 26) based on the SEM images. The dominant failure mode was observed to be interconnect fracture. A similar trend of this dominant failure mode is also seen in Fig. 19 and which is based on de-correlation of feature space for various considered fault modes. In Fig. 19, KL coefficients are entirely concentrated in the region of solder interconnect cracking and missing. Based on the cross sections in Fig. 23, solder interconnect fracture can be concluded as the most frequently occurring dominant mode of failure. Fig. 20 shows the de-correlated feature space for fault-mode classification. It is seen that the maximum concentration of KL coefficients is in solder interconnect missing and solder interconnect cracking regions of de-correlated feature space. This indicates that solder fracture remains the most dominant

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TABLE II SPCA C ALCULATION FOR S IMULATION V ERSUS S IMULATION C ASES . (a) T EST V EHICLE A. (b) T EST V EHICLE B (a)

Interconnect fracture Simulation One

Two

Three

Four

Chip cracking

Healthy

1

0.79

0.78

0.79

0.79

0.42

0.38

One

0

1

0.80

0.79

0.79

0.41

0.33

Two

0

0

1

0.78

0.76

0.43

0.34

Three

0

0

0

1

0.79

0.42

0.42

Four

0

Diagonal Matrix matrix 0 0 Cut offlevelcutoff Level90% 90%

0

1

0.43

0.41

Interconnect fracture

Healthy

Chip delamination

Chip cracking

0

0

0

0

0

1

0.39

Chip delamination

0

0

0

0

0

0

1

(b) Interconnect fracture

Interconnect fracture

Simulation Healthy

One

Two

Three

Four

Chip cracking

Healthy

1

0.39

0.38

0.39

0.38

0.38

0.36

0.41

One

0

1

0.78

0.78

0.78

0.77

0.78

0.37

Two

0

0

1

0.78

0.79

0.79

0.79

0.36

Three

0

0

0

1

0.78

0.78

0.79

0.37

Four

0

0

0

0

1

0.81

0.78

0.37

Chip cracking

0

0

0 0 Diagonal matrix

0

1

0.78

0.36

Chip delamination

0

0

cutoff0level 90%0

0

0

1

0.36

Package fall-off

0

0

0

0

0

1

0

failure mode in drop and shock of electronic packages. In a practical scenario, multiple failure modes can occur in the test vehicle due to repetitive loading caused by drop events. It is seen that Fig. 20 has KL coefficients present in chip delamination and chip fracture region of the de-correlated feature space. Hence, possibility of chip delamination and chip fracture is not ruled out in test vehicle B. This shows the effectiveness of the technique in classifying, even the initiation and progression of different considered dominant modes of failure from the JTFA feature space. VIII. C ONCLUSION An approach for fault-mode classification has been developed for electronics subjected to mechanical shock and vibration. A comprehensive data set was created based on

0

Chip delamination

Package fall-off

feature vectors obtained from JTFA of experimental and simulation-based transient strain histories. The KLT has been used for feature reduction and de-correlation of the input feature vectors for fault-mode classification. MD classifier and principal component similarity factors were used to statistically quantify the classification of the resulting feature space. Statistical pattern recognition technique was used to track damage initiation and progression in the pre-failure feature space. The presented approach enables the identification of regions and dominant progression directions of different failure modes in the de-correlated pre-failure feature space. The feature space obtained by JTFA approach was developed using Cohen’s class of time-frequency analysis, i.e., RID. Explicit finite element methods have been used to simulate the drop phenomenon. Simulation transient strain histories were

LALL et al.: ANOMALY DETECTION AND CLASSIFICATION FOR PHM OF ELECTRONICS

1915

TABLE III SPCA C ALCULATION FOR E XPERIMENT V ERSUS E XPERIMENT C ASES . (a) T EST V EHICLE A. (b) T EST V EHICLE B (a)

Interconnect fracture Simulation One

Two

Three

Four

Chip cracking

Healthy

1

0.79

0.78

0.79

0.79

0.42

0.38

One

0

1

0.80

0.79

0.79

0.41

0.33

Two

0

0

1

0.78

0.76

0.43

0.34

Three

0

0

0

1

0.79

0.42

0.42

Four

0

Diagonal Matrix matrix 0 0 Cut cutoff offlevelLevel-90% 90%

0

1

0.43

0.41

Interconnect fracture

Healthy

Chip delamination

Chip cracking

0

0

0

0

0

1

0.39

Chip delamination

0

0

0

0

0

0

1

(b) Interconnect fracture

Interconnect fracture

Simulation Healthy

One

Two

Three

Four

Chip cracking

Healthy

1

0.39

0.38

0.39

0.38

0.38

0.36

0.41

One

0

1

0.78

0.78

0.78

0.77

0.78

0.37

Two

0

0

1

0.78

0.79

0.79

0.79

0.36

Three

0

0

0

1

0.78

0.78

0.79

0.37

Four

0

0

0

0

1

0.81

0.78

0.37

Chip Cracking

0

0

0 0 Diagonal matrix

0

1

0.78

0.36

Chip delamination

0

0

cutoff0level 90%0

0

0

1

0.36

Package fall-off

0

0

0

0

0

1

0

obtained by error seeding the failure mode in the simulation model. The simulations were error seeded exclusively with one failure mode. Correlation of simulation and experimental data sets has been validated using similarity factor. MD classifier and principal component similarity factor have been calculated between experimental and simulation data set to quantify the similarity between various failure modes and drop events. Superposition of the error-seeded simulation and experimental data sets in the de-correlated feature space has been used to identify different dominant failure modes. IX. D ISCUSSION The presented technique is intended for classification of failure modes in electronic architectures in the pre-failure space. It is envisioned that the presented technique will be

0

Chip delamination

Package fall-off

Fig. 25. Failure modes. (a) Resin crack. (b) Solder-copper pad on PCB-side.

integrated for on-board Prognostic Health Management (PHM) in future electronic architectures. One such implementation can include an actuator, such as a vibrator motor similar to that used in mobile phones to create a low-level vibration in

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IEEE TRANSACTIONS ON COMPONENTS, PACKAGING AND MANUFACTURING TECHNOLOGY, VOL. 2, NO. 11, NOVEMBER 2012

TABLE IV SPCA C ALCULATION FOR E XPERIMENT V ERSUS S IMULATION C ASES (C UT OF L EVEL -90%). (a) T EST V EHICLE A. (b) T EST V EHICLE B

(a)

Interconnect fracture Simulation Experiment

Healthy

One

Two

Three

Four

Chip cracking

Chip delamination

1

0.912

0.793

0.796

0.796

0.795

0.790

0.745

5

0.795

0.794

0.795

0.796

0.794

0.793

0.756

10

0.793

0.790

0.793

0.791

0.793

0.789

0.779

15

0.793

0.795

0.790

0.793

0.791

0.793

0.784

Chip delamination

Package fall-off

(b) Interconnect fracture Simulation Healthy

One

Two

Three

Four

Chip cracking

1

0.91

0.76

0.73

0.69

0.71

0.66

0.73

0.48

10

0.81

0.80

0.78

0.74

0.71

0.69

0.62

0.44

20

0.76

0.72

0.75

0.77

0.77

0.67

0.65

0.51

30

0.79

0.67

0.75

0.73

0.75

0.63

0.68

0.43

40

0.71

0.69

0.71

0.79

0.72

0.71

0.70

0.41

44

0.74

0.63

0.73

0.79

0.76

0.74

0.66

0.47

Experiment

Substrate Copper A

B

D

E

C

PCB Fig. 26. Failure modes. (a) Resin crack. (b) Solder-copper pad on PCB-side. (c) Solder-copper pad on package-side. (d) Copper trace failure.

the electronic assembly. The response of the assembly in the form of strain can be measured by on-board sensors, such as integrated strain gages strategically placed at various locations on the printed circuit assembly. The presented framework can be used to develop a training set for the healthy assembly at the time of deployment of the electronic assembly. The training set can be developed using the procedures presented in this paper. Feature vectors will be developed from the measured strain obtained from strain sensors. This training set for the

healthy electronic assembly can be used for identification of onset of damage and of damage progression. This can be done by development of feature vectors for the assembly, which are computed periodically from the measured strain. In each case, the feature vectors will be plotted in the de-correlated feature space. Migration of the feature vector in the de-correlated feature space will be used to identify the onset of damage initiation. The location of the migrated feature vector can be used to classify the failure modes, which exist in the electronic assembly. The presented technique can be integrated into fully-functional assemblies without any requirement for daisy-chained packages for the identification of failure. The ability of to preempt impending failure is important in high reliability applications. The presented framework does not require offline implementation and can be implemented on-board. R EFERENCES [1] I. Hamzaoglu and J. H. Patel, “Reduced testing application for built-in-self-test pattern generators,” in Proc. 18th IEEE VLSI Test Symp., Montreal, QC, Canada, Apr.–May 2000, pp. 369–375. [2] N. Anderson and R. Wilcoxon, “Framework for prognostics of electronic systems,” in Proc. Int. Military Aerosp. Avion. COTS Conf., Seattle, WA, Aug. 2004, pp. 1–29.

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IEEE TRANSACTIONS ON COMPONENTS, PACKAGING AND MANUFACTURING TECHNOLOGY, VOL. 2, NO. 11, NOVEMBER 2012

Pradeep Lall (S’90–M’93–SM’08–F’12) received the B.E. degree from the Delhi College of Engineering, New Delhi, India, and the M.S. and Ph.D. degrees from the University of Maryland, College Park, in 1988, 1989 and 1993, respectively, all in mechanical engineering, and the M.B.A. degree from the Kellogg School of Management, Northwestern University, Evanston, IL, in 2002. He was with Motorola’s Wireless Technology Center. He is the Thomas Walter Professor with the Department of Mechanical Engineering, and the Director of the NSF Center for Advanced Vehicle and Extreme Environment Electronics, Auburn University, Auburn, AL. He has ten years of industrial experience. He has a Six-Sigma Black-Belt in Statistics. He is the author and co-author of two books, 13 book chapters, and more than 300 journal and conference papers on electronic packaging with emphasis on design, modeling, and predictive techniques. He holds three U.S. patents. Dr. Lall was a recipient of the Samuel Ginn College of Engineering Senior Faculty Research Award, three Motorola Outstanding Innovation Awards, five Motorola Engineering Awards, and four Publication Awards. He is a fellow of the ASME, and a member of the National Academies Committee on Electronic Vehicle Controls and Unintended Acceleration, the Beta Gamma Sigma Honorary Society, and the IEEE Reliability Society Advisory Committee. He is the Chair of the ASME Congress Steering Committee. He was an Associate Editor of the ASME Journal of Electronic Packaging and the IEEE T RANSACTIONS ON R ELIABILITY. He is currently an Associate Editor of the IEEE T RANSACTIONS ON C OMPONENTS AND PACKAGING T ECHNOLOGIES and a Guest Editor of the Special Section on PHM of Electronic Systems in the IEEE T RANSACTIONS ON R ELIABILITY. He is the Founding Faculty Advisor of the SMTA Student Chapter at Auburn University and a member of the Editorial Advisory Board of SMTA Journal. He is a member of the SMTAI Conference Technical Committee.

Prashant Gupta received the B.E. degree in mechanical engineering from Bharati Vidyapeeth, New Delhi, India, in 2005. He is currently pursuing the Ph.D. degree in mechanical engineering with the NSF Center for Advanced Vehicle and Extreme Environment Electronics, Auburn University, Auburn, AL. He is a Graduate Research Assistant, engaged in research under the guidance of Prof. P. Lall. His current research interests include health monitoring and prognostics of electronic assemblies in drop and shock environments.

Arjun Angral received the B.E. degree in mechanical engineering from Panjab University, Chandigarh, India, in 2008. He is currently pursuing the M.S. degree in mechanical engineering with the NSF Center for Advanced Vehicle and Extreme Environment Electronics, Auburn University, Auburn, AL. He is a Graduate Research Assistant engaged in research under the guidance of Prof. P. Lall. He was engaged in industrial projects with Philips India Ltd., and was an Intern with National Thermal Power Corp. and Bharat Heavy Electricals Ltd. His current research interests include package-on-package shock reliability, and prognostics of electronic assemblies in drop and shock environments.