Average current mode control of series-switching

IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 15, NO. 5, SEPTEMBER 2000

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Average Current Mode Control of Series-Switching Post-Regulators Used in Power Factor Correctors Pedro José Villegas, Member, IEEE, Javier Sebastián, Member, IEEE, Marta Hernando, Member, IEEE, Fernando Nuño, Member, IEEE, and Juan Angel Martínez, Member, IEEE

Abstract—The application of the average current mode control (ACMC) to a new type of very efficient post-regulators is studied in this paper. This post-regulator, called series-switching post-regulator (SSR), has recently been proposed to improve the dynamic response series-switching of power factor correctors (PFC). The post-regulator exhibits very high efficiency due to the fact that only a part of the total power undergoes a power conversion process. Using ACMC, the bandwidth of the post-regulator increases in relation to the one obtained when a conventional voltage-mode control (with or without feedforward) is used. As a result, the attenuation of the input voltage ripple (100–120 Hz) increases and, a lower bulk capacitor can be used to obtain a low voltage ripple at the output, which is extremely important when a battery is connected at the output. This is rather common in distributed power supply systems. Index Terms—Fast regulation of the output voltage, high-quality rectifiers, postregulators, power-factor correctors.

I. INTRODUCTION

T

HE USE of power factor correctors (PFCs) [1], [2] is the usual way to get a high power factor on off-line switching power supplies. When a PFC is made up of only one stage, the static output voltage is accurately regulated, whereas the output voltage usually exhibits poor dynamic regulation. This is due to the fact that a low-pass filter must be included in the output voltage feedback loop when the bulk capacitor used to remove the low-frequency ripple (100–120 Hz) is placed at the output [2]. To improve dynamic regulation and to decrease bulk capacitor size, a first option [see Figs. 1(a), and 2(b)] is to connect a second dc-to-dc converter in cascade with the first converter, with the bulk capacitor placed in between. These two stages in cascade involve a complicated power circuit which is an interesting option only in medium power applications (more than 1 kW). Some efforts to simplify the two-cascade-stage system [3]–[5] have been reported. They are based on the use of only one stage [see Fig. 1(b)] with a single transistor. Due to the fact that the power is handled twice by the stage, the transistor current and voltage stress is extremely high and, therefore, converter efficiency is relatively low. However, this type of option can be of interest in the lowest power range (up to 100 W) if

Manuscript received June 24, 1998; revised December 21, 1999. This work was supported by the CICYT (Project TIC97-0936). Recommended by Associate Editor F. D. Tan. The authors are with the Departamento de Engineering Eléctrica, Electrónica, de Computadores y Sistemas, Universidad de Oviedo, Gijón E-33204, Spain (e-mail: [email protected]). Publisher Item Identifier S 0885-8993(00)07316-6.

the objective is converter price instead of its efficiency. In [6] another one-stage option is presented in which a four transistor topology handles the power. In this topology, the power recycled (which undergoes two power conversion processes) is typically about 60% of the full derived power [see Fig. 1(c)]. Other topologies [7] with several switches (four of five, some of them with high voltage stress) are based on two stages in which the first stage handles the total input power, whereas the second one only handles 32% of the input power [see Fig. 1(d)]. As a result, only 32% of the input power needs to be processed twice. These topologies are called parallel power factor correctors (PPFCs). Other types of PPFCs with only one power stage which processes both input power and the extra 32% power have also been developed [8] [Fig. 1(e)]. Good efficiency is achieved in this case, but the topology is very complex and the control unit in this case and in the former is not standard. An alternative method to reduce the bulk capacitor size and to improve the dynamic response of PFCs with almost no efficiency penalty has been recently proposed, [9]–[11]. This method is based on the use of a highly efficient post-regulator [9], called “Two Input Buck (TIBuck) post-regulator.” In this case [see Fig. 1(f)], the first stage is a two-output PFC which supplies two “badly-regulated” (from the dynamic point of view) outputs instead of one, both at relatively close voltages, and . The proposed post-regulator is connected at the outputs of this two-output main PFC and, therefore, it is a two-input dc-to-dc post-regulator. In this post-regulator, a considerable fraction of the input power (typically 85–90%) comes up to the load with no power processing [9]–[11], that is, with efficiency of 1, whereas the remaining power undergoes a power processing based on a Buck topology, wich means a typical efficiency of 80–95%. As a result, the overall efficiency of the post-regulator is very high (typically 97–99%) and, therefore, the complete first-stage post-regulator efficiency is very near to that of the first stage. However, this solution exhibits two main disadvantages. 1 ) The first stage must be a two-output PFC. 2 ) When a short circuit occurs, the energy stored in the bulk capacitor causes a peak current higher-voltage which circulates through the TIBuck’s transistor. Recently [14], [18], a new type of high efficiency post-regulator has been presented. This new post-regulator is called a Series-Switching post-regulator (SSR). As in the case of the TIBuck post-regulator, a considerable fraction of the input power (typically 85–90%) comes up to the load with no power processing (efficiency 1), whereas the remaining power undergoes power processing based on a dc-to-dc converter with

0885–8993/00$10.00 © 2000 IEEE

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Fig. 2. Using the series-switching post-regulator in distributed power supply systems: (a) standard one-stage PFC, (b) two-stage PFC in cascade, and (c) two-stage PFC and SSR.

Fig. 1. Different options to improve both dynamic response and bulk capacitor size in PFP: (a) two stages in cascade, (b) solutions reported in [3]–[5], (c) solution reported in [6], (d) solution reported in [7] (PPFC), (e) solution reported in [8] (PPFP, as well), and (f) solution proposed in [9].

transformer (a Forward converter, for example) and, therefore, with a typical efficiency of 80–90%. As a result, the overall efficiency of the post-regulator being very high (typically 97–98%), the complete first-stage post-regulator efficiency is very near to that of the first stage. Moreover, the proposed

post-regulator overcomes the above mentioned disadvantages of the TiBuck post regulator because only one input and only one bulk capacitor are needed, and the short-circuit peak current can be diverted in such a way that it passes through a low-frequency diode instead of any semiconductor of the topology. Although the SSR [14], [18] can be used with any PFC, as must be larger than the input the output of the total system voltage at the post-regulator , it is a very attractive solution to be used in distributed power supply with a 48 V battery connected at the output of a PFC (Fig. 2). As in the case of the TiBuck post-regulator, the average current mode control (ACMC) can be applied to control the proposed converter. This control method is studied in this paper. Using this type of control, audio-susceptibility of the post-regulator is improved in relation to that which is obtained when a conventional voltage-mode control (with or without feedforward) is used. As a result, the attenuation of the input voltage ripple (100–120 Hz) increases and, therefore, a lower bulk capacitor can be used to obtain a very low voltage ripple at the output, which is of great important when a battery is connected there. This is very common in distributed power supply systems. Finally, the proposed structure ( main PFC series-switching post-regulator) provides a good trade-off between dynamic behaviors (such as small bulk capacitor and fast response when the load changes), efficiency, cost, and size. II. SERIES-SWITCHING POST-REGULATOR Fig. 3(a) shows a series-switching post-regulator (the post-regulator proposed in this paper) connected at the output of a standard one-stage PFC. In this circuit, the total first-stage

VILLEGAS et al. AVERAGE CURRENT MODE CONTROL OF SERIES-SWITCHING POST-REGULATORS

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Fig. 5. Implementation of the series-switching post-regulator based on a forward dc-to-dc converter.

Fig. 3. Proposed series-switching post-regulator: (a) main idea and (b) power processing.

Fig. 6.

Fig. 4. Relationship between v , v

an v

ACMC in a serial-switching post-regulator.

in a Series-Switching post-regulator, especially if current-mode control is implemented.

.

output power is divided into two parts [see Fig. 3(b)]. , which undergoes a conversion with effi1) ciency . which does not undergo power processing. 2) The total output power at the output of the Series-Switching , where post-regulator is is the output power of the converter used in the Series-Switching post-regulator, which is the only power that undergoes a conversion. Overall post-regulator efficiency can be easily computed from and the quotient as follows:

III. AVERAGE CURRENT MODE CONTROL APPLIED TO THE SERIES-SWITCHED POST-REGULATOR Fig. 6 shows the basic diagram for a the series-switching postregulator with ACMC. In order to obtain a small-signal model of this converter, the same process as the one explained in [15], [16] will be followed in this section. Thus, the average value of the input voltage of the output LC filter, , will be (2) where (3)

(1)

This equation can be perturbed as follows: (4)

Therefore, the conditions to achieve high efficiency in the should be as high as possible and total post-regulator are that should be as low as possible. However, the choice of that must be made bearing in mind that must be constant changes. Fig. 4 shows how , and must when ). be related (always Fig. 5 shows a Series-Switching post-regulator based on a Forward converter. Although any other isolated ( with a transformer) dc-to-dc converter can also be used for this purpose, Buck-derived converters (Forward, Push–pull, Half-Bridge, etc.) exhibit excellent features to be used as dc-to-dc converter

where quantities with hats are the perturbed ones, whereas quantities in capitals are their steady-state values. From this equation, the main transfer functions of this converter can be found, as will be analyzed in the following sub-sections. A. Output Voltage to Control Voltage Transfer Function In this case, the input voltage is assumed to be constant . Therefore, (6) becomes (5)

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Fig. 8. Bode plot of

Fig. 7.

Equivalent circuit for a converter with ACMC.

The perturbed value of the current passing through the inductor (and, therefore, injected into the RC output cell) is (6) is the input impedance of the LC output filter. The where perturbed duty cycle can be expressed as a function of the at the input of the PWM comparator as perturbed voltage follows:

G

.

TIBuck [13] converters. The only difference is the value of expressed by (11), where the input voltage of the Buck converter , a fraction of input voltage (as in the is replaced by case of the TIBuck converter [13]). Moreover, the zero of will usually be set at , as in the case of a buck converter, [17]. Similarly, the transfer function between the output voltage and the control voltage , , has another pole at RC ) due to the output RC cell and, therefore, the Bode plot given in Fig. 8 and the condition for setting the crossover (that is, ) is also valid here. The final frequency is expression for (12)

(7) is the oscillator ramp peak-to-peak voltage. From where (Fig. 7) can be easily (2)–(7), the transfer function obtained (8)

where

The inductor current downslope

for a SSR is given by (13)

The criterion of the amplified inductor current downslope at one input of the PWM comparator being lower than the oscilator ramp slope at the other comparator input, becomes

is given by (14) (9)

and of the LC output filter [15] An adequate design of by . This is because can allows us to approach equals be approached by its inductive component when (at least in standard designs). At such frequencies, is usually designed as a constant value . At lower frequenincreases ( has a pole at the origin and a zero at cies, near the above mentioned frequency), decreases (at . As a least while it is inductive) and, therefore, and and do not affect result, at these frequencies. Therefore, (8) and (9) lead to (10)

(11) Therefore, with a pole at

can be approached by a first order function , as in the case of Buck and

From (13), from the value of output voltage, [13], and from the value of the crossover frequency , the relationship between and can be easily obtained (15) and in this case is Therefore, the relationship between the same as in the Buck and TIBuck [13] converters. B. Transfer Functions Between Input Voltage and Output Voltage To calculate this transfer function, only input voltage will will be be directly perturbed, whereas the control voltage . However, duty cycle will also mantained constant be perturbed (although indirectly) due to the current feedback will be expressed as a function of as loop. Thus, voltage follows: (16)


Fig. 9. Transfer functions

G

and

G

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plotted together. Fig. 12.

Prototype of a serial-switching Post-regulator.

Fig. 13.

Transfer function

Fig. 10. Block diagram of a serial-switching post-regulator with ACMC. (a) Basic diagram. (b) Diagram after moving the output RC cell before the summing junction.

Fig. 11.

Transfer function

G

Gi.

transfer functions between output voltage will be voltage

with VMC and ACMC.

and input

From (4), (6), (7), and (16), the transfer functions between the current and the input voltages can be easily calculated (19)

(17)

These transfer functions have a zero at the origin, a pole at (both from the pole and zero, respectively), and two and (at the same frequency as ). Fig. 9 shows poles at and plotted together.

As in the case of (10), (17) can be approached as follows: (18)

C. Block Diagram . Therefore, these functions have a pole at , become At frequencies below and, from (9), it can be easily deduced . Due to that they have a zero at the origin and a pole at decrease when frequency decreases, this fact, both achieving very good immunity at low frequency. Finally, the

Fig. 10(a) shows the basic block diagram of the small signal model of a Serial-Switching post-regulator with ACMC. It should be noted that the current loop has been included in the model developed and, therefore, only the voltage feedback loop appears in this figure. By moving the position of the RC output cell before the summing junction, the block diagram shown in Fig. 10(b) can be easily obtained.

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Fig. 16.

Efficiency in the series-switching post-regulator.

back loop open, better natural immunity to input voltage variations is achieved using ACMC, as Fig. 11 shows. V. EXPERIMENTAL RESULTS Fig. 14.

Transfer function K G

(K =

026 7 dB).

The ACMC has been applied to a prototype of the SeriesSwitched post-regulator, Fig. 12. Several experimental and theoretical transfer functions are shown in Figs. 13 and 14. The voltage ripple at the input and the output of the post-regulator is given in Fig. 15(a), where it can be seen that an attenuation of 50 dB has been achieved. Fig. 14(b) shows the output voltage ripple when the VMC wit Feedforward is applied to a prototype, Fig. 11, of the series-Switching post-regulator. The attenuation obtained in this case is eight times lower that of the ACMC, Fig. 14(a). Fig. 16 shows the post-regulator efficiency.

:

VI. CONCLUSIONS

Fig. 15. Voltage ripple waveforms with (a) ACMC and (b) VMC and feedforward.

IV. COMPARING OPEN-LOOP TRANSFER FUNCTIONS BETWEEN INPUT AND OUTPUT VOLTAGES WITH VOLTAGE MODE CONTROL AND AVERAGE CURRENT MODE CONTROL The transfer functions between input and output voltages using voltage mode control (VMC) have been studied in [14]

(20)

Comparing these transfer functions with the ones obtained with ACMC, (20), it can be easily deduced that, with the feed-

The study of the ACMC applied to the TIBuck post-regulator between the current conshows that the transfer function has the same poles trol voltage and the output voltage as the Buck and TIBuck converters (two poles). The lower frequency pole is placed at the same frequency in all three converters, whereas the frequency where the other pole is placed (Buck) for can be computed by changing the input voltage (SSR) in the definition of a fraction of input voltage , (9) and (11). Moreover, maximum crossover frequency in the Buck, TIBuck, and series-switching post-regulator conby the same verters can be related to switching frequency expression, (15). The influence of the variations of the input voltage on the output voltage has also been studied. This study shows that ACMC exhibits better behavior than VMC when the voltage feedback loop is open and, therefore, ACMC is “naturally” more immune than VMC to input voltage variations. In summary, the use of the ACMC applied to the SeriesSwitching post-regulator allows an improvement of the audiosusceptibility of this post-regulator and, therefore, an important increase in the attenuation of the 100–200 Hz voltage ripple at the output. This attenuation permits a reduction in the size of the bulk capacitor and a low output voltage ripple is also obtained. The results obtained show that the same voltage ripple at the output can be obtained either with this post-regulator with ACMC [Fig. 2(c)], or with VMC and Feedforward with a bulk capacitor eight times larger than the one used in the previous case [Fig. 2(c)], or without the post-regulator and with a bulk


capacitor 260 times larger than the one used in the first case [Fig. 2(a)]. REFERENCES [1] R. J. Kocker and R. L. Steigerwald, “An dc-to-dc converter with high quality input waveforms,” IEEE Trans. Ind. Applicat., vol. IA-19, pp. 586–599, July/Aug. 1983. [2] L. H. Dixon, “High power factor preregulators for off-line power supplies,” in Proc. Unitrode Power Supply Design Sem., 1988, pp. 6.1–6.16. [3] I. Takahashi and R. Y. Igarashi, “A switching power supply of 99% Power factor by the dither rectifier,” in Proc. Int. Telecommun. Energy Conf., 1991, pp. 714–719. [4] M. Madigan, R. Erickson, and E. Ismail, “Integrated high quality rectifier-regulators,” in Proc. IEEE PESC’92, 1992, pp. 1043–1051. [5] R. Redl, L. Balogh, and N. Sokal, “A new family of single-stage isolated power-factor correctors with fast regulation of the output voltage,” Proc. IEEE PESC’94, pp. 1137–1144, 1994. [6] M. H. Kheraluwala, R. L. Steigerwald, and R. Gurumoorthy, “A fastresponse high power factor converter with a single power stage,” Proc. IEEE PESC’91, pp. 769–779, 1991. [7] Y. Jiang, F. C. Lee, G. Hua, and W. Tang, “A novel single-phase power factor correction scheme,” Proc. IEEE APEC’93, pp. 287–292, 1993. [8] Y. Jiang and F. C. Lee, “Single-stage single-phase parallel power factor correction scheme,” IEEE PESC’94, pp. 1145–1151, 1994. [9] J. Sebastián, P. Villegas, F. Nuño, and M. M. Hernando, “Very efficient two-input dc-to-dc switching post-regulators,” IEEE PESC’96, pp. 874–880, 1996. [10] J. Sebastián, P. Villegas, F. Nuño, O. García, and J. Arau, “Improving dynamic response of power factor preregulators by using two-input highefficient post-regulators,” IEEE PESC’96, pp. 1818–1824, 1996. [11] J. Sebastian, P. J. Villegas, M. M. Hernando, and S. Ollero, “High quality flyback power factor corrector based on a two-input buck post-regulator,” Proc. IEEE APEC‘97, pp. 288–294, 1997. [12] J. Sebatián, P. Villegas, F. Nuño, M. M. Hernando, E. Olías, and J. Arau, “ study of the two-input dc-to-dc switching post-regulators,” in Proc. IEEE CIEP’96, 1996, pp. 35–45. [13] P. J. Villegas, J. Sebastian, M. M. Hernando, and F. Nuño, “Average current mode control of two-input buck post-regulator used in power factor correctors,” Proc. IEEE PESC‘97, pp. 89–95, 1997. [14] J. Sebastian, P. J. Villegas, M. M. Hernando, and S. Ollero, “Improving dynamic response of power factor correctors by using series-switching post-regulator,” Proc. IEEE APEC‘98, pp. 441–446, 1998. [15] D. O’Sulivan, H. Spruijt, and A. Crausaz, “Pulse-width-modulation (PWM) conductance control,” IEEE PESC’88, ESA J., vol. 13, pp. 33–46, 1989. [16] L. H. Dixon, “Average current mode control of switching power supplies,” in Proc. Unitrode Power Supply Design Sem., 1988, pp. 5.1–5.14. [17] L. H. Dixon, “Switching power supply control loop design,” in Proc. Unitrode Power Supply Design Sem., 1991, pp. 7.1–7, 10. [18] M. Hernando, J. Sebastián, P. J. Villegas, and S. Ollero, “Improving dynamic response of power-factor correctors by using series-switching postregulator,” IEEE Trans. Ind. Electron., vol. 46, pp. 563–568, June 1999.

Pedro José Villegas (M’96) was born in Suances, Spain, in 1965. He received the M.Sc. degree in electrical engineering from the University of Oviedo, Gijón, Spain, in 1991. Since 1994, he has been an Assistant Professor at the University of Oviedo. His research interests are switching-mode power supplies, converter modeling, and high power factor rectifiers.

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Javier Sebastián (M’88) was born in Madrid, Spain, in 1958. He received the M.Sc. degree from the Polytechnical University of Madrid, Madrid, Spain, in 1981 and the Ph.D. degree from the University of Oviedo, Gijón, Spain, in 1985. He was an Assistant Professor at the Polytechnical University of Madrid in 1982, the University of Oviedo from 1983 to 1986, an Associate Professor at Oviedo University from 1987 to 1989, and at the Polytechnical University of Madrid from 1990 to 1992. Since 1992, he has been with the University of Oviedo, where he is currently a Professor. His research interests are switching-mode power supplies, resonant power conversion, converter modeling, and high power factor rectifiers.

Marta Hernando (M’95) was born in Gijón, Spain, in 1964. She received M.Sc. and Ph.D. degrees in electrical engineering from the University of Oviedo, Gijón, Spain, in 1988 and 1992, respectively. She is currently an Associate Professor of at the University of Oviedo. Her main interests are switching-mode power supplies, high power factor rectifiers, and ac and dc motor drives.

Fernando Nu˜o (M’95) was born in Pola de Siero, Spain, in 1963. He received the M.Sc. and Ph.D. degrees in electrical engineering from the University of Oviedo, Gijón, Spain, in 1988 and 1991, respectively. From 1988 to 1993, he was an Assistant Professor at the University of Oviedo. Since May 1993, he has been Associate Professor at the University of Oviedo. His research interests are switching-mode power supplies, resonant power conversion, modeling of magnetic devices, and high power factor rectifiers.

Juan Angel Martínez (M’94) was born in Gijón, Spain, in 1962. He received the M.Sc. and Ph.D. degrees from the University of Oviedo, Gijón, in 1987 and 1991, respectively. He was an Assistant Professor at the University of Oviedo from 1987 to 1991. Since 1991, he has been an Associate Professor at the University of Oviedo. His reseach interests are switching-mode power supplies and high-power-factor rectifiers.