Building on Spacer-Defined Double Patterning Processes

M.Sc Student Project

Building on Spacer-Defined Double Patterning Processes Atomic layer deposition (ALD) is a deposition technique that allows for precise deposition of thin films, with excellent conformality and uniformity. Use of energy-enhanced ALD methods allows for depositions at relatively low temperatures (even room temperature!). Many components in modern mircocircuitry, such as DRAM or NAND flash, require dense repeating nanostructures, which need to get smaller as devices shrink. Spacer-defined double patterning (SDDP) is a method by which such structures can be deposited (Fig.1), and energy-enhanced ALD allows for direct application of the spacer material onto the temperature-sensitive polymer (photo)resist (known as direct SDDP). Direct SDDP is still in its infancy and needs to be optimised before it becomes viable for high-volume manufacturing.

Figure 1. Summary of the direct SDDP process steps.

Objective and research questions:  Can TiO2 be used as a spacer?  Can the patterning and resist removal steps be optimised?  Can we obtain even closer/smaller features with quadruple patterning?

Figure 2. SEM image of SiO2 spacers ~250 nm high (R. Roelofs).

Project description: The first months you will gain experience using ALD using ozone and plasmaassisted ALD, in addition to the reactive ion etch apparatus and ion milling. You will also gain experience of electron-beam (e-beam) lithography for resist patterning, scanning electron microscopy (SEM) and spectroscopic ellipsometry (SE). Once familiar with the techniques you will design and deposit patterned resists and carry out a full direct SDDP process. Optimisation of the e-beam step and resist removal will be required. TiO2 as an alternative spacer material will also be investigated. Within the first weeks and months it will also be necessary for you to carry out a literature study, with guidance from your supervisors, in order to strengthen your background on the subject(s) relating to the project. If the direct SDDP process is successful, then quadruple patterning can be considered. A more detailed project description can be found on pages 2-4. Your profile: We are looking for a student with an interest and ability in handling and testing equipment, and conducting experimental work. Location and supervision: You will work in the Plasma & Materials Processing group (PMP), lead by Prof.dr.ir. Erwin Kessels, located in the TNO building (3rd floor, offices) and in Spectrum (labs). You will be supervised by Dr. Stephen Potts. Key articles:  R. Roelofs, Energy-Enhanced ALD for Nano-manufacturing by Direct Spacer-Defined Double Patterning (D-SDDP), Masters Thesis, Eindhoven University of Technology (2012).  H. Wong and H. Iwai, On the scaling issues and high-k replacement of ultrathin gate dielectrics for nanoscale MOS transistors, Microelectron. Eng., 83, 1867 (2006).  S. E. Thompson and S. Parthasarathy, Moore's law: the future of Si microelectronics, Mater. Today, 9, 20 (2006).  Anon., Lithography, International Technology Roadmap for Semiconductors, 2011 Edition, http://www.itrs.net/Links/2011ITRS/2011Chapters/2011Lithography.pdf (2011).

Interested? For further information, see pages 2-4 and/or contact Dr. Stephen Potts: [email protected] (TNO 3.224) Prof.dr.ir. Erwin Kessels: [email protected] 1

Building on Spacer-Defined Double Patterning Processes As the demand for smaller or more powerful electronic items increases, the size of the circuit components (transistors, capacitors etc.) must decrease.1,2 This decrease either allows for smaller integrated circuits (ICs) or more components to be fitted in a defined space, thereby providing more (e.g. computing) power. Current IC applications, such as dynamic random-access memory (DRAM) and logic devices such as NAND flash, require repeating structures on the nanoscale. If devices are to get smaller or more densely packed, such structures need to be closer together; however, the current dimensional resolution limits of lithography (~50 nm) are being reached,3 therefore alternative methodologies need to be employed to obtain the required dimensions (down to 15 nm). One such method is spacer-defined double patterning (SDDP). This project will cover the fabrication of repeating nanostructures by SDDP, and continue the work started on the topic within PMP. SDDP enables the formation of close, repeating nano-“ridges” that are closer than current lithographic techniques alone provide. Traditional SDDP requires the deposition of a mask material in order to form the pattern before the spacer material is deposited; however, the number of steps can be reduced if we use direct-SDDP, where a photoresist is patterned with a light mask and then the spacer can be deposited directly onto it by low-temperature ALD, thereby reducing the number of processing steps. The steps required for direct-SDDP are:4

(a) Deposition of a layer of (photo)resist onto a silicon substrate, then form a pattern in the resist with electron-beam (e-beam) lithography. The photoresist is then developed to give the pattern. So far, we have been investigating poly(methyl methacrylate) (PMMA) as the resist material and etching with an electron-beam. (b) Deposit a spacer layer onto the resist using energy-enhanced ALD. Energy-enhanced ALD means that ozone or a plasma is used as part of the ALD cycle. (c) Perform an anisotropic etch to remove the tops of the features, using reactive ion etching (RIE) or ion milling (IM). (d) Remove the photoresist, either by a wet or plasma etch. (e) Anisotropically etch into the target layer (e.g. silicon). (f) Remove the spacer, leaving your patterned substrate. It works by depositing a conformal (usually metal oxide) layer onto a patterned photoresist structure. This needs to be carried out at relatively low temperatures as the resist material comprises organic polymer material, which is temperature-sensitive. Energy-enhanced atomic layer deposition (ALD) is an enabling technology for this, as ALD provides excellent conformality and, if energy-enhanced techniques are used, fair to good quality material can be deposited at temperatures down to room temperature.4,5 In practice, however, the (direct-)SDDP technique has many challenges associated with it: 1. Obtaining features perpendicular to the substrate with e-beam lithography. Control of the electron flux (i.e., the e-beam dose) during step (a) can lead to parallelogram-shaped features (side-on) in the resist instead of rectangles. This leads to tilted spacers after step (c). Optimising this step is challenging, especially as viewing the resulting pattern by SEM can change it further! 2. Removal of the resist. This takes place during step (d). [If you wanted to form tunnels, resist removal could also be implemented between steps (b) and (c).] The choice of etching technique is critical to the resulting effects on the structure. For example, wet etching with acetone can leave unwanted patches of resist in the structure, whereas using a plasma for an extended period of time can alter the spacer structure. Ways to solve this can involve trying different resist materials and investigating alternative etching methods. 3. Out-gassing is largely the cause of some of the challenges outlined in point 2, and is most often the result of the electron beam interacting the resist. Out-gassing is where gas trapped in the

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organic resist escapes on heating and builds up between the resist and the ALD layer. The builtup gas can then escape, taking a significant section of the ALD layer with it and ruining the structure. This could be reduced by vacuum-baking the resist beforehand to ensure any gas is removed, and/or depositing an ALD layer resistant to out-gassing by changing the ALD material. 4. Plasma-processing/SEM damage. As already alluded to above, the resist material is sensitive to not only temperature, but also plasmas and electron beams. Removal of the resist from the structure allows SEM images to be taken, but the effect of a plasma on resist materials needs to be carefully considered. In point 2, it was mentioned that plasma etches the resist, which can also happen if plasma-assisted ALD is used. It has been shown that the etch rate of the resist is temperature-dependent (happening more rapidly at higher temperatures). (However, the density of ALD materials also increases with increasing temperature, which can be considered beneficial.) Methods for reducing plasma damage include using an ozone-based ALD process or tailoring the plasma conditions to minimise the effect on the resist. Project Goals In this project, the aforementioned challenges will be addressed. You may choose to focus on a couple rather than all of them, on discussion with your supervisor and depending on how the experiments go.   

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Optimise the pattering of the resist (step a) using e-beam lithography, giving perpendicular features. Additionally, the e-beam step could be optimised for smaller features than 50 nm. Testing the etching rates of TiO2 spacer materials and compare them with current SiO2 and Al2O3 films. Optimising ALD films to cope with out-gassing from the resist, thereby reducing film blistering, either by o Employing higher ALD temperatures to ensure a denser, defect-free film that can cope with the pressure, or o Obtaining porous films that can still act as a spacer yet allow the gas to escape with no pressure buildup. Optimise the resist removal process (step d) to avoid damaging the spacers. Test alternative resist materials to PMMA, with a view to o Minimise the effects of out-gassing o Increasing the ease of resist removal. If time permits, attempt quadruple pattering (SDQP). This can be achieved with two ALD materials exhibiting two different etch rates. The first spacer is deposited, anisotropically etched and the resist removed, i.e., up to step (d) for SDDP. Then, a second ALD spacer layer, which has a lower etch rate than the first spacer, is deposited onto the original spacer structure. The original spacer (with the higher etch rate) is removed, leaving spacers with a much lower pitch than that achieved with SDDP. Investigating SDQP will involve: o Use of different ALD materials that exhibit different etching rates. o Use of the same ALD material but different precursors, which afford films with different etching rates (e.g., TMA vs DMAI6 for Al2O3). o Varying the plasma conditions and hence the film properties. Changing the film density will alter its etch rate.

Literature Study This can either be written as prose (which could eventually be used in the introduction of your thesis, for example) or as PowerPoint slides, which you can use for presenting. The review should cover (but not necessarily be limited to) the following:    

Atomic layer deposition at low deposition temperatures (≤150 °C). Reaction conditions specific to these temperatures, film properties compared with more conventional ALD temperatures. The concept of SDDP (in more detail than above). Current and potential applications (examples) of SDDP. The use of ALD in nanopatterning: coating high-aspect-ratio structures.

You will give a summary during a 9:30 am MoMo slot in about three weeks after the project begins.

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In the Lab Note: this may change as the project progresses.   

Gain knowledge and become accustomed to each step of the SDDP process. Analysis and characterisation of low-temperature ALD processes. The choice of material will dictate which reactor (FlexAL or OpAL) you use. Use of reactive ion etching (RIE) and/or ion milling (IM) to test the etch rate of films, and to perform the anisotropic etch stage. Note that some materials, such as Al2O3, are not permitted in the current RIE apparatus.

Equipment and Diagnostic Tools The following apparatus and diagnostics, amongst others, will be used throughout the project: 

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Oxford Instruments ALD reactors in the clean room: o OpAL, higher pressure open-load reactor with a remote inductively-coupled RF plasma source. o FlexAL, low pressure load-lock reactor with a remote inductively-coupled RF plasma source and ozone generator. E-beam lithography on the RAITH150-TWO tool for resist patterning. Anisotropic etching: o Ion beam etching (ion milling) on the Roth & Rau tool. o Oxford Instruments Reactive Ion Etching tool. Scanning electron microscopy (SEM) for imaging. Spectroscopic ellipsometry (SE),7 both in situ and ex situ to monitor film thickness and refractive index.

References A good starting point would be Robin Roelofs’s Master thesis “Energy-Enhanced ALD for Nanomanufacturing by Direct Spacer-Defined Double Patterning (D-SDDP)”, particularly the chapter on SDDP, in addition to the following references: 1. H. Wong and H. Iwai, On the scaling issues and high-k replacement of ultrathin gate dielectrics for nanoscale MOS transistors, Microelectron. Eng., 83, 1867 (2006). 2. S. E. Thompson and S. Parthasarathy, Moore's law: the future of Si microelectronics, Mater. Today, 9, 20 (2006). 3. Anon., Lithography, International Technology Roadmap for Semiconductors, 2011 Edition, http://www.itrs.net/Links/2011ITRS/2011Chapters/2011Lithography.pdf (2011). 4. H. B. Profijt, S. E. Potts, M. C. M. van de Sanden and W. M. M. Kessels, Plasma-Assisted Atomic Layer Deposition: Basics, Opportunities, and Challenges, J. Vac. Sci. Technol. A, 29, 050801 (2011). 5. S. E. Potts, W. Keuning, E. Langereis, G. Dingemans, M. C. M. van de Sanden and W. M. M. Kessels, Low Temperature Plasma-Enhanced Atomic Layer Deposition of Metal Oxide Thin Films, J. Electrochem. Soc., 157, P66 (2010). 6. S. E. Potts, G. Dingemans, C. Lachaud and W. M. M. Kessels, Plasma-enhanced and thermal ALD of Al2O3 using dimethylaluminum isopropoxide, [Al(CH3)2(µ-OiPr)]2, as an alternative aluminum precursor, J. Vac. Sci. Technol. A, 30, 021505 (2012). 7. E. Langereis, S. B. S. Heil, H. C. M. Knoops, W. Keuning, M. C. M. van de Sanden and W. M. M. Kessels, In situ spectroscopic ellipsometry as a versatile tool for studying atomic layer deposition, J. Phys. D: Appl. Phys., 42, 073001 (2009).

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