Design and Deployment of Reconfigurable Hardware using Web ...

Design and Deployment of Reconfigurable Hardware using Web Services Octavian Machidon1, Florin Sandu1, Mihail Chitic1, Petre Cotfas1, Daniel Cotfas1 1”

Transilvania”University, Department of Electronics and Computers – Brasov, Romania

Abstract— As the “Everything as a Service” paradigm is getting more and more popular today, a domain that can benefit from such an approach is digital system design. Integrating software tools and workflows together with target devices by the means of web services is a methodology that can raise the availability of hardware design experiences in the academic or industrial domains, reducing the space and cost requirements of developing and maintaining on-premise dedicated software and hardware resources. This work describes the design and implementation of a Web service-based digital system design and deployment platform with potential e-Learning and industrial applications. The platform integrates a JSP Webpage as a graphic user interface linked to a Java servlet, and a Web service performing the main processes involved in the design, simulation, implementation, deployment, testing and operation of a digital system.

This work describes the design and implementation of a Web service-based digital system design and deployment platform with potential e-Learning and industrial applications. This platform integrates a JSP Webpage as a graphic user interface linked to a Java servlet, and a Web service performing the main processes involved in the design, test and implementation of a digital system: • Design conversion from a high-level language (C) to HDL • HDL compilation and simulation • Design synthesis • Placement & routing • Deployment (“publishing”) on the actual target device

Keywords—Web services, hardware design, cloud computing, SoC, FPGA

I. INTRODUCTION Today’s efforts in digital design focus on the use of Hardware Description Languages (HDL) to describe the functionality of the circuit, and specialized EDA (Electronic Design Automation) software tools for the implementation of the circuit in a specific technology. One of the most attractive technologies for the implementation of digital embedded systems is the latest System-on-Chip architecture featuring an FPGA (Field Programmable Gate Array) and an embedded microprocessor integrated on the same die. The FPGA is an ideal platform for both commercial and educational applications due to its re-configurability, high flexibility and processing power. Thus, the synergy between an FPGA and an embedded processor allows for a versatile and powerful design and implementation of digital embedded systems that combine hardware (flexible and high-performance programmable logic) and software (processing system capabilities) resources.

Digital system designers and students are thus being offered a cloud-based Software-as-a-Service (SaaS) access to the EDA software tool-chain, without the need to install and manage these software tools locally. They also have the possibility to “publish” their systems online – being granted a Hardware-as-a-Service access to a variety of SoC and FPGA target boards.

The challenge arises when the system designer is faced with the multitude of hardware and software platforms for digital systems design, each with its own software tool suite, device drivers, and specifications. Managing such a variety of heterogeneous hardware devices and software design-flows on-site is a major issue, especially given the cost and hardware resources needed.

This paper is organized as follows: section II reviews previous work in the design and development of such remote hardware design platforms. Section III describes our platform’s architecture and implementation. Section IV presents the platform’s functionality and potential applications, and finally section V concludes the paper and proposes future extensions on this subject.

Fig. 1 Service-based hardware design platform organization

II. RELATED WORK This section reviews previous work in the development of hardware design platforms; the vast majority of such platforms have been developed as e-Learning resources. There have been many implementations of remote FPGA laboratories, and researchers in this area [1, 2] have highlighted the benefits of such remote laboratories like cost reduction, scalability and flexibility, easy inter-institutional sharing and improved learning results. Many such remote laboratories have a Windows Remote Access to a local PC connected to the lab equipment that also runs the dedicated software [3, 4, 5]. However such implementations allow limited software and hardware resource sharing, and reduce costs only partially since the users work on remote workstations that run the software tools. Other authors present a service-based approach to this subject [6], where the software tasks (design, simulation and implementation) of the digital designs are performed by both the user’s PC and the Web service. This leads to a better usage of hardware resources, but in the same time it requires high-performance machines on the user’s side. Of particular interest is the National Instruments (NI) idea of LabVIEW FPGA Compile Cloud Service, an add-on module to LabVIEW that offloads FPGA compilation tasks to dedicated cloud servers to reduce the development time of the VI (virtual instrumentation) [7]. Despite offering important assets, this service is limited to NI-specific FPGA targets. The service-based access to reconfigurable computing devices that we implemented in the work described in this paper has some important functional features highlighted by recent research [8]. These make XML-based Web Services ideal in reconfigurable computing applications: interoperability, multi-language and multi-platform support, and the possibility to “sell” such services on a pay-per-use basis in cloud computing “Hardware-as-a-Service” systems.

In our development of service-based middleware for reconfigurable hardware, we aimed at making the whole design and deployment work-flow available to the user by the means of services. Therefore, by using the services’ standard interface, the implementation offers high scalability and adaptability, and also eases access and use, since the user does not have to bother installing and using specific design and simulation tools, or acquiring target boards for “publishing” the resulting designs. The Web application and Web Service were implemented using Java technology and NetBeans IDE (Integrated Development Environment), running on a Glassfish 4.0 Server instance. A. Web application In order to expose the hardware design Web Service we have implemented a Web Application composed of JSP pages that act as the interface to the user, and a Java servlet, for processing the information on the JSP pages and communicating with the Web Service via SOAP (Simple Object Access Protocol). SOAP, a key feature of the web services that ensures their interoperability, is a wire protocol that can be layered upon other wire protocols such as HTTP. Thus, servlets and JSP technology are needed for building a framework for web services, since they can encapsulate page-based data and can operate with various Internet protocols [9]. 1) User interface – the JSP Webpage The Web Services are specifically managing data and processes of the application, and do not provide, by themselves, a graphic interface to the user. This interface was implemented using Java Server Pages (JSP).

III. ARCHITECTURE AND IMPLEMENTATION The actual trend towards “Everything as a Service” has important applications in the domain of distributed resources, given the fact that service-oriented architectures and Web Services solve the problem of inter-operability, thus heterogeneous technologies can be easy integrated.

Fig. 3 JSP Webpage - Hardware design platform main menu

Fig. 2 Hardware design platform overview

A JSP component is designed to play the role of a user interface for a Java web application. JSPs combine HTML, XML, and embedded Java code, actions and commands [10]. This is why we chose this solution for generating the dynamic web content needed for the web interface of our service-based platform.

The web application relies on HTTP to provide the clientserver communication over the Internet; however, it uses the specific features of JSP to provide the needed “behind-thescenes” functionality: the generation of dynamic content (variables used for populating the page with the specific information received from the Web service via the servlet). The hardware design platform main JSP page is illustrated in Fig. 3 above.

The Web service provides a flexible and simple solution for supporting these hardware design processes based on neutral Web technologies. By using such an approach, hardware design software tools and reconfigurable devices (as IaaS – Infrastructure as a Service) hosted by the Web service provider can be used on demand (the basic GET-POST model) by remote clients, reducing the cost of dedicated software and hardware. 1) C-to-Verilog

2) Java Servlet Java servlets are being considered key components of server-side Java development, acting as small extensions to the server that enhance its functionality; thus, servlets help extend and customize Java web or application server, adding extra flexibility and ease of use [11]. The servlet was implemented in order to extend the functionality of the web application by processing HTTP requests and responses to and from the JSP pages and by exchanging SOAP messages with the Web Service. The servlet request is composed of the user data from the JSP page (including uploaded files) which is afterwards encapsulated into a SOAP message to be sent to the Web Service for processing. The servlet response consists of data from the reply SOAP message received from the Web Service (containing implementation results, log files, waveforms, etc.). Thus, the servlet acts as an intermediate layer below the web services and above the JSP page. B. Web service The Web service can execute a complete design and implementation of the hardware system: from a high-level (C) or hardware description language (Verilog/HDL) to the bitstream deployed on an actual FPGA-based board. These service methods can be accessed by remote clients over the Internet using Web protocols like HTTP (the JSP webpage that acts like a user interface to the services) or XML and SOAP.

Despite the fact that hardware implementations provide an increase in speed and power-efficiency over traditional software implementations, there is also “the thick end of the stick” – the difficulties of writing and debugging complex “Register-Transfer Level” (RTL) code. For these considerations, we chose to offer an additional abstraction level over the RTL hardware design, by integrating in the work flow the open-source high-level synthesis (HLS) LegUp framework. It compiles a C program to a synthesizable Verilog implementation, thus combining the hardware’s performance and power usage benefits with the software’s ease-of-use [12]. This integration was implemented inside the WSConversion method of the Web Service, which receives as a parameter the C source file and executes on the server the conversion process. The LegUp software was installed on the server and the conversion was automated by using a Makefile that is parameterized by the Web service method. The resulting Verilog module is then sent inside the reply message to the Java servlet in order to be downloaded from the JSP page by the user. 2) Simulation Design simulation is a crucial stage in the development of any hardware project. We decided to include a simulation service in our platform since it is one of the most time and resource consuming tasks as it needs dedicated simulation software and resource-intensive computation. The WSSimulation method of the Web Service implements the simulation of the user’s design by taking as parameters the project name and an archive file containing all the project’s Verilog source files. The user needs to develop a proper test environment for the specific project which will be afterwards simulated on the server using Icarus Verilog simulation and synthesis tool (an open source Verilog compiler that supports the IEEE-1364 Verilog HDL).

Fig. 4 Web service method generic flow

The simulation environment and files are set up on the server using specific scripts that were developed for this purpose. The process has two steps: compilation of the Verilog modules and simulation of the DUT (device under test). The results of the simulation (log file and waveforms – if any) are returned by the Web Service to the Java servlet in order to be displayed on the JSP simulation result page. The user can afterwards inspect the logs and waveforms (in Value Change Dump – VCD format) on his/her PC to see how the simulation concluded (see Fig. 5 below).

UCF). All these are served as input parameters for the Web Service’s WSImplement method by the Java Servlet. This method runs the entire design compilation flow on the server (synthesis, map, place & route). The flow has been automated by developing Tcl (Tool Command Language) scripts that set up the environment and project files before executing the software tools according to the user’s specifications. Support for Xilinx ISE software has been implemented (versions 14.5 and 14.7) and the following targets: Avnet Zedboard (Xilinx Zynq 7020 AP SoC), Digilent Atlys (Xilinx Spartan-6 LX45 FPGA) and Spartan 3E Starter Board (Xilinx Spartan 3E FPGA) 4) Deployment We integrated in our service-based platform the access to reconfigurable devices (FPGA/SoC) because we have identified important benefits regarding reduction in the complexity of redesign and improved programmability [13] in the synergy between reconfigurable systems and distributed computing. By having a Web Service remote access to reconfigurable FPGA-based systems, the user can configure, upgrade or modify the embedded system from a remote location, without physical access to the hardware. Fig. 5 Simulation result page (up) displaying the simulation log and a link to the waveform and the downloaded simulation waveform displayed in GTKWave (down)

3) Implementation Implementing a HDL design into hardware is a major computational and engineering challenge. This is not a single procedure, but a flow of big and complex processes that finally produces the bitstream configuration file – the layout of the targeted FPGA chip with its millions of processing elements configured to implement the specific design.

This approach offers industrial applications the key benefit of field upgradeability, but also favors e-Learning since it makes high-end reconfigurable SoC platforms available to every student over the Internet, an important aspect given the inherent difficulties in granting each student physical access to such a device. In order to offer a versatile and powerful SoC platform for the deployment of hardware designs, the Avnet ZedBoard 7020 [14] with its Xilinx Zynq™-7000 AP (All Programmable) SoC XC7Z020 [15] was chosen. The system’s core, the XC7Z020 AP SoC, integrates a dual-core ARM® Cortex™-A9 MPCore™ based processing system (PS) and Xilinx programmable logic (PL) in a single device. We took advantage of this integration since it enhances the possibility of complete and partial re-configuration of the PL by the PS. The Zynq’s novel PCAP (Processor Configuration Access Port) allows for both full and partial runtime reconfiguration of the PL, which is an important improvement over the existing ICAP (Internal Configuration Access Port – a component that allowed only partial reconfiguration) [16]. The user makes a request on the JSP deployment page for a board to deploy his configuration file on, request that is sent to the WSDeployment method of the Web service. The service manages a network of Zedboards connected onto a LAN with the server by keeping track of the available and in-use boards, and chooses a vacant device to be configured with the user’s bitstream.

Fig. 6 Design implementation page

The JSP design implementation page lets the user select the project’s specific parameters (name, design tool version, target device) and upload the files packed into an archive (containing Verilog modules and the User Constraint File –

Each Zynq SoC runs on the PS a TFTP (Trivial File Transfer Protocol) and an Echo server for communicating with the web server. The bitstream is transferred via Ethernet to the chosen board and the PS executes a full reconfiguration of the PL with the respective configuration file.

The board’s IP address and configuration status are then sent as a reply message from the Web service to the JSP page in order to inform the user of the outcome. In the case that there are no available boards, or the configuration failed, corresponding messages are displayed. IV. PLATFROM FUNCTIONALITY AND APPLICATIONS The service-based platform offers the user all the design and verification instruments needed for developing an FPGA design: RTL simulation, a complete EDA design flow (synthesis, placement, routing and design closure), and a service for designing the system using a high level programming language (C) for those unfamiliar with HDL; all these instruments are available “in the cloud”, as services, and can be accessed by the user from any location, via a Web browser.

Fig. 7 Service-based design work flow

In Fig. 7 the platform’s work flow is displayed: each design service receives an input from the user, either a single file (C source code), or an archive containing multiple files (RTL test environment and RTL design files). These files, together with other project parameters and relevant information, are submitted by the user on the JSP web page interface specific to each service. The input data is then sent by the Java servlet to the Web Service running on a dedicated server, where the respective design processes are run. The results are displayed on the result JSP page with links to download the corresponding output files (Verilog source file, simulation waveforms, or bitstream configuration file). Besides these development services, the platform enables the user to deploy his design on a real target device, situated at a remote location, available through Web services. The user inputs a configuration file (bitstream) on the corresponding JSP page which is used by the Web Service to configure one of the available boards. In order to offer an extended functionality of the deployed design regarding the I/O data, we

developed an efficient management of the two specific data flows (the one for board configuration and the application specific flow). While the on-board Gigabit Ethernet adapter is being used for transferring the bitstream configuration file and can be shared with the application specific I/O data, however we chose to add an extra Ethernet interface to the boards by connecting to each one a Digilent PmodNIC100 peripheral module (featuring a Microchip ENC424J600 Stand-Alone Ethernet Controller). This configuration offers the advantage of separating the Ethernet port used for configuration and board management from the one dedicated to the user application. Consequently, the user has an “Internet-ready” board and by adding a TCP/IP Intellectual Property (IP) core to his design (there are free IP core solutions that include even a web server) he can communicate online and transfer data to and from his/her hardware application running on a board somewhere “in the cloud”. Web based distance learning has gained a lot of popularity recently, given the recent developments in Internet connectivity and systems integration technologies. A particular field that has the potential to benefit from our service-based hardware design platform is electrical engineering education, where the role of practical laboratory work is very important [17, 18]. Integrated into a web based learning environment, this platform could offer a hands-on experience by making devices and technologies remotelyavailable for multi-user practice, an invaluable asset in situations where cost/space constraints make real-life “handson” experiences unavailable. It would also bring along a series of benefits including cost reduction, scalable and flexible implementations, and easy sharing between academic or industrial partners [19]. V. CONCLUSIONS AND FUTURE WORK The service-oriented platform described in this paper manages to abstract away the complexity of designing, implementing and deploying digital designs using a multitude of complex hardware/software devices and tools. The Web-service based flow that we implemented addresses the issue of creating digital systems “in the cloud”, offering important assets with regard to efficient resource sharing of software tools and device boards via Web services among students and designers, and also on the interinstitutional level, as the platform could also be of use, for instance, to SME (Small or Medium Enterprises) that lack the technological or human infrastructure/expertise for such design and deployment tasks. The “Software-as-a-Service” part – design software services (compilation, simulation and hardware implementation) grant multiple-access to the services by managing the licenses and computational power needed, while the “Hardware-as-a-Service” component manages and serves the requests for the target boards ensuring a proper and efficient equipment-sharing by the means of a task management system.

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