Design, Operation, and Control of S3 Inverter for Single ... - IEEE Xplore

IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 62, NO. 9, SEPTEMBER 2015

5569

Design, Operation, and Control of S3 Inverter for Single-Phase Microgrid Applications B. Dastagiri Reddy, M. P. Selvan, Member, IEEE, and S. Moorthi, Member, IEEE

Abstract—A single-phase voltage source inverter with a front-end dc–dc conversion stage followed by a synchronized push–pull configuration operating at a desired fundamental frequency (FF) is presented. The duty cycle of the dc–dc conversion stage is varied in the form of a unidirectional sine wave to produce a similar output voltage across the dc-link capacitor. The unidirectional voltage is made into an alternating voltage by the synchronized push–pull configuration. This inverter employs three semiconductor switches, in which one is operating at a high frequency and the rest are operating at an FF. Hence, it is named as the S3 inverter. Furthermore, simple and cost-effective analog circuits are presented for the generation of switching pulses and the control of the amount of power fed to the grid. The hardware prototype of the S3 inverter has been built in a laboratory, and its performance during the stand-alone and grid-connected modes of operation is validated. Index Terms—Analog control, direct current (dc)–dc converter, line frequency transformer, microgrid, push–pull configuration, S3 inverter.

N OMENCLATURE C Cmin CT CCM ESR fC fS FF HF IG IL IO IO max IO min L Lmin m MV DC

Filter capacitance. Minimum value of C. Junction capacitance of a power semiconductor switch. Continuous conduction mode. Equivalent series resistance. Corner frequency. Switching frequency. Fundamental frequency/line frequency. High frequency. Current fed to grid. Load current. Output current of a dc–dc converter. Maximum value of IO . Minimum value of IO . Filter inductance. Minimum value of L for the CCM operation. Modulation index. Voltage conversion ratio of a dc–dc converter.

Manuscript received July 13, 2014; revised November 24, 2014 and January 28, 2015; accepted February 27, 2015. Date of publication March 23, 2015; date of current version August 7, 2015. The authors are with the Hybrid Electrical Systems Laboratory, Department of Electrical and Electronics Engineering, National Institute of Technology Tiruchirappalli, Tiruchirappalli 620 015, India (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TIE.2015.2414898

PC PD PO PO max PO min PrL PSw PTF rC rC max rL rSON RF RL RL max RL min S S1 , S2 THD TON TOFF VAC VC VDC VG VGref VF Vr X ΔIL max δ η θ

Conduction loss. Power loss of a diode. Output power of a dc–dc converter. Maximum value of PO . Minimum value of PO . Power loss in L. Switching power loss. Power loss in a transformer. ESR of a filter capacitor. Maximum value of rC . ESR of a filter inductor. ON -state resistance of a power semiconductor switch. ON -state resistance of a diode. DC load resistance. Maximum value of RL . Minimum value of RL . Power semiconductor switch of a dc–dc converter. Power semiconductor switches of a push–pull configuration. Total harmonic distortion. Conduction period of S. Nonconduction period of S. Output ac voltage of an S3 inverter. Voltage across C. Input dc voltage of a dc–dc converter. Grid voltage. Reference grid voltage. Threshold voltage of a diode. Peak-to-peak value of a VC ripple voltage. Inductive reactance. Maximum inductor ripple current. Duty cycle. Efficiency of a dc–dc converter. Phase angle between VAC and VG . I. I NTRODUCTION

T

HE growing concerns on the tapering fossil fuels and greenhouse gas emission in conventional power generation plants have prompted the operators of contemporary power systems to search for an efficient and reliable alternative to cope with the ever-increasing power demand. A microgrid, which is a benign power generation using various renewable energy sources (solar, wind, biomass, etc.), along with energy storage units, has emerged as a reliable power supply for remote locations. A microgrid is capable of operating in both standalone and grid-connected modes [1]–[4].

0278-0046 © 2015 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.

5570

IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 62, NO. 9, SEPTEMBER 2015

However, the inability of renewable energy systems to supply high-quality electric power to ac loads in the stand-alone mode and to inject a sinusoidal current into grid at a high power factor in the grid-connected mode necessitates a highperformance inverter [5], [6]. Different inverter topologies and several control techniques for the enhanced operation of a microgrid are reviewed in [7]–[14]. Based on the isolation between the input dc and the output ac, all the existing inverter topologies can be categorized into three major classes, i.e., line frequency transformer based topologies, HF-transformer-based topologies, and transformerless topologies [14]. The transformerless topology has several drawbacks such as: 1) the requirement of a high input dc voltage, which necessitates the series connection of solar panels and batteries; 2) an increased ground leakage current resulting in safety hazards; and 3) dc current injection into grid [10], [14], [15]. Moreover, the limits on the duty cycle and the voltage stress on power semiconductor switches of high voltage gain topologies, the large input current ripple in a coupled-inductor-based converter, and the switched-capacitor requirement in an interleaved boost converter are a few noteworthy challenges [9]. On the other hand, the topology based on an HF transformer includes several power stages and does not prevent dc current injection into a grid [10], [14]. Finally, the topology, which guarantees the galvanic isolation and prevents the dc current injection into the grid, is that based on a line frequency transformer [10], [14]. A high voltage gain is the greatest advantage of this topology, which avoids the requirement of a high input dc voltage. For residential applications, considering the issues of human safety, performance, and power level extension, microgrid systems based on a low dc voltage (12–48 V) are usually preferred. In such a case where the conversion of a low-voltage dc into a high ac (e.g., 240 V) is required, a high voltage gain transformer is unavoidable [8], [15]–[17]. Nevertheless, there are a few drawbacks in the conventional line frequency transformer based topology, which consists of a full-bridge inverter followed by a line frequency transformer, as follows: 1) the requirement of four power semiconductor switches operating at an HF resulting in a huge switching loss due to the lack of soft switching; 2) the requirement of a huge ac filter at the bridge output terminals when operating at a lower switching frequency; 3) shootthrough issues; and 4) transformer core saturation [14]. Therefore, in order to overcome the aforementioned drawbacks of the conventional line frequency transformer based topology, a new voltage source inverter topology called the S3 inverter is presented in this paper. The design and operation of the presented topology are explained in Section II. The performance of the S3 inverter in the stand-alone and gridconnected modes of operation is illustrated in Sections III and IV, respectively. The loss calculation is reported in Section V, followed by the conclusions drawn in Section VI. II. P ROPOSED I NVERTER A. Circuit Description and Operation The circuit diagram of the proposed S3 inverter is shown in Fig. 1, in which a dc–dc conversion stage is coupled with a

Fig. 1. Proposed S3 inverter.

Fig. 2. Typical output waveforms of the S3 inverter.

push–pull configuration employing a center-tapped transformer and operating at an FF. The average output voltage of the dc–dc conversion stage, i.e., VC , is a function of duty cycle δ and input voltage VDC , and it is given as   TON (1) VC = VDC = δVDC . TON + TOFF The duty cycle of the dc–dc converter is varied in a fully rectified sinusoidal fashion so that VC will be naturally a unidirectional sine wave of double the desired FF, as shown in Fig. 2. In order to produce the positive half-cycle of VAC , S1 is switched ON for a period of 1/2FF, along with the

REDDY et al.: DESIGN, OPERATION, AND CONTROL OF S3 INVERTER FOR MICROGRID APPLICATIONS

5571

continuous operation of S. During this period, the conduction path is VC -positive − p − p1 − S1 − VC -negative. The unidirectional voltage appearing across the primary winding (pp1 ) of the center-tapped transformer is induced across its secondary winding as the positive half-cycle of VAC . Similarly, to produce the negative half-cycle of VAC , S2 is switched ON for the same period as S1 , along with the continuous operation of S. Now, the conduction path is VC -positive − p − p2 − S2 − VC -negative, and the unidirectional voltage appearing across the primary winding (pp2 ) is induced across the secondary winding as the negative half-cycle of VAC . Thus, the unidirectional VC is made into a sinusoidal alternating voltage, i.e., VAC , of a higher magnitude, as shown in Fig. 2, with the help of the push–pull configuration employing the center-tapped transformer and operating at the FF. In order to make the S3 inverter function as discussed earlier, it is required to generate continuous HF switching pulses for the operation of S in the dc–dc conversion stage and synchronized complementary FF switching pulses for the operation of the S1 and S2 of the push–pull configuration. The advantages of the proposed inverter topology are as follows. First, it is capable of generating an ac output voltage of any desired frequency (50 or 60 Hz) by employing three power semiconductor switches, in which only one is operating at an HF and the other two are operating at an FF. Second, it produces a sine-wave output voltage without using any filter at its output. Third, it only possesses three power semiconductor switches and results in minimized control complexity, a low switching loss, high efficiency, enhanced performance, and less cost. Fourth, since the alternate FF switching of S1 and S2 occurs at every zero instant of VC , which is similar to the zero voltage switching, the shoot-through issues are avoided. Fifth, it possesses galvanic isolation between the input dc and the output ac because of the FF transformer. Sixth, in the proposed inverter, the transformer core saturation can be avoided as long as the voltage-seconds product for both the semiperiods of Vc is maintained the same. Finally, since it only has one power semiconductor switch operating at an HF, it requires less cooling arrangement. In the proposed S3 inverter, as the duty cycle of the dc–dc converter is varied continually, special care has been taken in the design of its components. The design is executed in such a way that the output has to follow the dynamic changes in the duty cycle, and it makes the system more robust for load current variations.

Step 2. Calculate the minimum and maximum values of the load resistance utilizing the following [18]:

B. Design of Filter Parameters of dc–dc Converter In order to make the output voltage of the dc–dc converter follow the sinusoidal variation of the duty cycle, it is operated in the CCM [18]. The procedure for the design of the dc–dc converter with the given specifications of VDC , VC , IO min , IO max , and fS is described in the following steps.

Cmin =

Step 1. Compute the maximum and minimum values of the output power using the following [18]: PO max = VC IO max

(2)

PO min = VC IO min .

(3)

RL min =

VC IO max

(4)

RL max =

VC . IO min

(5)

Step 3. Evaluate the dc voltage conversion ratio of the dc–dc converter using the following [18]: MV DC =

VC . VDC

(6)

In the investigated topology, as the output voltage of the dc–dc converter is a unidirectional sine wave, VC is given as VC = 0.637 mVDC .

(7)

Step 4. Estimate the duty cycle of the dc–dc converter with efficiency η using the following [18]: δ=

MV DC . η

(8)

Step 5. Calculate the minimum inductance required to maintain the converter in the CCM using the following [18]: VC (1−δ) RL max (1−δ) δ(VDC −VC ) = = . 2fS IO min 2fS 2fS IO min (9) Step 6. Select an inductance L, whose value is higher than Lmin [18]. Then, compute ΔiL max as follows: Lmin =

ΔiL max =

VC (1 − δ) . fS L

(10)

Step 7. Select the value of rC satisfying the condition in the following [18]:   Vr . (11) rC < rC max = ΔiL max Step 8. Compute the minimum value of the filter capacitor by δ 2fS rC

(12)

and select the value of C higher than Cmin to satisfy the condition given by the following [18]: fC =

1 √  fS . 2π LC

(13)

The specifications considered for the design of the filter parameters of the dc–dc converter and the values of L and C obtained from the aforementioned design procedure are tabulated in Table I.

5572

IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 62, NO. 9, SEPTEMBER 2015

TABLE I L IST OF PARAMETER VALUES

Fig. 4. Hardware setup of the S3 inverter.

Fig. 5. Photograph depicting the working of the S3 inverter in the standalone mode.

Fig. 3. Analog circuit for generating the required switching pulses.

III. S TAND -A LONE O PERATION OF S3 I NVERTER An analog circuit shown in Fig. 3 is presented to generate the required HF and synchronized FF switching pulses for the stand-alone operation of the S3 inverter. The presented analog circuit consists of a precision rectifier, a zero-crossing detector, and a comparator. The reference sine wave of the desired FF generated by an oscillator acts as an input to the precision rectifier and the zero-crossing detector. The output of the precision rectifier is compared with a triangular wave of the selected switching frequency for generating the HF switching pulse for the operation of S employed in the dc–dc conversion stage. The output of the zero-crossing detector and its compliment serve as the FF switching pulses for S1 and S2 present in the push–pull configuration. The power circuit shown in Fig. 1 and the pulse generation circuit shown in Fig. 3 have been implemented in a laboratory, as presented in Fig. 4. As per the Indian power system standards, the voltage magnitude of a single-phase ac distribution system is 240 V; hence, the proposed S3 inverter is tested for generating 240 V ac. A dc voltage of 48 V is selected as the input to the S3 inverter since the commercially available storage batteries, solar panels, and wind turbines for residential applications are of a low-voltage (12, 24, 36, and 48 V) rating.

Fig. 6. Duty-cycle variation and generated pulse patterns.

In addition, the parallel connection of the solar panels and the batteries are more preferred than a series connection for obtaining flexibility in power level extension and improved performance [8], [15]–[17]. A photograph depicting the working of the prototype of the S3 inverter with lighting loads (compact fluorescent lamp (CFL): 11 W-2 Nos., 5 W-1 No.; incandescent bulb: 60 W-2 Nos., 40 W-2 No., 25 W-1 No.) and two table fans (50 W each) as motor loads is shown in Fig. 5. The switching pulses generated by the analog circuit for three semiconductor switches are recorded using an Agilent digital storage oscilloscope (DSO 1004A) and presented in Fig. 6. It is clear in Fig. 6 that the HF and FF switching pulses generated by the presented analog circuit are in exact synchronization. It can be also observed

REDDY et al.: DESIGN, OPERATION, AND CONTROL OF S3 INVERTER FOR MICROGRID APPLICATIONS

Fig. 7. (a) Waveforms of 100 Hz VC , 50 Hz VAC , and IL while feeding the resistive load. (b) Waveforms of VAC and IL in response to a step change in the load.

that, for every half-cycle of the ac output voltage, only two power semiconductor switches are conducting, in which one is operating at an HF and the other is at an FF. Consequently, the overall switching loss would be less, thus increasing the efficiency of the system. The experimentally recorded waveforms of 100 Hz VC , 50 Hz VAC , and IL for a resistive load are shown in Fig. 7(a). The magnitude of VAC is ten times higher than that of VC because the turns ratio of the center-tapped FF transformer is 1 : 10. The transient response of the proposed inverter is tested with a step change in the resistive load. The waveforms of VAC and IL in response to a change in the load are confronted in Fig. 7(b). It can be visualized in Fig. 7(b) that, when IL changes from 1.47 to 2.34 A, VAC drops to 237 from 239 V. It is clear in Fig. 7 that the proposed S3 inverter has exactly followed the dynamic change in the duty cycle and has a better transient response during a step change in the load with reasonably good voltage regulation. The performance of the presented S3 inverter is tested for feeding a low power factor load such as a series combination of a 100 Ω resistor and a 50 mH inductor, and nonlinear loads such as CFLs. The relevant waveforms are presented in Fig. 8. It is clear in Fig. 8 that the presented inverter is capable of feeding both nonlinear and low power factor loads without any distortion in its output ac voltage. In order to ensure the quality of the output voltage, a FLUKE 345 PQ Clamp Meter is used for performing harmonic analysis on VAC . The harmonic spectrum is presented in Fig. 9, which shows that the percentage THD is within the IEEE 519 limit. The snapshots of the power quality analyzer illustrated in

5573

Fig. 8. (a) Waveforms of VAC and IL while feeding the inductive load. (b) Waveforms of VAC and IL while feeding the nonlinear load.

Fig. 9. Harmonic spectrum of VAC .

Fig. 10. Power analyzer snapshots depicting the power consumption by loads of different power factors.

Fig. 10 are for the loading conditions shown in Figs. 7(b) and 8(b). Based on the experimental investigation, it is evident that the proposed S3 inverter is capable of generating a sinusoidal ac voltage of the desired frequency and magnitude without using any ac filter at its output terminals. Moreover, it is capable of

5574

IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 62, NO. 9, SEPTEMBER 2015

Fig. 11. Single-line diagram representation of the grid-connected mode operation of the S3 inverter.

Fig. 13. Photograph depicting the working of the S3 inverter in the gridconnected mode.

Fig. 12. Analog circuit for controlling the power fed to the grid and for generating the required switching pulses.

feeding unity power factor and low power factor loads without any power quality issues in the stand-alone mode. IV. G RID -C ONNECTED O PERATION OF S3 I NVERTER Switch SG indicated in Fig. 1 is closed for connecting the S3 inverter to the grid. The single-line diagram of the S3 inverter in the grid-connected mode of operation is depicted in Fig. 11, where the S3 inverter is represented by an ac source, i.e., VAC . The active power (P ) that can be transferred from the S3 inverter to the grid is given as P =

VAC VG sin θ. X

(14)

The conditions for transferring the active power alone are |VAC | = |VG | and θ > 0.

(15)

In the presented setup, the S3 inverter generates a voltage VAC ∠θ to meet the conditions in (15). Since inductive reactance X is constant, the active power fed to the grid only depends on θ. An analog circuit shown in Fig. 12 is presented to generate the required HF and synchronized FF switching pulses for generating VAC ∠θ. The presented analog circuit consists of a phase-shifting circuit, a precision rectifier, a zero-crossing detector, and a comparator. As shown in Fig. 12, the reference sine wave extracted from the grid voltage is provided as an input to the phaseshifting circuit. The amount of phase shifting can be varied by

adjusting the variable resistor Rv . The phase-shifted sine wave acts as an input to both the precision rectifier and the zerocrossing detector. Then, the required switching pulses for the S3 inverter are generated, as explained in Section III. The gridconnected mode of operation of the S3 inverter is experimented after implementing the pulse generation circuit. A photograph depicting this mode of operation, where the S3 inverter is feeding local loads and injecting power into the grid, is shown in Fig. 13. The voltage waveform of VAC = 150 ∠5◦ V (i.e., a 150 V alternating voltage that is leading at an angle of 5◦ with respect to VGref ) generated by the inverter is shown in Fig. 14(a). In addition, the waveforms of the grid voltage (VG = 150 V) and current fed to the grid (IG = 1 A) are itemized in Fig. 14(b). As per (14), the power fed into the grid can be varied by varying θ. Therefore, the performance of the proposed inverter is probed with an increase in the θ value, and the obtained results are furnished in Fig. 15. The waveforms of VAC = 150 ∠10◦ V and the corresponding VG and IG , which are in phase, are presented in Fig. 15(a) and (b), respectively. It is clear in Figs. 14 and 15 that, as the value of θ increases, the power fed to the grid also increases. The harmonic spectra of the current fed to the grid in the aforementioned two cases (θ = 5◦ and θ = 10◦ ) are furnished in Fig. 16, which confirm that the percentage THD is within the IEEE 519 limit. The snapshots of the power quality analyzer illustrated in Fig. 17 provide the information about the power fed to the grid by the proposed S3 inverter. In Fig. 17, it is affirmed that the power factor in both cases is almost unity, which means that only the active power is fed to the grid. The major concerns of any grid-connected inverter are: 1) to inject a good-quality current in phase with the grid voltage; 2) to have no reactive power exchange, i.e., to maintain a unity power factor; and 3) to have zero dc current injection into the

REDDY et al.: DESIGN, OPERATION, AND CONTROL OF S3 INVERTER FOR MICROGRID APPLICATIONS

5575

Fig. 16. Harmonic spectrum of IG . (a) θ = 5◦ and (b) θ = 10◦ .

Fig. 17. Power analyzer snapshots depicting the power fed to the grid. (a) θ = 5◦ and (b) θ = 10◦ . Fig. 14. Waveforms of (a) VAC (150 ∠5◦ V ) and (b) VG and IG .

Fig. 18. Experimental results with VG = 200 V. (a) VG and IG for θ = 5◦ . (b) Snapshot of the power analyzer.

Fig. 15. Waveforms of (a) VAC (150 ∠10◦ V) and (b) VG and IG .

grid. Since the presented topology is based on a line frequency transformer, the issue of dc current injection is avoided. It is evident in Figs. 16 and 17 that the other two concerns are successfully met by the proposed S3 inverter. Furthermore, the prototype is tested for feeding power to the grid at different voltages such as 200 and 240 V. The recorded

waveforms and the snapshot of the power quality analyzer during experimentation with VG = 200 V and IG = 1.3 A are presented in Fig. 18. Similarly, the experimentally recorded waveforms and the related snapshot of the power quality analyzer with VG = 240 V and IG = 1.47 A are demonstrated in Fig. 19. It can be viewed in Figs. 18 and 19 that a current of good quality is injected in phase with the grid voltage by the S3 inverter. Finally, the performance of the S3 inverter is examined during a sudden change in the magnitude of the grid voltage. In practice, the variation in the grid voltage results in a violation of conditions for the active power transfer aforementioned in (15). As a result, reactive power exchange may take place. The effect

5576

IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 62, NO. 9, SEPTEMBER 2015

Fig. 19. Experimental results with VG = 240 V. (a) VG and IG for θ = 5◦ . (b) Snapshot of the power analyzer.

of the voltage sag in the grid voltage from 200 to 170 V and that of the swell in the grid voltage from 200 to 230 V are demonstrated in Fig. 20(a) and (b), respectively. As the grid voltage varies, the grid reference (VGref ), which is acting as an input to the pulse generation circuit, also changes. Consequently, the modulation index of the dc–dc conversion stage changes and results in an appropriate adjustment of the magnitude of output voltage VAC . Thus, with the control strategy employed in the presented inverter, there is no reactive power exchange since it cognizes the changes in the grid voltage. However, there is a decrement or increment in the real power fed into the grid, as per (14), since the magnitudes of both VAC and VG are varied. Based on the experimental investigation, it is evident that the proposed S3 inverter is capable of injecting a sinusoidal current in phase with the grid voltage and of feeding the local loads in the grid-connected mode. Hence, this topology, along with its pulse generation circuit, can be a good candidate for applications, wherever dc–ac conversion is done with a dc voltage source, such as a household inverter with a battery bank for power backup and a multistring microgrid inverter in which the power extracted from multiple sources are integrated at a common dc bus.

V. L OSS C ALCULATION The proposed S3 inverter is constructed with the commercially available CSD19531KCS MOSFET (100 V, 100 A) and STTH100W04C ultrafast recovery diode (400 V, 100 A). The transformer is designed as per the basic design flow explained in [19], which includes the loss calculation. The efficiency of the 1.2 kVA transformer used in the prototype is 97.4%. In order to obtain the overall efficiency of the S3 inverter, the total power loss has been computed. In the S3 inverter, two semiconductor switches, a diode, an inductor and a transformer are the elements contributing to the power loss in every half-

Fig. 20. (a) Waveforms of VGref , VAC , and IG during a sag in VG . (b) Waveforms of VAC and IG during a swell in VG .

cycle of the ac output voltage. As per the operation of the S3 inverter, zero voltage switching is naturally obtained for the switches operating at the FF, thus leading to a negligible switching loss. Among the three switches in this topology, only one switch contributes to the switching loss. Hence, the total power loss of the S3 inverter is given as PL = 2PC + PSw + PD + PrL + PTF 2 2 = 2δrSON IO max + fS CT VDC 2 + IO max (1−δ)(VF + RF IO max ) + rL IO max + PTF . (16)

The values of rSON (6.4 mΩ), CT (25 pF), VF (0.98 V), and RF (3 mΩ) are obtained from the data sheets of the devices used, and rL (8.9 mΩ) is obtained using an LCR meter. Thus, by using (16), the total power loss of the S3 inverter is obtained as 82.02 W, and the overall efficiency is 93.16% at its full load. However, the experimentally recorded full-load efficiency of the S3 inverter is 91.6% VI. C ONCLUSION A line frequency transformer based single-phase voltage source inverter topology employing three power semiconductor switches, which is named as the S3 inverter, has been presented.

REDDY et al.: DESIGN, OPERATION, AND CONTROL OF S3 INVERTER FOR MICROGRID APPLICATIONS

The performance of the proposed topology as a microgrid inverter has been examined in this paper. A simple and costeffective analog circuit for the generation of the required switching pulses and to control the amount of power fed to the grid has been also presented. The enhanced performance of the S3 inverter in both the stand-alone and grid-connected modes of operation is successfully validated by experimentation. From the experimental results, it is concluded that the proposed S3 inverter is capable of injecting a sinusoidal current in phase with the grid voltage and of feeding any kind of local loads.

R EFERENCES [1] L. A. de Souza Ribeiro, O. R. Saavedra, S. L. de Lima, and J. Gomes de Matos, “Isolated micro-grids with renewable hybrid generation: The case of Lençóis island,” IEEE Trans. Sustainable Energy, vol. 2, no. 1, pp. 1–11, Jan. 2011. [2] Y.-H. Liao and C.-M. Lai, “Newly-constructed simplified single-phase multistring multilevel inverter topology for distributed energy resources,” IEEE Trans. Power Electron., vol. 26, no. 9, pp. 2386–2392, Sep. 2011. [3] E. Planas, A. Gil-de-Muro, J. Andreu, I. Kortabarria, and I. Martinez de Alegria, “Design and implementation of a droop control in d-q frame for islanded microgrids,” IET Renew. Power Gener., vol. 7, no. 5, pp. 458–474, Aug. 2013. [4] R. Majumder, “Reactive power compensation in single-phase operation of microgrid,” IEEE Trans. Ind. Electron., vol. 60, no. 4, pp. 1403–1416, Apr. 2013. [5] R.-J. Wai, C.-Y. Lin, Y.-C. Huang, and Y.-R. Chang, “Design of highperformance stand-alone and grid connected inverter for distributed generation applications,” IEEE Trans. Ind. Electron., vol. 60, no. 4, pp. 1542–1555, Apr. 2013. [6] J. He and Y. W. Li, “Hybrid voltage and current control approach for DGgrid interfacing converters with LCL filters,” IEEE Trans. Ind. Electron., vol. 60, no. 5, pp. 1797–1809, May 2013. [7] D. Menese, F. Blaabjerg, O. Garcia, and J. A. Cobos, “Review and comparison of step-up transformerless topologies for photovoltaic AC-module application,” IEEE Trans. Power Electron., vol. 28, no. 6, pp. 2649–2663, Jun. 2013. [8] W. Li and X. He, “Review of nonisolated high-step-up DC/DC converters in photovoltaic grid-connected applications,” IEEE Trans. Ind. Electron., vol. 58, no. 4, pp. 1239–1250, Apr. 2011. [9] Q. Li and P. Wolfs, “A review of the single phase photovoltaic module integrated converter topologies with three different DC link configurations,” IEEE Trans. Power Electron., vol. 23, no. 3, pp. 1320–1333, May 2008. [10] Y. Xue, L. Chang, S. B. Kjaer, J. Bordonau, and T. Shimizu, “Topologies of single-phase inverters for small distributed power generators: An overview,” IEEE Trans. Power Electron., vol. 19, no. 5, pp. 1305–1314, Sep. 2004. [11] S. B. Kjaer, J. K. Pedersen, and F. Blaabjerg, “A review of single-phase grid-connected inverters for photovoltaic modules,” IEEE Trans. Ind. Appl., vol. 41, no. 5, pp. 1292–1306, Sep./Oct. 2005. [12] S. Dasgupta, S. K. Sahoo, and S. K. Panda, “Single-phase inverter control techniques for interfacing renewable energy sources with microgrid—Part I: Parallel connected inverter topology with active and reactive power flow control along with grid current shaping,” IEEE Trans. Power Electron., vol. 26, no. 3, pp. 717–731, Mar. 2011. [13] S. Dasgupta, S. K. Sahoo, S. K. Panda, and G. A. J. Amaratunga, “Singlephase inverter control techniques for interfacing renewable energy sources with microgrid—Part II: Series connected inverter topology to mitigate voltage related problems along with active power flow control,” IEEE Trans. Power Electron., vol. 26, no. 3, pp. 732–746, Mar. 2011. [14] G. Franceschini, E. Lorenzani, and G. Buticchi, “Saturation compensation strategy for grid connected converters based on line frequency transformers,” IEEE Trans. Energy Convers., vol. 27, no. 2, pp. 229–237, Jun. 2012. [15] V. V. R. Scarpa, S. Buso, and G. Spiazzi, “Low-complexity MPPT technique exploiting the PV module MPP locus characterization,” IEEE Trans. Ind. Electron., vol. 56, no. 5, pp. 1531–1538, May 2009. [16] T. Shimizu, O. Hashimoto, and G. Kimura, “A novel high-performance utility-interactive photovoltaic inverter system,” IEEE Trans. Power Electron., vol. 18, no. 2, pp. 704–711, Mar. 2003.

5577

[17] G. Acciari, D. Graci, and A. L. Scala, “Higher PV module efficiency by a novel CBS bypass,” IEEE Trans. Power Electron., vol. 26, no. 5, pp. 1333–1336, May 2011. [18] M. K. K. Czuk, Pulse-Width Modulated DC-DC Power Converters. Chichester, U.K.: Wiley, 2008, Chap. 2. [19] N. Mohan, T. Undeland, and W. Robbins, Power Electronics Converters Applications and Design. New York, NY, USA: Wiley, 2003.

B. Dastagiri Reddy was born in Proddutur, India. He received the B.Tech. degree in electrical and electronics engineering and the M.Tech. degree in power electronics from Jawaharlal Nehru Technological University, Anantapur, India, in 2009 and 2011, respectively. He is currently working toward the Ph.D. degree in the Hybrid Electrical Systems Laboratory, Department of Electrical and Electronics Engineering, National Institute of Technology Tiruchirappalli, Tiruchirappalli, India. His research interests include dc–dc converters, dc–alternatingcurrent converters, and power electronic applications to renewable energy.

M. P. Selvan (M’13) received the B.E. degree in electrical and electronics engineering from Manonmaniam Sundaranar University, Tirunelveli, India, in 1999, the M.E. degree in power systems from the National Institute of Technology Tiruchirappalli, Tiruchirappalli, India, in 2000, and the Ph.D. degree in computer applications in power systems from the Indian Institute of Technology Madras, Chennai, India, in 2006. He is currently an Assistant Professor with the Department of Electrical and Electronics Engineering, National Institute of Technology Tiruchirappalli, where he is also associated with the Hybrid Electrical Systems Laboratory. He has 13 years of teaching and research experience in the field of power systems. He is the author or coauthor of more than 75 technical research papers published in various national and international conference proceedings and journals. His areas of interest include distribution system analysis, distributed generators, microgrids, custom power devices, and power quality.

S. Moorthi (M’13) received the B.E. degree in electrical and electronics engineering from the University of Madras, Chennai, India, in 2001, the M.E. degree in applied electronics from the PSG College of Technology, Coimbatore, India, in 2003, and the Ph.D. degree in the area of very large scale integration (VLSI) for communication circuits from Anna University, Chennai, India, in 2008. He was a Postdoctoral Fellow of the Erasmus Mundus External Cooperation Window initiated under the EURINDIA Program, through which he has done postdoctoral research on memory design for reconfigurable architectures with the Royal Institute of Technology (KTH), Stockholm, Sweden, in 2010–2011. Since 2007, he has been a member of faculty of the Department of Electrical and Electronics Engineering, National Institute of Technology Tiruchirappalli, Tiruchirappalli, India, where he is also associated with the Hybrid Electrical Systems Laboratory. His research interests include VLSI for signal processing and embedded systems.