2012
Digital Design and
Computer Architecture This book is an undergraduate level textbook presenting a thorough discussion of state-of-the-art digital devices and circuits. It supplements our Research and Development Company, SSP.Co. It is selfcontained; begins with the basics and ends with the latest developments of the digital technology. The intent is to prepare the reader for advanced digital circuit design and programming the powerful Complex Field Programmable Gate Arrays (FPGAs). The prerequisites for this text are just basic highschool math; accordingly, it can be read and understood by community college and 4year university students. It is ideal for self-study. The author and contributors make no claim to originality of content or of treatment, but have taken care to present definitions, statements of physical laws, theorems, and problems.
FARZIN PILTAN SSP. Co
Digital Design and Computer Architecture
By Farzin Piltan
October 2012
FIRST PART
Digital Design
1
سيستمُاي اعذاد
1
Decimal 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
Binary 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1
Hexa Decimal 0 1 2 3 4 5 6 7 8 9 A B C D E F
NUMBER OF SYSTEMS AND CODES INTRODUCTION
Positions number systems octal and hexadecimal numbers binary and decimal numbers general position number system conversions addition and subtraction of nondecimal numbers 1 st & 2 nd complement
2
بخص ايل
اعذاد دَذَی
اعذاد دَذَی : Note-1در سیستن ػذ دّذّی )ّ (Decimalز یه اس دُ رلن 0 ،لغایت ، 9یه وویت را ًطاى هی دّذ .
: Note-2اگز تخَاّین ػذد 23را تیاى وٌین ،رلن 2را تزای ًوایص 20اًتخاب وزدُ ٍ رلن 3را تزای ًوایص 3اًتخاب هی وٌین . تٌاتزایي هَلؼیت ّز رلن در ػذد دّذّی اًذاسُ وویت را ًطاى هی دّذ ٍتزای هىای آى ارسضی ٍخَد دارد .
: Note-3هَلؼیت ّز رلن در ػذد دّذّی اًذاسُ وویت را ًطاى هی دّذ ٍهی تَاى آى را تا ٍسى )ً (Weightطاى دادٍ .سى ّای یه ػذد دّذّی تَاى ّایی اس ّ 10ستٌذ وِ اس راست تِ چپ اضافِ ضذُ ،تا 100 = 1ضزٍع هی ضًَذ :
: Note-4تزای اػذاد اػطاری ٍ ،سى ّا تِ غَرت تَاًْای هٌفی اس ّ 10ستٌذ ،اس چپ تِ راست واّص هی یاتٌذ ٍ تا 10-1ضزٍع هی ضًَذ :
........ ,102 ,101 ,100 / 101 ,102 ,103 , ........... : Note-5همذارػذد دّذّی تزاتز هدوَع ارلام آى است ،پس اس آًىِ ّز رلن در ٍسًص ؼرب ضذُ تاضذ . (Example -1عذد 47را تِ صَرت هجوَعی از ارزش ّای ّر رلن تیاى وٌیذ ؟
: Solutionرلن 4دارای ٍسى (101) ، 10است ،وِ تَسط هَلؼیت آى تیاى هی ضَد ّ .واى طَر وِ تزای هَلؼیت رلن ً 7طاى دادُ ضذُ است ٍ ،سى آى (100) ، 1است .تٌاتزایي دارین :
47 (4 10) 7 100 4 10 7 1 40 7
(Example -2عذد دّذّی 568.25را تِ صَرت هجوَعِ ای از ارزش ّای ّر رلن تیاى وٌیذ ؟
: Solutionرلن غحیح 5ایي ػذد دارای ٍسى ، (102) 100رلن 6دارای ٍسى ٍ ، (101) 10رلن 8دارای ٍسى (10 ) 1است .رلن اػطاری 2دارای ٍسى ٍ (10-1) 0.1رلن اػطاری 5دارای ٍسى ، (10-2) 0.01است .در ًتیدِ :
568.25
5 10 2 6 101 8 100 2 10 1 5 10 2 5 100 6 10 8 1 2 0.1 5 0.01 500 6 8 0.2 0.05
0
3
سيستمُاي اعذاد
بخص ديم
اعذاد ديديیی
: Note-6سیستن اػذاد دٍدٍیی رٍش سادُ دیگزی تزای ضوارش است .ایي رٍش اس سیستن دّذّی ،پیچیذگی ووتزی دارد .سیزا فمط دٍ رلن دارد .
: Note-7دلیماً هاًٌذ سیستن دّذّی تا 10رلن وِ سیستن هثٌای 10است ،سیستن دٍدٍیی ًیش تا دٍرلوی وِ دارد سیستن هثٌای 2 است .دٍ رلن دٍدٍیی (تیت) ّ 0ٍ 1ستٌذ .هَلؼیت 0ٍ 1در یه ػذد دٍدٍیی ارسش هىاًی یا ٍسى آى را در آى ػذد ًطاى هی دّذ ، دلیماً هاًٌذ ٍضغ رلن دّذّی وِ همذار آى رلن را هطخع هی وٌذ ٍ.سى ّا در ػذد دٍدٍیی تِ غَرت تَاى ّایی اس ّ 2ستٌذ .
ضمارش در مبىاي دي : Note-8هتٌاظزتا دّذّی ،ضوارش در هثٌای 2اًدام هی گیزد .تا ایي تفاٍت وِ فمط دٍ رلن وِ آًْا را تیت ) (Bitهی ًاهٌذ ،در اختیار داریذ .
: Note-9در خذٍل سیز ،ضوارش دٍدٍیی اس غفز لغایت پاًشدُ ًطاى دادُ ضذُ است :
Binary 0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1 0 0 0 1 0 0 1 1 0 1 0 1 0 1 1 1 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1
Decimal 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
: Note-10تا هزاخؼِ تِ خذٍل فَق هطاّذُ هی وٌیذ وِ تزای ضوارش اس غفز لغایت ، 15تِ چْار تیت ًیاس است .ػوَهاً تا nتیت هی تَاًیذ اسغفز لغایت 2n -1ضوارش ًواییذ . هثالً تا پٌح تیت ) (n = 5هی تَاًیذ اس غفز لغایت 31را تطواریذ : تا ضص تیت هی تَاًیذ اس غفز لغایت 63را ضوارش وٌیذ :
2n 1
باالتریه عذد دَذَی 25 – 1 = 32 – 1 = 31 6
2 – 1 = 64 – 1 = 63
4
ساختار يزوی اعذاد ديديیی : Note-11ػذد دٍدٍیی یه ػذد ٍسى دار است .تیت سوت راست ،دریه ػذد غحیح دٍدٍیی ,ون ارسش تزیي تیت
) (Least Significant Bit)(LSBاست ٍ دارای ٍسى 20 = 1است ٍ .سى ّا اس سوت راست تِ چپ تا تَاًی اس 2تزای ّز تیت افشایص هی یاتٌذ .آخزیي تیت سوت چپ را تا ارسش تزیي تیت ) (MSB) ، (Most Significant Bitگَیٌذ ٍ .سى ایي بیت تستگی تِ اًذاسُ ػذد دٍدٍیی دارد .
: Note-12اػذاد اػطاری دٍدٍیی را هی تَاى تا لزار دادى تیت ّا در سوت راست هویش ًطاى داد .یؼٌی دلیماً هاًٌذ ارلام اػطاری
دّذّی وِ سوت راست هویش اػطاری لزار دارًذ .آخزیي تیت سوت چپ در یه ػذد دٍدٍیی اػطاری MSBآى تَدُ ٍ ،دارای = 2-1
0.5است. ٍسى ّای اػذاد اػطاری اس چپ تِ راست تا تَاًی هٌفی اس 2تزای ّز تیت واّص هی یاتٌذ .
: Note-13ساختار ٍسًی یه ػذد دٍدٍیی چٌیي است :
2 n1 .......... 2 2 , 21 , 2 0. 2 1 , 2 2 , .........2 n وِ در آى nتؼذاد تیت ّا است .تٌاتزایي توام تیت ّای سوت چپ هویش دارای تَاى هثثتی اس ّ 2ستٌذ (هاًٌذ اػذاد غحیح ) .توام تیت ّای سوت راست هویش دارای تَاى هٌفی اس ، 2یا دارای ٍسى وسزی ّستٌذ .
: Note-14در خذٍل سیز تَاى ّایی اس 2هؼادل دّذّی آًْا تزای یه ػذد غحیح ًِ تیتی ٍ یه ػذد ضص تیتی اػطاری ًطاى دادُ ضذُ است .تَخِ ضَد تزای ّز تَاى هثثتی اسٍ 2سى دٍ تزاتز ٍ تزای تَاى ّای هٌفی اس ٍ ، 2سى ًػف هی ضَد .هی تَاًیذ ایي خذٍل را تا دٍ تزاتز وزدى ٍسى تا ارسش تزیي تَاى هثثت اس ً ٍ 2ػف وزدى ٍسى ون ارسش تزیي تَاى هٌفی اس 2گستزش دّیذ .
هثالً 27 0.00781252 , 29 512 :
: Test 1همذار دّذّی عذد اعطاری 0.1011را تعییي وٌیذ ؟
0.6875 (1
0.6 (2
: Test 2عذد دٍدٍیی 1011110101.011وذام است ؟
757.437 (1
757.375 (2
تبذیل دَذَی بٍ ديديیی : Note-15
تثذیل ػذد دّذّی تِ دٍدٍیی تا استفادُ اس رٍش هدوَع ٍسى ّا .
0.7 (3
700.437 (3
0.8757 (4
700.375 (4
5
سيستمُاي اعذاد
تثذیل یه ػذد غحیح دّذّی تِ دٍدٍیی تا استفادُ اس رٍش تمسین هتَالی تز 2
تثذیل یه ػذد دّذّی اػطاری تا استفادُ اس رٍش ضزب ّای هتَالی در2
ريش مجمًع يزن َا : Note-16یه رٍش هحاسثِ ػذد دٍدٍیی ،تؼییي هدوَع همادیز ٍسى ّای ػذد دٍدٍیی بُ طَری وِ هدوَع آى تزاتز ػذد دّذّی ضَد .
: Note-17ون ارسش تزیي تیت 20است ٍ سپس تا دٍ تزاتز وزدى ٍسى ٍ ،سى تؼذی تِ دست هی آیذ .تزاساس آًچِ یاد گزفتِ ایذ ، ٍسى تِ غَرت 64 , 32 , 16 , 8 , 4 , 2 , 1خَاّذ تَد.
: Note-18تا لزار دادى 1در هَلؼیت ّای هٌاسة ٍ 23 ٍ 20ػذد غفز در تمیِ تَاى ّا ،ػذد دٍدٍیی هؼادل ػذد دّذّی 9تِ دست هی آیذ :
20 1
21 0
22 0
23 1
(Example -3اعذاد دّذّی زیر تِ دٍدٍیی تثذیل ًواییذ ؟ 12
: Solution 11002
25
58
82
12 8 4 23 22 110012
25 16 8 1 24 23 20 1110102 58 32 16 8 2 25 24 23 21 10100102 82 64 16 2 26 24 21 ريش تقسيم مکرر بر 2 : Note-19رٍش هتذاٍل ٍهٌظن تثذیل دّذّی تِ دٍدٍیی فزآیٌذ تمسین ّای هتَالی تز 2است .هثالً تزای تثذیل ػذد دّذّی 12تِ دٍدٍیی ،اتتذا ػذد 12را تزػذد 2تمسین وزدُ ٍآًگاُ خارج لسوت را تز
2تمسین وزدُ تا سهاًی وِ خارج لسوت غفز ضَد
.
تالیناًذُ ّای ایداد ضذُ در ّز هزحلِ تمسین یه ػذد دٍدٍیی را تطىیل هی دٌّذ .اٍلیي تالیواًذُ ،ون ارسش تزیي تیت ) (LSBػذد دٍدٍیی است ٍ آخزیي تالیواًذُ ایداد ضذُ ،تا ارسش تزیي تیت ) (MSBاست .ایي فزآیٌذ در هزاحل سیز تزای تثذیل ػذد 12دّذّی تِ دٍدٍیی ًطاى دادُ ضذُ است . خاتوِ هزاحل ٌّگاهی است وِ خارج لسوت غفز ضَد .
6
(Example -4اعذاد دّذّی 45 ٍ 19را تِ هعادل دٍدٍیی آى تثذیل وٌیذ ؟
: Solution
تبذیل اعذاد دَذَی کسري بٍ ديديیی : Note-20یه رٍش سادُ تزای یادگیزی ارسش ّای هىاًی اػذاد دٍدٍیی ایي است وِ تا ارسش تزیي ٍسى آى (2 ) 0.5است ٍ تا -1
ًػف ن ردى ّز
ٍسى ،هی تَاًیذ ٍسى تیت را تِ دست آٍریذ
غَرت 0.0625,0.125,0.25, o.5تِ دست هی آٍرین .
.تٌاتزایي فْزستی اس
ٍ 4سى اػطاری دٍدٍیی تِ
مجمًع يزوُا ّ : Note-21واًطَروِ هالحظِ هی ضَد ،اػذاد دّذّی غحیح را تا استفادُ اس تمسیوات هتَالی تز 2هی تَاى تِ دٍدٍیی تثذیل وزد . اػذاد دّذّی وسزی را هی تَاى تا ضزتذر ّ 2ای هتَالی هؼادل دٍدٍیی آًْا را تثذیل وزد .
(Example -5عذد 0.3125را تِ هعادل تایٌری تثذیل ًواییذ ؟
: Solution
جمع ديديیی : Gold Note 1 پيج قاًَى اصلی ترای جوع ارقام دٍدٍیی تِ صَرت زیر است :
حاصل جوع ٍ 0رقن ًقلی 0
0+0=0
7
سيستمُاي اعذاد
حاصل جوع ٍ 1رقن ًقلی 0
0+1=1
حاصل جوع ٍ 1رقن ًقلی 0
1+0=1
حاصل جوع ٍ 0رقن ًقلی 1
1 + 1 = 10
حاصل جوع ٍ 1رقن ًقلی 1
1 +1 + 1 = 11
(Example -6اعذاد دٍدٍیی زیر را جوع وٌیذ .
: Solutionتزای رج ٍع ،هؼادل دّذّی ایي خوغ ّا ًیش ًطاى دادُ ضذُ است .
6 4 10
7 3 10
110 ( 100د 1010
111 ( 11ج 1010
4 2 6
100 ( 10ب 110
3 3 6
11 11 110
(الف
تفریق ديديیی : Gold Note-2 چْار قاًَى اصلی ترای تفریق ارقام دٍدٍیی تِ صَرت زیر است: ( 0 – 1تا یک رقن قرض )1
10 1 1
1 0 1
1 1 0
00 0
(Example -7تفریك ّای دٍدٍیی زیر را اًجام دّیذ : 11 – 10
11 - 01
: Solution
3 2 1
3 1 2
11 10 01
11 01 10
(Example -8عذد 011را از 101ون وٌیذ .
: Solution
5 3 2
101 011 010
تزرسی دلیك ایي تفزیك دٍ دٍدٍیی ،در سیز ًطاى دادُ ضذُ است .اس ستَى سوت راست ضزٍع
وٌیذ :
ضرب ديديیی : Gold Not-3 زیاست : چْار قاًَى اصلی ضرب ارقام دٍدٍیی تِ صَرت ر
1 1 1 (Example -9ضرب ّای دٍدٍیی زیر را اًجام دّیذ .
1 0 0
0 1 0
00 0
8 1 11 (1 : Solution
11 11 (2
101111 (3
11 1011 1001 4) 9 1011 99 0000 0000 1011
7 5 35
10011011 (4
3 )2
11
3 9
111 101 111 000
3) 11
11
11
111
1001
100011
1100011
3 ) 1 1 3
11 1 11
مکمل َاي یکی ي ديیی اعذاد ديديیی ,
: Note-22هىول یىی ٍ 1, St Complementهىول دٍیی 2 nd Complementاػذاد دٍدٍیی تذیي ػلت اُ هیت دارًذ وِ تِ ٍسیلِ آًْا هی تَاى اػذاد هٌفی را ًوایص داد .
بٍ دست آيردن مکمل یکی یک عذد ديديیی : Note-23تا تثذیل توام ّ 1ا تِ ٍ 0توام ّ 0ا تِ ، 1هىول یىی ػذد دٍدٍیی تِ دست هی آیذ :
بٍ دست آيردن مکمل ديیی یک عذد ديديیی : Note-24هىول دٍیی یه ػذد دٍدٍیی ،تا افشٍدى ٍ 1احذ تِ LSBهىول یىی آى ػذد تِ دست هی آیذ . : Test 3هىول دٍیی 10110010وذام است ؟
01001110 (1
10011100 (2
+ 1هىول یىی = هىول دٍیی 10110010(3
: Note-25رٍش دیگز تِ دست آٍردى هىول دٍیی یه ػذد دٍدٍیی تِ غَرت سیز است : توام ارلام را اس سوت راست تِ ّواى غَرتی وِ ّستٌذ ،لغایت اٍلیي 1تٌَیسیذ . تمیِ تیت ّا را هىول یىی وٌیذ . (Example -10هىول دٍیی عذد 10111000را تِ دست آٍریذ .
11010010(4
سيستمُاي اعذاد
9
: Solution
: Note-26تزای تزگطت اس هىول یىی تِ ضىل اغلی دٍدٍیی ،توام تیت ّارا هؼىَس وٌیذ .تزای تزگطت اس هىول دٍیی تِ ضىل اغلی دٍدٍیی ،هىول یىی آى را تِ دست آٍریذ ٍتِ ون ارسش تزیي تیت آى ٍ 1 ،احذ اضافِ وٌیذ .
اعذاد عالمت دار : Note-27سیستن ّای رلوی هاًٌذ رایاًِ تایذ لادر تاضٌذ تا تا اػذاد هثثت ٍهٌفی وار وٌٌذ .یه ػذد دٍدٍیی ػالهت دار ضاهل اطالػات ػالهت ٍ اًذاسُ است .ػالهت ػذد ًطاى هی دّذ وِ ػذد هثثت است یا هٌفی ٍ اًذاسُ ػذد ،همذار آى را ًوایص هی دّذ .
: Note-28تزای اػذاد دٍدٍیی سِ رٍش تزای ًوایص اػذاد ػالهت دار هی تَاى تِ وارتزد : ػالهت اًذاسُ هىول یىی ٍ هىول دٍیی
بيت عالمت : Note-29تیت سوت چپ ػذد دٍدٍیی ػالهت دار ،تیت ػالهت است وِ هطخع هی وٌذ ػذد هثثت است یا هٌفی .ایي تیت تزای اػذاد هثثت ٍ 0تزای اػذاد هٌفی 1است .
سيستم عالمت -اوذازٌ ٌّ : Note-30گاهی وِ ػذد دٍدٍیی ػالهت دارتِ ضىل ػالهت – اًذاسُ )ً (Sign – Magnitudeوایص دادُ هی ضَد ،تیت سوت چپ تِ ػٌَاى تیت ػالهت است ٍ تالی تیت ّا ،تیت ّای اًذاسُ ّستٌذ .تیت ّای اًذاسُ تِ ضىل ٍالؼی ّن تزای اػذاد هثثت ٍ ّن تزای اػذاد هٌفی تِ حساب هی آیٌذ . : Note-31ػذد دّذّی +25تا استفادُ اس رٍش ػالهت – اًذاسُ تِ غَرت ػذد دٍدٍیی عالهت دار 8تیتی چٌیي است : ػذد دّذّی -25چٌیي تیاى هی ضَد (10011001) : تَخِ ضَد وِ تٌْا تفاٍت تیي -25 ٍ +25تیت ػالهت است .سیزا تیت ّای اًذاسُ تزای دٍ حالت هثثت ٍهٌفی تِ ضىل ػادی ّستٌذ .
ب ّواى غَرت ػذد هثثت است ،اها تیت ػالهت 1است . : Note-32در سیستن ػالهت – اًذاسُ ،تزای ػذد هٌفی تیت ّای اًذاسُ ُ
سيستم مکمل یکی : Note-33در سیستن هىول یىی اػذاد هثثت تِ ّواى غَرت اػذاد هثثت در رٍش ػالهت – اًذاسُ است .اها اػذاد هٌفی هىول یىی آى ػذد تِ غَرت هثثت است .
: Note-34ػذد دّذّی -25تِ غَرت هىول یىی ػذد (00011001) + 25تیاى هی ضَد یؼٌی )(11100110 : Note-35در سیستن هىول یىی ،یه ػذد هٌفی تِ غَرت هىول یىی ػذد هثثت هتٌاظز تا آى است .
10
سيستم مکمل ديیی : Note-36در سیستن هىول دٍیی ،ػذد هٌفی تزاتز هىول دٍیی هثثت هتٌاظز آى است .
(Example -11عذد دّذّی -39را بُ صَرت ّای عالهت – اًذازُ 8تیتی ،هىول یىی ٍ هىول دٍیی تیاى وٌیذ ؟
: Solution
اتتذا ػذد دٍدٍیی 8تیتی ًَ +39ضتِ ضَد (00100111) :
در سیستن ػالهت – اًذاسُ ػذد -39تا تغییز تیت ػالهت تِ ٍ 1تالی هاًذى تیت ّای اًذاسُ تِ ّواى غَرت لثل تیاى هی ضَد ،پس چٌیى است:
10100111
در سیستن هىول یىی ،ػذد -39تا هىول یىی گزفتي اس ػذد (00100111) +39تِ دست هی آیذ 11011000 : در سیستن هىول دٍیی ،ػذد -39تا هىول دٍیی گزفتي اس ػذد (00100111) +39تِ دست هی آیذ :
ﻣﮑﻣﻝ ﻳﮑﻲ ﻋﺩﺩ
11011000 1
ﻣﮑﻣﻝ ﺩﻭﻳﻲ
11011001
محاسبٍ اعذاد عالمت دار
« : Note-37عالهت اًذازُ » :اػذاد هثثت ٍهٌفی در سیستن ػالهت – اًذاسُ تا خوغ وزدى ٍسًْایی اس تیت ّای اًذاسُ وِ ّ 1ستٌذ ٍ غزفٌظز وزدى اس تیت ّایی وِ غفز ّستٌذ ،هحاسثِ هی ضَد .ػالهت آى ػذد تا تیت ػالهت آى تؼییي هی ضَد .
(Example -12اًذازُ دّذّی عذد دٍدٍیی عالهت دار 10010101را وِ تِ رٍش عالهت – اًذازُ تیاى ضذُ ،هعیي وٌیذ .
ّ : Solutionفت تیت اًذاسُ ٍ ٍسى ّای تَاى 2آى چٌیي است :
21 20 0 1
22 1
23 0
24 1
25 0
26 0
تا خوغ ٍسًْایی وِ تیت آًْا 1است ،همذار ػذد چٌیي هی ضَد 16 + 4 + 1 =21 : تیت ػالهت 1است ،تٌاتزایي ػذد -21است.
« : Note-38هىول یىی » :اػذاد هثثت در سیستن هىول یىی تا هدوَع ٍسى توام تیت ّایی وِ ّ 1ستٌذ ٍ غزفٌظز اس تیت ّایی وِ غفز ّستٌذ تِ دست هی آیذ .
: Note-39اػذاد هٌفی تا اختػاظ دادى یه ػالهت هٌفی تِ ٍسى تیت ػالهت ،خوغ وزدى ٍسى توام تیت ّایی وِ ّ 1ستٌذ ٍ افشٍدى ٍ 1احذ تِ حاغل ،تِ دست هی آیذ .
(Example -13اًذازُ دّذّی اعذاد دٍدٍیی عالهت دار زیر را وِ تِ ضىل هىول یىی تیاى ضذُ اًذ ،هعیي وٌیذ . 00010111
: Solution
11101000
تیت ّا ٍ ٍسى ّای تَاى ، 2تزای ػذد هثثت تِ غَرت سیز است : 0
2 1
تا خوغ وزدى ٍسى ّایی وِ ّ 1ستٌذ 16 + 4 + 2 + 1 = +23 :
1
2 1
2
2 1
3
2 0
4
2 1
5
2 0
6
2 0
7
2 0
تیت ّا ٍٍسى ّای تَاى ، 2تزای اػذاد هٌفی تِ غَرت سیز است .تَخِ ضَد وِ تیت ػالهت هٌفی دارای ٍسى -2+7یا -128است .
11
سيستمُاي اعذاد
21 0
20 0
23 1
22 0
25 1
24 0
27 1
26 1
تا خوغ وزدى ٍسى ّایی وِ ّ 1ستٌذ -128 + 64 + 32 + 8 = -24 : سپس ٍ 1احذ تِ حاغل خوغ افشٍدُ هی ضَد ٍػذد ًْایی چٌیي است -24 + 1 =-23:
« : Note-40هىول دٍیی » :اػذاد هثثت ٍهٌفی در سیستن هىول دٍیی تا خوغ ارسش تیت ّایی وِ ّ 1ستٌذ ٍ غزفٌظز اس توام تیت ّایی وِ غفز ّستٌذ تِ دست هی آیذ ٍ .سى تیت ػالهت در یه ػذد هٌفی تِ غَرت همذار هٌفی در ًظز گزفتِ هی ضَد .
(Example -14همذار دّذّی اعذاد دٍدٍیی عالهت دار زیر را وِ تِ صَرت هىول دٍیی تیاى ضذُ اًذ ،تعییي وٌیذ . 01010110
: Solution
10101010
تیت ّا ٍ ٍسى ّای تَاى 2آًْا تزای ػذد هثثت تِ غَرت سیز است : 1
0
2 0
2
2 1
3
2 1
4
2 0
5
2 1
6
2 0
7
2 0
2 1
تا خوغ وزدى ٍسى ّایی وِ در آًْا تیت 1است 64 + 16 + 4 + 2 = +86 :
تیت ّا ٍ ٍسى ّای تَاى 2آًْا تزای ػذد هٌفی تِ غَرت سیز است .تَخِ ضَد وِ تیت ػالهت هٌفی دارای ٍسى -27 = -128است . 0
2 0
1
2 1
2
2 0
3
2 1
4
2 0
5
2 1
6
2 0
7
2 1
خوغ ٍسى ّایی وِ در آًْا بیت 1است -128 + 32 + 8 + 2 = -86 :
حًزٌ ومایص اعذاد عالمت دار : Note-41تزای ًوایص ،اس اػذاد ّطت تیتی استفادُ هی ضَد.سیزا در تسیاری اس رایاًِ ّا گزٍُ ّای 8تیتی استاًذارد ّستٌذ ٍ اغطالحاً تایت ًاهیذُ هی ضًَذ.
: Gold Note-4 فرهَل یافتي تعذاد ترکیة ّای هختلف ترای nتیت چٌیي است :
: Gold Note-5
n
2کل ترکیثات
ترای اعذاد عالهت دار هکول دٍیی ،حَزُ هقادیر ترای عذد nتیتی چٌیي است 1 :
n1
TO 2 n1
From 2
: Note-42تزای خوغ دٍػذد دٍدٍیی ػالهت دار هوىي است چْار حالت رخ دّذ : ّ ز دٍػذد هثثت تاضٌذ . اًذاسُ ػذد هثثت اس اًذاسُ ػذد هٌفی تشرگتز تاضذ . اًذاسُ ػذد هٌفی اس ػذد هثثت تشرگتز تاضذ . ّ ز دٍ ػذد هٌفی تاضٌذ . (Example -15اوٌَى تِ عٌَاى هثال ،از اعذاد عالهت دار 8تیتی استفادُ هی وٌین .ترای هراجعِ هعادل دّذّی اعذاد ًطاى دادُ ضذُ است .
12 ّر دٍ عذد هثثت تاضٌذ :
7 4 11
00000111 00000100 0001011
هدوَع هثثت است ٍ در ًتیدِ تِ غَرت ػادی دٍدٍیی است . همذار عذد هثثت تسري تر از همذار عذد هٌفی تاضذ :
رلن ًملی ًْایی حذف هی ضَد .هدوَع هثثت است ٍ در ًتیدِ تِ غَرت ػادی (غیز هىول ضذُ ) دٍدٍیی است .
همذار عذد هٌفی تسرٌتر از همذار عذد هثثت تاضذ :
16 24 8
00010000 11101000 11111000
هدوَع هٌفی است ٍ تٌاتزایي تِ ضىل هىول دٍدٍیی است . ّر دٍعذد هٌفی تاضٌذ :
تیت رلن ًملی ًْایی حذف هی ضَد .هدوَع هٌفی ٍ تٌاتزایي تِ ضىل هىول دٍیی است .
حالت سر ریس ٌّ : Note-43گا هی وِ دٍ ػذد تا ّن خوغ ضًَذ ٍ تؼذاد تیت ّای السم تزای ًوایص حاغل خوغ اس تؼذاد تیت ّای دٍ ػذد تیطتز هی ضَد ،سزریش ) (Overflowایداد ضذُ وِ تاػث ایداد تیت ػالهت ًادرست هی ضَد .
: Note-44سزریش فمط ٌّگاهی هی تَاًذ رخ دّذ وِ ،یا ّز دٍ ػذد هثثت تاضٌذ ٍ یا ّز دٍ ػذد هٌفی تاضٌذ. : Note-45دارین :
01111101 00111010 1 0110111
False Sign False Size
در ایي هثال ،حاغل خوغ 183تِ ّطت تیت اًذاسُ ًیاس دارد .اس آًدا وِ اػذاد دارای 7تیت اًذاسُ ّستٌذ ( یه تیت تزای ػالهت ) یه رلن ًملی ٍخَد دارد وِ در تیي ػالهت ٍالغ ضذُ است ٍ ایي ًوایص اس ایداد سز ریش است .
13
سيستمُاي اعذاد بخص سًم
اعذاد ضاوسدٌ تایی
: Note-46سیستن اػذاد ضاًشدُ تایی دارای ضاًشدُ رلن است ٍ همذهتاً تِ ػٌَاى رٍضی وَتاُ تزای ًوایص اػذاد دٍدٍیی تِ وار هی رٍد .سیزا تثذیل تیي دٍدٍیی ٍ ضاًشدُ تایی تسیار سادُ است .
: Note-47اػذاد تشري دٍدٍیی تزای خَاًذى ٍ ًَضتي هطىل ّستٌذ ؛ سیزا وافی است یه تیت اس للن تیفتذ یا پس ٍ پیص ضَد .اس آًدا وِ رایاًِ ّا ٍ پزداسًذُ ّا فمط ّ 1ا ٍ ّ 0ا را هی فْوٌذ ،تِ ٌّگام تزًاهِ ًَضتي تِ ستاى هاضیي استفادُ اس ایي ارلام السم است
سيستم ضاوسدٌ تایی (Hexa )Decimal : Note-48سیستن ضاًشدُ تایی ) (Hexa Decimalیه سیستن هثٌای ضاًشدُ است ،یؼٌی اس ضاًشدُ رلن ٍ حزٍف الفثا تطىیل ضذُ است .در خذٍل سیز اػذاد 0تا ً 15وایص دادُ ضذُ است :
Hexa Decimal 0 1 2 3 4 5 6 7 8 9 A B C D E F
Decimal 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Binary 0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1 0 0 0 1 0 0 1 1 0 1 0 1 0 1 1 1 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1
تبذیل ديديیی بٍ ضاوسدٌ تایی : Note-49تثذیل ػذد دٍدٍیی تِ ضاًشدُ تایی تسیار سز راست است .ػذد دٍدٍیی را اس سوت راست تِ گزٍُ ّای چْار تیتی دستِ تٌذی وزدُ ّ ،ز گزٍُ را تا ًواد هٌاسة ضاًشدُ تایی خایگشیي وٌیذ . (Example -16اعذاد دٍدٍیی زیررا تِ هثٌای 16تثذیل وٌیذ . (1100101001010111)2
: Solution 1100 1010 0101 0111
7)16
5
A
(C
(111111000101101001)2
0011 1111 0001 0110 1001 9)16
6
1
E
درلسوت تزای تىویل گزٍُ چْارتایی در سوت چپ ػذد ،دٍ تیت غفز اضافِ ضذُ است .
(3
14
تبذیل ضاوسدٌ تایی بٍ ديديیی : Note-50تثذیل ػذد ضاًشدُ تایی تِ دٍدٍیی ،ػىس حالت لثل است ،یؼٌی ّز ًواد ضاًشدُ تایی را تِ چْار تیت هٌاسة خایگشیي وٌیذ .
(Example -17اعذاد ضاًسدُ تایی زیر را درهثٌای 2تیاى وٌیذ . (10A4)16
(CF83)16
: Solution (1 0 A 4)16 (1 0000 1010 0100) 2
(9 7 4 2)16 (1001 0111 0100 0010) 2
(9742)16
(C F 8 3)16 (1100 1111 1000 0011) 2
در لسوت لثل اس ، MSBسِ غفز ٍخَد دارد ،لذا یه گزٍُ چْار تیتی را تطىیل هی دّذ .
تبذیل مبىاي ضاوسدٌ بٍ مبىاي دٌ : Note-51یه رٍش هحاسثِ ػذد هثٌای ضاًشدُ تز حسة ػذد دّذّی هؼادل آى اتتذا تثذیل وزدى ػذد ضاًشدُ تایی تِ ػذد دٍدٍیی ٍ ،سپس تثذیل ػذد دٍدٍیی تِ دّذّی است .
(Example -18اعذاد هثٌای 16زیر را تِ دّذّی تثذیل وٌیذ . (1C)16
: Solution
(A85)16
(1 C )16 000111002 2 4 23 2 2 16 8 4 2810 (0001 1100) 2 (A 8 5)16 101010000101 211 29 27 2 2 20 269310 (1010 1000 0101) 2
: Note-52رٍش دیگز تثذیل ػذدهثٌای ضاًشدُ تِ دّذّی هؼادل آى ،ضزب وزدى ّز رلن ػذد ضاًشدُ تایی در ارسش هىاًی آى ٍ
سپس هحاسثِ هدوَع ایي حاغل ضزب ّا است .ارسش هىاًی ػذد ضاًشدُ تایی تِ غَرت تَاًی اس 16اس راست تِ چپ افشایص هی یاتذ .تزای یه ػذد چْار رلوی هثٌای ضاًشدُ ارسش هىاًی ارلام تِ غَرت سیز است :
163 16 2 161 160 4096 256 16 1 (Example -19اعذاد (B2F8)16 ٍ (E5)16را تِ دّذّی تثذیل وٌیذ .
: Solutionتا تَخِ تِ خذٍل ًىتِ ضوارُ 48وِ حزٍف Aلغایت Fاػذاد دّذّی 10لغایت 15را تِ تزتیة ًطاى هی دّذ ؛ دارین :
E516 E 16 5 1 14 16 5 1 229 B2F 816 B 4096 2 256 F 16 8 1 11 4096 2 256 15 16 8 1 45816
15
سيستمُاي اعذاد
تبذیل دَذَی بٍ ضاوسدٌ تایی
: Note-53تا تمسین ّای هتَالی ػذد دّذّی تز ، 16ػذد هؼادل در هثٌای 16را هی تَاى تا استفادُ اس تالیواًذُ ّا در تمسین تِ دست آٍرد .اٍلیي تالیواًذُ آى ون ارسش تزیي رلن ) (LSDرا ایداد هی وٌذ ّ .ز تمسین هتَالی تز 16اس ایي فزآیٌذ تالیواًذُ ای دارد وِ یه رلن اس ػذد هؼادل در هثٌای ضاًشدُ است . : Note-54تَخِ وٌیذ ٌّگاهی وِ خارج لسوت یه ػذد؛اػطاری است ،لسوت اػطاری آى تایذ در خارج لسوت ضزب ضَد تا تالیواًذُ تِ دست آیذ .
(Example -20عذد دّذّی 650را تا استفادُ ازتمسین ّای هتَالی تر 16تِ هعادل ضاًسدُ تایی آى تثذیل وٌیذ .
: Solution
65010 28 A16
جمع در مبىاي 16 : Note-55تزای خوغ اػذاد ضاًشدُ تایی لَاػذ سیز را تایذ تِ وار تزیذ :
تزای ّز رلن ػذد ضاًشدُ تایی در خوغ ،هؼادل دّذّی آى را در ًظز تگیزیذ .
اگز هدوَع دٍ رلن 15یا ووتز ضَد ،هؼادل ضاًشدُ تایی آى را تٌَیسیذ .
اگز هدوَع دٍرلن اس 15تشرگتز ضَد ،آًچِ حاغل خوغ اس 16تیطتز است ،لزار دادُ ضذُ ،رلن ًملی 1تِ رلن تؼذی افشٍدُ هی ضَد .
(Example -21حاصل جوع اعذاد ضاًسدُ تایی زیر را تِ دست آٍریذ : (23)16 + (16)16 (2B)16 + (84)16
: Solution
(58)16 +(22)16 (DF)16 + (AC)16
: 316 616 310 610 910 916رلن سوت راست
216 116 210 110 310 316
:رلن سوت چپ
816 216 810 210 1010 A16 516 216 510 210 710 716
:رلن سوت راست
:رلن سوت چپ
B16 416 1110 410 1510 F 16
:رلن سوت راست
216 816 210 810 1010 A16
:رلن سوت چپ
2316 16 16 3916 5816 22 16 7 A16 2 B 16 84 16 AF 16
16
F 16 C 16 1510 1210 2710
:رلن سوت راست
2710 1610 1110 B16 D16 A16 116 1310 1010 110 2410 2410 1610 810 816
DF 16 AC 16 18B 16
:تا یه رلن ًملی
:رلن سوت چپ :تا یه رلن ًملی
تفریق در مبىاي ضاوسدٌ با استفادٌ از مکمل ديیی
: Note-56اسآًدا وِ اػذاد ضاًشدُ تایی هی تَاًذ تزای ًوایص اػذاد دٍدٍیی تِ وار تزدُ ضَد ،اس آى ًیش هی تَاى تزای ًوایص هىول دٍدٍیی ػذد دٍدٍیی استفادُ وزد .
(Example -22تفریك اعذاد ضاًسدُ تایی زیر را درهثٌای 16اًجام دّیذ . (84)16 – (2A)16
: Solution
(C3)16 – (0B)16
(2A)16 = (00101010)2
) = (11010110)2 =(D6هىول دٍیی (2A)16 رلن ًملی حذف هی ضَد ؛ در ًتیدِ حاغل تفزیك (5A)16است .
8416 D6 16 15 A16 (0B)16 = (00001011)2
) = (11110101)2 = (F5هىول دٍیی)(0B تا حذف رلن ًملی ،حاغل تفزیك تزاتز است تا (B8)16 :
C 316 F 516 1B816
17
سيستمُاي اعذاد
بخص چُارم
اعذاد َطت تایی : Note-57سیستن اػذاد ّطت تایی اس ّطت رلن هماتل تطىیل ضذُ است : 0,1,2,3,4,5,6,7
تبذیل َطت تایی بٍ دَذَی : Note-58اس آًدا وِ سیستن ّطت تایی ،سیستن هثٌای 8است ،لذا ارسش هىاًی ّز رلن 8تزاتز ارسش هىاًی رلن لثلی است ٍ ارسش هىاًی ر لن سوت راست 80است .تزای تثذیل ػذد ّطت تایی تِ ػذد دّذّی ّ ،ز رلن را در ٍسى آى ضزب وزدُ ٍ سپس هدوَع حاغل ضزب ّا را تِ دست هی آٍرین .
: Test 4عذد (5276)8هعادل چِ عذدی در هثٌای 10هی تاضذ ؟ 2750 (2
2751 (1
6751 (4
6750 (3
تبذیل دَذَی بٍ َطت تایی : Note-59یه رٍش تثذیل ػذد دّذّی تِ ّطت تایی رٍش تمسیوات هتَالی تز 8است وِ هطاتِ رٍش تثذیل دّذّی تِ دٍدٍیی است .
ّ : Note-60ز ػول تمسین تز 8تالیواًذُ ای دارد وِ تا یه رلن اس ػذد ّطت تایی هؼادل است .اٍلیي تالیواًذُ ،ون ارسش تزیي رلن ) (LSBاست .
: Test 5هعادل ّطت تایی عذد 359وذام است ؟
547 (1
745 (2
475 (4
457 (3
تبذیل َطت تایی بٍ ديديیی
: Note-61اس آًدا وِ تزای ًوایص ّطت رلن هثٌای ّطت تِ سِ تیت دٍدٍیی ًیاس است ،تثذیل ّطت تایی تِ دٍدٍیی ٍ دٍدٍیی تِ ّطت تایی آساى است ّ .ز رلن ّطت تایی تا سِ بیت هطاتك خذٍل سیز ًوایص دادُ ضذُ است .
7
5
6
3
4
1
2
0
رلن ّطت تایی
000 001 010 011 100 101 110 111
رلن دٍدٍیی
: Note-62تزای تثذیل ػذد ّطت تایی تِ دٍدٍیی ّ ،زرلن اس ػذد ّطت تایی را تا سِ تیت هٌاسة خایگشیي هی وٌین . ّ (Example -23ر یه از اعذاد هثٌای 8زیر را تِ دٍدٍیی تثذیل وٌید :
13
: Solution 1 3
001 011 2 7 6
25
5
2
010 101
0
140
4
1
001 100 000
5
101 010 111 110
تبذیل ديديیی بٍ َطت تایی
: Note-63تثذیل ػذد دٍدٍیی تِ ػذد ّطت تایی ،ػىس تثذیل ّطت تایی تِ دٍدٍیی است .
5276
18 تا اٍلیي دستِ سِ تیتی سوت راست آغاس وزدُ ،تا حزوت اس سوت راست ػذد تِ سوت چپ آى ّ ،ز دستِ سِ تیتی را تِ رلن ّطت تایی هؼادل تثذیل وٌیذ .اگز تزای سوت چپ تزیي گزٍُ سِ تیت ًثَد ،یه یا دٍ غفز اضافِ ضَد تا یه گزٍُ واهل ساختِ ضَد .ایي غفزّای سوت چپ ػذد ،همذار ػذد دٍدٍیی را تغییز ًوی دّذ .
ّ (Example -24ر یه از اعذاد دٍدٍیی زیر را تِ هعادل ّطت تایی اش تثذیل وٌیذ :
110101
: Solution
101111001
011010000100
100110011010
)(101 111 001 5 7 1 5718 )(011 010 000 100 3 2 0 4 32048
)(110 101 6 5 658 )(100 110 011 010 4 6 3 2 46328 کذَاي بایىري
: Note-64ایي وذّا دٍ دستِ اًذ ؛ وِ ػثارتٌذ اس :وذّای ٍزى دار ٍ وذّای تذٍى ٍزى
Gray 1 وذّای تذٍى ٍسى Excess 3 2 : Ha min g 3
BCD 1 وذّای ٍسى دار : NBCD 2 عذد دَذَی رمس ضذٌ بٍ ديديیی )(BCD
: Note-65دّذّی رهش ضذُ تِ دٍدٍیی ) (Binary Coded Decimale) ، (BCDرٍضی است وِ در آى ّز رلن دّذّی تا یه رهش دٍدٍیی تیاى هی ضَد .
رمس8421 : Note-66رهش 8421یه ًَع اس رهش ) (Codeدّذّی رهش ضذُ تِ دٍدٍیی ) (BCDاست .دّذّی رهش ضذُ تِ دٍدٍیی یؼٌی ّز رلن دّذّی 0 ،لغایت 9تا یه رهش دٍدٍیی چْار تیتی ًوایص دادُ هی ضَد ً .واد ٍ 8421سى ّای دٍدٍیی را تزای چْار تیت ًطاى هی دٌّذ
) . (23 , 22 , 21 , 20تشرگتزیي هشیت ایي رهش ،سادگی تثذیل تیي اػذاد رهش ٍ 8421اػذاد دّذّی هتذاٍل است .توام آًچِ وِ تایذ تِ خاطز تسپاریذ 10تزویة دٍدٍیی است وِ 10رلن دّذّی را ًطاى هی دٌّذ .تٌاتزایي تا تَخِ تِ خذٍل سیز دارین :
9
8
7
6
5
4
3
2
1
0
0000 0001 0010 0011 0100 0101 0110 0111 1000 1001
رلن دّذّی BCD
: Note-67رهش 8421رهش BCDغالة است ٍ ٌّگاهی وِ تِ BCDهزاخؼِ هی ضَد ّ ،وَارُ هٌظَر ّواى رهش 8421هی تاضذ ،در غیز ایي ظٍرت تیاى ًَع آى هی ضَد .
رمسَاي بی ارزش
19
سيستمُاي اعذاد
: Note-68تا چْار تیت هی تَاى ضاًشدُ ػذد) 0000لغایت (1111را ًوایص داد ،تٌاتزایي در رهش 8421فمط 10تا اس آًْا استفادُ هی ضَد .ضص تزویة رهش ) (1111 , 1110 , 1101 , 1100 , 1011 , 1010وِ اس آى استفادُ ًوی ضَد ،رهشّای تی ارسش 8421 ّستٌذ .تزای تیاى ّز ػذد دّذّی تِ غَرت ّ ، BCDز رلن دّذّی را تا چْار تیت هتٌاظز خایگشیي هی وٌین .
ّ (Example -25ر یه از عذدّای دّذّی زیر را تِ BCDتثذیل وٌیذ .
35
: Solution 3 5
170
98
0011 0101 7 0
1
0001 0111 0000
8
9
1001 1000 6 9
10000110
: Solution 1000 0110
6
8
001101010001
0011 0101 0001 1
5
2
4
0010 0100 0110 1001
ّ (Example -26ر یه از عذد ّای BCDزیر را تِ دّذّی تثذیل ًواییذ .
2469
3
1001010001110000
1001 0100 0111 0000 0
7
4
9
جمع BCD BCD : Note-69یه رهش ػذدی است وِ هی تَاًذ در ػولیات هحاسثاتی تِ وار رٍد .ػول خوغ هْن تزیي ػول است ؛ سیزا سِ ػول دیگز (تفزیك ،ضزب ،تمسین )را هی تَاى تا خوغ اًدام داد .تزای خوغ دٍ ػذد BCDتِ غَرت سیز ػول هی ضَد : تا استفادُ اس لَاًیي خوغ دٍدٍیی دٍ ػذد BCDرا خوغ وٌیذ . اگز حاغل خوغ چْار تیتی تِ دست آهذُ تزاتز یا وَچىتز اس 9تاضذ ،یه ػذد BCDتا ارسش است . اگز حاغل خوغ چْار تیتی تِ دست آهذُ تشرگتز اس 9تاضذ یا دارای یه رلن ًملی تاضذ ً ،تیدِ تِ دست آهذُ فالذ ارسش است .در ایي غَرت ػذد 6یؼٌی ، (0110)2تِ چْار تیت حاغل خوغ افشٍدُ تااس ضص حالت فالذ ارسش اختٌاب ضذُ ٍ ،تِ رهش 8421تثذیل ضَد اگز تز اثز افشٍدى ػذد ، 6رلن ًملی ایداد ضَد ،ایي رلن ًملی را تایذ تا گزٍُ چْار تیت تؼذی خوغ وزد . (Example -27اعذاد BCDزیر را جوع نًیذ (جوع دّذّی ترای همایسِ ًطاى دادُ ضذُ است ) 0011 + 0100 00100011 + 00010101 10000110 + 00010011 010001010000 + 010000010111
: Solution 0011 3
0100 4 7
0111
23 15 38
0010 0011 0001 0101 0011 1000
20 86 13 99
450 417 867
1000 0110 0001 0011 1001 1001
0100 0101 0000 0100 0001 0111 1000 0110 0111
(Example -28اعذ اد BCDزیر را جوع وٌیذ . 1001 + 0100 1001 + 1001 00010110 + 00010101 01100111 + 01010011 : Solutionتزای همایسِ خوغ دّذّی ًیش ًطاى دادُ ضذُ است :
1001 0100
9 4 13
1101
ػذد BCDتا ارسش افشٍدى 6 ػذد BCDفالذ ارسش )( > 9
0110 0001 0011
3 1001 1001
9 9 18
1
1 0010 ػذد BCDتی ارسش افشٍدى 6رلن ًملی ایداد ضذُ تی ارسش است
16 15 31
0110 0001 1000
8
1
ٍ 6احذ اضافِ ضذُ ٍ رلن ًملی تِ گزٍُ تؼذی هٌتمل هی ضَد ػذد سوت راست فالذ ارسش است
0110 0101 1011
0001 0001 0010
0110 0011 0001 1
3
21
سيستمُاي اعذاد
67 53ػذد BCDتا ارسش ّ زدٍ گزٍُ فالذ ارسش تَدٍُ 6 ،احذ تِ ّز دٍ گزٍُ اضافِ هی ضَد 120 0110 0111 0101 0011 1011 1010 0110 0110 0001 0010 0000 1 2 0 رمس گِرِي : Note-70رهش گزی ) (Grayیه رهش تذٍى ٍسى است .یؼٌی تزای هَلؼیت ّز تیت ٍ ،سى خاغی ٍخَد ًذارد .خاغیت هْن رهش گزی ایي است وِ اس یه ػذد تِ ػذد تؼذی فمط یه تیت آى تغییز هی وٌذ .تٌاتزایي طثك خذٍل سیز دارین : Gary
Binary
Decimal
Gary
Binary
Decimal
1100
1000
8
0000
0000
0
1101
1001
9
0001
0001
1
1111
1010
10
0011
0010
2
1110
1011
11
0010
0011
3
1010
1100
12
0110
0100
4
1011
1101
13
0111
0101
5
1001
1110
14
0101
0110
6
1000
1111
15
0100
0111
7
: Note-71هاًٌذ دٍدٍیی ،رهش گزی هی تَاًذ ّز چٌذ تیت داضتِ تاضذ .دلت ضَد وِ تیي دٍ رهش هتَالی ،فمط یه تیت تغییز هی وٌذ .هثالً تزای رفتي اس ػذد دّذّی 3تِ 4رهش گزی اس 0010تِ 0110تغییز هی وٌذ ،حال آًىِ رهش دٍدٍیی اس 0011تِ 0100تغییز هی وٌذ هالحظِ می ضَد وِ تزای ػذد دٍدٍیی درایي تغییز 3 ،تیت ػَؼ ضذُ است ،حال آًىِ در رهشگزی تٌْا تیت سَم اس سوت راست تغییزوزدُ ٍ تمیِ تذٍى تغییز هاًذُ اًذ.
تبذیل ديديیی بٍ گري
: Note-72رٍش وار :
تا ارسش تزیي رلن (رلن سوت چپ) در رهش گزی وِ ّواى رلن MSBهتٌاظز در ػذد دٍدٍیی است را هی ًَیسین.
تا رفتي اس چپ تِ راست ،تا خوغ ّزدٍرلن دٍدٍیی هداٍر ٍ غزفٌظز اس رلن ًملی ،رلن تؼذی رهش گزی تِ دست هی آیذ .
(10110)2 (Example -29را تِ رهس ٌری تثذیل ًواییذ .
: Solution
22
لذم اٍل :رلن سوت چپ گزی هاًٌذ رلن سوت چپ دٍدٍیی است.
لذم دٍم :رلن سوت چپ ػذد دٍدٍیی تا رلن هداٍر آى خوغ هی ضَد .
لذم سَم :خفت تؼذی تا ّن خوغ هی ضًَذ .
لذم چْارم :خفت تؼذی تا ّن خوغ هی ضًَذ ٍ اس رلن ًملی غزفٌظز هی ضَد .
لذم پٌجن :آخزیي خفت اػذاد هداٍر تا ّن خوغ هی ضًَذ .
1 0 1 1 0 Binary 1 Gray
1 0 1 1 0 Binary 1 1 Gray 1 0 1 1 0 Binary 1 1 1 Gray 1 0 1 1 0 Binary 1 1 1 0 Gray
1 0 1 1 0 Binary 1 1 1 0 1 Gray
اوٌَى تثذیل واهل تَدُ ،رهش گزی 11101است .
تبذیل گري بٍ ديديیی : Note-73تِ طَر ولی اس رٍش سیز استفادُ هی ضَد :
تا ارسش تزیي رلن ( رلن سوت چپ ) در رهش دٍدٍیی هاًٌذ رلن هتٌاظز در رهش گزی است ,آى را تذٍى تغییز هی ًَیسین.
ّز رلن دٍدٍیی ایداد ضذُ را تا رلن تؼذی دٍدٍیی خوغ وزدُ ٍ اس رلن ًملی غزف ًظز وٌیذ .
(Example -30رهس ٌری 11011را تِ تایٌری تثذیل وٌیذ ؟
لذم اٍل :ارلام سوت چپ یىساى ّستٌذ .
لذم دٍم :آخزیي رلن دٍدٍیی ایداد ضذُ را تا رلن تغدی رهش گزی خوغ وٌیذ .اس رلن ًملی غزفٌظز وٌیذ .
Gary
1 1 0 1 1
Binary Gary
Binary
لذم سَم :آخزیي رلن دٍدٍیی ایداد ضذُ را تا رلن تؼذی گزی خوغ وٌیذ .
1 0 1 1
1 1 1 0
23
سيستمُاي اعذاد
Gary
1 1 0 1 1 1 0 0
Binary
لذم چْارم :آخزیي رلن دٍدٍیی ایداد ضذُ را تا رلن تؼذی گزی خوغ وٌیذ .
لذم پٌجن :آخزیي رلن دٍدٍیی ایداد ضذُ را تا رلن تؼذی گزی خوغ وٌیذ .
Gary Binary Gary
1
1 1 0 1 1 0 0 1
1 1 0 1 1
1 0 0 1 0 Binary اوٌَى تثذیل واهل است .ػذد دٍدٍیی ًْایی 10010است . : Test 6تثذیل عذد دٍدٍیی 11000110تِ رهس ٌری وذام است ؟
11011100 (1
10100101 (2
10111011 (3
( Example-31تثذیل رهس ٌری 10101111تِ دٍدٍیی وذام است ؟
11100110 (2 101101011 (1 : Solutionتثذیل رهش گزی تِ دٍدٍیی
11001010 (3
11101000 (4
10100010 (4
1 0 1 0 1 1 1 1 1 1 0 0 1 0 1 0
ٌسیٌِ «»3
رمس سٍ افسا )(Excess 3 : Note-74سِ افشا ) (Excess 3یه رهش رلوی است وِ اب افشٍدى ٍ 3احذ تِ ّز رلن دّذّی ٍ سپس تثذیل ًتیدِ آى تِ چْار تیت دٍدٍیی حاغل هی ضَد .اس آًدا وِ ّیچ ٍسًی را ًوی تَاى تزای هىاى ّای چْار تیت تؼزیف وزد ،لذا رهش سِ افشا رهش تذٍى ٍسى است وِ در ػولیات هحاسثاتی خاظ هشایایی دارد .
)(Excess 3
BCD
0011
0000
0
0100
0001
1
0101
0010
2
0110
0011
3
0111
0100
4
1000
0101
5
1001
0110
6
1010
0111
7
24
: Note-75در رمس سِ افشا اس تیي 16تزویة رهش هختلف 10 ،تا استفادُ ضذُ است .ضص تزویة فالذ ارسش در رهش سِ افشا ّستٌذ وِ ػثارتٌذ اس 0000 , 0001 , 0010 , 1101 , 1110 , 1111 :
(Example-32اعذاد دّذّی زیررا تِ رهس سِ افسا تثذیل وٌیذ . 430
13
: Solutionاتتذا تِ ّز رقم دّذّی ٍ 3احذ اضافِ هی وٌین ،سپس ّز حاغل خوغ را تِ هؼادل دٍدٍیی اش تثذیل هی وٌین .
3 3 6
1 3 4
0 3 3
0110
0100
0011
3 3 6
0110
4 3 7
0111
Haming Code : Note-76ایي وذ ًیش اس BCDساختِ هی ضَد .در ایي وذ تِ 4تیت 3 ، BCDتیت اضافِ هی ضَد ٍ وذ 7 ،تیتی تَلیذ هی ضَد . : Test 7هعادل عذد (1001)BCDدر وذ ّویًٌ وذام است ؟
0011001 (1
0010101 (2
0111011 (3
1100110 (4
ريش تًازن براي آضکار سازي خطا : Note-77تسیاری اس سیستن ّا تِ هٌظَر آضىار ساسی خطا ) (Error Detectionاس تیت تَاسى ) (Parity Bitاستفادُ هی وٌيد . ّز دستِ ای استیت ّا یا ضاهل تؼذادی سٍج یا تؼذادی فزد اس ػذد 1است .تیت تَاسى فزد ) (odd parityدستِ ای اس تیت ّا را ضاهل هی ضَد وِ تؼذاد ول ّ 1ا در آى دستِ ّوَارُ فزد تاضذ .تیت تَاسى سٍج ) (Even Parityتاػث هی ضَد تؼذاد ّ 1ا در آى دستِ سٍج رد ) (Odd Parityتاػث هی ضَد تؼذاد ول ّ 1ا فزد تاضذ . ٍ تیت تَاسى ف ّ : Note-78ز سیستوی یا تا تَاسى سٍج یا تا تَاسى فزد وار هی وٌذ ،اها تا ّزدٍ ،خیز .هثالً اگز سیستوی تا تَاسى سٍج وار وٌذ ّز دستِ اس تیت ّای دریافتی آسهایص هی ضَد تا اطویٌاى حاغل ضَد وِ تؼذاد ّ 1ا در آى دستِ سٍج است .اگز تؼذاد ّ 1ا فزد تاضذ ، خطایی رخ دادُ است .
: Note-79تزای ایٌىِ ًحَُ اتػال تیت تَاسى تِ یه رهش ًطاى دادُ ضَد ،در خذٍل سیز فْزست تیت تَاسى تزای ػذد
ّ BCDن
تزای تَاسى سٍج ٍ ّن تزای تَاسى فزد آٍردُ ضذُ است .تیت تَاسى تزای ّز ػذد BCDدر ستٍى Pلزار دارد . تز اساس ًَع طزاحی سیستن ،تیت تَاسى را هی تَاى یا تِ آغاس یا تِ اًتْای رهش هتػل وزد .تَخِ ضَد وِ تؼذاد ولّ 1ا تِ ّوزاُ تیت تَاسى تزای تَاسى سٍج ّوَارُ سٍج تاضذ ٍ تزای تَاسى فزد ّوَارُ فزد تاضذ . تِ خذٍل سیز تَخِ ًواییذ .
سيستمُاي اعذاد BCD 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001
تَازى فرد
P 1 0 0 1 0 1 1 0 0 1
BCD 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001
تَازى زٍج
25 P 0 1 1 0 1 0 0 1 1 0
آضکارسازي خطا
: Note-80یه تیت تَاسى تزای آضىارساسی یه تیت خطا استفادُ هی ضَد (یا ّز تؼذاد خطای فزد وِ ایي خیلی تؼیذ است ).اها ًوی تَاًذ ٍخَد دٍخطا را در یه دستِ آضىار وٌذ .هثالً فزؼ وٌیذ هی خَاّین ( 0101یه رهش ) BCDرا اًتمال دّین (تَاسى را هی تَاى تا ّز تغداد تیت تِ وار تزد ،در ایٌدا تزای ًوایص چْار تیت استفادُ ضذُ است ) رهش ًْایی ارسال ضذُ حاٍی تیت تَاسى سٍج تِ غَرت سیز است :
(Example-33تِ ّر یه از دستِ رهسّای زیر تیت تَازى زٍج هٌاسة را لحاق ًواییذ ؟ 11100
1010 01101011111 : Solutionتیت تَاسى تزای ایٌىِ تؼذاد ول ّ 1ا سٍج ضَد یا 1است یا . 0تیت تَاسى در سوت چپ لزار هی گیزد : 01010 001101011111
111100
101101
10011100101
0 101101
10011100101
: Note-81تزای آًىِ یه وذ تایٌزی تساسین تؼذاد حالتْایی وِ ًیاس دارین تِ وذ تثذیل ضَد را هطخع وزدُ ٍ سپس تؼذاد ارلام تایٌزی ساسًذُ وذ را تِ دست هی آٍرین :
N 2n : Nتؼذاد حالتْای وذ : nتؼذاد ارلام تایٌزی
: Test 8اٌر تخَاّین 32حرف فارسی را تِ صَرت وذّای تایٌری ًوایص دّین تِ چٌذ رلن تایٌر ی ًیاز دارین ؟
2 (1
3 (2
4 (3
5 (4
: Test 9اٌر تخَاّین 100ولیذ را تِ صَرت الىتریىی تِ وذّای هطاتْی ًسثت دّین چٌذ Bitتایٌری هی تَاًذ ایي وار را اًجام دّذ ؟
5 (1
6 (2
7 (3
8 (4
ٌّ : Note-82گاهی وِ ػذد اس هثٌای وَچىتز تِ هثٌای تشرگتز هی رٍد ،ظاّز آى وَچىتز هی ضَد . : Note-83ػذد فزد در ّز هثٌایی فزد ؛ ٍ ػذد سٍج در ّزهثٌایی سٍج است .
26 : Note-84در هثٌای 16اگز رلن سوت راست E,C,Aتاضذ سٍج ٍ اگز ارلام F,D,Bتاضذ فزد است . : Note-85در هثٌای 2اگز ػذد سوت راست غفز تاضذ سٍج ٍ ،اگز 1تاضذ فزد است .
Self Test : 1حاصل جوع دٍ عذد هماتل وذام است ؟
10011011 11000100 ?
: 2حاصل تفریك دٍ عذد هماتل وذام است ؟
110000 100 ?
: 3هتون دٍم عذد 1011101010011را تذست آٍریذ ؟ : 4هتون یه عذد 11101101100را تذست آٍریذ ؟ : 5عذد (1257)8در هثٌای 16چِ عذدی است ؟ : 6حاصل عثارت ، (AB4)16 + (C1A)16 = (?)16را تذست آٍریذ ؟ : 7حاصل عثارت ، (AF2)16 + (114)8 = (?)8را تذست آٍریذ ؟ : 8حاصل عثارت (1011110111)2 – (1111)2 = (?)2را تذست آٍریذ ؟ : 9عذد تعذ از (2AFF)16چِ عذدی است ؟ : 10حاصل عثارت (3260)8 + (742)8 = (?)16را تذست آٍریذ ؟ : 11هعادل 952در Gray Codeچیست ؟
سيستمُاي اعذاد : 12هعادل وذ تایٌری عذد (1101101)Garyچیست ؟ : 13هعادل وذ Garyعذد 10011010 ، Binaryرا بدست آٍریذ ؟ : 14اٌر تخَاّین عذد 5را تَسط سیستن Hamingارسال وٌین عذد ارسالی چِ عذدی است ؟ : 15عذد 011001000011در وذ Garyهعادل چِ عذد هی تاضذ ؟ Haming Code : 16عذد 9وذام است ؟
27
28
2 LOGIC GATES INTRODUCTION
Basic logic function and gates Derived logical functions and gates ThE XOR function
29
گيتهاي منطقي
بخش اول
معرفي گيت ها و بررسي آنها
: Note-1هؼکَط کٌٌذُ (هذار ) NOTیک ػول هٌغمی اطلی را اًدام هی دّذ کِ هؼکَط یا هکول ًاهیذُ هی شَد ّ .ذف اس هؼکَط کٌٌذُ ،تغییز عغح هٌغمی تِ عغح هتضاد آى اعت .تز حغة تیت ،ایي هذار 1را تِ 0 ٍ 0را تِ 1تثذیل هی کٌذ .
ً : Note-2وادّای هؼکَط کٌٌذُ در شکل ّای سیز ًشاى دادُ شذُ اعت :
نشان دهنذه قطبيت و نفي
ً : Note-3شاى دٌّذُ لغثیت ٍ ًفی ) (Inverterیک دایزُ کَچک
کَچک اعت کِ در ٍرٍدی یا خزٍخی یک لغؼِ هٌغمی ظاّز
هی شَد .
ٌّ : Note-4گاهی کِ ایي دایزُ در ٍرٍدی ظاّز هی شَد تِ ایي هؼٌی اعت کِ ّز 0خارخی ،حالت ٍرٍدی را فؼال هی کٌذ ٌّ .گاهی کِ دایزُ کَچک در خزٍخی ظاّز هی شَد تِ ایي هؼٌی اعت کِ 0داخلی ،خزٍخی را فؼال هی کٌذ .
جذول صحت معکوس کننذه ٌّ : Note-5گاهی کِ عغح ٍلتاص تاال تِ ٍرٍدی هؼکَط کٌٌذُ دادُ هی شَد ،در خزٍخی آى عغح ٍلتاص پاییيٌّ ،گاهی کِ تِ ٍرٍی عغح ٍلتاژ پائیي دادُ هی شَد در خزٍخی آى عغح ٍلتاص تاال ظاّز هی شَد.
30
عملکرد معکوس کننذه : Note-6شکل سیز ػولکزد هؼکَط کٌٌذُ را تِ اسای پالظ ٍرٍدی ًشاى هی دّذ ٌّ .گاهی کِ ٍرٍدی تاال اعت ،خزٍخی پاییي اعت . در ًتیدِ پالظ خزٍخی هؼکَط شذُ ای را تَلیذ هی کٌذ .
: Gold Note-1 عملکرد گیت NOTماوىذ شکل زیر می باشذ :
: Gold Note-2 n
برای وًشته تعذاد سطرَای جذيل صحت از رابطٍ 2استفادٌ می وماییم .تًجٍ شًد کٍ nتعذاد متغیرَای يريدی می باشذ .
بيان منطقي براي معکوس کننذه ها : Note-7هکول یک هتغیز را تا لزار دادى یک خظ تیزُ رٍی آى ًوایش هی دٌّذ
ّ .ز هتغیز هی تَاًذ همذار 1یا 0را تِ خَد
اختظاص دّذ .اگز همذار هتغیزی 1تاشذ ،هکول آى 0اعت ،یا تز ػکظ.
: Note-8ػولکزد هؼکَط کٌٌذُ (هذار ) NOTرا هی تَاى تِ طَرت سیز تیاى کزد :
اگر هتغیر ٍرٍدی آى ٍ Aهتغیر خرٍجی آى Xباشد ،در ایي صَرت X A : ایي ػثارت تیاى هی کٌذ کِ خزٍخی تزاتز هکول ٍرٍدی اعت ،تٌاتزایي اگز A = 0تاشذ ،آًگاُ X = 1اعت ٍ اگز A = 1آًگاُ X = 0 خَاّذ تَد .
31
گيتهاي منطقي
کاربرد معکوس کننذه ها : Note-9شکل سیز هذاری را تزای تَلیذ هکول یکی یک ػذد دٍدٍیی 8تیتی ًشاى هی دّذ .تیت ّای ػذد دٍدٍیی تِ ٍرٍدی ّای هؼکَط کٌٌذُ ٍارد شذُ ٍ هکول یکی آى ػذد در خزٍخی ظاّز هی شَد .
گيت AND
: Note-10گیت ANDیکی اس گیت ّای اطلی اعت کِ تا آى تَاتغ هٌغمی عاختِ هی شَد
.گیت ANDدارای دٍ یا چٌذ ٍرٍدی
اعت ٍػول ضزب هٌغمی را اًدام هی دّذ.
: Note-11کلوِ گیت تزای تَطیف هذاری کِ یک ػول هٌغمی پایِ را اًدام هی دّذ ،اعتفادُ هی شَد .
عملکرد منطقي گيت AND : Note-12ػولکزد گیت ANDتِ گًَِ ای اعت کِ فمظ ٌّگاهی کِ توام ٍرٍدی ّای آى تاال تاشٌذ ،خزٍخی ٍلتاص تاال اعت ّ .زگاُ یکی اس ٍرٍدی ّا ٍلتاص پاییي داشتِ تاشذ ،خزٍخی ٍلتاص پاییي خَاّذ داشت .
: Note-13در ػولکزد گیت ANDدٍ ٍرٍدی ،خزٍخی Xدر طَرتی تاالعت کِ ّز دٍ ٍرٍدی B ٍ Aتاال تاشٌذ ٍ Xپاییي اعت ؛ اگز Aیا Bپاییي تاشٌذ یاّ Bٍ Aز دٍپاییي تاشٌذ .
: Note-14شکل سیز گیت ANDدٍ ٍرٍدی را تا چْار حالت تزکیة هوکي ٍرٍدی ٍ ًتیدِ خزٍخی تزای ّز حالت اس ٍرٍدی را ًشاى هی دّذ.
32
: Gold Note-3 در صًرتی کٍ َر سٍ کلیذ بستٍ باشىذ ؛ خريجی مًرد وظر Vخًاَذ بًد ي در صًرتی کٍ حتی یکی از کلیذَا باز باشذ ،خريجی صفر خًاَذ بًد .
جذول صحت گيت AND : Note-15در شکل سیزخذٍل طحت گیت ANDتا دٍ ٍرٍدی ًشاى دادُ شذُ اعت : Output X = AB 0 0 0 1
B 0 1 0 1
Inputs
A 0 0 1 1
: Note-16تزای ّز گیت ANDتذٍى در ًظز گزفتي تؼذاد ٍرٍدی ّا ،خزٍخی فمظ در حالتی تاال اعت کِ توام ٍرٍدی ّا تاال تاشٌذ
: Note-17تؼذاد تزکیثات هوکي ٍرٍدی ّای دٍدٍیی تَعظ راتغِ هماتل تؼییي هی شَد N 2 n : در ایي راتغِ Nتؼذاد کل تزکیثات هوکي ٍ nتؼذاد هتغیزّای ٍرٍدی اعت .
: Note-18تزای هثال تِ چٌذ حالت سیز تَخِ ًواییذ : تزای دٍهتغیز ٍرٍدی : تزای عِ هتغیز ٍرٍدی : تزای چْار هتغییز ٍرٍدی :
2
2 4تزکیة 3
2 8تزکیة 4
2 16تزکیة
عملکرد پالسي گيت AND : Note-19تزای اهتحاى ػن لکزد پالغی گیت ، ANDتزای تؼییي عغح ٍلتاص خزٍخی در ّز لحظِ تِ همادیز ٍرٍدی ّا ًغثت تِ ّوذیگز تَخِ شَد .
33
گيتهاي منطقي : Note-20ػولکزد پالغی گیت ANDدٍ ٍرٍدی (تِ سهاى tAتا tBدلت فزهاییذ )
: Note-21ػولکزد پالغی ANDعِ ٍرٍدی :
عبارت منطقي براي گيت AND : Note-22ضزب تَلی هاًٌذ تاتغ ANDاعت .
0 . 00 . 1 0
0
1 . 00 1 . 11
: Gold Note-4 تًابع 2 ANDي 3ي 4متغیرٌ :
34 گيت OR : Note-23گیت ORیکی دیگز اس گیت ّای پایِ اعت کِ تَعظ آى تَاتغ هٌغمی عاختِ هی شَد
.گیت ORهی تَاًذ دٍ یا چٌذ
ٍرٍدی داشتِ تاشذ ٍ ػول خوغ هٌغمی را اًدام دّذ .
: Note-24گیت ORدارای دٍ یا چٌذ ٍرٍدی ٍ یک خزٍخی اعت .گیت ORتا دٍ ٍرٍدی تا ًواد ّای هٌغمی اعتاًذارد در شکل سیز ًشاى دادُ شذُ اعت :
عملکرد منطقي گيت OR : Note-25ػولکزد گیت ORتِ گًَِ ای اعت کِ ّزگاُ یکی اس ٍرٍدی ّای آى تاال تاشذ ،در خزٍخی آى ّن عغح ٍلتاص تاال ایداد هی شَد .خزٍخی ٌّگاهی پاییي اعت کِ توام ٍرٍدی ّا پاییي تاشٌذ .
: Gold Note-5 معادل گیت ORسٍ يريدی مطابق شکل زیر است .حتی اگر یکی از کلیذَا بستٍ شًد LAMPريشه می شًد .
: Note-26شکل سیز گیت ORرا تا چْار حالت هتفاٍت در ٍرٍدی ًشاى هی دّذ :
جذول صحت گيت OR : Note-27ػولکزد هٌغمی گیت ORدٍ ٍرٍدی در خذٍل سیز ًشاى دادُ شذُ اعت : Output X = A+B 0 1 1 1
B 0 1 0 1
Inputs
A 0 0 1 1
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گيتهاي منطقي عملکرد پالسي گيت OR : Note-28تِ ٍرٍدی ّای Bٍ Aدٍ پالظ ٍارد هی شَد .پالظ خزٍخی هشخض هی گزدد .
: Note-29اگز دٍ شکل هَج ٍرٍدی Bٍ Aتزای گیت ORهغاتك شکل سیز تاشذ ،شکل هَح خزٍخی آى هغاتك سیز تزعین هی شَد :
عبارات منطقي براي گيت OR : Note-30تاتغ ORهٌغمی تا دٍ هتغیز تِ طَرت ریاضی تا ػالهت +تیي دٍ هتغیز ًوایش دادُ هی شَد ّ ،واًٌذ . A+Bخوغ در خثز تَلی تا هتغیزّایی ارتثاط دارد کِ یا 1دٍدٍیی یا 0دٍدٍیی ّغتٌذ .لَاًیي اطلی خوغ تَلی تِ طَرت سیز ّغتٌذ :
; 0 11 ; 1 0 1 ; 111
0 0 0خوغ تَلی هاًٌذ تاتغ ORاعت .
تَخِ ًواییذ کِ خوغ تَلی تا خوغ دٍدٍیی در حالتی کِ دٍػذد 1خوغ هی شًَذ ،تفاٍت دارد .ػولکزد گیت ORدٍ ٍرٍدی را هی تَاى تذیي طَرت تیاى کزد کِ : اگر یک ٍرٍدی Aباشد ٍ ،رٍدی دیگر ٍ Bخرٍجی Xباشد ،در ایي صَرت عبارت بَلی آى چٌیي است :
X = A+B
: Gold Note-6 مذار 3 ، 2 ORي 4يريدی :
36
گيت NAND
: Note-31کلوِ NANDهخفف کلوِ NOT – ANDاعت کِ در آى اس یک ػول ANDکِ خزٍخی آى هکول (هؼکَط ) شذُ ، اعتفادُ شذُ اعت .
عمل منطقي گيت NAND : Note-32ػول هٌغمی گیت NANDتِ گًَِ ای اعت کِ خزٍخی پاییي فمظ ٌّگاهی اتفاق هی افتذ کِ توام ٍرٍدی ّا تاال تاشذ ّزگاُ ّز یک اس ٍرٍدی ّا پاییي تاشٌذ ،خ رٍخی تاال خَاّذ تَد .
: Note-33خذٍل طحت گیت NANDچٌیي اعت :
: Gold Note-7یک گیت NANDرا می تًان بٍ صًرت زیر شبیٍ سازی ومًد :
.
گيتهاي منطقي
: Gold Note-8يیژگی َای گیت NAND
َ : Gold Note-9رگاٌ حذاقل یکی از يريدیُای NANDصفر باشذ خريجی آن 1خًاَذ بًد .
عملکرد پالسي گيت NAND : Note-34
تَخِ شَد در فَاطل سهاًی هشخض شذُ ای کِ ّ B ٍ Aزدٍ تاال ّغتٌذ X ،پاییي اعت . : Note-35گیت ORهٌفی هؼادل گیت NANDاعت .
37
38 عبارات منطقي براي گيت NAND : Note-36ػثارات تَلی تزای گیت NANDدٍ ٍرٍدی تِ طَرت X ABاعت .ایي ػثارت تیاى هی کٌذ کِ دٍهتغیز ٍرٍدی A ٍ Bاتتذا ٍ ANDعپظ هکول هی شًَذ .ایي تَطیف هٌغمی تِ طَرت هؼادلِ ای تزای تیاى ػولکزد گیت NANDدٍ ٍرٍدی اعت . اگز ایي ػثارت را تزای توام حاالت هوکي دٍ هتغیز ٍرٍدی ارسیاتی کٌین ً ،تایح سیز حاطل هی شَد :
B 0 1 0 1
AB X 0.0 0 1 0.1 0 1 1.0 0 1 1.1 1 0
A 0 0 1 1
گيت NOR : Note-37کلوِ NORهخفف NOT – ORاعت ٍ یک تاتغ ORخزٍخی هؼکَط شذُ را در تز دارد .
عملکرد منطقي گيت NOR : Note-38ػولکزد هٌغمی گیت NORتِ گًَِ ای اعت کِ خزٍخی عغح پاییي ٌّگاهی اتفاق هی افتذ کِ یکی اس ٍرٍدی دارای عغح ٍلتاص تاال تاشٌذ .فمظ ٌّگاهی کِ توام ٍرٍدی ّا پاییي تاشٌذ ،خزٍخی تاال عت .
: Note-39شکل سیز ػولکزد هٌغمی گیت NORدٍ ٍرٍدی را تزای چْار تزکیة هوکي ٍرٍدی ًشاى هی دّذ .
: Note-40خذٍل طحت تزای گیت NORدٍ ٍرٍدی در خذٍل سیزآٍردُ شذُ اعت :
Output X 1 0 0 0 : Gold Note-10داریم :
B 0 1 0 1
Inputs
A 0 0 1 1
39
گيتهاي منطقي
: GoldNote-11قًاویه گیت َای NOR
َ : Gold Note-12رگاٌ حذاقل یکی از يريدی َای NORیک باشذ ،خريجی آن صفر خًاَذ بًد .
عملکرد پالسي گيت NOR : Note-41
: Note-42گیت NORتِ ػٌَاى گیت ANDتا ٍرٍدی فؼال – پاییي ػول هی کٌذ . تِ ػثارتی خزٍخی تاال فمظ ٌّگاهی ایداد هی شَد کِ توام ٍرٍدی ّا پاییي تاشذ .
عبارات منطقي براي گيت NOR
: Note-43ػثارت تَلی تزای خزٍخی گیت NORدٍ ٍرٍدی را هی تَاى چٌیي ًَشت X A B : ایي هؼادلِ تیاى هی کٌذ کِ دٍهتغیز ٍرٍدی اتتذا تا ّن ORشذُ ٍ عپظ هکول هی شًَذ کِ تزای ًوایش آى ،خظ تیزُ ای در تاالی ػثارت ORلزار دادُ شذُ اعت .
Output A B X
B
0 0 0 1 0110 10 1 0 11 1 0
0 1 0 1
Input
A 0 0 1 1
40
گيت ORانحصاري : Note-44گیت XORفمظ دٍ ٍرٍدی دارد .تز خالف گیت ّای لثلی ،ایي گیت ّیچ گاُ تیش اس دٍ ٍرٍدی ًذارد .
FXOR a b ab a b : Gold Note-13
: Note-45هدل گیت : XOR
: Note-46خزٍخی گیت ORاًحظاری فمظ ٌّگاهی کِ ّز دٍ ٍرٍدی هخالف ّن ّغتٌذ ،تاالعت .
Output X A B AB 0 1 1 0
Inputs A B 0 0 0 1 1 0 1 1
: Note-47چْار تزکیة هوکي ٍرٍدی ٍ خزٍخی ّای حاطل تزای گیت XORدر شکل سیز ًشاى دادُ شذُ اعت :
ٍ : Note-48لتاص تاال کِ عغح خزٍخی فؼال اعت ٌّ ،گاهی اتفاق هی افتذ کِ ّز دٍ ٍرٍدی هخالف ّن تاشٌذ . : Gold Note-14ريابط مفیذی کٍ در رابطٍ با XORمی تًان وًشت :
4) a 1 a
3) a 0 a
7) a b c a b c
: Gold Note-15
2) a a 1
1) a a 0
6) a b b a
5) a b a b
11 0 0 0 10 0 1 1
: Gold Note-16خريجی XORزماوی یک است کٍ تعذاد یکُا فرد باشذ ي خريجی زماوی صفر است کٍ تعذاد یکُا زيج باشذ.
41
گيتهاي منطقي
گيت NORانحصاري ً : Note-49وادّای اعتاًذارد تزای گیت NORاًحظاری هغاتك شکل سیز اعت ٌّ .گاهی کِ دٍ عغح ٍرٍدی هخالف ّن تاشٌذ ، خزٍخی گیت NORاًحظاری پاییي اعت .
: Gold Note-17
: Note-50چْار تزکیة هوکي ٍرٍدی ٍ خزٍخی حاطل گیت XNOR
: Note-51خذٍل طحت تزای گیت XNORهغاتك شکل سیز اعت .تَخِ ًواییذ کِ خزٍخی ٌّگاهی تاالعت کِ ٍلتاصّای یکغاًی رٍی ّز دٍ ٍرٍدی تاشذ .
Output X 1 0 0 1
عملکرد پالسي گيت هاي XORو XNOR : Note-52هغاتك شگل سیز دارین :
Inputs A B 0 0 0 1 1 0 1 1
42
: Gold Note-18در تابع XNORبٍ راحتی می تًان تابع ريبري را بیان ومًد :
َ : Gold Note-19رگاٌ دي يريدی گیت XNORبا َم برابر باشىذ ،خريجی یک ي َرگاٌ دي يريدی مخالف َم باشىذ خريجی صفر است . : Gold Note-20در XNORبا تعذ اد يريدیُای بیشتر از دي َرگاٌ تعذاد یکُا زيج باشذ ،خريجی 1ي در غیر ایه صًرت خريجی صفر است.
: Gold Note-21
: Note-53گیت ORاًحظاری تِ ػٌَاى خوغ کٌٌذُ دٍ تیتی تِ کار هی رٍد .
: Note-54لَاػذ حاکن تز خوغ دٍدٍیی تِ طَرت 1+1= 10 ; 1+0 = 1 ; 0+1 =1 ; 0+0 = 0اعت ،تا تزرعی خذٍل طحت گیت XORهی تَاى دریافت کِ خزٍخی آى تزاتز حاطل خوغ دٍتیت ٍرٍدی آى اعت
.در حالتی کِ ٍرٍدی ّا ّز دٍ ّ 1غتٌذ ،
حاطل خوغ 0اعت ،اها رلن ًملی 1هَخَد ًیغت .
َ : Gold Note-22ر رابطٍ بًلی معادل یک مذار مىطقی ي َر مذار مىطقی معادل یک جملٍ جبر بًلی است .
43
گيتهاي منطقي بخش دوم
خانواده هاي منطقي مذارهاي مجتمع : Note-55
TTL :TTLهخفف هٌغك تزاًشیغتَر تزاًشیغتَر ) (Transistor – Transistor Logicاعت کِ اشارُ تِ ایي دارد کِ اس تزاًشیغتَرّای دٍ لغثی در في آٍری هذاری تزای عاخت گیت ّا رٍی تزاشِ اعتفادُ هی شَد .
، TTL : Note-56گزٍّی اس هذارّا ی هٌغمی را در تزدارد : TTL اعتاًذارد )(Standard TTL TTL کن هظزف )(Low Power TTL TTL شاتکی )(Schottky TTL
TTL شاتکی کن هظزف )(Low Power Schottky TTL TTL شاتکی کن هظزف پیشزفتِ )(Advanced Low Power Schottky TTL TTL شاتکی پیشزفتِ )(Advanced Schottky TTL
: Note-57اختالف تیي اًَاع هختلف TTLدر هشخظات کار ،هاًٌذ سهاى ّای تأخیز اًتشار ،اتالف تَاى ٍ ظزفیت خزٍخی اعت .
: Note-58خاًَادُ ّای TTLدارای شوارُ پیشًَذ 54یا 74اعت کِ تِ دًثال آى یک حزف یا حزٍفی اعت کِ آى گزٍُ را هشخض هی کٌذ کِ در خذٍل سیز ًشاى دادُ شذُ اعت .
Example Of Device
)7400 (quad NAND gates )74L00 (quad NAND gates )74S00 (quad NAND gates )74LS00 (quad NAND gates )74ALS00 (quad NAND gates )74AS00 (quad NAND gates
Prefix Designation
)54 or 74 (no letter 54L or 74L 54S or 74S 54LS or 74LS 54ALS or 74ALS 54AS or 74AS
TTL Series
Standard TTL Low Power TTL Schottky TTL Low Power Schottky TTL Advanced Low Power Schottky TTL Advanced Schottky TTL
: Note-59پیشًَذ 54حَسُ دهای کار را اس 55 Cتا ً 125 Cشاى هی دّذ (ػوَهاً تزای هظارف ًظاهی اعت ) : Note-60پیشًَذ 74حَسُ حزارتی اس 0 Cتا 70 Cرا ًشاى هی دّذ ( تزای هظارف تداری)
( Complementary Metal – Oxide – Semiconductor ) ، CMOS : Note-61کلوِ CMOSخایگشیي ًیوِ ّادی ّای اکغیذ فلشی هکول اعت .در ٍالغ TTLاس تزاًشیغتَرّای دٍ لغثی در في آٍری هذاری خَد ٍ CMOSاس تزاًشیغتَرّای اثز هیذاى اعتفادُ هی کٌذ .
: Note-62عزی ّای سیادی اس هذارّای هٌغمی CMOSدر دعتزط اعت ،اها اعاعاً آًْا در دٍ لالة في آٍری لزار هی گیزًذ
:
CMOSگیت فلزی ٍ CMOSگیت سیلیکًَی . في آٍری گیت فلشی کِ لذیوی تز اعت عزی 4000اعت .في آٍری گیت عیلیکًَی کِ خذیذتز اعت ،شاهل 74HCT ، 74HC ، 74C اعت .توام ٍعایل عزی CMOSاسًظز پایِ تا عزی ّای TTLعاسگار ّغتٌذ .یؼٌی یک ٍ TTL ICیک CMOS ICتا یک شوارُ د ارای ٍرٍدی ّا ،خزٍخی ّا ٍ ،لتاص تغذیِ ٍ سهیي یکغاًی اس ًظز شوارُ پایِ ّاٍ ًیش گیت ّای هٌغمی یکغاًی ّغتٌذ .
: Note-63عزی 74HCTاس ًظز عغح ٍلتاص تغذیِ تا TTLعاسگار اعت ٍ هاًٌذ ً 74HC ٍ 74Cیاس تِ ٍعایل ٍاعظ ًذارد .
44
( Emitter Coupled Logic – Semiconductor ) ، ECL : Note-64کلوِ ECLهخفف هٌغك اهیتز تشٍیح شذُ اعت ) ( Emitter Coupled Logic – Semiconductorکِ در ٍالغ في آٍری هذاری دٍ لغثی اعت .
ECL : Note-65عزیغ تزیي عزػت لغغ ٍ ٍطل در تیي خاًَادُ ّای هٌغمی را دارد ،اها تَاى هظزفی آى سیادتز اعت .
ٍ : Note-66عایل ECLدر همایغِ تا CMOS ٍ TTLاس تٌَع کوتزی تزخَردار ّغتٌذ ،اها هذارّای تا هماطذ ٍیضُ ٍ تَاتغ پیچیذُ سیادی اس آًْا ٍخَد دارد .
مشخصات عملي : Note-67چْار هشخظِ هْن تزای کار هذارّای هٌغمی ػثارت ّغتٌذ اس : سهاى تأخیز اًتشار (Propagation Delay Time) . تٍاى تلفاتی . ظزفیت خزٍخی . حاطلضزب عزػت در تَاى (Speed Power Product ).
زمان تأخير انتشار : Note-68سهاى تأخیز اًتشار عزػت (فزکاًظ) کار گیت را هحذٍد هی کٌذ .ػثارت ّای عزػت پاییي ) ٍ (Low Speedعزػت تاال ) (High Speedکِ تزای هذارّای هٌغمی تِ کار هی رٍد تِ سهاى ّای تأخیز اًتشار هزتَط هی شَد ّ ،ز چِ تأخیز اًتشار کوتز تاشذ، عزػت هذار تیشتز اعت .
: Note-69تأخیز اًتشار یک گیت اعاعاً هذت سهاى تیي اػوال پالظ ٍرٍدی ٍ دریافت پالظ خزٍخی حاطل اعت . : Note-70هتٌاظز تا گیت هٌغمی دٍ تأخیز اًتشار ٍخَد دارد :
: tPHL سماى تیي ًمغِ هزخغ هشخض شذُ در پالظ ٍرٍدی ًٍمغِ هزخؼی هتٌاظز تا آى در پالظ خزٍخی ،در حالی کِ خزٍخی اس عغح ٍلتاص تاال تِ عغح ٍلتاص پاییي تغییز کٌذ . : tPLH سهاى تیي ًمغِ هزخغ هشخض شذُ در پالظ ٍرٍدی ٍ ًمغِ هزخؼی هتٌاظز تا آى در پالظ خزٍخی ،در حالی کِ خزٍخی اس عغح ٍلتاص پاییي تِ عغح ٍلتاص تاال تغییز کٌذ .
توان تلفاتي : Note-71تَاى تلفاتی یک گیت هٌغمی ،حاطل ضزب ٍلتاص تغذیِ VCCدر هتَعظ خزیاى تغذیِ ICCاعت . : Note-72هؼوَالً ICCتزای خزٍخی عغح پاییي گیت تیشتز اس خزٍخی عغح تاال اعت .
ظرفيت خروجي : Note-73ظزفیت خزٍخی یک گیت ،حذاکثز تؼذاد ٍرٍدی اس ّواى خاًَادُ ICاعت کِ آى گیت هی تَاًذ آًْا را تحزیک کٌذ ،تِ عَری کِ عغَح خزٍخی رادر هحذٍدُ ّای هشخض ًگِ هی دارد .تِ ػثارت دیگز ظزفیت خزٍخی حذاکثز تارگذاری را کِ یک گیت لادر تِ اًدام آى اعت هشخض هی کٌذ .
45
گيتهاي منطقي
حاصل ضرب سرعت ،توان : Note-74اغلة تَعظ عاسًذگاى تِ ػٌَاى عٌدشی اس ػولکزد یک هذار هٌغمی حاطل ضزب عزػت ،تَاى هشخض هی شَد .در ٍالغ حاطل ضزب سهاى تأخیز اًتشار ٍ تَاى تلفاتی در فزکاًظ خاطی اعت ّ .ز چِ حاطل ضزب عزػت ،تَاى کوتز تاشذ ،ػولکزد تْتز اعت .حاطل ضزب عزػت ،تَاى هاًٌذ اًزصی تز حغة صٍل ٍ تا ًواد Jتیاى هی شَد . همایغِ ای اس هشخظات ػولی خاًَادُ ّای هٌغمی ECL ، TTL ، CMOSدر خذٍل سیز آهذُ اعت :
ECL
TTL AS
TTL ALS
TTL S
TTL LS
TTL Std.
10KHz
74AS
74ALS
74S
74LS
74
25mW 25mW
8.5mW 8.5mW
1 mW 1 mW
19 mW 19 mW
2 mW 2 mW
10 mW 10 mW
1 nS
1.5 nS
4 nS
3 nS
10 nS
10 nS
40
20
20
20
10
CMOS (Metal)Gate
CMOS (Silico)Gate
1 μW 0.1 mW
2.5 nW 0.17 mW
Power Dissipation : Static @ 100 KHz
50 nS
8 nS
Propagation Delay Time
4000 B
74HC
Technology Device Series
Fan – Out ) (Same Series
: Note-75آی سی 7404یک هؼکَط کٌٌذُ Hexهی تاشذ .آی سی 7408شاهل چْار گیت ANDدٍ ٍرٍدی اعت .
: Note-76آی سی 7411دارای عِ گیت ANDعِ ٍرٍدی اعت (triple 3-Output AND) .؛ آی سی 7421دارای دٍگیت AND چْار ٍرٍدی اعت (dual 4-Input AND).
: Note-77آی سی 7400شاهل چْار گیت NANDدٍ ٍرٍدی 7410 ،عِ گیت عِ ٍرٍدی 7420 ،دٍگیت چْار ٍرٍدی 7430 ، یک گیت ّشت ٍرٍدی ٍ 74133یک گیت عیشدُ ٍرٍدی دارد .
: Note-78آی سی 7432شاهل چْار گیت ORدٍ ٍرٍدی اعت .
: Note-79آی سی 7402دارای چْار گیت دٍ ٍرٍدی ٍ 7427دارای عِ گیت عِ ٍرٍدی اعت . : Note-80آی سی 7486دارای چْار گیت XORدر یک تغتِ اعت .
توضيح پارامترهاي ورقه اطالعات : Note-81هَارد سیز ،پاراهتزّای هٌذرج در ٍرلِ اعالػات یک ICرا تَضیح هی دّذ : ٍ : VCC لتاص dcکِ لغؼِ را تغذیِ هی کٌذ .کوتز اس همذار حذالل هؼیي شذُ ػولکزد تضویي شذُ ای را ًوی تَاى تضویي کزد ٍ هوکي اعت لغؼِ دراثزٍلتاصتیشتز اس حذاکثز همذار هشخض شذُ آعیة تثیٌذ . : IOH حذاکثز خزیاى خزٍخی ای کِ گیت هی تَاًذ تِ تار تذّذ ٍػولکزد آى لاتل لثَل تاشذ ،در
حالی کِ عغح خزٍخی آى
ٍلتاص تاال تاشذ .هؼوَالً خزیاى خزٍخی اس پایِ را تا همذار هٌفی ًوایش هی دٌّذ . : IOL حذاکثز خزیاى خزٍخی ای کِ گیت هی تَاًذ تِ داخل خَد تکشذ ٍ ػولکزد آى لاتل لثَل تاشذ ،در حالی کِ عغح ٍلتاص خزٍخی آى پاییي تاشذ .هؼوَالً خزیاى ٍارد تِ یک پایِ را تا همذار هثثت ًشاى هی دٌّذ . : VIH همذار ٍلتاص ٍرٍدی کِ تِ ػٌَاى عغح ٍلتاص تاال تزای ٍرٍدی گیت لاتل لثَل اعت .
46 : VIL همذار ٍلتاص ٍرٍدی ای کِ هی تَاى تِ ػٌَاى ٍلتاص پاییي تَعظ گیت پذیزفت . : VOH همذار ٍلتاص خزٍخی عغح تاال کِ تَعظ گیت ایداد هی شَد . : VOL همذار ٍلتاص خزٍخی عغح پاییي کِ تَعظ گیت ایداد هی شَد . : IIH همذار خزیاى ٍرٍدی تزای ٍلتاص عغح تاال ٍرٍدی اعت . : IIL همذار خزیاى ٍرٍدی تزای ٍلتاص عغح پاییي ٍرٍدی اعت . : IOS خزیاى خزٍخی در ٌّگاهی کِ خزٍخی گیت تِ سهیي اتظال کَتاُ شذُ ٍ تا شزایظ ٍر ٍدی هٌاعة عغح ٍلتاص خزٍخی تاال ایداد هی کٌذ . : ICCH کل خزیاى کشیذُ شذُ اس تغذیِ VCCتِ ٌّگاهی کِ خزٍخی توام گیت ّا در عغح تاال تاشٌذ . : ICCL کل خزیاى کشیذُ شذُ اس تغذیِ VCCتِ ٌّگاهی کِ خزٍخی توام گیت ّادر عغح پاییي تاشٌذ . : tPHL سهاى تأخیز اًتشار اس ٍرٍدی تِ خزٍخی تزای حالت گذرای تاال تِ پاییي در خزٍخی . : tPLH سهاى تأخیز اًتشار اس ٍرٍدی تِ خزٍخی تزای حالت گذرای پاییي تِ تاال در خزٍخی .
: Note-82هؼکَط کٌٌذُ ٍ ،رٍدی را هکول هی کٌذ .
: Note-83گیت ANDدر خزٍخی عغح ٍلتاص تاال ) (1ایداد هی کٌذ ،اگز ٍ فمظ اگز توام ٍرٍدی ّای آى تاال ) (1تاشٌذ .
: Note-84گیت ORدر خزٍخی عغح ٍلتاص تاال ) (1ایداد هی کٌذ ،اگز ٍ فمظ اگز ّز یک اس ٍرٍدی ّای آى تاال ) (1تاشٌذ .
: Note-85در طَرتی در خزٍخی گیت NANDعغح پاییي) (0ایداد هی شَد ،اگز ٍ فمظ اگز توام ٍرٍدی ّای آى تاال ) (1تاشٌذ : Note-86در طَرتی در خزٍخی گیت .NORتاال ) (1ایداد هی شَد ،اگز ٍ فمظ اگز توام ٍرٍدی ّای آى پاییي ) (0تاشٌذ .
: Note-87گیت NORهؼوَالً تِ طَرت گیت – ANDهٌفی ػول هی کٌذ کِ در خزٍخی عغح تاال ) (1ایداد هی کٌذ ،اگز ٍ فمظ اگز توام ٍرٍدی ّای آى جاییي ) (0تاشٌذ .
: Note-88خزٍخی گیت ORاًحظاری ٍلتی تاالعت کِ ٍرٍدی ّای آى یکغاى ًثاشٌذ .
: Note-89خزٍخی گیت NORاًحظاری ٍلتی پاییي اعت کِ ٍرٍدی ّای آى یکغاى ًثاشٌذ . ECL ٍ TTL : Note-90تا تزاًشیغتَرّای اتظالی دٍ لغثی عاختِ هی شًَذ . CMOS : Note-91تا تزاًشیغتَرّای اثز هیذاًی MOSعاختِ هی شَد.
: Note-92تِ ػٌَاى یک لاػذُ ECL ،عزیغ تزیي عزػت لغغ ٍ ٍطل ٍ CMOS ٍ TTLکن عزػت تزیي ّغتٌذ . : Note-93تِ ػٌَاى یک لاػذُ CMOS ،کوتزیي تَاى تلفاتی ٍ ECL ٍ TTLتیشتزیي تَاى هظزفی را دارًذ . : Note-94هؼٌی پیشًَذ حزٍف در خاًَادُ 54 / 74اس ٍعایل CMOS ٍ TTLتِ طَرت سیز اعت : بدٍى حرف TTL :اعتاًذارد . TTL : L کن هظزف . TTL : S شاتکی . TTL : LS شاتکی کن هظزف . TTL : ALS شاتکی پیشزفتِ کن هظزف . TTL : AS شاتکی پیشزفتِ . CMOS : C اعتاًذارد . CMOS : HC عزػت تاال
CMOS : HCTعزػت تاال تا عاسگاری تا . TTL
گيتهاي منطقي
ً : Note-95وادّای شکلی هدشا ٍ خذٍل طحت گیت ّای هختلف دٍ ٍرٍدی در شکل سیز ًشاى دادُ شذُ اعت .
47
48
Self Test : 1هدار هعادل گیت هقابل چیست ؟
: 2در هدار هقابل تابع Fرا بدست آٍرید ؟
: 3شکل هقابل هعادل چه گیتی است ؟
: 4خرٍجی هدار شکل هقابل را بدست آٍرید ؟
5شکل هقابل هعادل چه گیتی است ؟
گيتهاي منطقي 6در هدار شکل هقابل Yرا بدست آٍرید ؟
7هعادل گیت هقابل کدام است ؟
8گیت هعادل هدار هقابل را رسن کٌید ؟
9در هدار هقابل Fرا هحاسبه کٌید ؟
-10گیت هعادل شکل هقابل را رسن کٌید ؟
11در شکل هقابل Fکدام است ؟
49
50 12کدام هدار (گیت) ،هعادل گیت NOTعول هی کٌد ؟ 13در شکل هقابل تابع Fرا بدست آٍرید ؟
51
جثر تول و ساده سازي تواتع منطقي
3 BOOLEN ALGEBRA INTRODUCTION
And OR NOT operation Associative law Distributive law Commutative law Precedence De Morgans Theorem
52
تخش اول
مقذمه اي تر جثر تول اتشارّایی کِ در ایي فصل تِ کوک آًْا تدشیِ ٍ تزکیة هذارّای هٌغمی را اًدام هی دّین ،تز پایِ هفاّین اٍلیِ خثز تَل تِ دست خَاٌّذ آهذ کِ تِ تزرسی آًْا هی پزداسین :
: Note-1ایي خثز فمظ تز رٍی اػذاد 1ٍ 0کار هی کٌذ .
: Note-2خثز تَل سیستوی است خثزی کِ حذالل دارای دٍ ػضَ ٍ دٍ اپزاتَر
) ) ORٍ AND( (+)ٍ (.تاضذ ٍ تزای ّز bٍ a
هتؼلك تِ آى ّ a+b ٍ a.b ،ن ضاهل ایي هدوَػِ تاضذ .
: Note-3ػضَ ّواًی ػولگز ) (+ػذد صفز ٍ ػضَ ّواًی ػولگز ) (.ػذد 1هی تاضذ .
قوانين جثر تولي : Note-4ػٌاصز تی اثز تزای ػولگزدّای ): (.)ٍ (+
a0a
a .1 a : Note-5خاصیت خاتدایی اپزاتَرّای ): (.)ٍ (+
ab ba
a .b b . a : Note-6خاصیت اضتزاکی ػولگزدّای ): (.)ٍ (+ a b c a b c a . b . c a . b . c
: Gold Note-1خاصیت توسیع پذیزی عملگزدهای ) (+و ): (.
a b . c a b . a c a . b c a . b a . c
ٍ : Note-7خَد ًمیض :
a a 1
a.a 0 : Note-8خاصیت ّواًی : aaa
a.a a : Note-9خاصیت ًمیض :
a a
53
جثر تول و ساده سازي تواتع منطقي
: 0 و1 ویژگی المان های: Gold Note-2
Counter Part
)(هکول 0 1 10
a b
AND
OR
a .0 0 a .1 a
a0 a a 1 1
a a b a
: قانون جذب: Gold Note-3
a . a b a
a a a b a b b a a b a b
a a b a b a b a b a b a
a a b a b c a b a c b a b a b c a ba c
: قضیه بسیار کاربزدی: Gold Note-4
: قضیه بسیار کاربزدی: Gold Note-5
: قضیه بسیار کاربزدی: Gold Note-6
: لَاًیي دهَرگاى: Note-10
1) a b a . b 2) a . b a b : لاًَى هغاتمت: Note-11
a b a c bc ab a c a ba c b c a ba c
54
: Gold Note-7جدول سیز 26قاعده اصلی را که در دستکاری و ساده ساسی عبارت جبز بولی مفیدهستند را نشان می دهد :
19) a a 0
10) A AB A
20) a a 1
11) A A B A B
21) a 0 a
12) A B A C A BC
3) A .0 0
13) a . a a
4) A . 1 A 5) A A A
22) a 1 a 23) a b a b 24) a b b a 25) a b c a b c
1) A 0 A 2) A 1 1
14) a . a a 15) a . b a b 16) a a a . a a 17) a b a b 18) a b a . b
6) A A 1 7) A .A A 8) A . A 0 9) A A
تحليل تولي مذارهاي منطقي : Note-12خثز تَلی رٍش فطزدُ ای تزای تیاى ػولکزد هذارّای هٌغمی کِ تزکیثی اس گیت ّای هٌغمی است ؛ هی تاضذ .تِ عَری کِ خزٍخی آى را هی تَاى تِ آساًی تزای تزکیثات هتفاٍتی اس همادیز ٍرٍدی هؼیي کزد .
عثارت تولي تراي مذارهاي منطقي : Note-13تزای تِ دست آٍردى ػثارت تَلی یک هذار هٌغمی اس ٍرٍدی ّای سوت چپ آغاس ًواییذ ٍ کار را تا خزٍخی ًْایی اًدام دّیذ ٍ تزای ّز گیت ػثارت آًزا تٌَیسیذ .
( Example-1برای هدار شکل زیر عبارت بَلی آًرا بٌَیسید ؟
: Solution
ػثارت تَلی تزای گیت ANDسوت چپ تا ٍرٍدی ّای Dٍ Cتِ صَرت CDاست .
خزٍخی گیت ANDسوت چپ ،تِ ػٌَاى یکی اس ٍرٍدی ّای گیت ORاست ٍ ٍرٍدی دیگز آى Bاست .تٌاتزایي ػثارت
گیت ORتِ صَرت B + CDهی ضَد .
خزٍخی گیت ORیکی اس ٍرٍدی ّای گیت ANDسوت راست است ٍ ٍرٍد ی دیگز ایي گیت Aاست .تٌاتزایي ػثارت تَلی
ایي گیت ANDتِ صَرت ) A (B + CDاست کِ ػثارت خزٍخی ًْایی کل هذار است .
محاسثه عثارت تولي : Note-14تزای هحاسثِ ػثارت تَلی اتتذا همادیزی کِ تاػث هی ضَد ،ػثارت 1ضَد را هحاسثِ ًواییذ کِ تا استفادُ اس لَاًیي خوغ ٍ ضزب تَلی ایي کار اًدام هی گیزد .
55
جثر تول و ساده سازي تواتع منطقي
ساده سازي تا استفاده از جثر تولي : Note-15در تسیاری اس هَالغ در کارتزد خثز تَلی تایذ ػثارت خاصی را آى لذر سادُ کزد تا تِ سادُ تزیي ضکل خَد تزسذ یا آًکِ آى را تِ سادُ تزیي ضکل در آٍرد تا پیادُ ساسی ػثارت هؤثزتز تاضذ .رٍش هَرد ًظز در ایي تخص استفادُ اس لَاًیي ،لَاػذ اصلی ٍ لضایای خثز تَلی تزای دستکاری ٍ سادُ کزدى یک ػثارت است
.ایي رٍش هثتٌی تز داضتي اعالػات خثز تَلی ٍ داضتي
هْارت لاتل در کارتزد آًْاست ٍ ًیاس تِ ًثَؽ ٍ َّش ًذارد .
: Test 1سادُ تریي شکل عبارت ) AB + A(B + C) + B(B + Cکدام است ؟
A + BC (1
B + AC (2
ABC (3
(4 ABC
: Test 2سادُ شدُ عبارت ABC BD AB Cکدام است ؟ BC (1
B C (2
BC (3
AB (4
: Test 3سادُ شدُعبارت بَلی زیر کدام است ؟
ABC ABC ABC ABC ABC BC AB BC (1 BC AB B C (3
(2 BC AC
AB BC B A (4
: Test 4سادُ شدُ عبارت بَلی AB AC A B Cکدام گسیٌِ است ؟
A BC (1
ABC (2
A BC (3
A B C (4
شکل هاي استانذارد عثارت هاي تولي
: Note-16توام ػثارت ّای تَلی را هی تَاى تذٍى تَخِ تِ ضکل آًْا تِ یکی اس دٍ ضکل استاًذارد تثذیل کزد :شکل هجوَع حاصل ضرب ّا ٍ شکل حاصل ضرب هجوَع ّا .ایي گًَِ استاًذارد کزدى تاػث هی ضَد ،کِ تتَاى ػثارتْای تَلی را تِ صَرت ساسهاًی ٍ سادُ تز ارسیاتی ،سادُ ٍ پیادُ کزد .
شکل مجموع حاصل ضرب ها )(Sum Of Product) ، (SOP ٌّ : Note-17گاهی کِ دٍ یا چٌذ خولِ حاصل ضزب تَسظ خوغ تَلی خوغ هی ضًَذ ،ػثارت ًْایی را )(Sum Of Product) (SOP
هدوَع حاصل ضزب ّا
هی ًاهٌذ .
AB ABC For Example : ABC CDE B CD A B A BC AC : Note-18ػثارت ) (SOPهی تَاًذ ضاهل یک خولِ تک هتغیزُ هاًٌذ A A B C BCDتاضذ .
: Note-19در یک ػثارت ) (SOPخظ تیزُ ًوی تَاًذ تاالی تیص اس یک هتغیز تاضذ ،اها ّز هتغیز تِ تٌْایی هی تَاًذ خظ تیزُ داضتِ تاضذ .هثالً یک ػثارت ) (SOPهی تَاًذ A B Cداضتِ تاضذ اها ABC ،را خیز .
پياده سازي يک عثارت SOP
: Note-20پیادُ ساسی یک ػثارت تَلی ، SOPضاهل ORکزدى خزٍخی ّای دٍ یا چٌذ گیت است .
56 : Note-21یک ػثارت SOPرا هی تَاى تا هٌغك AND – ORپیادُ کزد کِ در آى خزٍخی تؼذادی اس گیت ّای ( ANDکِ تزاتز تؼذاد خوالت حاصل ضزب در ػثارت است ) تِ ٍرٍدی ّای گیت ORهتصل هی ضَد .
: Note-22ػثارت ً AB + BCD + ACطاى هی دّذ خزٍخی Xگیت ORتزاتز تا ػثارت SOPاست .
تثذيل يک عثارت عمومي ته شکل SOP
: Note-23تا استفادُ اس رٍش ّای خثز تَلی هی تَاى ّز ػثارت هٌغمی را تِ ضکل SOPتثذیل ًوَد .
شکل SOPاستانذارد : Note-24ػثارت SOPاستاًذارد ،ػثارتی است کِ در آى توام هتغیزّای هَخَد در حَسُ آى در ّز ػثارت حاصل ضز ب ظاّز ضَد .هثالً AB CD A B CD ABC Dیک ػثارت SOPاستاًذارد است .
ّ : Note-25ز ػثارت SOPغیز استاًذارد را هی تَاى تا استفادُ اس خثز تَلی تِ ضکل استاًذارد تثذیل ًوَد .
تثذيل جمالت حاصل ضرب ته SOPاستانذارد ّ : Note-26ز خولِ حاصل ضزب در ػثارت SOPکِ ضا هل تواهی هتغیزّای هَخَد در حَسُ ًثاضذ را هی تَاى تا افشٍدى توام هتغیزّا ٍ هکول آًْا تِ ضکل استاًذارد تثذیل کزد .
: Note-27رٍش تبدیل :
هرحلِ اٍل ّ :زخولِ حاصل ضزب غیز استاًذارد را در خولِ ای کِ حاصل خوغ هتغیز ٍ هکول فزاهَش ضذُ را در تز دارد ،
ضزب کٌیذ ٍ ا یي تِ دٍ خولِ حاصل ضزب هٌدز هی ضَد ّ .واى عَر کِ هی داًیذ ،هی تَاى ّز چیشی را تذٍى ایٌکِ همذار آى تغییز کٌذ ،در 1ضزب کٌیذ .
هرحلِ دٍم :هزحلِ اٍل را آًمذر تکزار کٌیذ تا خوالت حاصل ضزب حاصل ،توام هتغیزّای هَخَد در حَسُ
(تِ صَرت
هکول ضذُ یا غیز هکول ضذُ ) را در تز داضتِ تاضٌذ .در تثذیل یک خولِ حاصل ضزب تِ ضکل استاًذارد آى تزای ّز هتغیز فزاهَش ضذُ تؼذاد خوالت حاصل ضزب دٍ تزاتز هی ضَد . ( Example-2عبارت بَلی AB C A B ABC Dرا بِ شکل SOPاستاًدارد تبدیل ًوایید ؟ : Solutionحَسُ ایي ػثارت SOPتزابر Dٍ Cٍ Bٍ Aاست .یک خولِ را اتتذا در ًظز تگیزیذ .در اٍلیي خولِ AB Cهتغیزّای D یا Dفزاهَش ضذُ است ؛ تٌاتزایي هغاتك سیز اٍلیي خولِ را در D Dضزب کٌیذ .
AB C AB C D D AB CD AB CD در ایي حالت ،دٍ خولُ حاصل ضزب استاًذارد تِ دست آهذُ است .دٍهیي خولِ A Bدٍ هتغیز Cیا Dٍ Cیا Dرا در تز ًذارد
.تٌاتزایي اتتذا خولِ را در خولِ C Cتِ صَرت سیز ضزب کٌیذ :
A B A B C A B C A B C D D A B C D D A B CD A B CD A B C D A B C D
در ایي حالت چْار خولِ حاصل ضزب استاًذارد تِ دست آهذُ است . سَهیي خولِ ABC Dاس لثل تِ ضکل استاًذارد تَدُ است ،ضکل SOPاستاًذارد ػثارت اٍلیِ تِ صَرت سیز است :
AB C A B ABC D AB CD AB CD A B CD A B CD A B C D A B C D ABC D
57
جثر تول و ساده سازي تواتع منطقي
: Note-28یک خولِ حاصل ضزب استاًذارد فمظ تزای یک تزکیة اس همادیز هتغیزّایص تزاتز 1است .هثالً خولِ حاصل ضزب AB CDهغلثك سیز ٌّگاهی کِ D = 0 ٍ C = 1 ، B = 0 ، A = 1است ،تزاتز تا 1است ٍ تزای دیگز همادیز تزکیثات هتغیزّایص تزاتز 0است .
AB CD 1. 0 .1. 0 1.1.1.1 1 : Note-29یک ػثارت SOPفمظ ٍ فمظ ٌّگاهی 1است کِ یک یا چٌذ خولِ حاصل ضزب اس آى تزاتز تا 1تاضذ .
شکل حاصل ضرب مجموع ها )(Product Of Sum) ، (POS
ٌّ : Note-30گاهی کِ دٍ یا چٌذ خولِ حاصل خوغ در ّن ضزب هی ضًَذ ،حاصل را حاصل ضزب هدوَع ّا )، (POS ) (Product Of Sumهی ًاهٌذ .
A B A B C For Example : A B C C D E B C D A B A B C A C
: Note-31در ػثارت ، POSخظ تیزُ ًوی تَاًذ تاالی تیص اس یک هتغیز لزار گیزد ،اها ّز یک اس هتغیزّا هی تَاًٌذ تِ تٌْایی خظ تیزُ داضتِ تاضٌذ .هثالً ػثارت POSهی تَاًذ خولِ A B Cرا داضتِ تاضذ ،اها خولِ A B Cرا ،خیز .
پياده سازي عثارت POS : Note-32پیادُ ساسی یک ػثارت POSصزفاً هحتاج تِ ANDکزدى خزٍخی ّای دٍ یا چٌذ گیت ORهی تاضذ.
: Note-33در ضکل سیز هذار هزتَط تِ ػثارت ً A B B C D A C طاى دادُ ضذُ است .خزٍخی گیت ANDتزاتز ػثارت POSاست .
: Note-34ػثارت POSاستاًذارد ػثارتی است کِ در آى توام هتغیزّای هَخَد در حَسُ آى در ّز ػثارت حاصل ضزب ظاّز
ضَد .هثالً A B C D A B C D A B C Dیک ػثارت POSاستاًذارد است .هی تَاى ػثارت POS غیز استاًذارد را تا استفادُ اس خثز تَلی تِ ضکل استاًذارد تثذیل ًوَد .
ّ : Note-35ز خولِ حاصل خوغ در ػثارت POSرا کِ ضاهل تواهی هتغیزّای هَخَد در حَسُ ًثاضذ ،هی تَاى تا افشٍدى توام هتغیزّا ٍ هکول آًْا تِ ضکل استاًذارد تثذیل ًوَد.
(Example-3عبارت بَلی A B C B C D A B C Dرا بِ شکل POSاستاًدارد تبدیل ًوایید : Solutionحَسُ ػثارت POSتزاتزتا D ٍ C ٍ B ٍ Aاست .یک خولِ را اتتذا در ًظز تگیزیذ ؛ اٍلیي خولِ A B Cهتغیز D یا Dرا ًذارد .لذا DDرا تِ آى اضافِ هی کٌین :
A B C A B C DD A B C DA B C D
58 خولِ دٍم یؼٌی B C Dهتغیز Aیا Aرا ًذارد ،لذا AAرا تِ آى اضافِ هی کٌین ٍ دارین :
B C D B C D AA A B C D A B C D
سَهیي خولِ A B C Dتِ ضکل استاًذارد است . ضکل POSاستاًذارد ػثارت اٍلیِ چٌیي هی ضَد :
A B C B C D A B C D A B C DA B C D A B C D A B C D A B C D : Note-36یک ػثارت ٌّ POSگاهی 0است ،اگز ٍ فمظ اگز یک یا چٌذ خولِ حاصل خوغ درآى ػثارت 0تاضذ. : Note-37تزای تثذیل SOPاستاًذارد تِ POSاستاًذارد تایذ هزاحل سیز را اًدام گیزد :
ّ .Aز خولِ حاصل ضزب در ػثارت SOPارسیاتی ضَد .یؼٌی اػذاد دٍدٍیی ای کِ خوالت حاصل ضزب را ًطاى هی دّذ، هطخص ضًَذ .
.Bتوام اػذاد دٍدٍیی ای کِ ارسیاتی هزحلِ ً Iیستٌذ هطخص ضًَذ .
.Cخولِ حاصل خوغ هؼادل تزای ّز ػذد دٍدٍیی اس هزحلِ IIرا ًَضتِ ٍ آى را تِ ضکل POSتیاى ًواییذ.
( Example-4عبارت SOP؛ A B C A BC A BC AB C ABCرا بِ عبارت POSتبدیل کٌید؟
: Solutionارسیاتی آى تِ صَرت سیز هی تاضذ :
000 + 010 + 011 + 101 + 111 چَى سِ هتغیز در حَسُ ایي ػثارت ٍخَد دارد ،لذا هدوَػاً ّطت ) (23تزکیة هوکي ٍخَد دارد ٍػثارت SOPپٌح تا اس ایي تزکیثات
را در تزدارد ،تٌاتزایي ػثارت POSتایذ سِ تزکیة دیگز یؼٌی 110 ٍ 100 ، 001را داضتِ تاضذ .تِ یاد آٍریذ ایٌْا همادیز دٍدٍیی ای ّستٌذ کِ خولِ حاصل خوغ را 0هی کٌٌذ . ػثارت POSهؼادل چٌیي است :
A B C A B C A B C
: Note-38خذٍل صحت رٍضی هتذاٍل تزای ًوایص فطزدُ اس ػولکزد هٌغمی هذار است .
تثذيل عثارت هاي SOPاستانذارد ته قالة جذول صحت : Note-39ػثارت SOPدر صَرتی 1است کِ حذالل یکی اس خوالت آى 1تاضذ .
: Note-40اٍلیي لذم در تطکیل خذٍل صحت ،تْیِ فْزستی اس حالتْای هوکي همادیز هتغیزّادر ػثارت است .سپس تثذیل ػثارت SOPتِ ضکل استاًذارد است . ( Example-5جدٍل صحت عبارت SOPاستاًدارد A B C AB C ABCرا تعییي کٌید .
: Solutionسِ هتغیز در حَسُ ٍخَد دارد ،لذا 2nیؼٌی ) (23 = 8؛ ّطت تزکیة هوکي اس همادیز دٍدٍیی هتغیزّا در سِ ستَى سوت چپ خذٍل سیز قرار هی گیزد .همادیز دٍدٍیی ای کِ خوالت حاصل ضزب در ػثارت ّا را 1هی کٌٌذ ،تزاتز ّستٌذ تا :
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جثر تول و ساده سازي تواتع منطقي
A B C : 001 , AB C : 100 , ABC : 111تزای ّزیک اس ایي همادیز دٍدٍیی در ستَى خزٍخی خذٍل 1لزار دادُ هی ضَد .تزای تمیِ تزکیثات دٍدٍیی در ستَى خزٍخی 0لزار دادُ ضَد .
Output X 0 1 0 0 1 0 0 1
Inputs B
C
0 0 1 1 0 0 1 1
0 1 0 1 0 1 0 1
A 0 0 0 0 1 1 1 1
Note-41ػثارت POSاستاًذارد در صَرتی 0است کِ حذالل یکی اس خوالت حاصل خوغ 0تاضذ .
: Note-42تزای تطکیل خذٍل صحت یک ػثارت ، POSفْزستی اس توام تزکیثات هوکي اس همادیز دٍدٍیی هتغیزّای ػثارت POS تْیِ ًواییذ .سپس ػثارت POSرا تِ ضکل استاًذارد تثذیل کٌیذ ًْ .ایتاً درستَى خزٍخی ) (Xتزای ّز همذار دٍدٍیی ای کِ ػثارت را 0هی کٌذ 0 ،لزار دّیذ ٍ تزای تمیِ همادیز دٍدٍیی 1را لزار دّیذ ( Example-6جدٍل صحت را برای عبارت POSاستاًدارد زیر هعیي کٌید :
A B C A B C A B C A B C A B C
: Solutionسِ هتغیز در حَسُ ٍخَد دارد ٍ ّطت همذار دٍدٍیی هوکٌِ در سِ ستَى سوت چپ خذٍل سیز لزار دادُ ضذُ است .همادیز دٍدٍیی ای کِ خوالت حاصل خوغ را در ػثارت 0هی کٌٌذ ،ػثارت ّستٌذ اس :
A B C : 110
; A B C : 000
;
A B C : 010
;
A B C : 011
; A B C : 101
تزای ّزیک اس ایي همادیز دٍدٍیی در ستَى خزٍخی خذٍل صحت 0لزار دادُ ضَد .تزای تمیِ تزکیثات دٍدٍیی در ستَى خزٍخی 1 لزار دادُ ضَد .
Output X 0 1 0 0 1 0 0 1
C 0 1 0 1 0 1 0 1
Inputs B 0 0 1 1 0 0 1 1
A 0 0 0 0 1 1 1 1
تعيين عثارت هاي استانذارد از جذول صحت : Note-43تزای تؼییي ػثارت SOPاستاًذارد تَسظ خذٍل صحت ّ ،ز همذار دٍدٍیی را تِ خولِ حاصل ضزب هتٌاظز تثذیل ًواییذ ٍ ایي تا لزاردادى هتغیز هتٌاظز تزای ػذد ٍ 1لزار دادى هکول هتغیز هتٌاظزتزای ػذد 0اًدام هی ضَد .هثالً همذار دٍدٍیی 1010تِ
60 صَرت هماتل تِ خولِ حاصل ضزب تثذیل هی ضَد :
1010 AB CD
تزای تؼییي ػثارت POSاستاًذارد تَسظ خذٍل صحت ّ ،ز همذار دٍدٍیی را تِ خولِ حاصل خوغ هتٌاظز تا لزار دادى هتغیز هتٌاظز تزای ػذد ٍ 0لزار دادى هکول هتغیز هتٌاظز تزای ػذد 1تثذیل کٌیذ .هثالً همذاردٍدٍیی 1001تِ صَرت سیز تِ خولِ حاصل خوغ تثذیل هی ضَد :
1001 A B C D ( Example-7از جدٍل صحت زیر عبارت SOPاستاًدارد ٍ عبارت POSاستاًدارد را هعیي کٌید .
Output X 0 0 0 1 1 0 1 1
Inputs B
C
0 0 1 1 0 0 1 1
0 1 0 1 0 1 0 1
A 0 0 0 0 1 1 1 1
: Solutionچْار ػذد 1در ستَى خزٍخی ٍخَد دارد ٍ همادیز دٍدٍیی هتٌاظز آًْا 111 ، 110 ، 100 ، 011است .ایي همادیز دٍدٍیی تِ خوالت حاصل ضزب تِ صَرت سیز تثذیل هی ضَد :
111 ABC
;
; 110 ABC
011 A BC ; 100 AB C
ػثارت SOPاستاًذارد تزای خزٍخی Xچٌیي خَاّذ تَد :
X A BC AB C ABC ABC
تزای ػثارت ، POSخزٍخی 0تزای همادیز دٍدٍیی ٍ 101 , 010 , 001 , 000خَد دارد .ایي همادیز دٍدٍیی تِ صَرت سیز تِ خوالت خوغ تثذیل هی ضًَذ:
000 A B C ; 001 A B C ; 010 A B C ; 101 A B C خولِ POSاستاًذارد حاصل تزای خزٍخی Xچٌیي است :
X A B C A B C A B C A B C
Self Test
: 1عبارت ( AB ) A ( AB ) Bرا سادُ کٌید ؟
: 2حاصل عبارت F AB BC A D A Cرا بدست آٍرید ؟
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جثر تول و ساده سازي تواتع منطقي
: 3تابع هٌطقی f x xy xyzرا سادُ کٌید ؟ : 4عبارت ) F BC B C ( AC A BC A C )( AB AC BC )( A B)(C ACرا سادُ کٌید ؟
: 5عبارت A B CD D B A A CDرا سادُ کٌید ؟ : 6عبارت xyz + xyz + xyz + xyzرا سادُ کٌید ؟
: 7هتون تابع ) F AB BC ( A Bرا بدست آٍرید ؟ : 8سادُ تریي شکل رابطِ جبر بَل هقابل را بدست آٍرید ؟
F B C D B C BC
: 9هتون تابع F AB B Cرا بدست آٍرید ؟
: 10عبارت F A B D A D A B Dرا سادُ کٌید ؟ : 11هعادل عبارت BD A B B Dرا بٌَیسید ؟ : 12هعادل رابطِ A C BC ABرا بٌَیسید ؟
: 13عبارت a b c b a a c را سادُ ًوایید ؟ : 14حاصل تابع هٌطقی F xxz w xyw xرا بدست آٍرید ؟
: 15هکول رابطِ A B A B ACرا هحاسبِ ًوایید ؟ : 16اگر A B A B A Bبا فرض C A Bچِ رابطِ ای بیي Cٍ Bٍ Aبر قرار است ؟ : 17حاصل عبارت C B A CB A C BA CBAرا هحاسبِ ًوایید ؟ : 18رابطِ F AB CD A BCD AB C D A BC Dرا هی تَاى با ..........گیت ........ ٍ XORگیت ANDپیادُ ًوَد. : 19هدار هعادل تابع A BC A B C AB C ABCرا رسن ًوایید ؟
62
4 KARNAUGH MAPS INTRODUCTION
2 Variable karnaugh map 3 Variable karnaugh map 4 Variable karnaugh map Don’t care Hazards Fixing hazards
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جذول کارنو و ساده سازی عبارات هنطقی
بخش اول
جذول کارنو ؛ روابط و خواص آى ً : Note-1قطِ کارًَ رٍش هٌظوی تزای سادُ ساسی عثارت ّای تَلی ارائِ هی کٌذ ٍ اگز صحیح استفادُ ضَد ،سادُ تزیي عثارتْای POS ٍ SOPهوکي را ایجاد هی کٌذ .
: Note-2ایي جذٍل قادر است یک تاتع تا nهتغیز را تَسط جذٍلی تا 2سلَل ایجاد کٌذ . n
جذول کارنو دوهتغيره : Note-3ایي جذٍل دارای 22سلَل هی تاضذ .تٌاتزایي جذٍل کارًَی دٍ هتغیزُ دارای 4سلَل است . : Note-4در ایي حالت Bٍ Aهتغیزّای تاتع تِ حساب هی آیٌذ .
: Note-5هقذار ّز سلَل ،هقذار دٍدٍیی Bٍ Aهی تاضذ .هثالً در گَضِ تاالیی سوت چپ هقذار دٍدٍیی 00قزار دارد ٍ ایي تزتیة تِ ضکل سیز هی تاضذ.
: Note-6در جذٍل کارًَ ّز سلَل تا سلَل هجاٍرش در یک حزف تفاٍت دارد .
جذول کارنو سه هتغيره : Note-7ایي جذٍل دارای 23سلَل هی تاضذ .تٌاتزایي جذٍل کارًَی سِ متغیزُ دارای 8سلَل است کِ هتغیزّای آى ABC هی تاضٌذ.کِ تِ فزم سیز در جذٍل کارًَ قزار هی گیزًذ :
64
جذول کارنو چهار هتغيره : Note-8ایي جذٍل آرایطی اس 16سلَل است کِ هقادیز دٍدٍیی Bٍ Aدر تاالی ًقطِ ٍ هقذار دٍدٍیی Dٍ Cدر ضلع چپ ًقطِ قزار دارًذ .
قواعذ ساده سازی جذول کارنو : Note-9تزای سادُ ساسی عثارتْا اتتذا هتٌاظز ّز جولِ داخل عثارت هٌغقی هیٌتزم ) (Mintermیک ارسش هٌغقی 1داخل جذٍل قیذ هی ضَد .سپس تا استفادُ اس هَارد سیز عثارت داخل جذٍل ّن اس ًظز تعذاد جولِ ٍ ّن اس ًظز تعذاد متغیز سادُ هی ضَد : .Aجوالت تٌْا هی تَاًٌذ 16 , 8 , 4 , 2 , 1تایی تِ اضتزاک گذاضتِ ضًَذ . .Bجوالت تٌْا هجاسًذ سغزی یا ستًَی تِ اضتزاک گذاضتِ ضًَذ . .Cیک سلَل هجاس است تزای چٌذهیي تار تِ اضتزاک گذاضتِ ضَد . .Dسغز اٍل ٍ سغز آخز هی تَاًٌذ تا ّن تِ اضتزاک گذاضتِ ضًَذ . .Eستَى اٍل ٍ ستَى آخز هی تَاًٌذ تا ّن تِ اضتزاک گذاضتِ ضًَذ . .Fدر حالت ًقطِ دٍ هتغیزُ دستِ 4سلَلی تشرگتزیي ٍ در حالت 3هتغیزُ 8سلَل ٍ در حالت 4هتغیزُ 16سلَل تشرگتزیي دستِ است . ّ .Gز عذد 1در ًقطِ تایذ حذاقل در یک دستِ ٍاقع ضذُ تاضذ .عذدّای 1در یک دستِ می تَاًٌذ در دستِ دیگزی ًیش ٍاقع ضًَذ تِ ضزط ایٌکِ دٍدستِ حاٍی ّ 1ای غیز هطتزک ّن تاضٌذ .
ترسين عبارت (Minterm) SOPاستانذارد : Note-10تزای عثارت SOPتِ ضکل استاًذارد ،تِ اسای ّز جولِ حاصل ضزب در آى عثارت ،عذد 1رٍی ًقطِ کارًَ قزار دادُ هی ضَد ٌّ .گاهی کِ عثارت SOPتِ عَر کاهل رٍی ًقطِ قزار گزفت رٍی ًقطِ کارًَ تعذادی ٍ 1جَد دارد کِ تزاتز تعذاد جوالت حاصل ضزب در عثارت SOPاستاًذارد است .سلَلْایی کِ ً 1یستٌذ ،سلَلْایی ّستٌذ کِ تزای آًْا عثارت صفز است .هعوَالًًٌ کار تِ Minterm؛ صفزّا جاّای تاقی هاًذُ در ىقطِ ّستٌذ .
( Example-1جوله زیر را ساده کنید :
: Solution تزسین ًقطِ کارًَ :
f A, B A B AB AB
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جذول کارنو و ساده سازی عبارات هنطقی
f ( A, B) A B
. جوالت یک سغز یا ستَى هی تَاًٌذ تِ اضتزاک گذاضتِ ضًَذ . فقظ هتغیز یا هتغیزّایی اًتخاب هی ضًَذ کِ تغییز ًکٌٌذ. حذف هی ضًَذ، هتغیزّایی ّستٌذ کِ تغییز هی کٌٌذ
: ( جدول هقابل را ساده کنیدExample-2
: Solution
: ( تابع زیر را ساده کنیدExample-3
: Solution
f A, B, C, D A C AC BD
. را ساده کنیدf A, B, C, D
A B C ABD A B B CD BD ( جولهExample-4
: Solution
A B C D ABC : A B C D
;
ABCD ABD : ABC D
A BC D A BC D AB : A BCD A BCD
;
A B CD B CD : AB CD
A BC D A BCD BD : ABCD ABC D
f ( A, B, C, D) AB A C BD CD
66
( Example-5تابع 0,1,2,3,8,9
: Solution
f A, B, C, D را ساده کنید .
f A, B, C, D B C A B
( Example-6تابع 0,1,2,4,5,7,10
: Solution
f A, B, C, D را توسط جدول کارنوساده کنید .
f A, B, CD, A BD A C B CD
هحاسبه خروجی کارنو با استفاده از هاکسترم : Note-11در هحاسثِ جوالت تِ ضیَُ هاکستزم تِ جای سلَلْای 1تایذ سلَلْای صفز را تِ عٌَاى سلَل هطتزک قزار دّین ٍ سادُ ًوائین .تا تَجِ تِ ایي اهز کِ تاتع ًَضتِ ضذُ تِ صَرت حاصلضزب حاصل جوع ّا خَاّذ تَد یعٌی تیي هتغیزّا جوع ٍ تیي جوالت ، ضزب ٍجَد دارد ٍ هَقع ًَضتي تاتع ّز هتغیزی کِ هطتزک ٍاقع ضَد یک تار ًقیض ضذُ ٍ تعذ ًَضتِ هی ضَد . ( Example-7عبارت POSزیر را بر روی نقشه کارنو ترسین کنید .
f A, B, C, D A B C DA B C D A B C DA B C D A B C D : Solution
67
جذول کارنو و ساده سازی عبارات هنطقی ( Example-8ساده شده عبارت زیر را به صورت Moxtermنوایش دهید .
f 0,1,2,4,5,7,10
: Solution f Π A CA D B C DA BB C D
( Example-9ساده شده عبارت زیر را به صورت Moxtermنوایش دهید .
f AD AC B C ABC D
: Solution
f Π A C DB C D A C DA B C
هحاسبه هتون عبارت با استفاده از جذول کارنو : Note-12تزای هحاسثِ هتون کافی است کِ جوالت صفز جذٍل را تِ اضتزاک تگذارین ،اها تاتع تِ صَرت (Minterm) SOP هی ًَیسین .تِ عثارت دیگز اگز جوالت صفز تِ صَرت ًَ Mintermضتِ ضًَذ ؛ عثارت حاصل هتون تاتع اٍلیِ خَاّذ تَد .
( Example-10هتون تابع 0,2,9,11,13,15
: Solutionاتتذا جذٍل کارًَ را تزسین هی کٌین :
f را بنویسید .
f A D A B AD
68
( Example-11هتون عبارت A B , ABC, AD, BC
: Solution
f A, B, C, D را هحاسبه نوایید .
f A BC AB D
سلول خنثی
: Note-13تِ سلَلْایی گفتِ هی ضَد کِ ارسش آًْا اس ًظز تاتع تفاٍتی ًذاضتِ تاضذ ٍ هی تَاى در تاتع هقذارآًْا را صفر یا یک در
ًظز گزفت .ایي سلَلْا را تا عالهت dیا ً وایص هی دٌّذ ،کِ تا تَجِ تِ سادُ کزدى عثارت ) (POS or SOPهی تَاى ّز کذام اس آًْا
را تِ دلخَاُ صفر یا یک ًَضت . ( Example-12جدول کارنوزیر را ساده کنید .
FB
: Solution
( Example-13عبارت زیر را ساده کنید .
f A, B, C, D 0,1,3,4,8,9,10 d 2,5,7
: Solution
F A C BC B D A B
کارنو شطرنجی : Note-14جذٍل کارًَیی است کِ سلَلْای آى تِ صَرت ضغزًجی پز ضذُ است .تِ عَری کِ ًوی تَاى ّیچگًَِ اضتزاکی تیي آًْا ایجاد کزد .ایي کارًَ فقظ هی تَاًذ هتغیزّا را تا ّن تزکیة کٌذ ،اها سادُ هی ضَد. در کارًَ ضغزًجی 2فزم ٍجَد دارد : .Iسلَل صفز آى تا عذد صفر پز ضذُ تاضذ ؛ کِ یک تاتع فزد تَدُ ٍ هعادل تاتع XORاست . .IIسلَل صفز آى تا عذد یک پز ضذُ تاضذ ؛ کِ یک تاتع سٍج تَدُ ٍ هعادل تاتع آى XNORاست .
جذول کارنو و ساده سازی عبارات هنطقی
69
70
Self Test
: 1ساده ترین رابطه بولی را برای جدول کارنو شکل زیر بنویسید ؟
: 2در هورد جدول کارنو شکل زیر ساده ترین رابطه بولی را بنویسید ؟
: 3تابع ساده شده جدول کارنو روبرو را بنویسید ؟
: 4هکول تابع f A, B, C, D Π 0,1,2,3,10,11را بدست آورید ؟
: 5اگر F D A B B Dباشد فرم حاصلضرب جوع های اساسی (هاکسترم) را هحاسبه نوایید ؟ : 6حاصل ساده شده عبارت زیر را بدست آورید ؟
F A, B, C, D 0,2,3,4,5,6,7,11,15,16,18,19,23,27,31
: 7هکول تابع F w, x, y, z Π 1,3,5,7,13,15 را هحاسبه کنید ؟ : 8هعادل ساده شده هینترم عبارت F A, B, C Π 0,2,3,6 را حساب کنید ؟
: 9اگر F A B A B Cباشد فرم اکسترهن تابع را حساب کنید ؟
10
:ساده شده عبارت 0,1,4,5,6,8 10,11,12 d
F x, y, z, w را بدست آورید ؟
: 11فرم حاصل ضرب جوعها ی اساسی (هاکسترم) برای تابع زیرچیست ؟
F A, B, C, D D A B D A B
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جذول کارنو و ساده سازی عبارات هنطقی
: 12هعادل هینترم تابع A B A C B Cرا بدست آورید ؟ : 13هکول تابع F x, y, z, w x zرا بدست آورید ؟ : 14تابع ساده شده جدول کارنو روبرو را بنویسید ؟
: 15ساده شده عبارت F A, B, C, D 1,3,4,5,9,11,12,13. d 6,14را هحاسبه نوایید؟ : 16ساده ترین تابع به دست آهده از جدول کارنو زیر را بنویسید ؟
: 17کدام گسینه بیانگر تابع F x, y, z xy yzهی باشد ؟
0,1,6,7 (2
1,5,6,7 (1
: 18هکول تابع 2,3
1,5,6,7 (3
0,1,6,7 (4
F x, y, z را هحاسبه نوایید ؟
: 19حاصل ساده شده کارنو روبرو را بدست آورید ؟
: 20تابع 1,3,9,11,12,13,14,15 2,8 d
F A, B, C, D را ساده نوایید ؟
: 21تابع هنطقی سه هتغیره ) f(x,y,zساده شده 2,5,6 1,3 d
: 22تابع هنطقی ساده شده جدول کارنو زیر را بنویسید ؟
f را بدست آورید ؟
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: 23هعادل هاکسترم تابع F A, B, C, D A B C AB Dرا بدست اورید ؟
2,3,4,5,11,12,14 (1 2,3,4,5,9,11,12,14 (3
0,1,6,7,10,13,15 (2 0,1,6,7,8,10,13,15 (4
: 24عبارت A B B C A C Fرا ساده کنید ؟ : 25خروجی ساده شده هدار زیر چیست ؟
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هذارات تزكيبي
5 COMBINANTIAL LOGIC DESIGN PRINCIPLES INTRODUCTION
Adders Comparators Subtructors Decoders Encoders Multiplexer De Multiplexer
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بخش اٍل
گيت ّای NOR ٍ NAND : Note-1تَسظ گیت ّای NOT ٍ ANDهی تَاى گیت ORرا ساخت . : Note-2تَسظ گیت ّای NOT ٍ ORهی تَاى گیت ANDرا ساخت . : Note-3تِ گیت ّای NOT ٍ ANDگیت NANDهی گَیٌذ . : Note-4تِ گیت ّای NOT ٍ ORگیت NORهی گَیٌذ .
: Note-5در هَرد گیت ّای NAND ٍ NORهتذکز هی ضَین کِ ّزگاُ ٍرٍدی ّای ایي گیت ّا یکساى تاضذ ؛ ایي دٍ گیت هاًٌذ یک گیت NOTػول هی کٌٌذ .
: Note-6اس تزکیة هتَالی دٍگیت ,N0T, NANDگیت ANDتِ دست هی آیذ . : Note-7در یک هذار هٌغمی اگز تهاهی گیتْای OR ٍ ANDرا تِ گیت NANDتثذیل کٌین ؛ خزٍجی ٍ ػولکزد هذار تغییزی ًوی کٌذ . : Note-8تاتغ NOR؛ دٍگاى تاتغ NAND NAND NAT,هی تاضذ .تِ ّویي دلیل لَاػذ هٌغمی ً NORیش دٍگاى لَاػذ هٌغمی NANDاست . : Note-9تَسظ دٍ گیت هتَالی NOT,NOR؛ گیت ORحاغل می ضَد . : Note-10گیت NORتک ٍرٍدی ّواى گیت NOTهی تاضذ .
: Note-11گیت NANDهؼادل یک گیت ORاست کِ تواهی ٍرٍدیْای آى هؼکَس ضذُ تاضذ .
ABC A B C : Note-12گیت NORهؼادل گیت ANDاست کِ تواهی ٍرٍدیْایص هؼکَس ضذُ تاضٌذ .
x y z x . y. z : Note-13گیت ّای ، XNOR ٍ XORدر تطخیع تؼذاد فزد ٍ سٍج تیتْای یک استفادُ هی ضًَذ کِ گیت XORهمایسِ گز ػذم تساٍی ٍ گیت XNORهمایسِ گز تساٍی است .
ارسشْای هٌطقي در گيت ّا
: Note-14در گیت ّای هٌغمی هحذٍدُ ٍلتاص تیي )ٍ (0 – 0.8لت تِ ػٌَاى صفز هٌغمی ٍ هحذٍدُ ٍلتاص تیي )ٍ (2 – 5لت تِ ػٌَاى یه هٌغمی تلمی هی ضَد .
: Note-15تزای تؼییي صفز اس سهیي یا ٍ Groundیا ارسش غفز استفادُ هی ضَد . : Note-16تزای تؼییي یه اس VCCیا ٍ +5Vیا یک هٌغمی استفادُ هی ضَد .
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هذارات تزكيبي
هشخص كزدى پایِ ّای بذٍى استفادُ : Note-17در گیت ّای هٌغمی در غَرتیکِ تؼذاد پایِ ّای ٍرٍدی اس حذ ًیاس ها تاالتز تاضذ ً ،وی تَاى پایِ ّا را تِ ّویي غَرت رّا کزد .چَى گیت ًاهؼیي هی ضَد .تٌاتزایي یکی اس راّْای خٌثی کزدى پایِ ّای هذکَر کَر کزدى پایِ ّا یا تِ ػثارت دیگز تی اثز کزدى آًْاست
: Gold Note-1 در گیتْای NOR ٍ ORپایِ ّای بدٍى استفادُ را زهیي کٌید . در گیت ّای NAND ٍ ANDپایِ بدٍى استفادُ را VCCکٌید .یعٌی ارزش 1برای آى پایِ ّا قرار دّید .
پایِ ّای تعييي كٌٌذُ در گيت ّای هٌطقي : Note-18پایِ تؼییي کٌٌذُ ؛ پایِ ای است کِ اگز در ٍرٍدی گیتی ٍارد ضَد ،تایغ خزٍجی آى گیت را تذٍى در ًظز گزفتي پایِ ّا ی صف ٍ در گیت ّای NOR ٍ ORارسش یه هی تاضذ . دیگز هی تَاى حاسثِ کزد ،کِ در گیت ّای NAND ٍ ANDارسش ر
: Gold Note-2 ( Iاگر یکی از ٍرٍدیْای XORصفر هٌطقی باشد XOR ،بِ بافر تبدیل هی شَد .
( X 0) X
( IIاگر یکی از ٍرٍدیْای XORیک هٌطقی باشد XOR ،تبدیل بِ گیت NOTهی شَد .
( X 1) X
( IIIاگر یکی از ٍرٍدیْای XNORیک هٌطقی باشد ،خرٍجی ّواى ٍرٍدی است .
( IVاگر یکی از ٍرٍدیْای XNORصفر هٌطقی باشد XNOR ،تبدیل بِ گیت NOTهی شَد .
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( Vاگر در XORیا ّ XNORر دٍ ٍرٍدی ًقض شًَد ،تابع هربَط تغییری ًوی کٌد.
(VIاگر یکی از ٍرٍدیْای XORیا XNORهعکَس شًَد ،گیت هَرد ًظر هعکَس خَاّد شد .یعٌی گیت XORبِ گیت ٍ XNORیا بالعکس تبدیل خَاّد شد .
(VIIدر گیت ّای XORیا XNORعالهت NOTهی تَاًد بیي کلیِ پایِ ّا حرکت کٌد .
(VIIIتَجِ ًوایید :
: 1سادُ تزیي راتغِ جثز تَلی خزٍجی هدار ضىل سیز را تٌَیسید ؟
: 2اگز x . y = 1تاضد ،حاصل x yرا تدست آٍرید ؟ : 3خزٍجی سادُ ضدُ هدار سیز ودام است ؟
هذارات تزكيبي
: 5در صَرتی وِ یه گیت XORدارای ٍ nرٍدی تاضد خزٍجی آى ” “0هی تاضد اگز ......... : 6خزٍجی هدار سیز ودام را تدست آٍرید ؟
: 7سادُ تزیي راتغِ جثز تَلی خزٍجی هدار ضىل سیز را تٌَیسید ؟
: 8خزٍجی سادُ ضدُ هدار سیزرا تٌَیسید ؟
: 9خزٍجی سادُ هدار رٍتزٍ را هحاسثِ وٌید ؟
: 10هدار هماتل هعزف ودام گیت است ؟
: 11تاتع هٌغمی fرا هحاسثِ وٌید ؟
: 12تاتع سادُ ضدُ جدٍل وارًَی رٍتزٍ را تدست آٍرید ؟
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: 13عثارت A B . A Bرا سادُ وٌید ؟ : 14اگز x. y 0تاضد ،حاصل عثارت x yرا تدست آٍرید ؟ : 15خزٍجی سادُ ضدُ هدار ضىل سیز را تدست آٍرید ؟
: 16خزٍجی هدار هماتل را تدست آٍرید ؟
: 17خزٍجی Fرا در ضىل سیزتدست آٍرید ؟
: 18تاتع هٌغمی هدار سیز را حساب وٌید ؟
ب تزویة چٌد گیت NANDهی تَاى یه گیت ANDساخت ؟ : 19ا : 20هدار سیز ًوایاًگز چِ گیتی است ؟
هذارات تزكيبي
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بخش دٍم
هذارّای تزكيبي هجتوع
: Note-19هذارّای هٌغمی تِ دٍ گزٍُ اغلی تمسین تٌذی هی ضًَذ : .Iهذارّای تزکیثی (Combinantial Circuit) : .IIهذارّای تزتیثی (Sequential Circuit) : : Note-20در هذارّای تزکیثی خزٍجی در ّز لحظِ تِ ٍرٍدی در ّواى لحظِ تستگی دارد ؛ ایي هذارات اعالػات را حفظ ًوی کٌٌذ ٍ حزکت اعالػات اس ٍرٍدی تِ خزٍجی یک عزفِ است .
: Note -21در هذارات ترتیثی خزٍجی در ّز لحظِ ّن تِ ٍرٍدی هذار در ّواى لحظِ تستگی دارد ٍ ّن تِ اعالػات پیطیي هذار ٍاتستِ است ؛ ایي هذارات ضاهل سلَل (لسوتی ) تِ ػٌَاى فیذتک هی تاضذ .تَجِ ًواییذ در ایي هذارات خاغیت حفظ اعالػات ٍجَد دارد .
: Note-22اًَاع هذارات تزکیثی خاظ ػثارتٌذ اس : .Aاًَاع جوغ کٌٌذُ ّا )(Adders .Bهمایسِ کٌٌذُ ّا )(Comparator .Cاًَاع تفزیك کٌٌذُ ّا )(Sub tractor .Dرهش گطاّا )(Decoders .Eرهش کٌٌذُ ّا )(Encoder .Fتَسیغ کٌٌذُ ّا )(Demultiplexer = DMUX .Gهذار تسْین کٌٌذُ )(Multiplexer = MUX
جوع كٌٌذُ ّا )(Adders :Note 23لَاًیي جوغ کٌٌذُ دٍ ٍ سِ تیتی :
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هذارات تزكيبي
هذار ًين جوع كٌٌذُ )(Half Adder : Note-24ایي هذار فمظ ػول جوغ دٍ تیت را اًجام هی دّذ ،کِ دارای ٍ 2رٍدی ٍ 2خزٍجی هی تاضذ .
S A0 A1 C A0 A1
: Note-25هذار هؼادل ًین جوغ کٌٌذُ تِ غَرت سیز هی تاضذ :
هذار توام جوع كٌٌذُ )(Full Adder : Note-26تزای جوغ دٍ ػذد nتیتی اس هذارات توام جوغ کٌٌذُ (جوغ کٌٌذُ کاهل ) استفادُ هی کٌین .ایي هذار ًسثت تِ ًین جوغ کٌٌذُ ٍرٍدی دیگزی تِ ًام Ci-1دارد کِ رلن ًملی عثمِ لثلی را اًتمال هی دّذ . : Note-27تٌاتزایي هذار توام جوغ کٌٌذُ ٍ 3رٍدی ٍ 2خزٍجی دارد :
S A B Ci 1
Ci AB A B .Ci1
A B Ci - 1 Ci Si 0 0 0 0 0 0 0 1 0 1 0 1 0 0 1 0 1 1 1 0 1 0 0 0 1 1 0 1 1 0 1 1 0 1 0 1 1 1 1 1 "جذٍل غحت هذار توام جوغ کٌٌذُ"
: Gold Note-3هدار توام جوع کٌٌدُ را هی تَاى تَسط دٍ ًین جوع کٌٌدُ ٍ یک گیت ORطراحی ًوَد ؛
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: Gold Note-4برای تبدیل یک هدار جوع کٌٌدُ کاهل بِ یک ًین هدار جوع کٌٌدُ هی تَاى از رٍش زیر استفادُ کرد:
ٍاحذ جوع كٌٌذُ هَاسی : Note-28در ضکل سیز یک ٍاحذ جوغ کٌٌذُ کِ ضاهل n – 1توام جوغ کٌٌذُ ٍ یک ًین جوغ کٌٌذُ است ً ،طاى دادُ هی ضَد ؛ کِ ػولیات اًجام ضذُ تِ غَرت سیز است :
ایي جوغ کٌٌذُ هَاسی خَاًذُ هی ضَد .چَى تیت ّای ًملی آى تِ غَرت هَجی اًتمال هی یاتذ .
7483 ، IC : Note-29یک هذار جوغ کٌٌذُ چْار تیتی هی تاضذ .
تفزیق كٌٌذُ ّای بایٌزی )(Sub tractor : Note-30لَاًیي تفزیك تایٌزی :
تفاضل )D : (Difference لزؼ )B : (Borrow
B 0 0 0 1
D 0 1 0 1
B 0 0 1 1
-
A 0 1 1 0
: Note-31اگز تخَاّیم دٍ تیت را اس یکذیگز تفزیك کٌین هوکي است ًیاس تاضذ کِ اس عثمِ لثلی لزؼ تگیزین ) (Borrow؛ تٌاتزایي خزٍجی Bتِ ػٌَاى خزٍجی لزضی است ٍ سهاًی 1است کِ تخَاّین اس عثمِ ای لزؼ تگیزین .
اًَاع تفزیق كٌٌذُ ّا : Note-32اًَاع تفزیك کٌٌذُ ّا ػثارتٌذ اس : .Iهذار ًین تفزیك کٌٌذُ )(Half Subtarctor .IIهذار تفزیك کٌٌذُ کاهل )(Full Subtractor
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هذارات تزكيبي
هذار ًين تفزیق كٌٌذُ : Note-33هذار ًین تفزیك کٌٌذُ دارای ٍ 2رٍدی ٍ 2خزٍجی هی تاضذ کِ لادر است ،دٍ تیت را اس یکذیگز تفزیك ًوایذ . B 0 1 0 0
D 0 1 1 0
x 0 0 1 1
y 0 1 0 1
D x y yx x y B xy
هذار هعادل ًين تفزیق كٌٌذُ : Note-34
هذار تفزیق كٌٌذُ كاهل ّ : Note-35زگاُ در هذاری تخَاّین تیص اس دٍ تیت را اس یکذیگز را کن کٌین ،اسهذار تفزیك کٌٌذُ کاهل استفادُ هی ًوایین . در غَرتی کِ جذٍل غحت آى را رسن کٌین تِ راحتی در هی یاتین :
هالحظِ هی گزدد :
B 0 1 1 1 0 0 0 1
D 1,2,4,7
Bi 1,2,3,7
:Note-36تؼذ اس سادُ کزدى تاتغ ،خزٍجی ّای B ٍ Dتزاتز ّستٌذ تا :
D 0 1 1 0 1 0 0 1
Bi - 1 0 1 0 1 0 1 0 1
Bi xy x y .Bi1 : Note-37تَسظ دٍ ًین تفزیك کٌٌذُ ٍ یک گیت ORلادرین یک هذار تفزیك کٌٌذُ کاهل را عزاحی ًوایین .
;
y 0 0 1 1 0 0 1 1
x 0 0 0 0 1 1 1 1
0 1 2 3 4 5 6 7
D x y Bi1
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هذار جوع ٍ تفزیق كٌٌذُ كاهل nبيتي : Note-38در غَرتی کِ تخَاّین ػولیات جوغ ٍ تفزیك را در یک هذار اًجام دّین ،هی تَاى تِ ٍرٍدی هذار جوغ کٌٌذُ یک گیت XORاضافِ ًوایین کِ ػولیات جوغ ٍ تفزیك را اًجام هی دّذ .الثتِ پایِ کٌتزلی در هذار تؼزیف هی گزدد کِ ًَع ػولیات را تؼییي هی کٌذ .
در غَرتی کِ A = 0تاضذ ،هذار ج هغ کٌٌذُ هی تاضذ . در غَرتی کِ A = 1تاضذ ،هذار تفزیك کٌٌذُ هی تاضذ .
هذار ضزب كٌٌذُ : Note-39ضزب اػذاد دٍدٍیی هاًٌذ اػذاد دّذّی هی تاضذ .تذیي ًحَ کِ ّز تیت ػذد اٍل در کن ارسش تزیي تیت ػذد دٍم ضزب هی ضَد کِ ایي ًَع ضزب را ضزب جشئی هی ًاهٌذ .حاغلضزب ّای جشئی ّز تار یک هکاى تِ سوت چپ هی رًٍذ . : Note-40حاغلضزب ًْایی = جوغ حاغلضزب ّای جشئی
B0
B1
A0
A1
A0 B1 A0 B0 0 x0
A1 B1 A1 B0 x1
x2
x3
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هذارات تزكيبي
: 21هدارهماتل هعزف چیست ؟
Self Test
: 22در هدار ضىل سیز اگزٍرٍدی Aتزاتز عدد ٍ ٍ 6رٍدی Bتزاتز عدد 2تاضد ٍ خظ وٌتزلی ، x = 1خزٍجی Sچِ عددی را ًطاى هی دّد ؟
: 23ضىل سیز چِ هداری را ًطاى هی دّد ؟
: 24ودام هدار هزتَط تِ تفزیك وٌٌدُ ًالص هی تاضد ؟
: 25در ودام هدار رٍتزٍ تِ اسای ٍرٍدیْای هضارب 4خزٍجی تزا تز یه هی ضَد ؟ ))(y = f (A,B,C,D
: 26در توام جوع وٌٌدُ سیز ودام گشیٌِ درست است ؟ ّ S1 (1وَارُ تزاتز S11هی تاضذ . ّ S2ٍ S1 (2یچگاُ تا ّن یک ًوی ضًَذ . ّ C12 ٍ C11 (3یچگاُ تا ّن یک ًوی ضًَذ . ّ C1 ٍ S1 (4یچگاُ تا ّن یکی ًوی ضًَذ .
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: 27تزای ساخت یه توام جوع وٌٌدُ 4تیتی چِ گیتْایی هَرد استفادُ لزار هی گیزد؟ (حدالل گیتْا) : 28فزهَل رلن ًملی خزٍجی یه توام جوع وٌٌدُ را تیاى وٌید ؟ : 29فزهَل تزای رلن ًملی خزٍجی یه توام تفزیك وٌٌدُ را تیاى وٌید ؟ : 30در جدٍل درستی توام تفزیك وٌٌدُ اگز x = 1 ٍ y = 1ٍ Bi1 1تاضد ،آًگاُ Bi ٍ Dتزا تز چِ همدار عددی خَاٌّد تَد ؟ ً : 31تیجِ خزٍجی z2 z1 z0هدارّای جوع وٌٌدُ سیز چیست ؟
: 32در ضىل هماتل همدار D , E , F , Gچیست ؟
: 33هدار جوع گز واهل را چگًَِ هی تَاى ایجاد ًوَد ؟ : 34جدٍل صحت هماتل چِ چیشی را ًوایش هی دّد ؟
: 35در جدٍل صحت تست لثل Y1 ،ودام عول هٌغمی را ًطاى هی دّد ؟ : 36ضىل هماتل ودام عول هٌغمی را اًجام هی دّد ؟
: 37عثارتی تٌَیسید وِ هدار ًین جوع وٌٌدُ ،تِ فزم جوع حاصلضزب ّا ،را ًوایص دّد ؟
Y2 0 0 0 1
Y1 0 1 1 0
B 0 1 0 1
A 0 0 1 1
87
هذارات تزكيبي
بخش سَم
هذارات هقایسِ كٌٌذُ )(Comparator : Note-41هذارات همایسِ کٌٌذُ ؛ هذاراتی ّستٌذ کِ لادرًذ ارسش دٍ تیت یا دٍ ػذد را تا یکذیگز همایسِ ًوایٌذ .
: Note-42گیت XORیک همایسِ کٌٌذُ سادُ است کِ فمظ تساٍی یا ػذم تساٍی دٍتیت را ًطاى هی دّذ .
F x y 0 1 1 0
y 0 1 0 1
x 0 0 1 1
:Note-43تز اساس جذٍل غحت هطخع هی ضَد سهاًی کِ x yگیت XORػذد 1را ًوایص هی دّذ ٍ در غَرتی کِ x y تاضذ گیت XORػذد غفز را ًوایص هی دّذ .
:Note-44ایزاد XORایي است کِ حالت تشرگتز ٍ کَچکتز را ًطاى ًوی دّذ . :Note-45گیت ً XNORیش هی تَاًذ تِ ػٌَاى همایسِ کٌٌذُ تِ کار رٍد .
:Note-46هذار همایسِ گز یک تیتی سیز لادر است حاالت کَچکتز ؛ تشرگتز ٍ هساٍی را ًطاى دّذ . در غَرتی کِ x < yتاضذ ،خزٍجی L؛ یک ضذُ ٍ تالی خزٍجیْا غفز است . در غَرتی کِ x = yتاضذ ،خزٍجی E؛ یک ضذُ ٍ تالی خزٍجیْا غفز است . در غَرتی کِ x > yتاضذ ،خزٍجی G؛ یک ضذُ ٍ تالی خزٍجیْا غفز است .
هذار هقایسِ كٌٌذُ چْار بيت )(4 bit :Note-47هذار سیز یک همایسِ کٌٌذُ 4 bitهی تاضذ . تزای تزرسی هذار فَق اگز جذٍل همایسِ ای تزسین ًوایین 28 256 ،حالت هختلف در ایي الگَریتن ٍجَد دارد .تٌاتزایي تزسین جذٍل فَق تسیار هطکل است .
y L E G 0 0 1 0 1 1 0 0 0 0 0 1 1 0 1 0
x 0 0 1 1
88
. هی تاضذ
x3 y3 ORx3 y3 AND ORx3 y3 AND x2 y2
y3 y2 y1 y0 y
ٍ
x3 x2 x1 x0 x
همایسِ دٍ ػذد چْار تیت:Note-48
: ِ تشرگتز است کy تِ ضزعی اس ػذدx ػذد.I
x2 y2 ORx3 y3 AND x2 y2 AND x1 y1 AND x0 y0
AND x1 y1
: تز اساس راتغِ تاال هی تَاى تِ راحتی ًَضت
x3 y3 G3 ; x3 y3 E3 OR ; AND . . در غَرتی هساٍی ّستٌذ کِ توام تیت ّای آى تزاتز تاضٌذyٍ x دٍ ػذد چْار تیتی.II
G3 E3 .G2 E3 .E2G1 E3 .E2 .E1.G0 G
E E3 E2 E1 E0 x3 y3
AND x2 y2
AND x1 y1 AND x0 y0
: تشرگتزاست کِ کَچکتز یا هساٍی ًثاضذx در غَرتی اسy ػذد.III
L EG :Note-49
L EG
x y
E E0 E1 E2 E3
x y
G G3 E3G2 E3 E2G1 E3 E2 E1G0
x y
( تزای گزفتي همایسِ حالتLEG تیت هی تاضذ کِ دارای ٍرٍدیْای4 یک هذار همایسِ گزIC (7485 or 4063) هذار:Note-50 . لثل) ًیش هی تاضذ
89
هذارات تزكيبي
:Note-51اگز تخَاّین دٍ ػذد 8تیتی را همایسِ کٌین تِ راحتی هی تَاى تیاى ًوَد :
: Note-52اگز تخَاّین حاغل لیاس دٍ ػثارت هٌغمی را فمظ اس ًظز تزاتزی آًْا چک کٌین ،گیت XNORایي کار را اًجام هی دّذ . اها در غَرت توایل تِ ایٌکِ تشرگتز یا کَچکتزتَدى ًیش در همایسِ گز هطخع گزدد تایذ اس یک هذار تزکیثی استفادُ کٌین .
: Note-53تزای همایسِ چٌذ ػثارت هٌغمی کِ فمظ تساٍی یا ػذم تساٍی آًْا هَرد ًیاس تاضذ ،اس تاتغ هٌغمی سیز استفادُ هی ًوایین :
: 38تلَن دیاگزام سیز ًوایاًگز چِ هداری است ؟
F A0 B0 A1 B1 A2 B2 ... An Bn
Self Test
: 39فزهَلی تٌَیسید وِ تیاگز همایسِ وٌٌدُ 4تیتی تاضد ؟ : 40در یه همایسِ وٌٌدُ دٍعدد دٍتیتی A ،تِ صَرت ) B ٍ (A1 , A0تِ صَرت ) (B1B0هی تاضد .راتغِ خزٍجی وِ تیاًگز تساٍی دٍ عدد تاضد ،را تٌَیسید ؟ : 41تاتع تٌَیسید وِ دٍعدد y ٍ xرا در حالت تساٍی همایسِ وٌد ؟ x + y (1
xy (2
x y (3
x y (4
: 42در همایسِ وٌٌدُ دٍ عدد دٍ تیتی A ،تِ صَرت Bٍ A1 , A0 تِ صَرت B1 , B0 هی تاضد ،راتغِ خزٍجی وِ تیاًگز تساٍی دٍ عدد تاضد ،را تٌَیسید ؟
90
: 43ودام ضىل هزتَط تِ یه همایسِ وٌٌدُ یه تیتی است ؟
: 44هداری رسن وٌید تا سِ ٍرٍدی وِ تِ اسای اوثزیت ًسثی ٍرٍدی ّا یه ضَد ؟ : 45هعادلِ هداری تا سِ ٍرٍدی عزح وٌید وِ تِ اسای اعداد فزد الهپی در خزٍجی رٍضي ضَد ؟ : 46هدار هماتل ودام عول هٌغمی را ًطاى هی دّد ؟
91
هذارات تزكيبي
رهش گشا )(DECODER’S : Note-54هذاری است دارای ٍ nرٍدی ٍ 2خزٍجی کِ ػول رهش گطایی را در هذار اًجام هی دّذ . n
: Note-55در هذار ّ Decoderوَارُ یکی اس خزٍجی ّا فؼال است .
: Note-56در تیاًی دیگز دیکَدر هذاری است کِ اعالػات تایٌزی را دریافت ٍ هؼادل دسی هال آًزا در خزٍجی ایجاد هی کٌذ ٍ تِ عَر خالغِ پایِ ای را در خزٍجی فغال هی کٌذ کِ هؼادل ػذد تایٌزی ٍرٍدی تاضذ .
: Note-57تؼذاد پایِ ّای ٍرٍدی ٍ خزٍجی دیکَدر اس فزهَل فَق تثؼیت هی کٌذ .
( nتؼذاد پایِ ّای ٍرٍدی ( N 2n تؼذاد پایِ ّای خزٍجی ) خزٍجی ٍرٍدی
: Note -58در دیکَدر 2 4ج دٍل غحت آى تِ غَرت سیز هی تاضذ . تَجِ ًواییذ تِ اسای ّز ٍرٍدی فمظ یک خزٍجی فؼال است .
output’s Z2 Z1 Z0 0 0
: Note-59هذاراتی کِ تَسظ سیگٌال ) (Highفؼال ضًَذ را High Activeهی ًاهٌذ .
0 0
0
0
0
Z3 0
input's X1 X0 0 0
0
1
0
0
0
1
1
1
0
0
: Note-60هذاراتی کِ تَسظ سیگٌال ) (Lowفؼال ضًَذ را Low Activeهی ًاهٌذ .
: Note-61در تسیاری اس ّ ICا سیگٌال کٌتزلی ٍجَد دارد کِ تَسظ آى هی تَاى کل هذار را غیز فؼال ًوَد .تِ ایي سیگٌال Strobeیا ) (Enableیا ) Chipselect (CSهی گَیٌذ ،کِ هی تَاًذ ٍ High Activeیا Low Activeتاضذ .
IC 74154 : Note-62یک دیکَدر 4 16هی تاضذ .
رهش گذارENCODER : Note-63اًکَدر هی تَاًذ تِ اسای فؼال ضذى یک پایِ در ٍرٍدی هؼادل تایٌزی آى پایِ را در خزٍجی ایجاد کٌذ ٍ هذار آى دلیماً تز ػکس دیکَدر کار هی کٌذ .
: Note-64هْوتزیي کارتزد آى تثذیل کذّای دّذّی تِ کذ 4تیتی BCDهی تاضذ .
output's Z1 Z0 0 0
X0
input's X2 X1 0 0
X3 0
0
0
0
1
0
0
0
1
0
0
1
1
0
0
0
92
Self Test
: 47اگز یه DECتعداد 115پایِ خزٍجی داضتِ تاضد ،حدالل چٌد پایِ ّای ٍرٍدی دارد ؟ : 48خزٍجی هدار سیز چیست ؟
: 49یه دیىَدر تا ٍ 10رٍدی ،حداوثز چٌد خزٍجی هی تَاًد داضتِ تاضد ؟ : 50جدٍل صحت هماتل ودام هدار تزویثی را ًطاى هی دّد ؟
A D0 D1 D2 D3 0 1 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 0 0 1
B 0 0 1 1
: 51هدار هٌغمی هزتَط تِ جدٍل صحت سَال لثل در حالت فعال خزٍجی ّا تا 1را رسن ًوایید ؟ : 52هداری وِ اعالعات را اس حالت اعطاری تِ تایٌزی تثدیل هی وٌد ً .................ام دارد. : 53تَاًا ساسی در هدارّای رهش گطا تِ چِ هعٌی است ؟ (1تا ٍغل کزدى تغذیِ تِ گیت ّای هٌغمی ،هذار لاتلیت رهش گطایی را پیذا هی کٌذ . (2تَاًایی هذار در تثذیل اعالػات در هثٌای 2تِ اػطاری است . (3تِ ایي هؼٌی است کِ خزٍجی ّا هتٌاظز تا هیي تزم ٍرٍدی ّاست . (4پایِ ای است کِ تا فؼال تَدى آى هذار ػول رهش گطایی را اًجام هی دّذ . : 54ودام تعزیف در هَرد دیىَدر صحیح است ؟ (1هذاراتی ّستٌذکِ اعالػات رااسدستگاُ ّای هحاسثاتی دیجیتالی دریافت کزدُ ٍایي اعالػات رااسحالت دٍدٍیی تِ اػطاری تثذیل هی کٌٌذ. (2یکی اس پزکارتزد تزیي هذارّایی ّستٌذ کِ هاًٌذ سلکتَر ػول هی کٌٌذ . (3هذاراتی ّستٌذ کِ اعالػات را اس حالت دّذّی تِ تایٌزی تثذیل هی کٌٌذ . ّ (4یچکذام .
93
هذارات تزكيبي
هالتي پلکسز MUX : Note-65هذاری کِ تا تَجِ تِ آدرس یکی اس پایِ ّای ٍرٍدی را در خزٍجی ایجاد هی کٌذ .
هذارات هالتی پلکسز ) (MUXدارای nخظ آدرس ؛ 2nخظ ٍرٍدی تَدُ کِ در آى ٍاحذ فمظ یکی اس ٍرٍدیْا تا تَجِ تِ آدرس آى تِ خزٍجی هٌتمل هی ضَد.
Z I0 I1 I2 I3
S1 S0 0 0 0 1 1 0 1 1
: Note-66تَجِ کٌیذ در MUX؛ خزٍجی یک ػذد است .تؼذاد خغَط آدرس nػذد ٍ تؼذاد ٍرٍدیْای آى 2 n هی تاضذ .
تابع خزٍجي MUX : Note-67ایي تاتغ اس رٍی آدرس ّا ٍ ٍرٍدی ّای هالتی پلکسز ساختِ ضذُ ،تِ عَریکِ اگز ٍرٍدی ّای هالتی پلکسز پایِ خاغی را فؼال کٌٌذ ،اعالػات آدرس در پایِ هذکَر ضزب هی ضَد ٍ در خزٍجی ایجاد هی گزدد . : Exampleتاتع حاصل اس هدار فَق را هحاسثِ ًوایید ؟
: Solution
F AB C B C BC F B C I 0 AB C
F AB C
B C I1 B B C B C
BC I 2 BC 0 0 BC I 3 BC1 BC
B C 0 0 1
0
0
1
1
1
:Note-68در تزسین هؼادل هذاری MUXهطاّذُ هی ضَد کِ MUXتِ غَرت دٍ عثمِ AND – ORهی تاضذ ،کِ تِ آى ULM MUXهی گَیٌذ .یؼٌی MUXتِ تٌْایی یک گیت کاهل است .
: Note-69تا استفادُ اس هالتی پلکسز هی تَاى گیتْای هختلفی را در خزٍجی ضثیِ ساسی کزد ،تِ عَریکِ ساختي ایي گیت ّا فمظ تا تغییز آدرس هیسز است .
94
هذار دی هالتي پلکسز )(DMUX : Note-70هذاری است کِ دلیماً تز ػکس هالتی پلکسز ػول هی ًوایذ ٍ یک پایِ ٍرٍدی را تا تَجِ تِ پایِ اًتخاب یا آدرس ا در خزٍجی تَسیغ هی کٌذ .
: Note-71هذار دی هالتی پلکسز فمظ هی تَاًذ در یک سهاى یکی اس ٍرٍدی ّا را تِ خزٍجی هتػل کٌذ .
: Note-72هذار DMUXهی تَاًذ هاًٌذ دیکَدر کار کٌذ .یؼٌی اعالػات ٍرٍدی آى تایٌزی ٍ اعالػات خزٍجی آى ػذدی هؼادل تا ٍرٍدی تاضذ .تِ ضزط آًکِ ٍرٍدی I؛ هؼادل یک هٌغمی تاضذ .
: Note-73ایي هذار دارای یک ٍرٍدی ؛ nخظ آدرس ٍ 2nخزٍجی هی تاضذ .
Z0 1 0 0 0
Z1 0 1 0 0
Z2 0 0 1 0
Z3 0 0 0 1
S0 0 1 0 1
S1 0 0 1 1
95
هذارات تزكيبي
Self Test
: 55آیا یه DMUXتا ٍرٍدی xهی تَاًد یه Decoderتاضد ؟ در چِ صَرتی؟ : 56اگزیه هدار 1 D MUXتِ 4تاضد ،تِ ضزعی هی تَاًد تِ یه هدار 2 Decoderتِ 4تثدیل ضَد وِ : (1اٍلیي خزٍجی تِ ٍرٍدی تَسیغ کٌٌذُ هتػل ضَد .
(2غفز هٌغمی تِ ٍرٍدی تَسیغ کٌٌذُ هتػل ضَد .
ٍ (3رٍدی تَسیغ کٌٌذُ اتػال تاس تاضذ .
ٍ (4رٍدی تَسیغ کٌٌذُ تِ یک هٌغمی هتػل تاضذ .
: 57خزٍجی سادُ ضدُ هدار ضىل سیز چیست ؟
: 58راتغِ سادُ شدُ خزٍجی هدار هماتلرا تدست آٍرید ؟
: 59خزٍجی هدار ضىل سیز را تٌَیسید ؟
: 60خزٍجی سادُ ضدُ هدار ضىل رٍتزٍ را تٌَیید ؟
96
: 61هدار عزاحی وٌید وِ تاتع رٍتزٍ را تِ ووه یه هالتی پلىسز تساسد ؟
F A B C A B C ABC ABC : 62تلَن هجَْل در ضىل رٍتزٍ هعادل ودام هدار است ؟
: 63خزٍجی سادُ ضدُ هدار سیز را تدست آٍرید ؟
: 64تلَن رٍتزٍ ًوایاًگز ودام هدار هٌغمی تزویثی هی تَاًد تاضد ؟
: 65اس هدار رٍتزٍ تِ عٌَاى ودام ًَع هدار استفادُ هی شٍد ؟
: 66خزٍجی هدار سیز چیست ؟
97
هذارات تزكيبي
: 67خزٍجی هدار رٍتزٍ چیست ؟
: 68خزٍجی هدار سیزچیست ؟
: 69ودام هدارات تزویثی ًمص عودُ ای در عزاحی سیستن ( BUSگذرگاُ ) دارد ؟ : 70وداهیه اس هدارات تزویثی سیز ٍجَد ًدارد ؟
(1رهش گطای 1 2
(3تسْین کٌٌذُ 2 1
(2رهش گذار 4 1
(4تَسیغ کٌٌذُ 1 4
: 71یه هالتی پلىسز 8 1چٌد خظ آدرس السم دارد ؟ ً : 72ام خظ وٌتزل اضافی هالتی پلىسزّا چیست ؟ : 73تزای اًتمال اعالعات تِ صَرت سزی اس چِ هداراتی استفادُ هی ضَد ؟
98
6 SEQUENTIAL LOGICm DESIGN PRACTICE INTRODUCTION
Sequential-circuit documentation standards Latch and flip flop R S flip flop J K flip flop D flip flop T flip flop Shift Rejister Counter
99
هذارات ترتيبي
بخص اول
هعرفي فليپ فالپ ها
: Note-1دس هذاساذ زشزیثی خشٍجی ّن بِ ٍرٍدی فؼلی ٍ ّن بِ ٍرٍدیْای قبلی ٍاتسسِ اسر .ایي هذاساذ سا هذارات با حافظِ ًیض هی ًاهٌذ .
: Note-2هذاساذ زشزیثی دٍ دسسِ اًذ : سٌکرٍى ؛ ّوسهاى :زَسظ یک خالس )ّ (Clockوضهاى هی ضًَذ . آسٌکرٍى ؛ غیر ّوسهاى :کٌسشل ضشٍع ػولیاذ فقظ تِ ػْذُ ٍسٍدی اسر .
: Note-3دس هذاساذ سٌکشٍى زا صهاًی کِ Clockدس هذاس ًیسر ٍ ،سٍدی ّش چقذس زغییش کٌذ ایشادی حاصل ًوی گشدد .اها دس صهاى حضَس ٍ CLKسٍدی ًثایذ زغییش کٌذ .
1 TCLK 1
f CLK TCLK
f CLK )Flip – Flop = (F.F ٍ : Note-4احذ اصلی دس هذاساذ زشزیثی فلیح فالج هی تاضذ .فلیح فالج ٍاحذی اسر کِ قادس اسر یک تیر سا دس خَد رخیشُ ًوایذ فلیح فالج سا هذاس ( Latchقفل) ًیض هی ًاهٌذ .
فليپ فالپ آسنکروى )(R – S Flip Flop : Note-5ایي فلیج فالج تِ دٍ صَسذ NOR ٍ NANDعشاحی هی گشدد .
دس ایي هذاس خشٍجی دس لحظِ تؼذ ) (Next Stateتِ ٍسٍدی ٍ خشٍجی لحظِ فؼلی ) (Present Stateتسسگی داسد .
Qt 1 S R .Qt تش اساس ساتغِ تاال خشٍجی تِ صَسذ صیش سادُ هی گشدد :
State
Qt 1
No Change Reset Set غیش هجاص
Q t 1 0 1
Qt 1
R
S
Qt 0 1 1
0 1 0 1
0 0 1 1
Qt 1
)Q(t+1
Qt
R
S
1 0 1 1 0 0 1 1
0 1 0 0 1 1 1 1
0 1 0 1 0 1 0 1
0 0 1 1 0 0 1 1
0 0 0 0 1 1 1 1
100
هطکل ایي فلیح فال ج صهاًی اسر کِ ّش دٍ ٍسٍدی یک تاضٌذ .دس آى صَسذ خشٍجی آًْا کِ تایذ هؼکَس یکذیگش تاضٌذ تا ّن تشاتش خَاٌّذ ضذ . : Note-6تایذ کاسی کٌین کِ ّیچگاُ S ٍ Rتا ّن یک ًطًَذ
فليپ فالپ آسنکروى )(SR – F.F : Note-7
دس هذاس سٌکشٍى خشٍجی ّا صهاًی زغییش ضکل هی دٌّذ کِ ٍ CLKجَد داضسِ تاضذ ٍ صهاًی کِ CLK = 0تاضذ ،زغییشاذ SRتش خشٍجی اثشی ًذاسد .
State
Qt 1
Latch
Q t
No Change Reset Set غیش هجاص
Q t 1 0 1
Qt 1
R
S
CLK
Qt
0 1 0 1
0 0 1 1
0
Qt 0 1 1
1 1 1 1
: Note-8فلیح فالخْا ػوَهاً داسای دٍ ٍسٍدی Clear ٍ Presetهی تاضٌذ .خایِ Presetتشای یک کردى ٍ خایِ Clearتشای صفر کردى Qتِ کاس هی سٍد .
: Note-9خایاًِ ّای Clear ٍPresetصهاًی فؼال هی ضًَذ کِ CLKحضَس ًذاضسِ تاضذ .اها اگش ٍ CLKجَد داضسِ تاضذ ،ایي دٍ خایاًِ غیش فؼال خَاٌّذ تَد . : Note-10غالثاً ایي دٍ خایاًِ )ّ Low Active (Clear ٍ Presetسسٌذ .
ػوَهاً صهاًی کِ CLKدس هذاس حضَس داسد ایي دٍ خایِ سا 1هی کٌین .
چَى 1دس NANDاثشی ًذاسد .
JK Flip Flap : Note-11ایي Flip Flapتشای سفغ هحذٍدیر S = R = 1تِ کاس هی سٍد ٍ تْثَد یافسِ فلیح فالج SRاسر .
Qt 1 Qt 1 Qt . J K Qt
Qt 0 1 Q t
K
J
0 1 0 1
0 0 1 1
101
هذارات ترتيبي
T Flip Flap (Trigger) : Note-12ایي F.Fداسای یک ٍسٍدی اسر کِ تسسِ تِ هقذاس ایي ٍسٍدی حالر تؼذی ّواى حالر فؼلی یا هکول آى خَاّذ تَد .
Qt 1
T
Q t
0 1
Qt
) Q(t 1) T Q(t
طراحی T – F.Fتَسط : D – F.F
(Delay) Flip Flap : Note-13ایي فلیح فالج داسای یک ٍسٍدی هی تاضذ ٍّوَاسُ آى ٍسٍدی سا تا یک خالس ساػر زأخیش تِ خشٍجی اىزقال هی دّذ .
Qt 1 D 0 0 1 1 Qt 1 D D – FFزغییش یافسِ RSتا خالس ساػر اسر .دلیل عشاحی D – FFزَاًایی آى دس اًسقال DATAاسر .
: Note-14اگش زؼذاد حاالذ هذاس ،زَاًی اص ً 2ثاضذ ،هذاس داسای حاالذ تالاسسفادُ اسر .اکثش هذاساذ Digitalاص JK – FFکِ اًؼغاف خزیشزشیي ًَع فلیح فالج اسر ،ساخسِ هی ضًَذ .اص ًَع RS ٍ Dتشای کاستشدّایی کِ ًیاص تِ اًسقال دادُ داسًذ ،اسسفادُ هی ضَد .
102
: 1حاالت ابْام در فلیپ فالپ هقابل چیست ؟
Self Test
: 2فلیپ فالپ ،هربَط بِ جذٍل صحت دادُ شذُ است را رسن ًواییذ؟
Qn+1 1 0
: 3جذٍل صحت هربَط بِ شکل زیر را رسن کٌیذ ؟
: 4ػولکرد کذام هذار هؼادل T – FFاست ؟
: 5هؼادلِ حالت SR – FFرا بٌَیسیذ ؟ : 6در کذام فلیپ فالپ حالت بؼذی هستقل از حالت فؼلی آى است ؟
A 1 0
103
هذارات ترتيبي
: 7در شکل رٍبرٍ با تَجِ بِ پالسْای ساػت اػوالی شکل سیگٌال Q1 ٍ Q0کذام است ؟ (قبل از اػوال اٍلیي پالس ساػت ،یک لحظِ کَتاُ پایِ Clearرا صفر هی کٌین).
: 8هذار هربَط بِ جذٍل صحت هقابل را رسن کٌیذ ؟ (بِ ازای اػوال پالس ساػت )
: 9در شکل دادُ شذُ در لحظِ اػوال پالس ساػت t5خرٍجی … = ٍ Qخرٍجی Q ...است .
: 10هؼادلِ هشخصِ یک فلیپ فالپ ًَع Tرا بٌَیسیذ ؟
Qn 1
T
Qn
0
Qn
1
104 ً : 11وَدار حالت فلیپ فالپ Tکذام است ؟
: 12هذار دادُ شذُ هاًٌذ کذام فلیپ فالپ ػول هی کٌذ ؟
: 13هذار شکل هقابل هؼادل کذام چیست ؟
: 14کذام ػبارت ًادرست است ؟ (1دس SR-FFحالر S = R =1زؼشیف ًطذُ اسر . (2دس D-FFاص ازصال Qتِ ٍسٍدی فلیح فالج T-FF ،تِ دسر هی آیذ . (3دس D-FFتا آهذى خالس ساػر هکول اعالػاذ هَجَد دس ٍسٍدی دس Qظاّش هی ضَد . (4دس JK-FFدس حالر J = K = 1تا آمدى خالس ساػر احسوال ٍقَع Raceاسر . : 15خرٍجی هذار شکل هقابل بِ ازای رشتِ ٍرٍدی x = 01101010را بذست آٍریذ ؟ (فلیپ فالپ را ابتذا setفرض کٌیذ )
هذارات ترتيبي : 16هؼادلِ هشخصِ هذار هقابلرا بٌَیسیذ ؟
ً : 17وَدار حالت هذار ترتیبی زیر را رسن ًواییذ ؟
: 18در شکل دادُ شذُ با تَجِ بِ سیگٌالْای ٍرٍدی فلیپ فالپ ،شکل هَج خرٍجی Qبِ چِ صَرت خَاّذ شذ؟
: 19هذار شکل دادُ شذُ هؼادل چِ فلیپ فالپی است؟
: 20خرٍجی هذار دادُ شذُ چگًَِ خَاّذ بَد ؟
105
106 بخص دوم
طراحي انواع هذارات ترتيبي : Note-15تش خالف هذاساذ زشکیثی کِ عشاحی آىّا فقظ زَسظ یک جذٍل صحر هطخص هی ضذ ،تشای عشاحی هذاس زشزیثی ػالٍُ تش جذٍل صحر تِ جذٍل حالر ًیض ًیاص داسین .تٌاتشایي اٍلیي گام دس عشاحی هذاساذ زشزیثی دیاگشام حالر هی تاضذ .
جذول هطخصه فليپ فالپ )(Characteristic Table : Note-16تشای زجضیِ ٍ زحلیل آًالیض خشٍجی فلیح فالج ٍ عشص کاس آى اص جذٍل ّای صیش تْشُ هی تشین : RS فلیپ فالپ :
Qt 1 Qt 0 1
Qt 1 S R Qt
J K فلیپ فالپ :
R
S
0 1 0 1
0 0 1 1
Qt 1 Qt 0 1 Q t
Qt 1 J .Qt K .Qt
K
J
0 1 0 1
0 0 1 1
T فلیپ فالپ :
Qt 1 T Qt D فلیپ فالپ :
Qt 1 D
Qt 1
T
Q t
0 1
Qt
107
هذارات ترتيبي جذول تحریک فيلپ فالپها )(Excitation Table : Note-17ایي جذٍل تش اساس خشٍجی فؼلی ٍ خشٍجی تؼذی ٍسٍدیْای فلیح فالج سا زؼییي هی کٌذ . خرٍجی
T
D
0
0
1 1 0
1 0 1 D
) Qt 1 T Q(t
K
J 0
Qt 1
R
1 1 1 0 0 S R Qt Qt 1 J .Qt K .Qt
S
)Q(t 1
) Q(t
0
0
0
1 0
1 0 1
0 1 1
Qt 1
جذٍل تحریک فلیپ فالپ ّا را از رابطِ تحریک آًْا هحاسبِ هی ًوائین .
دیاگرام حالت )(State Diagram : Note-18دیاگشام حالر ػولکشد یک هذاس زشزیثی سا تِ فشم گشافیکی ًوایص هی دّذ .دس ایي دیاگشام ّ ،ش حالر زَسظ یک دایشُ ٍ اًسقال بیي حالسْای هخسلف تِ ٍسیلِ خغَط جْر داسی کِ سٍی آى هقادیشٍسٍدی ٍ خشٍجی دسصَسذ ٍجَد ًَضسِ هی ضَدً،وایص دادُ هی ضَد.
جذول حالت )(State Table : Note-19جذٍلی کِ اعالػاذ دیاگشام حالر سا تِ فشم جذٍلی ًطاى هی دّذ. طراحي هذارات ترتيبي
: Note-20رًٍذ طراحی هذارات ترتیبی : )1سسن ًوَداسحالر اٍلیِ . )2زطکیل جذٍل حالر اٍلیِ . )3کاّص زؼذاد حاالذ . )4زطکیل جذٍل ًْائی . )5سسن ًوَداس حالر ًْائی . )6اًسصاب کذ تِ حاالذ ٍ زؼذاد . F.F )7زطکیل جذٍل حاالذ ٍ جذاٍل اًسقال . )8اًسخاب ًَع . F.F )9زطکیل جذٍل زحشیک . )10تِ دسر آٍسدى هؼادالذ ٍسٍدی ٍ F.Fخشٍجی ّا . )11سسن ًوَداس .
: Note-21اگش زؼذاد حاالذ هذاس زَاًی اص ً 2ثاضذ ،هذاس داسای حاالذ تالاسسفادُ اسر . اکثش هذاساذ Digitalاص JK – FFکِ ا ًؼغاف خزیشزشیي ًَع فلیح فالج اسر ساخسِ هی ضًَذ .اص ًَع RSٍ Dتشای کاستشدّایی کِ ًیاص تِ اًسقال داسًذ ،اسزفادُ هی گشدد ٍ اص ًَع Tدس کاستشدّایی کِ ًیاص تِ هسون ساصی داسًذ (ضواسًذُ ّای دٍدٍیی ) اسسفادُ هی ضَد .
108
: Example-1فرض کٌیذ هی خَاّین هذار دیاگرام حالت زیر را طراحی کٌین . هی زَاى تِ حاالذ هذاس کذّایا ًوادّایی سا هٌسسة کشد : زَجِ ًوائیذ دس دیاگشام حالر دس ّش حالسی کِ تاضیذ ،اگشخالس ساػسی
S 0 00
ًیایذ دس ّواى حالر هی هاًذ .
S 1 01 S 2 10 S 3 11
دس ایي هثال چَى خغَط جْر داس کِ اص حالسی تِ حالر دیگش سفسِ اًذ ، زٌْا تا یک سقن دٍدٍیی هطخص ضذُ اًذ .هذاس فقظ یک ٍسٍدی داسد . اص JKکوک هی گیشین .چَى چْاس حالر داسین ،تٌاتشایي 2ػذد F.Fاسر . کِ آًْا سا تا ٍ ٍ Bٍ Aسٍدی تا ً Xطاى دادُ هی ضَد .
حالر تؼذی
x =1 A B 0 1 1 0 1 1 0 0
x =0 A B 0 0 0 1 1 0 1 1
حالر فؼلی
B
A
0 1 0 1
0 0 1 1
حال سٍش تِ دسر آٍسدى جذٍل زحشیک ٍ ساخساس گیر هٌغقی سا ًطاى هی دّین :
F.F - B JB KB 0 1 0 1 0 1 0 1 حال جذٍل کاسًَ سا تشای هذاس زشسین هی ًوائین :
F.F - A JA KA 0 0 0 1 0 0 0 1
109
هذارات ترتيبي زَجِ ًواییذ هفَْم Aخشٍجی ٍ QAهفَْم Bخشٍجی QBهی تاضذ .
Shift Register : Note -22 هذاسی اسر تشای ًگْذاسی چٌذ تیر دس خَد . ّ Shift Register ا جْر حفظ اعالػاذ ٍ اًسقال اعالػاذ دس جْر هَسد ًظش عشاحی هی گشدًذ.
انواع انتقال : Note -23
)1اًسقال هٌغقی تِ ساسر . )2اًسقال هٌغقی تِ چح . )3اًسقال هح اسثازی تِ ساسر . )4اًسقال هحاسثازی تِ چح . زفاٍذ تیي اًسقال هحاسثازی ٍ هٌغقی تش سش تیر ػالهر (آخشیي تیر سور چح) هی تاضذ .دس ضیفر هٌغقی تیر ػالهر ًیض هاًٌذ زواهی
تیسْا هٌسقل هی ضًَذ ٍ دس جای خالی ّوَاسُ سقن صفش ) (0قشاس هی گیشد .اها دس ضیفر هحاسثاذی تِ سور ساسر ،جای خالی تاقی
هاًذُ تا تیر ػالهر خش هی ضَد . دس ضیفر هحاسثازی تِ سور چح ،تیر ػالهر تایذ حفظ ضَد ٍ تیر قثل اص تیر ػالهر اص تیي هی سٍد . تِ عَس کلی دس ضیفر هٌغقی جای خالی ّوَاسُ تا صفش خش هی ضَد ٍ دس ضیفر سیاضی ػالهر ػذد تایذ ّوَاسُ حفظ ضَد .
Right Shift Example -2
0
0
1
1
0
1
0
1
0
1
1
0
1
0
1
0
: Example – 3ػذد ّگسا دسیوال ADرا یک بیت بِ سوت چپ شیفت هٌطقی دّیذ ؟
AD 16 101011012 01011010 AC 16 : Example – 4را یک بیت بِ سوت راست شیفت ریاضی دّیذ ؟ 1010 1100 11010110 C
A
: Example – 5ػذد AD 16را یک بیت بِ سوت چپ شیفت ریاضی دّیذ ؟
1010 1101 1011010
جای خالی
110
: Gold Note n
2 ػذد خرٍجی ثبات :اًتقال بِ سوت راست : nزؼذاد اًسقال تِ ساسر هی تاضذ .
انواع Shift Register ّ Shift Register : Note-24ا زَسظ ّ D . FFا عشاحی هی ضًَذ .اص آًجا کِ یک D . FFهی زَاًذ یک تیر اعالػاذ سا ثثر ٍ اًسقال دّذ ،تٌاتشایي nػذد D . FFهی زَاًذ nتیر اعالػاذ سا اًسقال دّذ .تٌاتشایي اًَاع Shift Registerتِ قشاس صیش اسر :
: PI / PO )1 : SI / SO )2 : PI / SO )3 : SI / PO )4
) (Parallel Input / Parallel Output )(Serial Input / Serial Output )(Parallel Input / Serial Output ) (Serial Input / Parallel Output
: Note-25
: PI / PO Registerاعالػاذ هَاصی ٍاسد ضذُ ٍهَاصی ًیض خاسج هی ضًَذ .
تا فؼال ضذى ٍ CLKسٍدیْای xتِ خشٍجی yهٌسقل هی ضًَذ ٍ تا فؼال ضذى سیگٌال Clearخشٍجی ّای ّ Qوگی صفش هی ضًَذ .
: Note-26
: SI / SO Register
اعالػاذ تِ صَسذ سشی ٍاسد ضذُ ٍ تِ صَسذ سشی ًیض خاسج هی ضَد . : M 2 n1بسرگتریي ػذد قابل رخیرُ در یک ثبات : nزؼذاد فیلح فالج ّا .
: Note-27
: PI / SO Register
هذارات ترتيبي
111
اتسذا سیگٌال Shift Enableصفش هی ضَد ٍ ٍسٍدیْای Xتِ ٍ Dصل هی ضًَذ ٍتا صدى CLKاعالػاذ ٍسٍدی Xدس خشٍجی Qثثر هی ضًَذ .آًگاُ Shift Enableیک هی ضَد ٍ خشٍجی ّ Qش عثقِ تِ ٍسٍدی Dعثقِ تؼذ هسصل هی ضَد .
: Note-28
: SI / PO Register
اتسذا Shift Enable = 0هی ضَد زا خشٍجی ّای Qتِ ٍسٍدیْای Dتؼذی هسصل ضًَذ .دس ایي حالر هاًٌذ
SI / SO Registerهی
ضَد .تؼذ اص آًکِ 4تیر اعالػاذ ٍاسد ایي Registerضذ ،آًگاُ Shift Enable = 1هی ضَد ،زا خشٍجی تِ
سور yتشٍد .دس ایي
حالر تا صدى یک CLKاعالػاذ ثثر ضذُ تِ صَسذ هَاصی دس خشٍجی yظاّش هی ضًَذ . : Note-29تشای ضیفر سجیسسش سشیالی 4 bitتایذ 4 Clockصدُ ضَد ٍ اگش 5 CLKصدُ ضَد ،اعالػاذ خشاب هی ضَد .
: Gold Note 2 nػذد داخل ثبات = ػذد خرٍجی ثبات " :اًتقال بِ چپ" : nزؼذاد اًسقال تِ چح : Example – 6در صَرتیکِ در یک ثبات ػذد 600رخیرُ شذُ باشذ با 3اًتقال بِ سوت راست ػذد حاصل کذام است ؟
600 75 23
= ػذد خشٍجی ثثاذ
112
Self Test
: 21در شکل زیر ٍرٍدی Clearبایذ ........باشذ ٍ یک پالس ساػت ............در ٍرٍدی ػول جابجایی بِ راست را هَجب
هی شَد
.
: 22در شکل هربَط بِ سؤال قبل ،خرٍجی هذار بؼذ از پالس ساػت t4چیست ؟ : 23در یک شیفت رجستر حذاکثر تا ػذد (1023)10را هی تَاى رخیرُ کرد .با چٌذ پالس ساػت هی تَاى ػذد (75)10را بِ صَرت ٍرٍدی سری -خرٍجی سری ٍارد سپس آى را خارج ًوَد؟
113
هذارات ترتيبي بخص سوم
ضوارنذه ها
: Note-30ضواسًذُ تِ هذاسی گفسِ هی ضَد کِ تِ اصای خالس ّای ٍسٍدی کِ تِ
Clockدادُ هی ضَد ،یک ػذد تایٌشی سا دس
خشٍجی ایجاد هی کٌذ .ایي ػذد تایٌشی می زَاًذ دقیقاً هسٌاسة تا زؼذاد خالس ّا تاضذ ٍ یا آًکِ ضواسُ خالس تا ضواسُ خشٍجی ّیچگًَِ اسزثاعی ًذاضسِ تاضذ ٍ ،اسقام خشٍجی تِ صَسذ Randomایجاد گشدد .
انواع ضوارنذه ها : Note-31
جاًسَى
حلقَی
-1سٌکرٍى (ّوگام – ّوسهاى) -2آسٌکرٍى
(ىاّوگام
– غیر
اًَاع شوارًذُ
BCD
ّوسهاى) : Note-32شوارًذُ آسٌکرٍى ایي ضواسًذُ دقیقاً هسٌاسة تا زؼذاد خالسی کِ دسیافر هی کٌذ ،یک ػذد دس خشٍجی ایجاد هی کٌذ .هطخصِ اصلی ایي ضواسًذُ آًسر کِ ّ F.Fا تِ زشزیة زحشیک ضذُ ٍ سقن خشٍجی سا هی ساصد .تِ ػثاسذ تْسش اگش فلیح فالج اٍل زحشیک ًطَد ،فلیح فالج دٍم ٍ سَم اصالً زحشیک ًوی ضًَذ ،ػالهر ایي ضواسًذُ خالس Clockاسر کِ فقظ تِ F.Fاٍل هی سٍد . ضواسًذُ آسٌکشٍى دس گشٍُ سادُ زشیي ضواسًذُ ّاسر ٍ هؼوَالً اص ازصال فلیح فالج ّای Tیا JKتِ صَسذ سری زطکیل ضذُ اسر .تِ عَسیکِ خشٍجی ّش فلیح فالج تِ ٍسٍدی CPاص فلیح فالج هشزثِ تاالزش هسصل اسر ٍ خالس ساػر ،فقظ تِ فلیح فالخی کِ کن اسصش زشیي تیر سا ًگِ هی داسد ٍ ،اسد هی ضَد .دس دیاگشام صیش ًحَُ ضواسًذُ هَج گًَِ یا ًاّوگام یا آسٌکشٍى دٍدٍیی تِ ٍسیلِ فلیح فالج ً JKطاى دادُ ضذُ اسر :
خاییي هشذتِ زشیي تیر ) (A1تا آهذى ّش خالس ساػر ،هسون هی ضَد ّ ٍ ،شگاُ A1 = 0ضَد ،چَى تِ ٍسٍدی CPفلیح فالج تؼذی ٍاسد ضذُ اسر ،خس A2سا هسون هی کٌذ ٍ تذیي زشزیة ضواسًذُ تا سسیذى خالس ّای ساػر اسقام 0زا 7سا زَلیذ هی ًوایذ . فلیح فالج ّا یکی یکی ٍ ّش کذام دس صم اى هطخص زغییش حالر هی دٌّذ ٍ سیگٌال ٍاسدُ تِ سیسسن ،دس داخل ضواسًذُ تِ صَسذ یک هَج اًسطاس هی یاتذ .هالحظِ هی ًواییذ کِ A1دس ّش خالس ساػر هسون ضذُ ٍلی زا A1اص یک تِ صفش زغییش حالر ًذّذ A2 ،هسون ًوی ضَد .تٌاتشایي A2خس اص ّش دٍ خالس هسون ضذُ ٍ A3خس اص ّش 4خالس هسون هی ضَد .تِ جذٍل زشزیة ضواسش ضواسًذُ دٍدٍیی کِ دس صفحِ تؼذآهذُ اسر دقر ًواییذ :
114 A1 0 1 0 1 0 1 0 1
A2 0 0 1 1 0 0 1 1
A3 0 0 0 0 1 1 1 1
هؼادل دّذّی
0 1 2 3 4 5 6 7
الصم تِ رکش اسر کِ ضواسًذُ ای کِ اص 0زا 2n – 1سا هی ضواسد ٍ سدس دٍتاسُ تِ صفش تشگطسِ ٍ ضواسش سا زکشاس هی کٌذ .چَى دس ٍاقغ nػذد سا ًطاى دادُ ٍ زَلیذ هی کٌذ ،شوارًذُ آسٌکرٍى با پیواًِ ً nاهیذُ هی ضَد .
: Note-33ػلت استفادُ از فلیپ فالپ ّای : JK ٍ T ػلر آى دس هسون ضذى خشٍجی ایي فلیح فالج ّا اسر .دس ٌّگاهی کِ ٍسٍدیْا اسصش یک سا داضسِ تاضٌذ ّ ،ویي اهش هٌجش هی ضَد کِ زشزیة زغییش تیر ّا تِ گًَِ ای تاضذ کِ دًثالِ خاصی اص اػذاد سا زَلیذ کٌٌذ ٍ یا تِ ػثاسذ تْسش دًثالِ خاصی اص اػذاد سا تطواسد .خس
تا داضسي 3فیلح فالج هی زَاى 23 8 8ػذد سا ضوشد .
ضوارنذه نزولي : Note-34 C 1 0 1 0 1 0 1 0 1
B 1 1 0 0 1 1 0 0 1
A 1 1 1 1 0 0 0 0 1
پالس ساػت
0 1 2 3 4 5 6 7 8
115
هذارات ترتيبي
: Questionاگر شوارًذُ صفحِ قبل پس از سِ پالس ساػت در صَرتیکِ شوارًذُ از حالت Clearآغاز بِ کار کٌذ ،ػذد خرٍجی چٌذ خَاّذ بَد ؟
: Answer 011 100
ػذد (011) 3خس اص زایگل کشدى ػذد 4سا تِ ها هی دّذ .
ضوارنذه سنکروى : Note-35در شوارًذُ سٌکرٍى توام ّ F.Fا یک جا ٍ با ّن تحریک شذُ ٍتغییرٍضؼیت هی دٌّذ .بِ ّویي دلیل بِ آًْا سٌکرٍى هی گَئین.
هطخصِ اصلی ایي ضواسًذُ ّا ازصال خالس Clockتِ ّوِ ّ F.Fا اسر ّ .وچٌیي اص یک هذاس زشکیثی
(ػوَهاً گیر ) ANDتشای
ّوضهاًی ّ F.Fا اسسفادُ هی ضَد .
: Note-36اگش خشٍجی ضواسًذُ اص Qدسیافر ضَد ،صؼَدی دس غیش ایي صَسذ ًسٍلی اسر . تَجِ :دس ضواسًذُ سٌکشٍى ؛ جذٍل صحر ،دیاگشام چشخطی ٍ سایش هَاسد هاًٌذ ضواسًذُ آسٌکشٍى هی تاضذ .
تقسين فرکانس : Note-37خشٍجی ّ F.Fای هخسلف ّوَاسُ کسشی اص فشکاًس Clockسا دسیافر هی کٌٌذ کِ تسَاى تا اسسفادُ اص ساتغِ صیش فشکاًس خشٍجی ّش خایِ آى سا تِ ٍسیلِ آى هحاسثِ ًوَد :
FCLOCK 2n
:فرکاًس پایِ خرٍجی
: Questionفرکاًس ٍرٍدی بِ یک شوارًذُ سٌکرٍى (یا آسٌکرٍى) 20 KHzاست .اگر فرکاًس آخریي پایِ 1250 Hzباشذ ، حذاقل چٌذ F.Fدر ایي هذار ٍاقغ شذُ است ؟
: Answer
20000 16 2 n 24 n 4 1250
2n
حذاقل تشای زقسین تِ 16تایذ 4ػذد فلیح فالج داضسِ تاضین .
116
Self Test
: 24اگر یک شوارًذُ سٌکرٍى الزم داشتِ باشین کِ بتَاًذ از صفر تا 596بشوارد ،چٌذ ػذد فلیپ فالپ MS – JKالزم دارین ؟ : 25در شکل هقابل FOچٌذ ّرتس است ؟
: 26با کذام شکل هی تَاى فرکاًس را تقسین کرد ؟
: 27حذاقل با چٌذػذد فلیپ فالپ هی تَاى یک تقسین کٌٌذُ فرکاًس بِ ػذد 56ساخت ؟ : 28شوارًذُ شکل زیر تا چِ ػذدی هی شوارد ؟ (ًیسک باریک ایجاد شذُ را ًادیذُ بگیریذ )JA = KA = …= JD = KD = 1
: 29هذار شکل زیر در حالت اٍلیِ QAQBQC QD 1011بَدُ است .حالت بؼذی آى را پس ازدریافت سِ پالس ساػت بذست آٍریذ ؟
هذارات ترتيبي
117
: 30ترتیب شوارش هذار زیررا بٌَیسیذ ؟ حالت اٍلیِ شوارًذُ را QAQB 00فرض کٌیذ .
: 31درشکل رٍبرٍ ،با تَجِ بِ شکل پالس ّای ساػت اػوالی ،شکل سیگٌال رٍی پایِ Q1کذام است ؟ (قبل از اػوال پالس ساػت یک لحظِ کَتاُ پایِ Clearرا صفر هی کٌین ).
:32درشکل زیر،اگر درشرٍع کارّ ،وِ فلیپ فالپ ّا هساٍی صفرباشٌذ،بااػوال چْارهیي پالس ساػت ،کذام حالت اتفاق هی افتذ؟ (1فقظ فلیح فالج FF1زغییش ٍضؼیر هی دّذ . ّ (2ش دٍ فلیح فالج FF2ٍ FF1زغییش ٍضؼیر هی دّذ . (3فقظ فلیح فالج FF3زغییش ٍضؼیر هی دّذ . ّ (4وِ فلیح فالج ّا زغییش ٍضؼیر هی دٌّذ .
118 : 33در شکل دادُ شذُ بؼذ از اػوال پالس ساػت ششن ،خرٍجی چِ ػذدی را ًشاى هی دّذ ؟
: 34ترتیب شوارش هذار هقابل کذام است ؟
(1 (2 (3 (4
0 4 2 1 0 0 1 3 6 4 0 1 2 4 6 7 0 0 1 2 3 4 5 6 7 0
: 35در شکل دادُ شذُ فرکاًس خرٍجی Fچٌذ کیلَ ّرتس است؟
: 36در شوارًذُ شکل دادُ شذُ حلقِ شوارش را بٌَیسیذ؟
: 37هذار دادُ شذُ چِ هذاری هی باشذ ؟
119
هذارات ترتيبي
ضوارنذه حلقوی : Note-38تِ ضواسًذُ ای گفسِ هی ضَدکِ فقظ اصفلیح فالج ّای Dساخسِ ضذُ ٍ یک تیر تایٌشی سا تیي فلیح فالج ّا جا تِ جا هی کٌذ .جاتجایی ایي تیر تاػث هی ضَد زا اتسذا ػذد 1ساخسِ ضَد ٍ سدس زَاًْای 2دس خشٍجی ایجاد گشدد .
با تَجِ بِ هذار فَق :
C 1 0 0 1
ایي ضواسًذُ ،زٌْا ضواسًذُ ای اسر کِ ىیاص تِ ً Clearذاسد ٍ اص صفش ضشٍع تِ ضواسش ًوی کٌذ ،تلکِ اص ػذدی تاالزش اص صفش ضشٍع تِ ضواسش هی کٌذ .
A 0 0 1 0
B 0 1 0 0
پالس ساػت
0 1 2 3
M 2 n1بسرگتریي ػذد قابل شوارش :Nخیواًِ = زؼذاد حاالذ = = nزؼذاد فلیح فالج ّا .
: Questionدر یک شوارًذُ حلقَی کِ دارای ” “6فلیپ فالپ هی باشذ ،چٌذ حالت شوارش ایجاد هی گردد ٍ در صَرتی کِ ػذد فؼلی شوارًذُ ػذد 8باشذ بؼذ از 4پالس ساػت خرٍجی چِ ػذدی خَاّذ بَد ؟
: Answer
8 0 0100 0
LSB
ff 0 0
ff 1 0
ff 2 1
ff 4 ff 3 0 0
ff 5 0
MSB
MSB
00010 2
LSB F 1 0 0 0 0 0 1
E 0 1 0 0 0 0 0
D 0 0 1 0 0 0 0
C 0 0 0 1 0 0 0
B 0 0 0 0 1 0 0
A 0 0 0 0 0 1 0
Clock Pulse 0 1 2 3 4 5 6
120 ضوارنذه جانسوى : Note-38
دس ضواسًذُ جاًسَى زٌْا فشقی کِ تا ضواسًذُ حلقَی داسد ،خایِ فیذتک اسر .تِ عَسیکِ دس ایي ضواسًذُ فیذتک اص خایِ ضذُ ،کِ تش ػکس حالر حلقَی اسر .چشاکِ دس ضواسًذُ حلقَی فیذتک اص Qدسیافر هی ضَد .
Qدسیافر
نحوه ضوارش ضوارنذه جانسوى : Note-40دس ایي ضواسًذُ اتسذا زواهی فلیح فالج ّا خش ضذُ ٍ خس اص آًکِ آخشیي فلیح فالج خش ضذ ،زک زک فلیح فلیح ّا اص اتسذا خالی هی ضًَذ .
: M 2 n 1بسگتریي ػذد شوارًذُ
:Nزؼذاد حاالذ ضواسًذُ = 2 n : nزؼذاد فلیح فالج ّا
C 0 1 1 1 0 0 0
B 0 0 1 1 1 0 0
A 0 0 0 1 1 1 0
Clock Pulse 0 1 2 3 4 5 6
: Questionدر یک شوارًذُ جاًسَى در صَرتیکِ ” “6ػذد فلیپ فالپ قرارداشتِ باشذ ،بِ ازای چٌذ پالس ساػت ،ػذد اٍلیِ شوارًذُ تکرار هی شَد ؟
: Answer
زؼذاد خالس تشاتش تا زؼذاد حاالذ ضواسًذُ اسر .
N 12 2 6
121
هذارات ترتيبي
Self Test
: 38بؼذ از اػوال ” “6پالس ساػت خرٍجی ّای هذار شکل زیر کذام ٍضؼیت را دارًذ ؟
قثل اص اػوال اٍلیي خالس ساػر سیسسن سا Resetهی کٌین . : 39هذار رٍبرٍ کذام است ؟ (1ضواسًذُ حلقَی (2ضیفر سیجسسش ٍسٍدی سشی – خشٍجی هَاصی (3ضواسًذُ صؼَدی – ًضٍلی سٌکشٍى (4ضیفر سجیسسش ٍسٍدی هَاصی – خشٍجی سشی : 40درشکل رٍبرٍ بؼذ ازاػوال 5پالس ساػت Q1 ٍ Q0 ،چِ ٍضؼیتی خَاٌّذ داشت ؟
(قبل از اػوال پالس ساػت Q0 = Q1 = 0در ًظر بگیریذ). : 41درشکل دادُ شذُ،درصَرتی کِ حالت ابتذاییQ3Q2Q1Q0 = 1011باشذ،خرٍجی پس ازاػوال پالس ساػت دٍ صَرت است؟
م بِ چِ
122
7 DIGITAL CIRCUITS INTRODUCTION
CMOS logic Bipolar logic Transistor Transistor logic DTL RDL
123
تكنولوژي ساخت گيتهاي منطقي
بررسي انواع تكنولوژي ها : Note-1گیتْای هٌطمی تش اساس سٍضْای هتفاٍتی تا ووه دیَد ٍ تراًسیستَر طشاحی هی ضًَذ .ایي سٍضْا دس ّش صهاى هتفاٍت تَدُ وِ دس صیش اص آًْا ًام تشدُ هی ضَد :
انواع تكنولوژي )1تکٌَلَشی دیَدی . )2
تکٌَلَشی تراًسیستَری . BJT
)3
تکٌَلَشی تراًسیستَری . FET
)4
تکٌَلَشی تفاضلی .
تكنولوژي دیودي
: Note-2ایي تکٌَلَشی خَد شاهل دٍگرٍُ DDL ٍ RDLهی تاشذ . دس ایي تىٌَلَطی تشای ساخت یه گیت هٌطمی اص دیَدّا استفادُ هی ضَد ،وِ ّذایت یا ػذم ّذایت دیَد هی تَاًذ تستِ یا تاص تَدى یه ولیذ سا تذاػی وٌذ .
: Note-3دس تىٌَلَطی دیَدی سشػت واس پاییي تَدُ ٍ تٌَع گیت ّای هٌطمی هحذٍد هی تاضذ
.تِ ّویي دلیل تشویثی اص دیَد ٍ
تشاًضیستَس تشای ساخت یه گیت هٌطمی هَسد استفادُ لشاس هی گیشد .
: Key-1
: Key-2
گیت OR
گیت AND اگش تؼذاد ٍسٍدی ّا افضایص یاتذ ،تؼذاد پایِ ّای گیت صیاد هی ضَد .
تكنولوژي ترانزیستوري
: Note-4ایي تکٌَلَشی خَد شاهل 3گرٍُ DTL ٍ TTL ٍ RTLهی تاشذ . دس ایي تىٌَلَطی سٍضي تَدى تشاًضیستَسّا هطخصِ ولیذ تستِ ٍ خاهَش تَدى تشاًضیستَسّا هطخصِ ولیذ تاص است .
: Key-4
: Key-3
گیت AND
گیت NOT
124
: Key-5
: Key-6
گیت NOR : Key-8
گیت OR : Key-7
گیت NAND
گیت XOR
تراًسیستَرّای PNPتا صفر فؼال هی شًَذ . تراًسیستَرّای NPNتا یک فؼال هی شًَذ .
: Key-9
: Key-10
گیت NAND
گیت NAND
125
تكنولوژي ساخت گيتهاي منطقي
تكنولوژي ( ECLمنطق کوپالژ اميتر) : Note-5ایي تىٌَلَطی اص هذل تفاضلی طشاحی گیت هٌطمی استفادُ هی وٌذ .هضیت هذل تفاضلی آى است وِ دس خشٍجی ّا خَد ػثاست ٍ ًمیض آى هستمیواً تَلیذ هی ضَد ٍ هی تٍاى گیت ّای هزوَس سا تا یىذیگش ORسیوی وشد . : Note-6خشٍجی گیت NORاص خاًَادُ ٍ ECLلتی تِ ّن گشُ صدُ هی ضًَذ ،تَلیذ ORسیوی هی وٌٌذ .
: Key-11
F A B C D
خرٍجی : Xگیت OR
خرٍجی : X گیت NOR
OR : Note-7سیوی سا OR – AND – Inverterهی ًاهٌذ .
روش Totem Poleو روش Open Collector : Note-8دٍ سٍش هزوَس ًام سٍش ّایی ّستٌذ وِ تشای تىٌَلَطی TTLلاتل استفادُ تَدُ ٍ ایي تاػث هی ضَد تا تتَاى دس سٍش Totem Poleسشػت واس سا تسیاس تاال تشد ٍ دس سٍش Open Collectorایي هضیت ٍجَد داسد وِ هی تَاى خشٍجی گیت ّا سا تا ّن ANDسیوی ) (Wire ANDنسد .
2
ایي دٍ سٍش اغلة اص تشویة تىٌَلَطی ّای I L ٍ TTLتْشُ هی تشًذ .
روش Totem Pole : Note-9دس ایي سٍش تشای تاال تشدى سشػت لطغ ٍ ٍصل تشاًضیستَسّا اص یه تاس فؼال دس ولىتَس
: Key-12
استفادُ هی ضَد ٍ .جَد ایي تاس فؼال تاػث هی ضَد تا سشػت سَئیچیٌگ ٍ اثش خاصًْای ولهتَس – اهیتش تِ همذاس لاتل هالحظِ ای ون ضَد .
هذار Totem Pole
126 روش Open Collector : Note-10دس تىٌَلَطی TTLسٍش دیگشی وِ تسیاس هؼشٍف است ،سٍش ولىتَس تاص یا
: Key-13
Open Collectorهی تاضذ .دس ایي سٍش ولىتَس تشاصًیستَسّا تِ تغزیِ هتصل ًطذُ ٍ هی تَاى ولىتَسّا سا تِ صَست یه جا تِ ّن ٍصل وشد .ایي ػول تاػث هی ضَد تا دس تؼذاد گیت ّای هٌطمی صشفِ جَیی ضَد .
گیت NOT
Open Collector ANDسيمي : Note-11گیت ّای TTL NANDولىتَس تاص ٍ ،لتی تِ ّن گشُ صدُ هی ضًَذ ،تَلیذ ANDسیوی هی وٌٌذ .
F AB CD تاتغ فَق سا NAND – OR – Inverterهی گَیٌذ .
تكنولوژي I 2L : Note-12دس ایي تىٌَلَطی تِ جای تِ واس تشدى تشاًضیستَسّای هتؼذد اص پایِ ّای هتؼذد تشای تشاًضیستَساستفادُ هی وٌٌذ .دس ًتیجِ حجن هذاس تسیاس وَچه ضذُ ٍ تلفات ًیض تِ حذ لاتل لثَلی واّص هی یاتذ .
: Key-14
: Key-15
گیت OR
گیت AND : Key-16
تافر = ANDتک ٍرٍدی
127
تكنولوژي ساخت گيتهاي منطقي
: Key-17
: Key-18
گیت NOT
گیت NOR
128
: Key-19
گیت AND : Key-20
گیت NOT
تكنولوژي MOS : Note-13اگش اص ّ MOSFETایی استفادُ وٌین وِ اص ًَع واًال Pتاضٌذ ،تِ تىٌَلَطی هزوَس ٍ PMOSاگش اص ًَع واًال Nتاضٌذ ،تِ تىٌَلَطی هزوَس ٍ NMOSاگش اص ّش دٍ تشویة استفادُ ضَد ،تِ تىٌَلَطی فَق CMOSهی گَیيد .
129
تكنولوژي ساخت گيتهاي منطقي
: Note-14اگش MOSFETتا واًال Pتاضذ ،صهاًی فؼال است وِ VG = 0تاضذ ٍ تشای ًَع Nصهاًی فؼال است وِ VG = 1تاضذ .
: Key-21 X 1 0 0 0
B 0 1 0 1
A 0 0 1 1
گیت NOR : Key-22 X 0 0 0 1
B 0 1 0 1
A 0 0 1 1
گیت AND
130
: Key-23
NOT گیت : Key-24
NAND گیت : Key-25
NOR گیت
131
تكنولوژي ساخت گيتهاي منطقي
: Key-27
: Key-26
گیت NAND
گیت NOT
: Key-28
گیت NOR
مشخصات تكنولوژي هاي مختلف : Note-15تکٌَلَشی دیَدی )(DDL or RDL )1
سشػت پاییي .
4
Fan out )2 )3هصًَیت ًَیض پاییي .
: Note-16تکٌَلَشی تراًسیستَری )(TTL سشػت دس هذل Schottkyحذاوثش Fan out ، 125 MHzحذٍد 8تا 10گیت ،هصًَیت ًَیض پاییي ،تَاى هصشفی تاال . دس هذل LSتَاى هصشفی ًیض پاییي است .
I2L : Note-17 )1
حجن ٍ تَاى ون .
)2
تَاى هصشفی پاییي .
Fan out )3تستگی تِ ساختاس ICهتفاٍت است . )4
هصًَیت اص ًَیض آى هتَسط است .
)5
سشػت آى تمشیثاً هاًٌذ TTLهی تاضذ .
ECL : Note-18 )1
تَاى هصشفی هتَسط .
)2
سشػت حذاوثش ( 400 MHzتاالتشیي سشػت دس ّ ICا)
)3
Fan outدس حذٍد 50
)4
هصًَیت اص ًَیض خَب .
132 (40XX) : CMOS , NMOS , PMOS : Note-19 )1
تَاى هصشفی تسیاس پاییي .
)2
هصًَیت اص ًَیض خَب .
)3
سشػت حذاوثش . 50 MHz
)4
Fan outحذٍد . 80
گيتهايي با خروجي هاي 3حالته : Note-20خشٍجی هذاسات 3حالتِ ،هضایای هذاسات Open Collector ٍ Totem Poleسا تا ّن داسًذ . 3حالت هوىي دس گیت ّای 3حالتِ ػثاستٌذ اص :
خرٍجی تاال .
خرٍجی پاییي .
اهپذاًس تاال .
اگش گیت سِ حالتِ Low Activeتاضذ :
اگش C = Low؛ A F C = High؛ اهپذاًس تاال
دس صَستی وِ گیت سِ حالتِ High Activeتاضذ : اگش C = High؛ A F C = Low؛ اهپذاًس تاال
مذل کليذي : Note-21یىی اص هذل ّای سادُ تشای ًوایص یه ػثاست یا یه تاتغ هٌطمی هذل ولیذی هی تاضذ .
اگش ولیذّا سری تا ّن لشاس گیشًذ ،ػولیات ضرب تیي هتغیشّا صَست هی گیشد .
اگش ولیذّا هَازی تا ّن لشاس گیشًذ ،ػولیات جوغ تیي هتغیشّا صَست هی گیشد .
اگش ولیذ تاز تاضذ ً ،طاى دٌّذُ خٍد هتغیر هی تاضذ .
اگش ولیذ تستِ تاضذ ً ،قیض هتغیر ًوایص دادُ هی ضَد .
نمادها : Note-22
تكنولوژي ساخت گيتهاي منطقي
133
ترسيم کليذ هم محور : Note-23تِ ولیذّایی گفتِ هی ضَد وِ ،تِ اصای تاص ٍ تستِ ضذى یه ولیذ چٌذیي وٌتاوت تا ّن تاص ٍ تستِ هی ضًَذ ،تٌاتشایي هی تَاى گفت تواهی هتغیشّا تا یه هتغیش ًطاى دادُ ضذُ ، اها دس هسیشّای هتفاٍتی تش سٍی ّن اثش هی گزاسًذ .
: Exampleخرٍجی هذار زیر را تٌَیسیذ .
: Answer F CD AB A B C B ABCD A B CD
نمایص مذل کليذي به صورت رله هاي مغناطيسي : Note-24دس ایي هذل تا تحشیه یه سلِ هغٌاطیسی هی تَاى یه ولیذ سا تاص ٍ تستِ وشد .تِ طَسیىِ سوثل آى هطاتك صیش هی تاضذ :
حافظه ها : Note-25حافظِ ّا تِ دٍدستِ ولی تمسین تٌذی هی ضًَذ :
حافظِ ّای ًیوِ ّادی .
حافظِ ّای غیر ًیوِ ّادی .
دس ایي تخص ّذف ،تشسسی حافظِ ّای ًیوِ ّادی ) (Semiconductor Memoryهی تاضذ . : Note-26حافظِ ّای ًیوِ ّادی ًیض خَد تِ دٍ گشٍُ ػوذُ تمسین هی ضًَذ :
(Random Access Memory) RAM؛ دس ایي حافظِ ّا صهاى دستیاتی تِ ّش ًَع هَلؼیت تشاتش است .
(Sequential Access Memory) SAM؛ ػولىشد آًْا دلیماً هاًٌذ Shift Registerهی تاضذ .
: Note-27حافظِ ّای RAMخَد تِ سِ دستِ تمسین هی ضًَذ :
حافظِ ّای فقط خَاًذًی ؛ (Read Only Memory) ROM
حافظِ ّای یک تار ًَشتٌی ،چٌذیي تار خَاًذًی ؛ RMM
) (Read Mostly Memory حافظِ ّای خَاًذًی – ًَشتٌی ؛ (Read Write Memory) RWM
134 انواع ROM : Note-28
: ROMفمط تَسط واسخاًِ ساصًذُ اطالػات تشسٍی آى ًَضتِ هی ضَد .
: PROMهی تَاى یه تاس اطالػات تَسط واستش تش سٍی آى رخیشُ ضَد ،اها دیگش تغییش ًوی وٌذ .
انواع RMM : Note-29
: EPROMاطالػات هی تَاًذ تَسط پالس الىتشیىی پان ضَد.
: EEPROMاطالػات فمط تَسط اضؼِ هاٍساء تٌفص پان هی ضَد .
ساختمان داخلي : Note-30هذاس سٍتشٍ دلیماً ػولىشد هذاس RAMسا تِ ها آهَصش هی دّذ : تِ طَسهثال اگش هؼادلِ F1سا تٌَیسین ؛ داسین :
F1 A B A B AB ٍ هؼادلِ F2تِ صَست صیش ًَضتِ هی ضَد :
F2 A B AB
تا تَجِ خطَط ٍسٍدی Decoderتؼذاد خطَط Word Lineهطخص هی ضَد .
حافظِ RAMلادس است ،توام تَاتغ تَل سا تساصد .
تسرگتریي حسي ایي سٍش ایي است وِ ًیاص تِ سادُ ساصی ًذاسد .
تسرگتریي ػیة ایي سٍش ایي است وِ حافظِ صیادی سا اضغال هی وٌذ .
اگش یه ROMداسای nتیت ٍسٍدی ٍ mخشٍجی تاضذ ،آًگاُ ظشفیت ROMاص ساتطِ صیش هحاسثِ هی ضَد :
2n mظشفیت ROM
روش خوانذن ظرفيت ROM هثالً اگر ICتِ شوارُ 271001تِ ها دادُ شذُ تاشذ ظرفیت آى چقذر است ؟ ػذد 27هشخص کٌٌذُ EPROMهی تاضذ . ػذد 1001هیساى ظرفیت EPROMتر حسة کیلَ تایت است ،یؼٌی ظشفیت EPROMهَسد ًظش حذٍد 1 MBاست .
135
تكنولوژي ساخت گيتهاي منطقي
Self Test
: 1کذام گیت هٌطقی در شکل زیر ًشاى دادُ شذُ است ؟
: 2هصرف تَاى کذام ًَع از ّ ICای دیجیتالی زیر از تقیِ کوتر است ؟
CMOS (1
TTL (2
: 3در هذار شکل هقاتل هقذار را تذست آٍریذ ؟
ًَ : 4ع گیت شکل هقاتل کذام است ؟ NAND (1اص ًَع Open Collector NAND (2اص ًَع Totem Pole AND (3اص ًَع Totem Pole AND (4اص ًَع Open Collector
RTL (3
DTL (4
136 : 5شکل هقاتل هؼادل کذام گیت است ؟
: 6خرٍجی شکل هقاتل را هحاسثِ ًواییذ ؟
: 7شکل هقاتل اساس کذام خاًَادُ گیت ّاست ؟
: 8کذام گیت ّا را هی تَاى تا یکذیگر ANDسیوی کرد ؟ TTL (1اص ًَع Totem Pole NMOS (3
: 9در هذار هقاتل yکذام گیت است ؟
TTL (2اص ًَعOpen Collector
PMOS (4
137
تكنولوژي ساخت گيتهاي منطقي : 10جذٍل صحت هرتَط تِ شکل زیر را رسن ًواییذ است ؟
: 11کذام شوارُ ICحاٍی 4ػذد گیت NANDاست ؟
SN 7492 (1
SN 7400 (2
SN 7483 (3
SN 7485 (4
: 12یکی از هسیت ّای گیت ّای Open Collectorکدام است ؟ (1خشٍجی آًْا سا هی تَاى تا یىذیگش ORسیوی وشد .
(2هصشف تَاى آًْا تسیاس ون است .
(3داسای سشػت تسیاس تاالیی است .
(4خشٍجی آًْا سا هی تَاى تا یىذیگش ANDسیوی وشد .
: 13کذام سری از ّ ICای ّ CMOSن از ًظر آرایش ٍ ترتیة پایِ ّا ٍ ّن از ًظر الکتریکی تا ّ ICای TTLهشاتِ خَد سازگارًذ ؟ : 14ترای ساختي دستگاُ ّای دیجیتالی کن هصرف کذام تکٌَلَشی را تَصیِ هی کٌیذ ؟ (1استفادُ اص ّ ICای TTL
(2استفادُ اص ّ ICای CMOS
(3استفادُ اص ّ ICای BCL
(4استفادُ اص ّ ICای MOS
: 15کذام گسیٌِ درست است ؟ (1هیضاى هصًَیت دس تشاتش ًَیض ) ، (Noise Immunityآی سی ّای CMOSتیص اص آی سی ّای BCL ، TTLاست . (2هیضاى هصًَیت دس تشاتش ًَیض آی سی ّای CMOSووتشاص آی سی ّای BCL ، TTLاست . (3هیضاى هصًَیت دس تشاتش ًَیض آی سی ّای CMOSووتشاص آی سی ّای ٍ TTLتیص اص آی سی ّای BCLاست . (4هیضاى هصًَیت دس تشاتش ًَیض آی سی ّای CMOSتیص اص آی سی ّای ٍ TTLووتش اص آی سی ّای BCLاست . : 16تا تَجِ تِ هذار شکل زیر کذام گسیٌِ درست است ؟ (ٍ Bٍ Aرٍدی ّای هٌطقی ٍ Yخرٍجی هٌطقی است). (1ایي هذاس یه دسیچِ NORدس هٌطك مثثت است . (2ایي هذاس یه دسیچِ NANDدس هٌطك هثثت است . (3ایي هذاس یه دسیچِ ANDدس هٌطك هثثت است . (4ایي هذاس یه دسیچِ ORدس هٌطك هثثت است .
138 : 17هذار هٌطقی رسن ًواییذ کِ هؼادلهذار هٌطقی زیر تاشذ ؟ دریچِ ّا از ًَع کلکتَر تاز است .
: 18در هذار رلُ ای رٍترٍ تاتغ Fرا هحاسثِ کٌیذ ؟
: 19در شکل رٍترٍ تاتغ Fرا هحاسثِ کٌیذ ؟ (گیت ّا از ًَع کلکتَر تاز ّستٌذ ).
: 20شکل رٍترٍ هذار داخلی کذام درٍازُ هٌطقی از ًَع CMOSاست ؟
: 21هذار دادُ شذُ هؼادل کذام گیت است ؟
139
تكنولوژي ساخت گيتهاي منطقي : 22شکل دادُ شذُ هؼادل چِ گیتی است؟
: 23آی سی ّایی کِ تا پیش شوارُ CD40شرٍع هی شًَذ ،در کذام هحذٍدُ ٍلتاش زیر (تر حسة ٍلت) قرار دارًذ؟ 3 (1الی15
12 (2الی15
5 (3الی20
5 (4الی 7
: 24در شکل دادُ شذُ در حالت B = 0 , A = 1تراًسیستَر ٍ ….Q2تراًسیستَر ٍ …….Q3خرٍجی هساٍی ............است.
: 25کذام یک از درٍازُ ّای هٌطقی پیادُ سازی هٌطقی ANDدٍ ٍرٍدی هی تاشذ ؟
140
8 FIELD PROGRAMMABLE GATE ARRAY (FPGA)
141
FPGA
Field Programmable Gate Array (FPGA) A Field Programmable Gate Array (FPGAs) is a small Field Programmable Device (FPD) that supports thousands of logic gates. Research on FPGA is significantly growing as their applications such as Fast Fourier Transforms (FFT), Discrete Cosine Transforms (DCT), convolution, robotic system, Finite Impulse Response (FIR) filters, power electronics and nonlinear control systems. FPGA is a high speed, low cost, short time to market and small device size. Several semiconductor vendors provide a wide range of FPGAs such as Xilinx, Altera, Atmel and Lattice that each one has own unique architecture. Xilinx and Altera are two well known companies in the silicon technology market. These two companies are the best indicator of FPGA for universities and for giant companies developing digital technology [1].
FPGA was invented by Xilinx Company which this company is the leaders in this technology and the biggest name in the FPGA world. However Xilinx simply can support intermediate generated files but most of FPGA based designer worried about the generated the following files i.e. generated by IP cores, SOF, POF and RBF file programming, and Xilinx settings file which they can settings all part of project [2].
Altera tools are used as a Graphical User Interface (GUI) more than Xilinx which GUI area is more user-friendly for users. Check the delay on the segment in Altera is based on cheap viewer which this part is very helpful.
FPGA can be used in wide range area because it is a flexible, technology independent, higher performance, high operation speed, low cost hardware, and fast prototyping [3]. However FPGA has
142 many advantages but one of the most important drawbacks is capacity limitation. In this works design FPGA-based sliding mode controller by Xilinx ISE 9.2 is presented.
A FPGA chip is programmed by Hardware Description Language (HDL) which contains two types of languages, Very High Description Language (VHDL) and Verilog. VHDL is one of the powerful programming languages that can be used to describe the hardware design. VHDL was developed by the Institute of Electrical and Electronics Engineers (IEEE) in 1987 and Verilog was developed by Gateway Design Automation in 1984 [4]. This research focuses on FPGA-based sliding mode control of robot manipulator and it is implemented in XA3S1600E FPGA from Xilinx in Xilinx-ISE 9.2i software using VHDL code.
Xilinx Spartan 3E Architectural Overview The introduction of language and architecture of Xilinx FPGA such as VHDL or Verilog in sliding mode control of robot arm will be investigated in this section. The Xilinx Spartan 3E FPGAs has 5 major blocks: Configurable Logic Blocks (CLBs), standard and high speed Input/output Blocks (IOBs), Block RAM’s (BRAMs), Multipliers Blocks, and Digital Clock Managers (DCMs). CLBs is include flexible look up tables (LUTs) to implement memory (storage element) and logic gates. There are 4 slices per CLB each slice has two LUT’s. IOB does control the rate of data between input/output pins and the internal logic gates or elements. It supports bidirectional data with three state operation and multiplicity of signal standards. BRAMs require the data storage including 18Kbit dual-port blocks. Product two 18-bit binary numbers is done by multiplier blocks. Selfcalibrating, digital distributing solution, delaying, multiplying, dividing and phase-shift clock signal are done by DCM [1-4]. Figure 1 shows the major block diagram of Xilinx Spartan 3E family architecture.
143
FPGA
Figure 1
Block diagram of Xilinx Spartan 3E FPGA families Architecture [1].
Farzin Piltan, N. Sulaiman, M. H. Marhaban, Adel Nowzary & Mostafa Tohidian
Design of FPGA-based Sliding Mode Controller for Robot Manipulator Farzin Piltan
[email protected]
Department of Electrical and Electronic Engineering, Faculty of Engineering, Universiti Putra Malaysia 43400 Serdang, Selangor, Malaysia
N. Sulaiman
[email protected]
Department of Electrical and Electronic Engineering, Faculty of Engineering, Universiti Putra Malaysia 43400 Serdang, Selangor, Malaysia
M. H. Marhaban
[email protected]
Department of Electrical and Electronic Engineering, Faculty of Engineering, Universiti Putra Malaysia 43400 Serdang, Selangor, Malaysia
Adel Nowzary
[email protected]
Industrial Electrical and Electronic Engineering SanatkadeheSabze Pasargad. CO (S.S.P. Co), NO:16 , PO.Code 71347-66773, Fourth floor Dena Apr , Seven Tir Ave , Shiraz , Iran
Mostafa Tohidian
[email protected]
Industrial Electrical and Electronic Engineering SanatkadeheSabze Pasargad. CO (S.S.P. Co), NO:16 , PO.Code 71347-66773, Fourth floor Dena Apr , Seven Tir Ave , Shiraz , Iran
Abstract One of the most active research areas in the field of robotics is robot manipulators control, because these systems are multi-input multi-output (MIMO), nonlinear, and uncertainty. At present, robot manipulators is used in unknown and unstructured situation and caused to provide complicated systems, consequently strong mathematical tools are used in new control methodologies to design nonlinear robust controller with satisfactory performance (e.g., minimum error, good trajectory, disturbance rejection). Robotic systems controlling is vital due to the wide range of application. Obviously stability and robustness are the most minimum requirements in control systems; even though the proof of stability and robustness is more important especially in the case of nonlinear systems. One of the best nonlinear robust controllers which can be used in uncertainty nonlinear systems is sliding mode controller (SMC). Chattering phenomenon is the most important challenge in this controller. Most of nonlinear controllers need real time mobility operation; one of the most important devices which can be used to solve this challenge is Field Programmable Gate Array (FPGA). FPGA can be used to design a controller in a single chip Integrated Circuit (IC). In this research the SMC is designed using VHDL language for implementation on FPGA device (XA3S1600E-Spartan-3E), with minimum chattering and high processing speed (63.29 MHz). Keywords: Robot Manipulator, Sliding Mode Controller, Chattering Phenomenon, FPGA, VHDL language.
International Journal of Robotics and Automation, (IJRA), Volume (2): Issue (3) : 2011
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Farzin Piltan, N. Sulaiman, M. H. Marhaban, Adel Nowzary & Mostafa Tohidian
1.
INTRODUCTION
A robot is a machine which can be programmed as a reality of tasks which it has divided into three main categories i.e. robot manipulators, mobile robots and hybrid robots. PUMA 560 robot manipulator is an articulated 6 DOF serial robot manipulator. This robot is widely used in industrial and academic area and also dynamic parameters have been identified and documented in the literature. From the control point of view, robot manipulator divides into two main sections i.e. kinematics and dynamic parts. Estimate dynamic parameters are considerably important to control, mechanical design and simulation[1]. Sliding mode controller (SMC) is one of the influential nonlinear controllers in certain and uncertain systems which are used to present a methodical solution for two main important controllers’ challenges, which named: stability and robustness. Conversely, this controller is used in different applications; sliding mode controller has subsequent drawbacks i.e. chattering phenomenon, and nonlinear equivalent dynamic formulation in uncertain systems[1-2]. In order to solve the chattering in the systems output, boundary layer method should be applied so beginning able to recommended model in the main motivation. Conversely boundary layer method is constructive to reduce or eliminate the chattering; the error response quality may not always be so high. Besides using boundary layer method in the main controller of a control loop, it can be used to adjust the sliding surface slope to have the best performance (reduce the chattering and error performance)[3]. Commonly, most of nonlinear controllers in robotic applications need a mobility real time operation. FPGA-based controller has been used in this application because it is small device in size, high speed, low cost, and short time to market. Therefore FPGA-based controller can have a short execution time because it has parallel architecture [4-7]. This paper is organized as follows: In section 2, main subject of modelling PUMA-560 robot manipulator formulation are presented. Detail of classical sliding mode controller is presented in section 3. In section 4, the main subject of FPGA-based sliding mode controller is presented. In section 5, the simulation result is presented and finally in section 6, the conclusion is presented.
2. DYNAMIC FORMULATION OF ROBOT It is well known that the equation of an n-DOF robot manipulator governed by the following equation [1-2]:
𝑴(𝒒)𝒒̈ + 𝑵(𝒒, 𝒒̇ ) = 𝝉
(1)
𝝉 = 𝑴(𝒒)𝒒̈ + 𝑩(𝒒)[𝒒̇ 𝒒̇ ] + 𝑪(𝒒)[𝒒̇ ]𝟐 + 𝑮(𝒒)
(2)
𝒒̈ = 𝑴−𝟏 (𝒒). {𝝉 − 𝑵(𝒒, 𝒒̇ )}
(3)
Where τ is actuation torque, 𝑴(𝒒) is a symmetric and positive define inertia matrix, 𝑁(𝑞, 𝑞̇ ) is the vector of nonlinearity term. This robot manipulator dynamic equation can also be written in a following form:
Where the matrix of coriolios torque is 𝑩(𝒒), 𝑪(𝒒) is the matrix of centrifugal torques, and 𝑮(𝒒) is the vector of gravity force. The dynamic terms in equation (2) are only manipulator position. This is a decoupled system with simple second order linear differential dynamics. In other words, the component 𝒒̈ influences, with a double integrator relationship, only the joint variable𝑞𝑖 , independently of the motion of the other joints. Therefore, the angular acceleration is found as to be[2]:
International Journal of Robotics and Automation, (IJRA), Volume (2): Issue (3) : 2011
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Farzin Piltan, N. Sulaiman, M. H. Marhaban, Adel Nowzary & Mostafa Tohidian
This technique is very attractive from a control point of view. This paper is focused on the design FPGA-based controller for PUMA-560 robot manipulator.
2.1 PUMA 560 Dynamic Formulation Position control of PUMA-560 robot manipulator is analyzed in this paper; as a result the last three joints are blocked. The dynamic equation of PUMA-560 robot manipulator is given as
𝜽̇𝟐𝟏 𝜽𝟏̈ 𝜽̇𝟏 𝜽̇𝟐 𝝉𝟏 ̈ 𝟐 ̈ 𝑴(𝜽) � 𝜽𝟐 � + 𝐁(𝜽) �𝜽̇𝟏 𝜽̇𝟑 � + 𝑪(𝜽) �𝜽̇𝟐 � + 𝑮(𝜽) = �𝝉𝟐 � 𝝉𝟑 𝜽̈𝟑 𝜽̇𝟐 𝜽̇𝟑 𝜽̇𝟐𝟑
(4)
𝑴𝟏𝟏 ⎡𝑴 ⎢ 𝟐𝟏 𝑴 𝑴(𝒒) = ⎢ 𝟑𝟏 ⎢ 𝟎 ⎢ 𝟎 ⎣ 𝟎
(5)
Where
𝑩(𝒒) = 𝒃 𝒃𝟏𝟏𝟑 ⎡ 𝟏𝟏𝟐 𝟎 𝟎 ⎢ 𝟎 𝟎 ⎢ ⎢𝒃𝟒𝟏𝟐 𝒃𝟒𝟏𝟐 ⎢ 𝟎 𝟎 ⎣ 𝟎 𝟎
𝑴𝟏𝟐 𝑴𝟐𝟐 𝑴𝟑𝟐 𝟎 𝟎 𝟎
𝟎
𝒃𝟐𝟏𝟒 𝒃𝟑𝟏𝟒 𝟎 𝒃𝟓𝟏𝟒 𝟎
𝟎 ⎡𝑪 ⎢ 𝟐𝟏 𝑪 𝑪(𝒒) = ⎢ 𝟑𝟏 ⎢ 𝟎 ⎢𝑪𝟓𝟏 ⎣ 𝟎
𝟎 ⎡𝒈 ⎤ ⎢ 𝟐⎥ 𝒈 𝑮(𝒒) = ⎢ 𝟑 ⎥ ⎢𝟎⎥ ⎢𝒈𝟓 ⎥ ⎣𝟎⎦
𝒃𝟏𝟏𝟓 𝟎 𝟎 𝒃𝟒𝟏𝟓 𝟎 𝟎
𝑪𝟏𝟐 𝟎 𝑪𝟑𝟐 𝟎 𝑪𝟓𝟐 𝟎
𝑴𝟏𝟑 𝑴𝟐𝟑 𝑴𝟑𝟑 𝟎 𝟎 𝟎
𝟎 𝟎 𝟎 𝑴𝟒𝟒 𝟎 𝟎
𝟎 𝒃𝟏𝟐𝟑 𝟎 𝒃𝟐𝟐𝟑 𝟎 𝟎 𝟎 𝟎 𝟎 𝟎 𝟎 𝟎
𝑪𝟏𝟑 𝑪𝟐𝟑 𝟎 𝟎 𝟎 𝟎
𝟎 𝟎 𝟎 𝟎 𝟎 𝟎
𝟎 𝟎 𝟎 𝟎 𝟎 𝟎
𝟎 𝟎 𝑴𝟑𝟓 𝟎 𝑴𝟓𝟓 𝟎
𝟎 𝟎 𝟎 𝒃𝟐𝟐𝟓 𝟎 𝟎 𝟎 𝟎 𝟎 𝟎 𝟎 𝟎
𝟎 𝟎⎤ ⎥ 𝟎⎥ 𝟎⎥ 𝟎⎥ 𝟎⎦
𝟎 𝟎 𝟎 𝟎 𝟎 𝟎
𝟎 𝟎 ⎤ ⎥ 𝟎 ⎥ 𝟎 ⎥ 𝟎 ⎥ 𝑴𝟔𝟔 ⎦
𝟎 𝟎 𝟎 𝒃𝟐𝟑𝟓 𝟎 𝟎 𝟎 𝟎 𝟎 𝟎 𝟎 𝟎
𝟎 𝟎 𝟎 𝟎 𝟎 𝟎
𝟎 𝟎 𝟎 𝟎 𝟎 𝟎
𝟎 𝟎 𝟎 𝟎 𝟎 𝟎
𝟎 ⎤ 𝟎 ⎥ 𝟎⎥ 𝟎⎥ 𝟎⎥ 𝟎⎦
Suppose 𝑞̈ is written as follows
𝒒̈ = 𝑴−𝟏 (𝒒). {𝝉 − [𝑩(𝒒)𝒒̇ 𝒒̇ + 𝑪(𝒒)𝒒̇ 𝟐 + 𝒈(𝒒)]}
(6)
(7)
(8)
(9)
and 𝐼 is introduced as
International Journal of Robotics and Automation, (IJRA), Volume (2): Issue (3) : 2011
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Farzin Piltan, N. Sulaiman, M. H. Marhaban, Adel Nowzary & Mostafa Tohidian
𝑰 = {𝝉 − [𝑩(𝒒)𝒒̇ 𝒒̇ + 𝑪(𝒒)𝒒̇ 𝟐 + 𝒈(𝒒)]}
(10)
𝒒̈ = 𝑴−𝟏 (𝒒). 𝑰
(11)
𝑰𝟏 = 𝝉𝟏 − [ 𝒃𝟏𝟏𝟐 𝒒̇ 𝟏 𝒒̇ 𝟐 + 𝒃𝟏𝟏𝟑 𝒒̇ 𝟏 𝒒̇ 𝟑 + 𝟎 + 𝒃𝟏𝟐𝟑 𝒒̇ 𝟐 𝒒̇ 𝟑 ] − [ 𝑪𝟏𝟐 𝒒̇ 𝟐 𝟐 + 𝑪𝟏𝟑 𝒒̇ 𝟑 𝟐 ] − 𝒈𝟏
(12)
𝑰𝟑 = 𝝉𝟑 − �𝑪𝟑𝟏 𝒒̇ 𝟏 𝟐 + 𝑪𝟑𝟐 𝒒̇ 𝟐 𝟐 � − 𝒈𝟑
(14)
𝑰𝟓 = 𝝉𝟓 − [ 𝑪𝟓𝟏 𝒒̇ 𝟏 𝟐 + 𝑪𝟓𝟐 𝒒̇ 𝟐 𝟐 ] − 𝒈𝟓
(16)
𝑞̈ can be written as
Therefore 𝐼 for PUMA-560 robot manipulator can be calculated by the following equation
3.
𝑰𝟐 = 𝝉𝟐 − [ 𝒃𝟐𝟐𝟑 𝒒̇ 𝟐 𝒒̇ 𝟑 ] − [ 𝑪𝟐𝟏 𝒒̇ 𝟏 𝟐 + 𝑪𝟐𝟑 𝒒̇ 𝟑 𝟐 ] − 𝒈𝟐
(13)
𝑰𝟒 = 𝝉𝟒 − [ 𝒃𝟒𝟏𝟐 𝒒̇ 𝟏 𝒒̇ 𝟐 + 𝒃𝟒𝟏𝟑 𝒒̇ 𝟏 𝒒̇ 𝟑 ] − 𝒈𝟒
(15)
𝑰𝟔 = 𝝉𝟔
(17)
CLASSICAL SLIDING MODE CONTROL
Sliding mode controller (SMC) is a powerful nonlinear controller which has been analyzed by many researchers especially in recent years. This theory was first proposed in the early 1950 by Emelyanov and several co-workers and has been extensively developed since then with the invention of high speed control devices[1-2]. A time-varying sliding surface 𝒔(𝒙, 𝒕) is given by the following equation:
𝒔(𝒙, 𝒕) = (
𝒅 �=𝟎 + 𝝀)𝒏−𝟏 𝒙 𝒅𝒕
(18)
𝒔(𝒙, 𝒕) = (
𝒕 𝒅 𝒏−𝟏 � 𝒅𝒕� = 𝟎 + 𝝀) �� 𝒙 𝒅𝒕 𝟎
(19)
where λ is the constant and it is positive. To further penalize tracking error integral part can be used in sliding surface part as follows:
The main target in this methodology is keep 𝒔(𝒙, 𝒕) near to the zero when tracking is outside of 𝒔(𝒙, 𝒕). Therefore, one of the common strategies is to find input 𝑼 outside of 𝒔(𝒙, 𝒕).
𝟏𝒅 𝟐 𝒔 (𝒙, 𝒕) ≤ −𝜻|𝒔(𝒙, 𝒕)| 𝟐 𝒅𝒕
(20)
𝐝
(21)
where ζ is positive constant. If S(0)>0→
𝐝𝐭
𝐒(𝐭) ≤ −𝛇
International Journal of Robotics and Automation, (IJRA), Volume (2): Issue (3) : 2011
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Farzin Piltan, N. Sulaiman, M. H. Marhaban, Adel Nowzary & Mostafa Tohidian
To eliminate the derivative term, we used an integral term from t=0 to t=𝒕𝒓𝒆𝒂𝒄𝒉 𝒕=𝒕𝒓𝒆𝒂𝒄𝒉
�
𝒕=𝟎
𝒕=𝒕𝒓𝒆𝒂𝒄𝒉 𝒅 𝑺(𝒕) ≤ − � 𝜼 → 𝑺 (𝒕𝒓𝒆𝒂𝒄𝒉 ) − 𝑺(𝟎) 𝒅𝒕 𝒕=𝟎 ≤ −𝜻(𝒕𝒓𝒆𝒂𝒄𝒉 − 𝟎)
(22)
Where 𝑡𝑟𝑒𝑎𝑐ℎ is the time that trajectories reach to the sliding surface so, if we assume that S(𝑡𝑟𝑒𝑎𝑐ℎ = 0) then:
and
𝟎 − 𝑺(𝟎) ≤ −𝜼(𝒕𝒓𝒆𝒂𝒄𝒉 ) → 𝒕𝒓𝒆𝒂𝒄𝒉 ≤
𝑺 ( 𝟎) 𝜻
𝒊𝒇 𝑺(𝟎) < 0 → 0 − 𝑆(𝟎) ≤ −𝜼(𝒕𝒓𝒆𝒂𝒄𝒉 ) → 𝑺(𝟎) ≤ −𝜻(𝒕𝒓𝒆𝒂𝒄𝒉 ) → 𝒕𝒓𝒆𝒂𝒄𝒉 |𝑺(𝟎)| ≤ 𝜼
Equation (24) guarantees time to reach the sliding surface is smaller than are outside of S(t).
(23)
(24)
|𝑺(𝟎)| 𝜻
if trajectories
𝒊𝒇 𝑺𝒕𝒓𝒆𝒂𝒄𝒉 = 𝑺(𝟎) → 𝒆𝒓𝒓𝒐𝒓(𝒙 − 𝒙𝒅 ) = 𝟎
(25)
suppose S defined as
𝒔(𝒙, 𝒕) = (
𝒅 � = (𝐱̇ − 𝐱̇ 𝐝 ) + 𝛌(𝐱 − 𝐱 𝐝 ) + 𝝀) 𝒙 𝒅𝒕
The derivation of S, namely, 𝑆̇ can be calculated as the following formulation:
(26)
𝑺̇ = (𝐱̈ − 𝐱̈ 𝐝 ) + 𝛌(𝐱̇ − 𝐱̇ 𝐝 )
(27)
𝒙̈ = 𝒇 + 𝒖 → 𝑺̇ = 𝒇 + 𝑼 − 𝒙̈ 𝒅 + 𝛌(𝐱̇ − 𝐱̇ 𝐝 )
(28)
� = −𝒇� + 𝒙̈ 𝒅 − 𝝀(𝐱̇ − 𝐱̇ 𝐝 ) 𝑼
(29)
� − 𝑲(𝒙 �⃗, 𝒕). 𝒔𝒈𝒏(𝒔) 𝑼𝒅𝒊𝒔 = 𝑼
(30)
suppose define the second order system as,
Where f is the dynamic uncertain, and also if 𝑆 = 0 𝑎𝑛𝑑 𝑆̇ = 0, to have the best approximation � defined by, ,𝑼
A simple solution to get the sliding condition when the dynamic parameters have uncertainty is the switching control law:
International Journal of Robotics and Automation, (IJRA), Volume (2): Issue (3) : 2011
187
Farzin Piltan, N. Sulaiman, M. H. Marhaban, Adel Nowzary & Mostafa Tohidian Where the function of 𝒔𝒈𝒏(𝑺) defined as;
𝟏 𝒔𝒈𝒏(𝒔) = � −𝟏 𝟎
𝒔>0 𝒔 0
(35)
�⃗, 𝒕). 𝑺𝒂𝒕 �𝑺�∅� 𝑼 = 𝑲(𝒙
(36)
To reduce or eliminate the chattering it is used the boundary layer method; in boundary layer method the basic idea is replace the discontinuous method by saturation (linear) method with small neighborhood of the switching surface. This replace is caused to increase the error performance.
Where ∅ is the boundary layer thickness. Therefore, to have a smote control law, the saturation function 𝑺𝒂𝒕(𝑺�∅) added to the control law:
Where 𝑺𝒂𝒕 �𝑺�∅� can be defined as
⎧ 𝟏 ⎪ 𝒔𝒂𝒕 �𝑺�∅� = −𝟏 ⎨𝒔 ⎪ � ⎩ ∅
(𝒔�∅ > 1)
(37)
�𝒔�∅ < 1� (−𝟏 < 𝒔�∅ < 1)
Based on above discussion, the control law for a multi degrees of freedom robot manipulator is written as:
𝝉� = 𝝉�𝒆𝒒 + 𝝉�𝒔𝒂𝒕 International Journal of Robotics and Automation, (IJRA), Volume (2): Issue (3) : 2011
(38)
188
Farzin Piltan, N. Sulaiman, M. H. Marhaban, Adel Nowzary & Mostafa Tohidian Where, the model-based component 𝝉�𝒆𝒒 is compensated the nominal dynamics of systems. Therefore 𝝉�𝒆𝒒 can calculate as follows:
𝝉�𝒆𝒒 = �𝑴−𝟏 (𝑩 + 𝑪 + 𝑮) + 𝑺̇�𝑴
(39)
Where
𝝉�𝒆𝒒
𝝉� 𝑴𝟏𝟏 𝑴𝟏𝟐 𝑴𝟏𝟑 𝟎 𝟎 𝟎 −𝟏 ⎡ 𝒆𝒒𝟏 ⎤ ⎡ 𝒆𝒒𝟐 ⎥ 𝑴𝟐𝟏 𝑴𝟐𝟐 𝑴𝟐𝟑 𝟎 𝟎 𝟎 ⎤ ⎢𝝉� ⎢ ⎥ ⎢𝝉� 𝟎 𝑴𝟑𝟓 𝟎 ⎥ 𝒆𝒒𝟑 ⎥ −𝟏 ⎢𝑴𝟑𝟏 𝑴𝟑𝟐 𝑴𝟑𝟑 =⎢ , 𝑴 = ⎥ 𝟎 𝟎 𝑴𝟒𝟒 𝟎 𝟎 ⎥ 𝝉� 𝒆𝒒𝟒 ⎢ 𝟎 ⎢ ⎥ 𝟎 𝟎 𝟎 𝑴𝟓𝟓 𝟎 ⎥ ⎢ 𝟎 𝒆𝒒𝟓 ⎥ ⎢𝝉� ⎣ 𝟎 𝟎 𝟎 𝟎 𝟎 𝑴 𝟔𝟔 ⎦ ⎣𝝉� 𝒆𝒒𝟔 ⎦ 𝑩+𝑪+𝑮 𝒃𝟏𝟏𝟐 𝒒̇ 𝟏 𝒒̇ 𝟐 + 𝒃𝟏𝟏𝟑 𝒒̇ 𝟏 𝒒̇ 𝟑 + 𝟎 + 𝒃𝟏𝟐𝟑 𝒒̇ 𝟐 𝒒̇ 𝟑 ⎡ ⎤ 𝟎 + 𝒃𝟐𝟐𝟑 𝒒̇ 𝟐 𝒒̇ 𝟑 + 𝟎 + 𝟎 ⎢ ⎥ 𝟎 ⎥ =⎢ 𝒃𝟒𝟏𝟐 𝒒̇ 𝟏 𝒒̇ 𝟐 + 𝒃𝟒𝟏𝟑 𝒒̇ 𝟏 𝒒̇ 𝟑 + 𝟎 + 𝟎 ⎢ ⎥ ⎢ ⎥ 𝟎 ⎣ ⎦ 𝟎 𝟐 𝟐 ⎡𝑪𝟏𝟐 𝒒̇ 𝟐 + 𝑪𝟏𝟑 𝒒̇ 𝟑 ⎤ ⎡ 𝟎 ⎤ 𝟐 𝟐 ⎢𝑪𝟐𝟏 𝒒̇ 𝟏 + 𝑪𝟐𝟑 𝒒̇ 𝟑 ⎥ ⎢𝒈𝟐 ⎥ ⎢ 𝟐 𝟐⎥ 𝒈 + ⎢𝑪𝟑𝟏 𝒒̇ 𝟏 + 𝑪𝟑𝟐 𝒒̇ 𝟐 ⎥ + ⎢ 𝟑 ⎥ 𝟎 𝟎 ⎢ ⎥ ⎢⎢ ⎥⎥ 𝒈𝟓 ⎢𝑪𝟓𝟏 𝒒̇ 𝟏 𝟐 + 𝑪𝟓𝟐 𝒒̇ 𝟐 𝟐 ⎥ ⎣ 𝟎⎦ ⎣ ⎦ 𝟎
𝑺̇ 𝑴𝟏𝟏 ⎡ 𝟏⎤ ⎡𝑴 ̇ 𝑺 𝟐 ⎢ ⎥ ⎢ 𝟐𝟏 ⎢𝑺̇𝟑 ⎥ 𝑴 𝑺̇ = ⎢ ⎥ and 𝑴 = ⎢ 𝟑𝟏 𝑺̇ ⎢ 𝟎 ⎢ 𝟒⎥ ⎢ 𝟎 ⎢𝑺̇𝟓 ⎥ ⎣ 𝟎 ⎣𝑺̇𝟔 ⎦
𝑴𝟏𝟐 𝑴𝟐𝟐 𝑴𝟑𝟐 𝟎 𝟎 𝟎
𝑴𝟏𝟑 𝑴𝟐𝟑 𝑴𝟑𝟑 𝟎 𝟎 𝟎
𝟎 𝟎 𝟎 𝑴𝟒𝟒 𝟎 𝟎
𝟎 𝟎 𝑴𝟑𝟓 𝟎 𝑴𝟓𝟓 𝟎
𝟎 𝟎 ⎤ ⎥ 𝟎 ⎥ 𝟎 ⎥ 𝟎 ⎥ 𝑴𝟔𝟔 ⎦
Suppose that 𝝉𝒔𝒂𝒕 is computed as
𝝉�𝒔𝒂𝒕 = 𝑲. 𝒔𝒂𝒕 �𝑺�∅�
(40)
where
International Journal of Robotics and Automation, (IJRA), Volume (2): Issue (3) : 2011
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Farzin Piltan, N. Sulaiman, M. H. Marhaban, Adel Nowzary & Mostafa Tohidian
𝝉�𝒔𝒂𝒕
𝐒𝟏 ⎡ ⎤ ⎢∅𝟏 ⎥ ⎢ 𝐒𝟐 ⎥ ⎢∅𝟐 ⎥ 𝝉� 𝑲𝟏 ⎡ 𝒅𝒊𝒔𝟏 ⎤ ⎢ 𝐒𝟑 ⎥ ⎡ ⎤ 𝝉� 𝑲 ⎢ 𝒅𝒊𝒔𝟐 ⎥ ⎢ ⎥ ⎢ 𝟐⎥ 𝑲𝟑 ⎥ 𝑺 ∅ 𝝉� 𝒅𝒊𝒔𝟑 ⎥ ⎢ ⎢ = ,𝑲 = , � �∅� = ⎢ 𝟑 ⎥ 𝒂𝒏𝒅 𝑺 = 𝝀𝒆 + 𝒆̇ 𝒅𝒊𝒔𝟒 ⎥ ⎢𝑲𝟒 ⎥ ⎢ 𝐒𝟒 ⎥ ⎢𝝉� 𝑲 ⎢ ⎥ � 𝝉 ⎢∅𝟒 ⎥ 𝟓 ⎢ 𝒅𝒊𝒔𝟓 ⎥ ⎣ ⎦ 𝑲 ⎢ 𝐒𝟓 ⎥ ⎣𝝉� ⎦ 𝟔 𝒅𝒊𝒔𝟔 ⎢ ⎥ ⎢∅𝟓 ⎥ ⎢ 𝐒𝟔 ⎥ ⎣∅𝟔 ⎦
Moreover by replace the formulation (40) in (38) the control output is written as ;
𝝉� = 𝝉�𝒆𝒒 + 𝑲. 𝒔𝒂𝒕 �𝑺�∅� = �
𝝉𝒆𝒒 + 𝑲. 𝒔𝒈𝒏(𝑺) , |𝑺| ≥ ∅ 𝝉𝒆𝒒 + 𝑲. 𝑺�∅ , |𝑺| < ∅
(41)
Figure 1 shows the position classical sliding mode control for PUMA-560 robot manipulator. By (41) and (39) the sliding mode control of PUMA 560 robot manipulator is calculated as;
𝝉� = �𝑴−𝟏 (𝑩 + 𝑪 + 𝑮) + 𝑺̇�𝑴 + 𝑲. 𝒔𝒂𝒕 �𝑺�∅�
(42)
FIGURE 1: Block diagram of classical sliding mode controller
International Journal of Robotics and Automation, (IJRA), Volume (2): Issue (3) : 2011
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Farzin Piltan, N. Sulaiman, M. H. Marhaban, Adel Nowzary & Mostafa Tohidian
4.
FPGA-BASED SLIDING MODE CONTROLLER
Research on FPGA-based control of systems is considerably growing as their applications such as industrial automation, robotic surgery, and space station's robot arm demand more accuracy, reliability, high performance. For instance, the FPGA-based controls of robot manipulator have been reported in [5-6, 8-13]. Shao and Sun [8, 10]have proposed an adaptive control algorithm based on FPGA for control of SCARA robot manipulator. They are designed this controller into two micro base controller, the linear part controller is implemented in the FPGA and the nonlinear estimation controller is implemented in DSP. Moreover this controller is implemented in a Xilinx-FPGA XC3S400 with the 20 KHz position loop frequency. The FPGA based servo control and inverse kinematics for Mitsubishi RV-M1 micro robot is presented in[9, 11-12] which to reduce the limitation of FPGA capacitance they are used 42 steps finite state machine (FSM) in 840 n second. Meshram and Harkare [5-6] have presented a multipurpose FPGA-based 5 DOF robot manipulator using VHDL coding in Xilinx ISE 11.1. This controller has two most important advantages: easy to implement and flexible. Zeyad Assi Obaid et al. [13] have proposed a digital PID fuzzy logic controller using FPGA for tracking tasks that yields semi-global stability of all closed-loop signals. The basic information about FPGA has been reported in [4-5, 12-15]. A review of design and implementation of FPGA-based systems has been presented in [4]. The FPGA-based sliding mode control of systems has been reported in [7, 16-18]. Lin et al. [7] have presented low cost and high performance FPGA-based fuzzy sliding mode controller for linear induction motor with 80% of flip flops. The fuzzy inference system has 2 inputs (𝑆 & 𝑆̇) and one output 𝐾𝑓 with nine rules. Ramos et al. [16] have reported FPGA-based fixed frequency quasi sliding mode control algorithm to control of power inverter. Their proposed controller is implemented in XC4010E-3PC84 FPGA from XILINX with acceptable experimental and theoretical performance. FPGAbased robust adaptive backstepping sliding mode control for verification of induction motor is reported in [17]. The introduction of language and architecture of Xilinx FPGA such as VHDL or Verilog in sliding mode control of robot manipulator will be investigated in this section. The Xilinx Spartan 3E FPGAs has 5 major blocks: Configurable Logic Blocks (CLBs), standard and high speed Input/output Blocks (IOBs), Block RAM’s (BRAMs), Multipliers Blocks, and Digital Clock Managers (DCMs). CLBs is include flexible look up tables (LUTs) to implement memory (storage element) and logic gates. There are 4 slices per CLB each slice has two LUT’s. IOB does control the rate of data between input/output pins and the internal logic gates or elements. It supports bidirectional data with three state operation and multiplicity of signal standards. BRAMs require the data storage including 18-Kbit dual-port blocks. Product two 18-bit binary numbers is done by multiplier blocks. Self-calibrating, digital distributing solution, delaying, multiplying, dividing and phase-shift clock signal are done by DCM [15]. As shown in Figure 1, FPGA based sliding mode controller divided into two main parts: saturation part and equivalent part. To design FPGA based SMC controller using VHDL code, inputs and outputs is played important role. The block diagram of the FPGA-based sliding mode control systems for a robot manipulator is shown in Figure 2. Based on Figure 2 this block (controller) has 9 inputs and 3 outputs. Actual and desired displacements (inputs) are defined as 30 bits and the outputs (teta_dis) are defines as 35 bits in size. The desired inputs are generated from the operator and send to controllers for calculate the error and applied to sliding mode controller.
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FIGURE 2 : RTL FPGA-based controller schematic in XILINX-ISE To convert float input data to the integer it should be multiply input value by 1000000 and then save these new values in the input files. After the completing simulation, output response should be divided over 1000000 integers to real convert values. But due to simulator (XILINX ISE 9.1) limitations and restrictions on integer data length (32 bits) and it results are 33 bit’s words so at the first, controller results is divided over 2 and convert them to the integer part. Therefore the result should be divided over 500000 instead of 1000000. To robot manipulator’s FPGA based position sliding mode control, controller is divided into three main sub blocks; Figure 3 shows the VHDL code and RTL schematic in Xilinx ISE software. The table in Figure 4 indicates the Summary of XA Spartan-3E FPGA Attributes. As mentioned in above, the most significant resources are the LUT’s (610 out of 29504), CLB (77 out of 3688), Slice (305 out of 14752), Multipliers (27 out of 36), registers (397), and Block RAM memory (648 K) which there are 4 slices per CLB, each slice has two LUT’s. So, Number of 4 610 305 input LUTs=610, 2 = 305 slices, 4 ≅ 77 CLB’s, 610 registers and as a Map report Peak memory usage is 175 MB and registers in the XA3S1600E FPGA. Moreover the table in Figure 5 illustrates the utilization summary of XA3S1600E-spartan.
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FIGURE 3: Design RTL FPGA-based SMC using XILINX-ISE
FIGURE 4: Summary of XA Spartan-3E FPGA attributes
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5.
RESULTS
PD Matlab-based sliding mode controller (PD-SMC) and PID Matlab-based sliding mode control ler (PID-SMC) and FPGA-based sliding mode controller were tested to Step response trajectory. In this simulation the first, second, and third joints are moved from home to final position without and with external disturbance. The simulation was implemented in Matlab/Simulink and Xilinx-ISE 9.1 environments. Trajectory performance, torque performance, disturbance rejection, steady state error and RMS error are compared in these controllers. It is noted that, these systems are tested by band limited white noise with a predefined 40% of relative to the input signal amplitude which the sample time is equal to 0.1. This type of noise is used to external disturbance in continuous and hybrid systems.
5.1
Matlab-Based Sliding Mode Controller
Figure 6 shows the tracking performance in PD-SMC and PID SMC without disturbance for Step trajectory. The best possible coefficients in Step PID-SMC are; 𝐾𝑝 = 𝐾𝑣 = 𝐾𝑖 = 30, ∅1 = ∅2 = ∅3 = 0.1, 𝑎𝑛𝑑 𝜆1 = 3, 𝜆2 = 6, 𝜆3 = 6 as well as similarly in Step PD-SMC are; 𝐾𝑝 = 𝐾𝑣 = 10, Figure 5 XA3S1600E device utilization summaries ∅1 = ∅2 = ∅3 = 0.1, 𝑎𝑛𝑑 𝜆1 = 1, 𝜆2 = 6, 𝜆3 = 8.
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FIGURE 6 : Step PD-SMC and PID-SMC for first, second and third link trajectory without any disturbance.
By comparing step response, Figure 6, in PD and PID-SMC, conversely the PID's overshoot (0%) is lower than PD's (1%), the PD’s rise time (0.483 Sec) is dramatically lower than PID’s (0.9 Sec); in addition the Settling time in PD (Settling time=0.65 Sec) is fairly lower than PID (Settling time=1.4 Sec). Disturbance rejection: Figure 7 is indicated the power disturbance removal in PD and PIDSMC. As mentioned before, SMC is one of the most important robust nonlinear controllers. Besides a band limited white noise with predefined of 40% the power of input signal is applied to the step PD and PID-SMC; it found slight oscillations in trajectory responses.
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\\\\\\\ \
FIGURE 7: Step PD SMC and PID SMC for first, second and third link trajectory with external disturbance.
Among above graph, relating to step trajectory following with external disturbance, PID and PD SMC have slightly fluctuations. By comparing overshoot, rise time, and settling time; PID's overshoot (0.9%) is lower than PD's (1.1%), PD’s rise time (0.48 sec) is considerably lower than PID’s (0.9 sec) and finally the Settling time in PD (Settling time=0.65 Sec) is quite lower than PID (Settling time=1.5 Sec). Chattering phenomenon: As mentioned in previous section, chattering is one of the most important challenges in sliding mode controller which one of the major objectives in this research is reduce or remove the chattering in system’s output. Figure 8 has shown the power of boundary layer (saturation) method to reduce the chattering in PD-SMC.
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FIGURE 8 : PD-SMC boundary layer methods Vs. PD-SMC with discontinuous (Sign) function
Figure 9 has indicated the power of chattering rejection in PD and PID-SMC, with and without disturbance. As mentioned before, chattering can caused to the hitting in driver and mechanical parts so reduce the chattering is more important. Furthermore band limited white noise with predefined of 40% the power of input signal is applied the step PD and PID-SMC, it seen that the slight oscillations in third joint trajectory responses. Overall in this research with regard to the step response, PD-SMC has the steady chattering compared to the PID-SMC.
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FIGURE 9 : Step PID SMC and PD SMC for first, second and third link chattering without and with disturbance.
Errors in the model: Figure 10 has shown the error disturbance in PD and PID SMC. The controllers with no external disturbances have the same error response, but PID SMC has the better steady state error. By comparing steady and RMS error in a system with no disturbance it found that the PID’s errors (Steady State error = 0 and RMS error=1e-8) are approximately less than PD’s (Steady State error ≅ 𝟏𝒆 − 𝟔 and RMS error=𝟏. 𝟐𝒆 − 𝟔). Figure 10 shows that in first seconds; PID SMC and PD SMC are increasing very fast. By comparing the steady state error and RMS error it found that the PID's errors (Steady State error = -0.0007 and RMS error= 0.0008) are fairly less than PD's (Steady State error ≅ 𝟎. 𝟎𝟎𝟏𝟐 and RMS error= 𝟎. 𝟎𝟎𝟏𝟖), When disturbance is applied to PD and PID SMC the errors are about 13% growth.
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FIGURE 10 : Step PID SMC and PD SMC for first, second and third link steady state error performance.
5.2
FPGA-Based Sliding Mode Controller
Timing Detail: As a simulation result in XILINX-ISE 9.1, it found that this controller is able to make as a fast response at 15.716 𝑛𝑠 with 63.29 𝑀𝐻𝑧 of a maximum frequency. From investigation and synthesis summary, this design has 15.716 𝑛𝑠 delay to each controller for 46 logic elements and also the offset before CLOCK is 55.773 𝑛𝑠 for 132 logic gates. Figures 11 to 13 have indicated the displacement, error performance, teta discontinuous (torque performance) at different time. As shown in Figure 11 the controller gives action at 6 𝜇𝑠 as a result before this time all signals and error equal to zeros.
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FIGURE 11 : Timing diagram using Xilinx ISE 9.1 of the FPGA-based SMC before running
In Figure 12 at 6.5 𝜇𝑠 (transient response) the response has a large steady state error, 3.92, the desired displacement is 5, the actual displacement is 1.6 and the torque performance is 256.9 N.m.
FIGURE 12: Step PD SMC for first, second and third link for desired and actual inputs, error performance, and torque performance at 6.5 𝜇𝑠
Figure 13 has shown the PD-SMC at t=100𝜇 𝑠 (steady state response), at this time the steady State error is equal to zero , the desired displacement is 5, the actual displacement is 5 and the torque performance is 1.005 Nm.
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FIGURE 13 : Step PD SMC for first, second and third link for desired and actual inputs, error performance, and torque performance in 100𝜇𝑠.
Figure 14 shows the delay with the robot manipulator affects the beginning of the response. Consequently the delay for this system is equal to 0.1𝜇 𝑠.
FIGURE 14 : The delay time in PD-SMC between desired displacement and actual displacement
Figures 15 and 16 show the chattering in FPGA-based SMC. In Figure 15, the chattering analysis from 6.2 𝜇𝑠 to 7𝜇𝑠. It can be seen that the chattering is eliminated in this design.
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FIGURE 15: Chattering rejections in FPGA-based SMC (from 6.2 𝜇𝑠 to 7𝜇𝑠)
Figure 16 shows the power of chattering rejections in FPGA-based SMC, it found that this design is eliminated the chattering in certain situation as well as Matlab-based PD SMC.
FIGURE 16: Chattering rejections in FPGA-based SMC (from 26 𝜇𝑠 to 26.9𝜇𝑠)
The best possible coefficients in Step FPGA-based PD-SMC are; 𝐾𝑝 = 000001 = 1, 𝐾𝑣 = 011110 = 30, ∅1 = ∅2 = ∅3 = 000001 = 1, 𝑎𝑛𝑑 𝜆1 = 𝜆2 = 𝜆3 = 000110 = 6. By comparing some control parameters such as overshoot, rise time, settling time and steady state error in Matlab–based PD-SMC, FPGA-based PD-SMC; overshoot ( PD-SMC= 1% and FPGASMC=0.005%), rise time (PD-SMC= 0.4 sec and FPGA-SMC8.2 𝝁 s), settling time (PDSMC= 0.4 sec a nd FPGA-SMC=10 𝝁 s) and steady state error (PD-SMC ≅ 𝟎. 𝟎𝟎𝟎𝟑 and FPGA-SMC=0) consequently it found that in fast response, the FPGA based-SMC’s parameter has the high-quality performance.
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6.
CONCLUSION
Refer to the research, a position FPGA-based sliding mode control design and application to robot manipulator has proposed in order to design high performance nonlinear controller in the presence of certainties. Regarding to the positive points in sliding mode controller and FPGA the output has improved. Sliding mode controller by adding to the FPGA single chip IC has covered negative points. Obviously PUMA 560 robot manipulator is nonlinear so this paper focuses on comparison between Matlab-based sliding mode controller and FPGA-based sliding mode controller, to opt for mobility control method for the industrial manipulator. Higher implementation speed and small chip size versus an acceptable performance is reached by designing FPGA-based sliding mode controller. This implementation considerably reduces the chattering phenomenon and error in the presence of certainties. The controller works with a maximum clock frequency of 63.29 MHz and the computation time (delay in activation) of this controller is 0.1𝜇𝑠. As a result, this controller will be able to control a wide range of robot manipulators with a high sampling rates because it's small size versus high speed markets.
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S. T. Karris, Digital circuit analysis and design with Simulink modeling and introduction to CPLDs and FPGAs: Orchard Pubns, 2007. K. D. Rogers, "ACCELERATION AND IMPLEMENTION OF A DSP PHASE-BASED FREQUENCY ESTIMATION ALGORITHM: MATLAB/SIMULINK TO FPGA VIA XILINX SYSTEM GENERATOR," Citeseer, 2004.
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S. Lentijo, et al., "FPGA based sliding mode control for high frequency power converters," 2004, pp. 3588-3592.
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Abstract In this research, a position sliding mode controller using FPGA design and application to robotic manipulator has proposed in order to design high performance nonlinear controller in the presence of uncertainties. Regarding to the positive points in sliding mode controller and FPGA based the output has improved. Sliding mode methodology by adding to the FPGA based has covered negative points. The main target in this research is modeling, analyses and design of the position FPGA-based controller for robot manipulator to reach an acceptable performance. Robot manipulators are nonlinear, and a number of parameters are uncertain, this research focuses on modelling as accurate as possible using both analytical paradigms and the advantages and sliding mode controller and sliding mode controller using FPGA to select the best controller for the industrial manipulator. Although sliding mode controller has acceptable performance with known dynamic parameters such as stability and robustness but there are two important disadvantages as below: chattering phenomenon and mathematical nonlinear dynamic equivalent controller part. This controller works very well in certain environment but if it works in uncertain area or various dynamic parameters, it has slight chattering phenomenon. The system performance in sliding mode controller is sensitive to the sliding surface sloop. Therefore, compute the optimum value of sliding surface slope for a system is important challenge work. This problem has solved by adjusting surface slope in real-time. In this way, the overall system performance has improved with respect to the classical sliding mode controller. This controller solved chattering phenomenon as by applied saturation function method and tuning the sliding surface slope. By comparing between sliding mode controller and sliding mode controller using FPGA, found that both of method have steadily stabilised in output response (e.g., torque 1
performance) but they have slight chattering in the presence of uncertainties. Sliding mode controller and application in FPGA has many advantages such as high speed, low cost, short time to market and small device size. FPGA can be used to design a controller in a single chip Integrated Circuit (IC). In this research the SMC is designed using VHDL language for implementation on FPGA device (XA3S1600E-Spartan-3E), with minimum chattering and high processing speed (63.29 MHz). Keywords: robot manipulator, sliding mode controller, chattering phenomenon, FPGA, VHDL language.
1. Introduction Robot manipulators have many applications in aerospace, manufacturing, automotive, medicine and other industries. Robot manipulators consist of three main parts: mechanical, electrical, and control. In the mechanical point of view, robot manipulators are collection of serial or parallel links which have connected by revolute and/or prismatic joints between base and endeffector frame. The robot manipulators electrical parts are used to links motion, which including the following subparts: power supply to supply the electrical and control parts, power amplifier to amplify the signal and driving the actuators, DC/stepper/servo motors or hydraulic/pneumatic cylinders to motion the links, and transmission part to transfer data between robot manipulator subparts. Control part is used to adjust the timing between the subparts of robot manipulator to reach the best performance (trajectory). It provides four main abilities in robot manipulators: controlling the manipulators movement in correct workspace, sensing the information from the environment, being able to intelligent control behavior and processing the data and information between all subparts. Research about mechanical parts and control methodologies in robotic system is shown; the mechanical design, type of actuators, and type of systems drive play important roles to have the best performance controller. More over types of kinematics chain, i.e., serial Vs. parallel manipulators, and types of connection between link and join actuators, i.e., highly geared systems Vs. direct-drive systems are presented in the following sentences because these topics played important roles to select and design the best acceptable performance controllers[1-6]. A serial link robot is a sequence of joints and links which begins with a base frame and ends with an end-effector. This type of robot manipulators, comparing with the load capacitance is more weightily because each link must be supported the weights of all next links and actuators between the present link and end-effector[6]. Serial robot manipulators have been used in automotive industry, medical application, and also in research laboratories. In contrast, parallel robot manipulators design according to close loop which base frame is connected to the end-effector frame with two or more kinematic chains[6]. In the other words, a parallel link robot has two or more branches with some joints and links, which support the load in parallel. Parallel robot have been used in many applications such as expensive flight simulator, medical robotics (I.e., high accuracy, high repeatability, high precision robot surgery), and machinery tools. With comparison between serial and parallel links robot manipulators, parallel robots are used in 2
higher speed loads, better accuracy, with used lighter weigh robot manipulator but one of the most important handicaps is limitation the workspace compared to serial robot. From control point of view, the coupling between different kinematic chains can generate the uncertainty problems which cause difficult controller design of parallel robot manipulator[7-12]. One of the most important classifications in controlling the robot manipulator is how the links have connected to the actuators. This classification divides into two main groups: highly geared (e.g., 200 to 1) and direct drive (e.g., 1 to 1). High gear ratios reduce the nonlinear coupling dynamic parameters in robot manipulator. In this case, each joint is modeled the same as Single Input Single Output (SISO) systems. In high gear robot manipulators which generally are used in industry, the couplings are modeled as a disturbance for SISO systems. Direct drive increases the coupling of nonlinear dynamic parameters of robot manipulators. This effect should be considered in the design of control systems. As a result some control and robotic researchers’ works on nonlinear robust controller design[2]. Sliding mode controller (SMC) is one of the influential nonlinear controllers in certain and uncertain systems which are used to present a methodical solution for two main important controllers’ challenges, which named: stability and robustness. Conversely, this controller is used in different applications; sliding mode controller has subsequent drawbacks i.e. chattering phenomenon, and nonlinear equivalent dynamic formulation in uncertain systems[1-2]. In order to solve the chattering in the systems output, boundary layer method should be applied so beginning able to recommended model in the main motivation. Conversely boundary layer method is constructive to reduce or eliminate the chattering; the error response quality may not always be so high. Besides using boundary layer method in the main controller of a control loop, it can be used to adjust the sliding surface slope to have the best performance (reduce the chattering and error performance)[3]. the basic idea is the discontinuous method replacement by saturation (linear) method with small neighborhood of the switching surface. This replacement caused to increase the error performance against with the considerable chattering reduction. Slotine and Sastry have introduced boundary layer method instead of discontinuous method to reduce the chattering[21]. Slotine has presented sliding mode with boundary layer to improve the industry application [22]. R. Palm has presented a fuzzy method to nonlinear approximation instead of linear approximation inside the boundary layer to improve the chattering and control the result performance[23]. Moreover, C. C. Weng and W. S. Yu improved the previous method by using a new method in fuzzy nonlinear approximation inside the boundary layer and adaptive method[24]. As mentioned [24]sliding mode fuzzy controller (SMFC) is fuzzy controller based on sliding mode technique to simple implement, most exceptional stability and robustness. Conversely above method has the following advantages; reducing the number of fuzzy rule base and increasing robustness and stability, the main disadvantage of SMFC is need to define the sliding surface slope coefficient very carefully. To eliminate the above problems control researchers have applied artificial intelligence method (e.g., fuzzy logic) in nonlinear robust controller (e.g., sliding mode controller) besides this technique is very useful in order to implement easily. One of the most important techniques to reduce or remove above two challenges is applying non-classical 3
(artificial intelligence) method in robust classical such as sliding mode controller method. Estimated uncertainty method used in term of uncertainty estimator to compensation of the system uncertainties. It has been used to solve the chattering phenomenon and also nonlinear equivalent dynamic. If estimator has an acceptable performance to compensate the uncertainties, the chattering is reduced. Research on estimated uncertainty to reduce the chattering is significantly growing as their applications such as industrial automation and robot manipulator. For instance, the applications of artificial intelligence, neural networks and fuzzy logic on estimated uncertainty method have been reported in [25-28]. Wu et al. [30] have proposed a simple fuzzy estimator controller beside the discontinuous and equivalent control terms to reduce the chattering. Their design had three main parts i.e. equivalent, discontinuous and fuzzy estimator tuning part which has reduced the chattering very well. Elmali et al. [27]and Li and Xu [29]have addressed sliding mode control with perturbation estimation method (SMCPE) to reduce the classical sliding mode chattering. This method was tested for the tracking control of the first two links of a SCARA type HITACHI robot. In this technique, digital controller is used to increase the system’s response quality. Conversely this method has the following advantages; increasing the controller’s response speed and reducing dependence on dynamic system model by on-line control, the main disadvantage are chattering phenomenon and need to improve the performance. In order to solve the uncertain dynamic parameters and complex parameters systems with an artificial intelligence theory, fuzzy logic is one of the best choice which it is used in this research. However fuzzy logic method is useful to control complicated nonlinear dynamic mathematical models but the response quality may not always be so high. This controller can be used in main part of controller (e.g., pure fuzzy logic controller), it can be used to design adaptive controller (e.g., adaptive fuzzy controller), tuning parameters and finally applied to the classical controllers [31-40]. Research on combinations of fuzzy logic systems with sliding mode method is significantly growing as nonlinear control applications. For instance, the applications of fuzzy logic on sliding mode controller have reported in [24, 41-45]. Research on applied fuzzy logic methodology in sliding mode controller (FSMC) to reduce or eliminate the high frequency oscillation (chattering), to compensate the unknown system dynamics and also to adjust the linear sliding surface slope in pure sliding mode controller considerably improves the robot manipulator control process [42-43]. H.Temeltas [46] has proposed fuzzy adaption techniques for SMC to achieve robust tracking of nonlinear systems and solves the chattering problem. Conversely system’s performance is better than sliding mode controller; it is depended on nonlinear dynamic equqation. C. L. Hwang et al. [47]have proposed a Tagaki-Sugeno (TS) fuzzy model based sliding mode control based on N fuzzy based linear state-space to estimate the uncertainties. A multi-input multi-output FSMC reduces the chattering phenomenon and reconstructs the approximate the unknown system has been presented for a robot manipulator [42]. Commonly, most of nonlinear controllers in robotic applications need a mobility real time operation. FPGA-based controller has been used in this application because it is small device in size, high speed, low cost, and short time to market. Therefore FPGA-based controller can have a short execution time because it has parallel architecture [4-7]. Commonly, most of nonlinear 4
controllers in robotic applications need a real time operation. FPGA-based controller has been used in this application because it is small device in size, high speed, low cost, and short time to market. Therefore FPGA-based controller can have a short execution time because it has parallel architecture. Research on FPGA-based control of systems is considerably growing as their applications such as industrial automation, robotic surgery, and space station's robot arm demand more accuracy, reliability, high performance. For instance, the FPGA-based controls of robot manipulator have been reported in [63-70]. Shao and Sun [64]have proposed an adaptive control algorithm based on FPGA for control of SCARA robot manipulator. They are designed this controller into two micro base controller, the linear part controller is implemented in the FPGA and the nonlinear estimation controller is implemented in DSP. Moreover this controller is implemented in a Xilinx-FPGA XC3S400 with the 20 KHz position loop frequency. The FPGA based servo control and inverse kinematics for Mitsubishi RV-M1 micro robot is presented in[65, 67] which to reduce the limitation of FPGA capacitance they are used 42 steps finite state machine (FSM) in 840 n second. Meshram and Harkare [68-69] have presented a multipurpose FPGA-based 5 DOF robot manipulator using VHDL coding in Xilinx ISE 11.1. This controller has two most important advantages: easy to implement and flexible. Zeyad Assi Obaid et al. [71] have proposed a digital PID fuzzy logic controller using FPGA for tracking tasks that yields semiglobal stability of all closed-loop signals. The basic information about FPGA have been reported in [63, 69-73]. A review of design and implementation of FPGA-based systems has been presented in [63]. The FPGA-based sliding mode control of systems has been reported in [74-77]. Lin et al. [74] have presented low cost and high performance FPGA-based fuzzy sliding mode controller for linear induction motor with 80% of flip flops. The fuzzy inference system has 2 inputs (𝑆𝑆 & 𝑆𝑆̇ ) and one output 𝐾𝐾𝑓𝑓 with nine rules. Ramos et al. [75] have reported FPGA-based fixed frequency quasi sliding mode control algorithm to control of power inverter. Their proposed controller is implemented in XC4010E-3-PC84 FPGA from XILINX with acceptable experimental and theoretical performance. FPGA-based robust adaptive backstepping sliding mode control for verification of induction motor is reported in [76]. A FPGA chip has programmed by Hardware Description Language (HDL) which contains two types of languages, Very High Description Language (VHDL) and Verilog. VHDL is one of the powerful programming languages that can be used to describe the hardware design. VHDL was developed by the Institute of Electrical and Electronics Engineers (IEEE) in 1987 and Verilog was developed by Gateway Design Automation in 1984 [63, 72]. This research focuses on FPGAbased sliding mode control of robot manipulator and it is implemented in XA3S1600E FPGA from Xilinx in Xilinx-ISE 9.2i software using VHDL code. This paper is organized as follows: In section 2, main subject of modelling PUMA-560 robot manipulator formulation are presented. Detail of classical sliding mode controller is presented in section 3. In section 4, the main subject of FPGA-based sliding mode controller is presented. In section 5, the simulation result is presented and finally in section 6, the conclusion is presented.
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2.
Dynamic Formulation of robot manipulator
It is well known that the equation of an n-DOF robot manipulator governed by the following equation [1-2]: (1) 𝑴𝑴(𝒒𝒒)𝒒𝒒̈ + 𝑵𝑵(𝒒𝒒, 𝒒𝒒̇ ) = 𝝉𝝉 Where τ is actuation torque, 𝑴𝑴(𝒒𝒒) is a symmetric and positive define inertia matrix, 𝑁𝑁(𝑞𝑞, 𝑞𝑞̇ ) is the vector of nonlinearity term. This robot manipulator dynamic equation can also be written in a following form: (2) 𝝉𝝉 = 𝑴𝑴(𝒒𝒒)𝒒𝒒̈ + 𝑩𝑩(𝒒𝒒)[𝒒𝒒̇ 𝒒𝒒̇ ] + 𝑪𝑪(𝒒𝒒)[𝒒𝒒̇ ]𝟐𝟐 + 𝑮𝑮(𝒒𝒒) Where the matrix of coriolios torque is 𝑩𝑩(𝒒𝒒), 𝑪𝑪(𝒒𝒒) is the matrix of centrifugal torques, and 𝑮𝑮(𝒒𝒒) is the vector of gravity force. The dynamic terms in equation (2) are only manipulator position. This is a decoupled system with simple second order linear differential dynamics. In other words, the component 𝒒𝒒̈ influences, with a double integrator relationship, only the joint variable𝑞𝑞𝑖𝑖 , independently of the motion of the other joints. Therefore, the angular acceleration is found as to be[2]: (3) 𝒒𝒒̈ = 𝑴𝑴−𝟏𝟏 (𝒒𝒒). {𝝉𝝉 − 𝑵𝑵(𝒒𝒒, 𝒒𝒒̇ )} This technique is very attractive from a control point of view. This paper is focused on the design FPGA-based controller for PUMA-560 robot manipulator based on [14-15].
3. Design and implement sliding mode controller Sliding mode controller (SMC) is a powerful nonlinear controller which has been analyzed by many researchers especially in recent years. This theory was first proposed in the early 1950 by Emelyanov and several co-workers and has been extensively developed since then with the invention of high speed control devices[1-2, 14-15]. A time-varying sliding surface 𝒔𝒔(𝒙𝒙, 𝒕𝒕) is given by the following equation: 𝒅𝒅 (4) 𝒔𝒔 = ( + 𝝀𝝀) 𝐞𝐞 𝒅𝒅𝒅𝒅 where λ is the constant and it is positive. To further penalize tracking error integral part can be used in sliding surface part as follows: 𝒕𝒕 𝒅𝒅 (5) 𝒔𝒔 = � + 𝝀𝝀� 𝐞𝐞 + �� 𝐞𝐞 𝒅𝒅𝒅𝒅� 𝒅𝒅𝒅𝒅 𝟎𝟎 A simple solution to get the sliding condition when the dynamic parameters have uncertainty is the switching control law: � − 𝑲𝑲(𝒙𝒙 (6) �⃗, 𝒕𝒕). 𝒔𝒔𝒔𝒔𝒔𝒔(𝒔𝒔) 𝑼𝑼𝒅𝒅𝒅𝒅𝒅𝒅 = 𝑼𝑼 Where the function of 𝒔𝒔𝒔𝒔𝒔𝒔(𝑺𝑺) defined as; 𝟏𝟏 𝒔𝒔 > 0 𝒔𝒔𝒔𝒔𝒔𝒔(𝒔𝒔) = � −𝟏𝟏 𝒔𝒔 < 0 𝟎𝟎 𝒔𝒔 = 𝟎𝟎
(7)
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To reduce or eliminate the chattering it is used the boundary layer method; in boundary layer method the basic idea is replace the discontinuous method by saturation (linear) method with small neighborhood of the switching surface. This replace is caused to increase the error performance. (8) 𝑩𝑩(𝒕𝒕) = {𝒙𝒙, |𝑺𝑺(𝒕𝒕)| ≤ ∅}; ∅ > 0 Where ∅ is the boundary layer thickness. Therefore, to have a smote control law, the saturation function 𝑺𝑺𝑺𝑺𝑺𝑺(𝑺𝑺�∅) added to the control law: (9) �⃗, 𝒕𝒕). 𝑺𝑺𝑺𝑺𝑺𝑺 �𝑺𝑺�∅� 𝑼𝑼 = 𝑲𝑲(𝒙𝒙 Where 𝑺𝑺𝑺𝑺𝑺𝑺 �𝑺𝑺�∅� can be defined as (10) (𝒔𝒔�∅ > 1) ⎧ 𝟏𝟏 ⎪ 𝒔𝒔𝒔𝒔𝒔𝒔 �𝑺𝑺�∅� = −𝟏𝟏 �𝒔𝒔�∅ < 1� ⎨𝒔𝒔 ⎪ � (−𝟏𝟏 < 𝒔𝒔�∅ < 1) ⎩ ∅ Based on above discussion, the control law for a multi degrees of freedom robot manipulator is written as [14]: 𝝉𝝉� = 𝝉𝝉�𝒆𝒆𝒆𝒆 + 𝝉𝝉�𝒔𝒔𝒔𝒔𝒔𝒔 (11) Where, the model-based component 𝝉𝝉�𝒆𝒆𝒆𝒆 is compensated the nominal dynamics of systems. Therefore 𝝉𝝉�𝒆𝒆𝒆𝒆 can calculate as follows: (12) 𝝉𝝉�𝒆𝒆𝒆𝒆 = �𝑴𝑴−𝟏𝟏 (𝑩𝑩 + 𝑪𝑪 + 𝑮𝑮) + 𝑺𝑺̇�𝑴𝑴 Suppose that 𝝉𝝉𝒔𝒔𝒔𝒔𝒔𝒔 is computed as 𝝉𝝉�𝒔𝒔𝒔𝒔𝒔𝒔 = 𝑲𝑲. 𝒔𝒔𝒔𝒔𝒔𝒔 �𝑺𝑺�∅�
(13)
Figure 1 shows the position classical sliding mode control for PUMA-560 robot manipulator.
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Figure 1 Block diagram of classical sliding mode controller
4. FPGA-based sliding mode controller Research on FPGA-based control of systems is considerably growing as their applications such as industrial automation, robotic surgery, and space station's robot arm demand more accuracy, reliability, high performance. For instance, the FPGA-based controls of robot manipulator have been reported in [5-6, 8-13]. As shown in Figure 1, FPGA based sliding mode controller divided into two main parts: saturation part and equivalent part. To design FPGA based SMC controller using VHDL code, inputs and outputs is played important role. The block diagram of the FPGA-based sliding mode control systems for a robot manipulator is shown in Figure 2. Based on Figure 2 this block (controller) has 9 inputs and 3 outputs. Actual and desired displacements (inputs) are defined as 30 bits and the outputs (teta_dis) are defines as 35 bits in size. The desired inputs are generated from the operator and send to controllers for calculate the error and applied to sliding mode controller.
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Figure 2 RTL FPGA-based controller schematic in XILINX-ISE
Figure 3 Design RTL FPGA-based SMC using XILINX-ISE
FPGA supports thousands of gates, it is a high operational speed, accurate in response, low cost, short time to market and small size device, research on FPGA is considerably growing as the 9
application of nonlinear (e.g., robotic) systems. The block diagram and part of VHDL code of the FPGA-based sliding mode control systems for a robot manipulator is shown in Figure 4.
Figure 4: FPGA-based Adaptive MIMO Fuzzy Compensate Sliding Mode Algorithm
FPGAs Xilinx Spartan 3E families are one of the most powerful flexible Hardware Language Description (HDL) programmable IC’s. The last part is focused on the design FPGA based sliding mode controller in Xilinx ISE 9.1. As a result the number of fundamental programmable functional element are used in the XA3S1600E FPGA equal: the LUT’s (610 out of 29504), CLB (77 out of 3688), Slice (305 out of 14752), Multipliers (27 out of 36), registers (397), Block RAM memory (648 K) and as a Map report Peak memory usage is 175 MB.
5.
Results
PD Matlab-based sliding mode controller (PD-SMC) and PID Matlab-based sliding mode controller (PID-SMC) and FPGA-based sliding mode controller were tested to Step response trajectory. In this simulation the first, second, and third joints are moved from home to final position without and with external disturbance. The simulation was implemented in Matlab/Simulink and Xilinx-ISE 9.1 environments. It is noted that, these systems are tested by band limited white noise with a predefined 40% of relative to the input signal amplitude which the sample time is equal to 0.1. This type of noise is used to external disturbance in continuous and hybrid systems. A FPGA chip is a small FPD which supports thousands of gates; it has programmed by Hardware Description Language (HDL): Very High Description Language (VHDL) and Verilog. The major target in this part is comparative study between SMC’s result in MATLAB and in Xilinx ISE 9.1 using VHDL code.
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Timing Detail: As a simulation result in XILINX ISE 9.1, it found that this controller is able to make as a fast response at 15.716 𝑛𝑛𝑛𝑛 with 63.29 𝑀𝑀𝑀𝑀𝑀𝑀 of a maximum frequency. From investigation and synthesis summary, this design has 15.716 𝑛𝑛𝑛𝑛 delay for each controller to 46 logic elements and also the offset before CLOCK is 55.773 𝑛𝑛𝑛𝑛 for 132 logic gates. Figures 5 to 8 have indicated the displacement, error performance, teta discontinuous (torque performance) at different time. As shown in Figure 5 the controller gives action at 6 𝜇𝜇𝜇𝜇 as a result before this time all signals and error equal to zeros.
Figure 5 Timing diagram using Xilinx ISE 9.1 of the FPGA-based SMC before running
In Figure 6 at 6.5 𝜇𝜇𝜇𝜇 (transient response) the response has a large steady state error, 3.92, the desired displacement is 5, the actual displacement is 1.6 and the torque performance is 256.9 N.m.
Figure 6 Step PD SMC for first, second and third link for desired and actual inputs, error performance, and torque performance at 6.5 𝜇𝜇𝜇𝜇 11
As shown in Figure 7 at 11.5 𝜇𝜇 𝑠𝑠 (steady state response), the actual response is close to desired response therefore the FPGA-based PD-SMC steady State error is 6 × 10−5 , the desired displacement is 5, the actual displacement is 5.000062 and the torque performance is 0.78 N.m.
Figure 7 Step PD SMC for first, second and third link for desired and actual inputs, error performance, and torque performance in 11.5 𝜇𝜇 𝑠𝑠.
Figure 8 has shown the HDL-PD-SMC at t=100𝜇𝜇 𝑠𝑠 (steady state response), at this time the steady State error is equal to zero , the desired displacement is 5, the actual displacement is 5 and the torque performance is 1.005 Nm.
Figure 8 Step PD SMC for first, second and third link for desired and actual inputs, error performance, and torque performance in 100𝜇𝜇𝜇𝜇.
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Figure 9 shows the delay with the robot manipulator affects the beginning of the response. Consequently the delay for this system is equal to 0.1𝜇𝜇 𝑠𝑠.
Figure 9 The delay time in PD-SMC between desired displacement and actual displacement
Figures 10 to 12 show the chattering in FPGA-based SMC. In Figure 10, the chattering analysis from 6.2 𝜇𝜇𝜇𝜇 to 7 𝜇𝜇𝜇𝜇. It can be seen that the chattering is eliminated in this design.
Figure 10
Chattering rejections in FPGA-based SMC (from 6.2 𝜇𝜇𝜇𝜇 to 7𝜇𝜇𝜇𝜇)
Figures 11 and 12 show the power of chattering rejections in FPGA-based SMC, it found that this design is eliminated the chattering in certain situation as well as Matlab-based PD SMC.
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Figure 11
Chattering rejections in FPGA-based SMC (from 9.4 𝜇𝜇𝜇𝜇 to 10.2𝜇𝜇𝜇𝜇)
Figure 12
Chattering rejections in FPGA-based SMC (from 26 𝜇𝜇𝜇𝜇 to 26.9𝜇𝜇𝜇𝜇)
The best possible coefficients in Step FPGA-based PD-SMC are; 𝐾𝐾𝑝𝑝 = 000001 = 1, 𝐾𝐾𝑣𝑣 = 011110 = 30, ∅1 = ∅2 = ∅3 = 000001 = 1, 𝑎𝑎𝑎𝑎𝑎𝑎 𝜆𝜆1 = 𝜆𝜆2 = 𝜆𝜆3 = 000110 = 6. By comparing some control parameters such as overshoot, rise time, settling time and steady state error in Matlab–based PD-SMC, FPGA-based PD-SMC; overshoot ( PD-SMC=1% and FPGASMC=0.005%), rise time (PD-SMC= 0.4 sec and FPGA-SMC8.2 𝝁𝝁 s), settling time (PDSMC= 0.4 sec and FPGA-SMC=10 𝝁𝝁 s) and steady state error (PD-SMC ≅ 𝟎𝟎. 𝟎𝟎𝟎𝟎𝟎𝟎𝟎𝟎 and FPGA-SMC=0) it found that in fast response, the FPGA based-SMC’s parameter has the highquality performance.
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Figure 13 shows the tracking performance in PD-SMC and PID SMC without disturbance for Step trajectory.
Figure 13
Step PD-SMC and PID-SMC for First, second and third link trajectory without any
disturbance.
By comparing step response, Figure 13, in PD and PID-SMC, conversely the PID's overshoot (0%) is lower than PD's (1%), the PD’s rise time (0.483 Sec) is dramatically lower than PID’s (0.9 Sec); in addition the Settling time in PD (Settling time=0.65 Sec) is fairly lower than PID (Settling time=1.4 Sec). Disturbance rejection: Figure 14 is indicated the power disturbance removal in PD and PIDSMC. As mentioned before, SMC is one of the most important robust nonlinear controllers. Besides a band limited white noise with predefined of 40% the power of input signal is applied to the step and ramp PD and PID-SMC; it found slight oscillations in trajectory responses.
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Figure 14 Step PD SMC and PID SMC for First, second and third link trajectory with external disturbance.
Among above graph (14), relating to step trajectories following with external disturbance, PID SMC and PD SMC have slightly fluctuations. By comparing overshoot, rise time, and settling time; PID's overshoot (0.9%) is lower than PD's (1.1%), PD’s rise time (0.48 sec) is considerably lower than PID’s (0.9 sec) and finally the Settling time in PD (Settling time=0.65 Sec) is quite lower than PID (Settling time=1.5 Sec). 6.
Conclusion
Refer to the research, a position FPGA-based sliding mode control design and application to robot manipulator has proposed in order to design high performance nonlinear controller in the presence of certainties. Regarding to the positive points in sliding mode controller and FPGA the output has improved. Sliding mode controller by adding to the FPGA single chip IC has covered negative points. Obviously PUMA 560 robot manipulator is nonlinear so this paper focuses on comparison between Matlab-based sliding mode controller and FPGA-based sliding mode controller, to opt for mobility control method for the industrial manipulator.
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Higher implementation speed and small chip size versus an acceptable performance is reached by designing FPGA-based sliding mode controller. This implementation considerably reduces the chattering phenomenon and error in the presence of certainties. The controller works with a maximum clock frequency of 63.29 MHz and the computation time (delay in activation) of this controller is 0.1𝜇𝜇𝜇𝜇. As a result, this controller will be able to control a wide range of robot manipulators with a high sampling rates because its small size versus high speed markets.
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P. Kachroo and M. Tomizuka, "Chattering reduction and error convergence in the slidingmode control of a class of nonlinear systems," Automatic Control, IEEE Transactions on, vol. 41, pp. 1063-1068, 2002. H. Elmali and N. Olgac, "Implementation of sliding mode control with perturbation estimation (SMCPE)," Control Systems Technology, IEEE Transactions on, vol. 4, pp. 79-85, 2002. J. Moura and N. Olgac, "A comparative study on simulations vs. experiments of SMCPE," 2002, pp. 996-1000. Y. Li and Q. Xu, "Adaptive Sliding Mode Control With Perturbation Estimation and PID Sliding Surface for Motion Tracking of a Piezo-Driven Micromanipulator," Control Systems Technology, IEEE Transactions on, vol. 18, pp. 798-810, 2010. B. Wu, et al., "An integral variable structure controller with fuzzy tuning design for electro-hydraulic driving Stewart platform," 2006, pp. 5-945. L. A. Zadeh, "Toward a theory of fuzzy information granulation and its centrality in human reasoning and fuzzy logic," Fuzzy Sets and Systems, vol. 90, pp. 111-127, 1997. L. Reznik, Fuzzy controllers: Butterworth-Heinemann, 1997. J. Zhou and P. Coiffet, "Fuzzy control of robots," 2002, pp. 1357-1364. S. Banerjee and P. Y. Woo, "Fuzzy logic control of robot manipulator," 2002, pp. 87-88. K. Kumbla, et al., "Soft computing for autonomous robotic systems," Computers and Electrical Engineering, vol. 26, pp. 5-32, 2000. C. C. Lee, "Fuzzy logic in control systems: fuzzy logic controller. I," IEEE Transactions on systems, man and cybernetics, vol. 20, pp. 404-418, 1990. R. J. Wai, et al., "Implementation of artificial intelligent control in single-link flexible robot arm," R. J. Wai and M. C. Lee, "Intelligent optimal control of single-link flexible robot arm," Industrial Electronics, IEEE Transactions on, vol. 51, pp. 201-220, 2004. M. B. Menhaj and M. Rouhani, "A novel neuro-based model reference adaptive control for a two link robot arm," 2002, pp. 47-52.
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S. Mohan and S. Bhanot, "Comparative study of some adaptive fuzzy algorithms for manipulator control," International Journal of Computational Intelligence, vol. 3, pp. 303–311, 2006. F. Barrero, et al., "Speed control of induction motors using a novel fuzzy sliding-mode structure," Fuzzy Systems, IEEE Transactions on, vol. 10, pp. 375-383, 2002. Y. C. Hsu and H. A. Malki, "Fuzzy variable structure control for MIMO systems," 2002, pp. 280-285. Y. C. Hsueh, et al., "Self-tuning sliding mode controller design for a class of nonlinear control systems," 2009, pp. 2337-2342. R. Shahnazi, et al., "Position control of induction and DC servomotors: a novel adaptive fuzzy PI sliding mode control," Energy Conversion, IEEE Transactions on, vol. 23, pp. 138-147, 2008. C. C. Chiang and C. H. Wu, "Observer-Based Adaptive Fuzzy Sliding Mode Control of Uncertain Multiple-Input Multiple-Output Nonlinear Systems," 2007, pp. 1-6. H. Temeltas, "A fuzzy adaptation technique for sliding mode controllers," 2002, pp. 110115. C. L. Hwang and S. F. Chao, "A fuzzy-model-based variable structure control for robot arms: theory and experiments," 2005, pp. 5252-5258. C. G. Lhee, et al., "Sliding mode-like fuzzy logic control with self-tuning the dead zone parameters," Fuzzy Systems, IEEE Transactions on, vol. 9, pp. 343-348, 2002. Lhee. C. G., J. S. Park, H. S. Ahn, and D. H. Kim, "Sliding-Like Fuzzy Logic Control with Self-tuning the Dead Zone Parameters," IEEE International fuzzy systems conference proceeding, 1999,pp.544-549. X. Zhang, et al., "Adaptive sliding mode-like fuzzy logic control for high order nonlinear systems," pp. 788-792. M. R. Emami, et al., "Development of a systematic methodology of fuzzy logic modeling," IEEE Transactions on Fuzzy Systems, vol. 6, 1998. H.K.Lee, K.Fms, "A Study on the Design of Self-Tuning Sliding Mode Fuzzy Controller. Domestic conference," IEEE Conference, 1994, vol. 4, pp. 212-218. Z. Kovacic and S. Bogdan, Fuzzy controller design: theory and applications: CRC/Taylor & Francis, 2006. 20
F. Y. Hsu and L. C. Fu, "Nonlinear control of robot manipulators using adaptive fuzzy sliding mode control," 2002, pp. 156-161. R. G. Berstecher, et al., "An adaptive fuzzy sliding-mode controller," Industrial Electronics, IEEE Transactions on, vol. 48, pp. 18-31, 2002. V. Kim, "Independent joint adaptive fuzzy control of robot manipulator," 2002, pp. 645652. Y. Wang and T. Chai, "Robust adaptive fuzzy observer design in robot arms," 2005, pp. 857-862. B. K. Yoo and W. C. Ham, "Adaptive control of robot manipulator using fuzzy compensator," Fuzzy Systems, IEEE Transactions on, vol. 8, pp. 186-199, 2002. H. Medhaffar, et al., "A decoupled fuzzy indirect adaptive sliding mode controller with application to robot manipulator," International Journal of Modelling, Identification and Control, vol. 1, pp. 23-29, 2006. Y. Guo and P. Y. Woo, "An adaptive fuzzy sliding mode controller for robotic manipulators," Systems, Man and Cybernetics, Part A: Systems and Humans, IEEE Transactions on, vol. 33, pp. 149-159, 2003. C. M. Lin and C. F. Hsu, "Adaptive fuzzy sliding-mode control for induction servomotor systems," Energy Conversion, IEEE Transactions on, vol. 19, pp. 362-368, 2004. Iordanov, H. N., B. W. Surgenor, 1997. Experimental evaluation of the robustness of discrete sliding mode control versus linear quadratic control, IEEE Trans. On control system technology, 5(2):254-260. N. Sulaiman, et al., "Design and Implementation of FPGA-Based Systems-A Review," Australian Journal of Basic and Applied Sciences, vol. 3, pp. 3575-3596, 2009. X. Shao and D. Sun, "Development of an FPGA-based motion control ASIC for robotic manipulators," 2006, pp. 8221-8225. Y. S. Kung, et al., "FPGA-implementation of inverse kinematics and servo controller for robot manipulator," Proc. IEEE Int. on Robotics and Biomimetics, pp. 1163–1168, 2006. X. Shao, et al., "A new motion control hardware architecture with FPGA-based IC design for robotic manipulators," 2006, pp. 3520-3525. 21
Y. S. Kung, et al., "Design and Implementation of a Servo System for Robotic Manipulator," ed: CACS, 2005. U. D. Meshram and R. Harkare, "FPGA Based Five Axis Robot Arm Controller." U. Meshram, et al., "Robot arm controller using FPGA," 2009, pp. 8-11. Y. S. Kung and G. S. Shu, "Development of a FPGA-based motion control IC for robot arm," 2006, pp. 1397-1402. Z. A. Obaid, et al., "Developed Method of FPGA-based Fuzzy Logic Controller Design with the Aid of Conventional PID Algorithm," Australian Journal of Basic and Applied Sciences, vol. 3, pp. 2724-2740, 2009. S. T. Karris, Digital circuit analysis and design with Simulink modeling and introduction to CPLDs and FPGAs: Orchard Pubns, 2007. K. D. Rogers, "ACCELERATION AND IMPLEMENTION OF A DSP PHASE-BASED FREQUENCY ESTIMATION ALGORITHM: MATLAB/SIMULINK TO FPGA VIA XILINX SYSTEM GENERATOR," Citeseer, 2004. F. J. Lin, et al., "FPGA-based fuzzy sliding-mode control for a linear induction motor drive," 2005, pp. 1137-1148. R. R. Ramos, et al., "A fixed-frequency quasi-sliding control algorithm: application to power inverters design by means of FPGA implementation," Power Electronics, IEEE Transactions on, vol. 18, pp. 344-355, 2003. F. J. Lin, et al., "FPGA-based adaptive backstepping sliding-mode control for linear induction motor drive," Power Electronics, IEEE Transactions on, vol. 22, pp. 1222-1231, 2007. S. Lentijo, et al., "FPGA based sliding mode control for high frequency power converters," 2004, pp. 3588-3592. B. Armstrong, et al., "The explicit dynamic model and inertial parameters of the PUMA 560 arm," 2002, pp. 510-518. P. I. Corke and B. Armstrong-Helouvry, "A search for consensus among model parameters reported for the PUMA 560 robot," 2002, pp. 1608-1613.
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Farzin Piltan, N. Sulaiman, Amin Jalali & Koorosh Aslansefat
Evolutionary Design of Mathematical tunable FPGA Based MIMO Fuzzy Estimator Sliding Mode Based Lyapunov Algorithm: Applied to Robot Manipulator Farzin Piltan
[email protected]
Department of Electrical and Electronic Engineering, Faculty of Engineering, Universiti Putra Malaysia 43400 Serdang, Selangor, Malaysia
N. Sulaiman
[email protected]
Department of Electrical and Electronic Engineering, Faculty of Engineering, Universiti Putra Malaysia 43400 Serdang, Selangor, Malaysia
Amin Jalali
[email protected]
Industrial Electrical and Electronic Engineering SanatkadeheSabze Pasargad. CO (S.S.P. Co), NO:16 , PO.Code 71347-66773, Fourth floor Dena Apr , Seven Tir Ave , Shiraz , Iran
Koorosh Aslansefat
[email protected]
Industrial Electrical and Electronic Engineering SanatkadeheSabze Pasargad. CO (S.S.P. Co), NO:16 , PO.Code 71347-66773, Fourth floor Dena Apr , Seven Tir Ave , Shiraz , Iran
Abstract In this research, a Multi Input Multi Output (MIMO) position Field Programmable Gate Array (FPGA)-based fuzzy estimator sliding mode control (SMC) design with the estimation laws derived in Lyapunov sense and application to robotic manipulator has proposed in order to design high performance nonlinear controller in the presence of uncertainties. Regarding to the positive points in sliding mode controller, fuzzy inference methodology and Lyapunov based method, the controllers output has improved. The main target in this research is analyses and design of the position MIMO artificial Lyapunov FPGA-based controller for robot manipulator in order to solve uncertainty, external disturbance, nonlinear equivalent part, chattering phenomenon, time to market and controller size using FPGA. Robot manipulators are nonlinear, time variant and a number of parameters are uncertain therefore design robust and stable controller based on Lyapunov based is discussed in this research. Studies about classical sliding mode controller (SMC) show that: although this controller has acceptable performance with known dynamic parameters such as stability and robustness but there are two important disadvantages as below: chattering phenomenon and mathematical nonlinear dynamic equivalent controller part. The first challenge; nonlinear dynamic part; is applied by inference estimator method in sliding mode controller in order to solve the nonlinear problems in classical sliding mode controller. And the second challenge; chattering phenomenon; is removed by linear method. Asymptotic stability of the closed loop system is also proved in the sense of Lyapunov. In the last part it can find the implementation of MIMO fuzzy estimator sliding mode controller on FPGA; FPGA-based fuzzy estimator sliding mode controller has many advantages such as high speed, low cost, short time to market and small device size. One of the most important drawbacks is limited capacity of available cells which this research focuses to solve this challenge. FPGA can be used to design a controller in a single chip Integrated Circuit (IC). In this research the SMC is designed using Very High Description Language (VHDL) for implementation on FPGA device (XA3S1600E-Spartan-3E), with minimum chattering. Keywords: Mathematical Tunable, FPGA, MIMO Fuzzy Estimator, Fuzzy Sliding Mode Based Lyapunov Algorithm, Robot Manipulator, Chattering Phenomenon, VHDL language.
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1.
INTRODUCTION, MOTIVATION AND BACKGROUND
Robot manipulators have many applications in aerospace, manufacturing, automotive, medicine and other industries. Robot manipulators consist of three main parts: mechanical, electrical, and control. In the mechanical point of view, robot manipulators are collection of serial or parallel links which have connected by revolute and/or prismatic joints between base and end-effector frame. The robot manipulators electrical parts are used to links motion, which including the following subparts: power supply to supply the electrical and control parts, power amplifier to amplify the signal and driving the actuators, DC/stepper/servo motors or hydraulic/pneumatic cylinders to motion the links, and transmission part to transfer data between robot manipulator subparts. Control part is used to adjust the timing between the subparts of robot manipulator to reach the best performance (trajectory). It provides four main abilities in robot manipulators: controlling the manipulators movement in correct workspace, sensing the information from the environment, being able to intelligent control behavior and processing the data and information between all subparts. Research about mechanical parts and control methodologies in robotic system is shown; the mechanical design, type of actuators, and type of systems drive play important roles to have the best performance controller. More over types of kinematics chain, i.e., serial Vs. parallel manipulators, and types of connection between link and join actuators, i.e., highly geared systems Vs. direct-drive systems are presented in the following sentences because these topics played important roles to select and design the best acceptable performance controllers[1-6]. A serial link robot is a sequence of joints and links which begins with a base frame and ends with an end-effector. This type of robot manipulators, comparing with the load capacitance is more weightily because each link must be supported the weights of all next links and actuators between the present link and end-effector[6]. Serial robot manipulators have been used in automotive industry, medical application, and also in research laboratories. In contrast, parallel robot manipulators design according to close loop which base frame is connected to the end-effector frame with two or more kinematic chains[6]. In the other words, a parallel link robot has two or more branches with some joints and links, which support the load in parallel. Parallel robot have been used in many applications such as expensive flight simulator, medical robotics (I.e., high accuracy, high repeatability, high precision robot surgery), and machinery tools. With comparison between serial and parallel links robot manipulators, parallel robots are used in higher speed loads, better accuracy, with used lighter weigh robot manipulator but one of the most important handicaps is limitation the workspace compared to serial robot. From control point of view, the coupling between different kinematic chains can generate the uncertainty problems which cause difficult controller design of parallel robot manipulator[7-12]. One of the most important classifications in controlling the robot manipulator is how the links have connected to the actuators. This classification divides into two main groups: highly geared (e.g., 200 to 1) and direct drive (e.g., 1 to 1). High gear ratios reduce the nonlinear coupling dynamic parameters in robot manipulator. In this case, each joint is modeled the same as Single Input Single Output (SISO) systems. In high gear robot manipulators which generally are used in industry, the couplings are modeled as a disturbance for SISO systems. Direct drive increases the coupling of nonlinear dynamic parameters of robot manipulators. This effect should be considered in the design of control systems. As a result some control and robotic researchers’ works on nonlinear robust controller design[2]. There are several methods for controlling a robot manipulator, which all of them follow two common goals, namely, hardware/software implementation and acceptable performance. However, the mechanical design of robot manipulator is very important to select the best controller but in general two types schemes can be presented, namely, a joint space control schemes and an operation space control schemes[1]. Sliding mode controller (SMC) is a significant nonlinear controller in certain and uncertain dynamic parameters systems. This controller is used to present a systematic solution for stability and robustness which they can play important role to select the best controller. Conversely, pure sliding mode controller is used in many applications; it has two important drawbacks namely; chattering phenomenon, and nonlinear equivalent dynamic formulation in uncertain dynamic parameter [1, 6, and 20]. To reduce or eliminate the chattering this research is used linear saturation boundary layer function [13-20]. In boundary layer saturation method, the basic idea is the discontinuous method replacement by saturation (linear) method with small neighborhood of the switching surface. This replacement caused to increase the error performance against with the considerable chattering reduction. Slotine and Sastry have introduced
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boundary layer method instead of discontinuous method to reduce the chattering[21]. Slotine has presented sliding mode with boundary layer to improve the industry application [22]. R. Palm has presented a fuzzy method to nonlinear approximation instead of linear approximation inside the boundary layer to improve the chattering and control the result performance[23]. Moreover, C. C. Weng and W. S. Yu improved the previous method by using a new method in fuzzy nonlinear approximation inside the boundary layer and adaptive method[24]. As mentioned [24]sliding mode fuzzy controller (SMFC) is fuzzy controller based on sliding mode technique to simple implement, most exceptional stability and robustness. Conversely above method has the following advantages; reducing the number of fuzzy rule base and increasing robustness and stability, the main disadvantage of SMFC is need to define the sliding surface slope coefficient very carefully. To eliminate the above problems control researchers have applied artificial intelligence method (e.g., fuzzy logic) in nonlinear robust controller (e.g., sliding mode controller) besides this technique is very useful in order to implement easily. One of the most important techniques to reduce or remove above two challenges is applying non-classical (artificial intelligence) method in robust classical such as sliding mode controller method. Estimated uncertainty method used in term of uncertainty estimator to compensation of the system uncertainties. It has been used to solve the chattering phenomenon and also nonlinear equivalent dynamic. If estimator has an acceptable performance to compensate the uncertainties, the chattering is reduced. Research on estimated uncertainty to reduce the chattering is significantly growing as their applications such as industrial automation and robot manipulator. For instance, the applications of artificial intelligence, neural networks and fuzzy logic on estimated uncertainty method have been reported in [25-28]. Wu et al. [30] have proposed a simple fuzzy estimator controller beside the discontinuous and equivalent control terms to reduce the chattering. Their design had three main parts i.e. equivalent, discontinuous and fuzzy estimator tuning part which has reduced the chattering very well. Elmali et al. [27]and Li and Xu [29]have addressed sliding mode control with perturbation estimation method (SMCPE) to reduce the classical sliding mode chattering. This method was tested for the tracking control of the first two links of a SCARA type HITACHI robot. In this technique, digital controller is used to increase the system’s response quality. Conversely this method has the following advantages; increasing the controller’s response speed and reducing dependence on dynamic system model by on-line control, the main disadvantage are chattering phenomenon and need to improve the performance. In order to solve the uncertain dynamic parameters and complex parameters systems with an artificial intelligence theory, fuzzy logic is one of the best choice which it is used in this research. However fuzzy logic method is useful to control complicated nonlinear dynamic mathematical models but the response quality may not always be so high. This controller can be used in main part of controller (e.g., pure fuzzy logic controller), it can be used to design adaptive controller (e.g., adaptive fuzzy controller), tuning parameters and finally applied to the classical controllers [31-40]. Research on combinations of fuzzy logic systems with sliding mode method is significantly growing as nonlinear control applications. For instance, the applications of fuzzy logic on sliding mode controller have reported in [24, 41-45]. Research on applied fuzzy logic methodology in sliding mode controller (FSMC) to reduce or eliminate the high frequency oscillation (chattering), to compensate the unknown system dynamics and also to adjust the linear sliding surface slope in pure sliding mode controller considerably improves the robot manipulator control process [42-43]. H.Temeltas [46] has proposed fuzzy adaption techniques for SMC to achieve robust tracking of nonlinear systems and solves the chattering problem. Conversely system’s performance is better than sliding mode controller; it is depended on nonlinear dynamic equqation. C. L. Hwang et al. [47]have proposed a Tagaki-Sugeno (TS) fuzzy model based sliding mode control based on N fuzzy based linear state-space to estimate the uncertainties. A multi-input multi-output FSMC reduces the chattering phenomenon and reconstructs the approximate the unknown system has been presented for a robot manipulator [42]. As mentioned above sliding mode controller has some limitations which applied fuzzy logic in sliding mode controller can causes to reduce the limitations [48-53]. However FSMC has an acceptable performance but calculate the sliding surface slope by experience knowledge is difficult, particularly when system has structure or unstructured uncertainties, mathematical model free on-line tunable gain is recommended. F Y Hsu et al. [54]have presented adaptive fuzzy sliding mode control which can update fuzzy rules to compensate nonlinear parameters and guarantee the stability robot manipulator controller. Y.C. Hsueh et al. [43] have presented self tuning sliding mode controller which can resolve the chattering problem without to using saturation function. For nonlinear dynamic systems (e.g., robot manipulators) with various parameters, adaptive control technique can train the dynamic parameter to have an acceptable controller
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performance. Calculate several scale factors are common challenge in classical sliding mode controller and fuzzy logic controller, as a result it is used to adjust and tune coefficient. Research on adaptive fuzzy control is significantly growing, for instance, different adaptive fuzzy controllers have been reported in [40, 55-57]. Research on adaptive fuzzy sliding mode controller is significantly growing as many applications and it can caused to improve the tracking performance by online tuning the parameters. The adaptive sliding mode controller is used to estimate the unknown dynamic parameters and external disturbances. For instance, the applications of adaptive fuzzy sliding mode controller to control the robot manipulators have been reported in [24, 29, 45]. Generally, adaptive fuzzy sliding mode control of robot manipulator is classified into two main groups’ i.e. multi-input multi-output (MIMO) and single-input single-output (SISO) fuzzy systems. Commonly, most of nonlinear controllers in robotic applications need a real time operation. FPGA-based controller has been used in this application because it is small device in size, high speed, low cost, and short time to market. Therefore FPGA-based controller can have a short execution time because it has parallel architecture. Research on FPGA-based control of systems is considerably growing as their applications such as industrial automation, robotic surgery, and space station's robot arm demand more accuracy, reliability, high performance. For instance, the FPGA-based controls of robot manipulator have been reported in [63-70]. Shao and Sun [64]have proposed an adaptive control algorithm based on FPGA for control of SCARA robot manipulator. They are designed this controller into two micro base controller, the linear part controller is implemented in the FPGA and the nonlinear estimation controller is implemented in DSP. Moreover this controller is implemented in a Xilinx-FPGA XC3S400 with the 20 KHz position loop frequency. The FPGA based servo control and inverse kinematics for Mitsubishi RV-M1 micro robot is presented in[65, 67] which to reduce the limitation of FPGA capacitance they are used 42 steps finite state machine (FSM) in 840 n second. Meshram and Harkare [68-69] have presented a multipurpose FPGA-based 5 DOF robot manipulator using VHDL coding in Xilinx ISE 11.1. This controller has two most important advantages: easy to implement and flexible. Zeyad Assi Obaid et al. [71] have proposed a digital PID fuzzy logic controller using FPGA for tracking tasks that yields semi-global stability of all closed-loop signals. The basic information about FPGA have been reported in [63, 69-73]. A review of design and implementation of FPGA-based systems has been presented in [63]. The FPGA-based sliding mode control of systems has been reported in [74-77]. Lin et al. [74] have presented low cost and high performance FPGA-based fuzzy sliding mode controller for linear induction motor with 80% of flip flops. The fuzzy inference system has 2 inputs and one output with nine rules. Ramos et al. [75] have reported FPGA-based fixed frequency quasi sliding mode control algorithm to control of power inverter. Their proposed controller is implemented in XC4010E-3-PC84 FPGA from XILINX with acceptable experimental and theoretical performance. FPGA-based robust adaptive backstepping sliding mode control for verification of induction motor is reported in [76]. A FPGA chip has programmed by Hardware Description Language (HDL) which contains two types of languages, Very High Description Language (VHDL) and Verilog. VHDL is one of the powerful programming languages that can be used to describe the hardware design. VHDL was developed by the Institute of Electrical and Electronics Engineers (IEEE) in 1987 and Verilog was developed by Gateway Design Automation in 1984 [63, 72]. This research focuses on FPGA-based sliding mode control of robot manipulator and it is implemented in XA3S1600E FPGA from Xilinx in Xilinx-ISE 9.2i software using VHDL code. In this research we will highlight the MIMO mathematical model-free adaptive fuzzy estimator sliding mode algorithm with estimates the equivalent part derived in the Lyapunov sense. This algorithm will be analyzed and evaluated on robotic manipulators. Section 2, serves as an introduction to problem formulation of controller and its application to a three degree of-freedom robot manipulator, describe the objectives and problem statements. Part 3, introduces and describes the methodology algorithms and proves Lyapunov stability. Section 4 presents the simulation results of this algorithm applied to a 3 degree-of-freedom robot manipulator and the final section is describe the conclusion.
2.
CONTROL FORMULATION, OBJECTIVES AND PROBLEM STATEMENTS
Fist part is focused on nonlinear dynamic of PUMA 560 robot manipulator. Dynamic equation is the study of motion with regard to forces. Dynamic modeling is vital for control, mechanical design, and simulation. It is used to describe dynamic parameters and also to describe the relationship between displacement,
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velocity and acceleration to force acting on robot manipulator. To calculate the dynamic parameters which introduced in the following lines, four algorithms are very important: Inverse dynamics, in this algorithm, joint actuators are computed (e.g., force/torque or voltage/current) from endeffector position, velocity, and acceleration. It is used in feed forward control. Forward dynamics used to compute the joint acceleration from joint actuators. This algorithm is required for simulations. The joint-space inertia matrix, necessary for maps the joint acceleration to the joint actuators. It is used in analysis, feedback control and in some integral part of forward dynamics formulation. The operational-space inertia matrix, this algorithm maps the task accelerations to task actuator in Cartesian space. It is required for control of end-effector. The field of dynamic robot manipulator has a wide literature that published in professional journals and established textbooks[1, 6]. Several different methods are available to compute robot manipulator dynamic equations. These methods include the Newton-Euler (N-E) methodology, the Lagrange-Euler (L-E) method, and Kane’s methodology[1]. The Newton-Euler methodology is based on Newton’s second law and several different researchers are signifying to develop this method[1]. This equation can be described the behavior of a robot manipulator link-by-link and joint-by-joint from base to endeffector, called forward recursion and transfer the essential information from end-effector to base frame, called backward recursive. The literature on Euler-Lagrange’s is vast but a good starting point to learn about it is in[1]. Euler-Lagrange is a method based on calculation kinetic energy. Calculate the dynamic equation robot manipulator using E-L method is easier because this equation is derivation of nonlinear coupled and quadratic differential equations. The Kane’s method was introduced in 1961 by Professor Thomas Kane[1, 6]. This method used to calculate the dynamic equation of motion without any differentiation between kinetic and potential energy functions. The equation of a multi degrees of freedom (DOF) robot manipulator is calculated by the following equation[6]: (1) Where τ is vector of actuation torque, M (q) is symmetric and positive define inertia matrix, is the vector of nonlinearity term, and q is position vector. In equation 1 if vector of nonlinearity term derive as Centrifugal, Coriolis and Gravity terms, as a result robot manipulator dynamic equation can also be written as [78-79]:
(2) (3) (4)
Where, is matrix of coriolis torques, is matrix of centrifugal torque, is vector of joint velocity that it can give by: , and is vector, that it can given by: . In robot manipulator dynamic part the inputs are torques and the outputs are actual displacements, as a result in (4) it can be written as [1, 6, 80-81];
(5) To implementation (5) the first step is implement the kinetic energy matrix (M) parameters by used of Lagrange’s formulation. The second step is implementing the Coriolis and Centrifugal matrix which they can calculate by partial derivatives of kinetic energy. The last step to implement the dynamic equation of robot manipulator is to find the gravity vector by performing the summation of Lagrange’s formulation. The kinetic energy equation (M) is a equation;
symmetric matrix that can be calculated by the following
(6)
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As mentioned above the kinetic energy matrix in following matrix [1, 6]
DOF is a
matrix that can be calculated by the
(7)
The Coriolis matrix (B) is a
matrix which calculated as follows;
(8)
and the Centrifugal matrix (C) is a
matrix;
(9) And last the Gravity vector (G) is a
vector;
(10)
Robotic control is one of the most active research areas in the field of robotics and one of the well-known robot manipulator in the field of academic and industries is PUMA 560 robot manipulator. To position control of robot manipulator, the second three axes are locked the dynamic equation of PUMA robot manipulator is given by [78-79];
(11)
Where
(12)
is computed as
(13)
(14) (15)
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(16) (17)
(18) (19)
(20) (21) (22) (23) and Corilios ( ) matrix is calculated as the following
(24)
Where,
(25)
(26)
(27)
(28) (29) (30) (31) (32)
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Farzin Piltan, N. Sulaiman, Amin Jalali & Koorosh Aslansefat
(33) (34) (35) (36) consequently coriolis matrix is shown as bellows;
(37)
Moreover Centrifugal ( ) matrix is demonstrated as
(38)
Where,
(39) (40) (41)
(42) (43)
(44) (45)
(46) In this research
, as a result
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(47)
Gravity ( ) Matrix can be written as
(48)
Where,
(49)
(50)
(51) Suppose
is written as follows
(52) and
is introduced as
(53) can be written as
(54)
Therefore
for PUMA robot manipulator is calculated by the following equations
(55) (56) (57) (58) (59) (60) An information about inertial constant and gravitational constant are shown in Tables 1 and 2 based on [78-79].
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TABLE 1: Inertial constant reference (Kg.m2)
TABLE 2: Gravitational constant (N.m)
Second part is focused on sliding mode formulation and its challenge. We define the tracking error as
(61) Where
,
. The sliding surface is expressed as
(62)
e Where We need to choose
, and are chosen as the bandwidth of the robot controller. to satisfy the sufficient condition (63). We define the reference state as
(63)
e
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(64)
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Now we pick the control input as
(65) Where and are the estimations of and ; diagonal positive definite matrices. From (61) and (65), we can get
and
are
(66) Where
, is known. We choose
and
. We assume that the bound
as
(67) We pick the Lyapunov function candidate to be
(68) Which is a skew-systemmetric matrix satisfying
(69) Then
becomes
(70)
For
, we always get
. We can describe
as
(71)
To attenuate chattering problem, we introduce a saturation function in the control law instead of the sign function in (63). The control law becomes (72) ) In this classical sliding mode control method, the model of the robotic manipulator is partly unknown. To attenuate chattering, we use the saturation function described in (72). Our control law changes to (73) The control law for a multi degrees of freedom robot manipulator is written as: (74) Where, the model-based component follows:
is the nominal dynamics of systems and it can be calculate as
(75) Where is an inertia matrix which it is symmetric and positive, the vector of nonlinearity term and is the vector of gravity force minimum chattering based on [5-11] is computed as;
and
is with
(76)
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is a dead zone (saturation) function and, u and b are unlimited Where coefficient, by replace the formulation (76) in (74) the control output can be written as; (77) Where the function of
defined as;
(78)
The main goal is to design a FPGA based adaptive mathematical model free MIMO fuzzy estimator sliding mode controller. Based on above robot manipulator has nonlinear and highly uncertain parameters consequently; following objectives have been pursuit in this paper. • To develop a chattering in a position pure sliding mode controller against uncertainties via linear boundary layer method. • To design and implement a MIMO fuzzy estimator sliding mode controller in order to solve the equivalent problems in the pure sliding mode control with minimum rule base based on Lyapunov formulation. • To develop a mathematical model free adaptive fuzzy estimator sliding mode controller in order to solve the disturbance rejection and reduce the fuzzy rule base. • To design and implement a FPGA based mathematical model free adaptive fuzzy estimator sliding mode controller Figure 1 is shown the classical sliding mode methodology with linear saturation function to eliminate the chattering.
FIGURE 1: Classical sliding mode controller: applied to 6-link robotic manipulator Zadeh introduced fuzzy sets in 1965. After 40 years, fuzzy systems have been widely used in different fields, especially on control problems. Fuzzy systems transfer expert knowledge to mathematical models. Fuzzy systems used fuzzy logic to estimate dynamics of our systems. Fuzzy controllers including fuzzy ifthen rules are used to control our systems. However the application area for fuzzy control is really wide, the basic form for all command types of controllers consists of; • Input fuzzification (binary-to-fuzzy[B/F]conversion)
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• Fuzzy rule base (knowledge base) • Inference engine • Output defuzzification (fuzzy-to-binary [F/B] conversion) [30-40]. The basic structure of a fuzzy controller is shown in Figure 2.
FIGURE 2: Block diagram of a fuzzy controller with details. Conventional control methods use mathematical models to controls systems. Fuzzy control methods replace the mathematical models with fuzzy if then-rules and fuzzy membership function to controls systems. Both fuzzy and conventional control methods are designed to meet system requirements of stability and convergence. When mathematical models are unknown or partially unknown, fuzzy control models can used fuzzy systems to estimate the unknown models. This is called the model-free approach [31, 35].
3. METHODOLOGY: DESIGN A NOVEL FPGA BASED MIMO ADAPTIVE MATHEMATICAL MODEL FREE LYAPUNOV BASED FUZZY ESTIMATE SLIDING MODE CONTROL Conventional control models can use adaptive control methods to achieve the model-free approach. When system dynamics become more complex, nonlinear systems are difficult to handle by conventional control methods. Fuzzy systems can approximate arbitrary nonlinear systems. In practical problems, systems can be controlled perfectly by expert. Experts provide linguistic description about systems. Conventional control methods cannot design controllers combined with linguistic information. When linguistic information is important for designing controllers, we need to design fuzzy controllers for our systems. Fuzzy control methods are easy to understand for designers. The design process of fuzzy controllers can be simplified with simple mathematical models. Adaptive control uses a learning method to self-learn the parameters of systems. For system whose dynamics are varying, adaptive control can learn the parameters of system dynamics. In traditional adaptive control, we need some information about our system such as the structure of system or the order of the system. In adaptive fuzzy control we can deal with uncertain systems. Due to the linguistic characteristic, adaptive fuzzy controllers behave like operators: adaptively controlling the system under various conditions. Adaptive fuzzy control provides a good tool for making use of expert knowledge to adjust systems. This is important for a complex unknown system with changing dynamics. We divide adaptive fuzzy control into two categories: direct adaptive fuzzy control and indirect adaptive fuzzy control. A direct adaptive fuzzy controller adjusts the parameters of the control input. An indirect adaptive fuzzy controller adjusts the parameters of the control system based on the estimated dynamics of the plant. We define fuzzy systems as two different types. The firs type of fuzzy systems is given by
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(79)
Where are adjustable parameters in (18) . will not change over time.
are given membership functions whose parameters
The second type of fuzzy systems is given by
(80)
are all adjustable parameters. Where From the universal approximation theorem, we know that we can find a fuzzy system to estimate any continuous function. For the first type of fuzzy systems, we can only adjust in (79). We define as the approximator of the real function . (81) We define
as the values for the minimum error:
(82)
Where is a constraint set for . For specific error we can get.
is the minimum approximation
We used the first type of fuzzy systems (79) to estimate the nonlinear system (75) the fuzzy formulation can be write as below;
(83)
are adjusted by an adaptation law. The adaptation law is designed to minimize the Where parameter errors of . A MIMO (multi-input multi-output) fuzzy system is designed to compensate the uncertainties of the robotic manipulator. The parameters of the fuzzy system are adjusted by adaptation laws. The tracking error and the sliding surface state are defined as (58-62) (84)
(85) We define the reference state as
(86) (87) The general MIMO if-then rules are given by
(88)
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are fuzzy if-then rules; and Where vectors of the fuzzy system. The MIMO fuzzy system is define as
are the input and output
(89) Where
(90)
and is defined in (82). To reduce the number of fuzzy rules, we divide the fuzzy system in to three parts:
(91)
(92)
(93)
The control input is given by
(94) Where , are the estimations of positive constants; given by
and and
and are are positive constants. The adaptation law is (95)
Where and are positive diagonal matrices. The Lyapunov function candidate is presented as
(96)
Where
and
we define
(97) From (83) and (82), we get
(98) Since
and
, we get
(99) Then
can be written as
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(100) Where The derivative of
is
(101) We know that
from (100). Then
(102 ) We define the minimum approximation error as
(103) We plug (103) in to (102)
This section focuses on, self tuning gain updating factor for sliding function in SMC, namely, sliding surface slope (ࣅ). The block diagram for this method is shown in Figure 2. In this controller the actual sliding surface gain (ࣅ) is obtained by multiplying the sliding surface with gain updating factor (ࢻ). The gain updating factor (ࢻ) is calculated on-line by fuzzy dynamic model independent which has sliding surface (S) as its inputs. The gain updating factor is independent of any dynamic model of robotic manipulator parameters. It is a basic fact that the system performance in SMC is sensitive to gain updating factor, ࣅ. Thus, determination of an optimum ࣅ value for a system is an important problem. If the system parameters are unknown or uncertain, the problem becomes more highlighted. This problem is solved by adjusting the sliding function of the sliding mode controller continuously in real-time. In this way, the performance of the overall system is improved with respect to the classical sliding mode controller. Gain tuning-SMC has strong resistance and solves the uncertainty problems. In this controller the actual sliding function ( ) is obtained by multiplying the old sliding function ( with the output of supervisory mathematical free model controller . (104)
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Tuning FPGA based SMC method can tune automatically the scale parameters using new method. To keep the structure of the controller as simple as possible and to avoid heavy computation, a mathematical supervisor tuner is selected [13-14]. In this method the tuneable controller tunes the input scaling factors using gain updating factors. In this method the sliding function, , is updated by a new coefficient factor, , Where is a function of system error. Figure 3 is shown the proposed method.
(105)
(106)
FIGURE 3: Adaptive MIMO Fuzzy Compensate Fuzzy Sliding Mode Algorithm FPGA supports thousands of gates, it is a high operational speed, accurate in response, low cost, short time to market and small size device, research on FPGA is considerably growing as the application of nonlinear (e.g., robotic) systems. The block diagram and part of VHDL code of the FPGA-based sliding mode control systems for a robot manipulator is shown in Figure 4.
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FIGURE 4: FPGA-based Adaptive MIMO Fuzzy Compensate Sliding Mode Algorithm FPGAs Xilinx Spartan 3E families are one of the most powerful flexible Hardware Language Description (HDL) programmable IC’s. The last part is focused on the design FPGA based sliding mode controller in Xilinx ISE 9.1. As a result the number of fundamental programmable functional element are used in the XA3S1600E FPGA equal: the LUT’s (610 out of 29504), CLB (77 out of 3688), Slice (305 out of 14752), Multipliers (27 out of 36), registers (397), Block RAM memory (648 K) and as a Map report Peak memory usage is 175 MB.
4.
RESULTS AND DISCUSSION
Sliding mode controller (SMC) and adaptive MIMO fuzzy compensate SMC and FPGA-based adaptive MIMO fuzzy compensate were tested to Step response trajectory. In this simulation the first, second, and third joints are moved from home to final position without and with external disturbance. The simulation was implemented in Matlab/Simulink and Xilinx-ISE 9.1 environments. It is noted that, these systems are tested by band limited white noise with a predefined 40% of relative to the input signal amplitude which the sample time is equal to 0.1. This type of noise is used to external disturbance in continuous and hybrid systems. Tracking performances: Figure 5 is shown the tracking performance in SMC and adaptive MIMO fuzzy compensate SMC without disturbance for Step trajectories. The best possible coefficients in Step SMC are; . From the simulation for first, second, and third links, different controller gains have the different result. Tuning parameters of SMC and adaptive MIMO fuzzy compensate SMC for this type trajectories in PUMA robot manipulator are shown in Table 3. TABLE 3: Tuning parameters of Step SMC
data1 data2 data3
λ1
k1
φ1
λ2
k2
φ2
λ3
k3
φ3
SS error 1
SS error 2
SS error 3
3 30 3
30 30 300
0.1 0.1 0.1
6 60 6
30 30 300
0.1 0.1 0.1
6 60 6
30 30 300
0.1 0.1 0.1
0 -5.17 2.28
0 14.27 0.97
-5.3e-15 -1.142 0.076
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RMS error
0 0.05 0.08
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FIGURE 5: SMC Vs. Adaptive MIMO Fuzzy Compensate Sliding Mode Algorithm: Trajectory performance. Figure 6 is shown the tracking performance in FPGA-based adaptive MIMO fuzzy compensate SMC without disturbance for Step trajectory.
FIGURE 6: FPGA based Adaptive MIMO Fuzzy Compensate Sliding Mode Algorithm: Trajectory performance.
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As mentioned above graphs (Figure 5 and 6), in certain (structured and unstructured) environment it is shown that both of sliding mode controller and adaptive MIMO fuzzy compensate sliding mode algorithm removed the chattering because these controller are used linear boundary layer saturation method. Disturbance Rejection: Figure 7 is indicated the power disturbance removal in SMC and adaptive MIMO fuzzy compensate sliding mode algorithm. As mentioned before, SMC is one of the most important robust nonlinear controllers. Besides a band limited white noise with predefined of 40% the power of input signal is applied to the step SMC and adaptive MIMO fuzzy compensate sliding mode algorithm; it found slight oscillations in SMC trajectory responses. As a result, by comparing SMC and adaptive MIMO fuzzy compensate sliding mode algorithm, it found that adaptive MIMO fuzzy compensate sliding mode algorithm is more robust than SMC with regards to the same external disturbance.
FIGURE 7: SMC Vs. Adaptive MIMO Fuzzy Compensate Sliding Mode Algorithm: Disturbance rejection. Figure 8 is shown the tracking performance in FPGA-based adaptive MIMO fuzzy compensate SMC with external disturbance for Step trajectory.
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FIGURE 8: FPGA based Adaptive MIMO Fuzzy Compensate Sliding Mode Algorithm: Disturbance rejection Chattering Phenomenon: Figure 9 has presented the power of adaptive MIMO fuzzy compensate SMC. These figures have illustrated the power chattering elimination in SMC as well as in adaptive MIMO fuzzy compensate SMC, with external disturbance. By comparing these controllers, conversely SMC has slight fluctuations; adaptive MIMO fuzzy compensate SMC is steadily stabilized. As a result, with respect to the external disturbance adaptive MIMO fuzzy compensate SMC has an acceptable performance.
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FIGURE 9: SMC Vs. Adaptive MIMO Fuzzy Compensate Sliding Mode Algorithm: Chattering. Figure 10 is shown the chattering phenomenon in FPGA-based adaptive MIMO fuzzy compensate SMC with external disturbance for Step trajectory.
FIGURE 10: FPGA based Adaptive MIMO Fuzzy Compensate Sliding Mode Algorithm: chattering rejection
5.
CONCLUSION AND EXTENSION
Refer to the research, a position FPGA-based mathematical model free adaptive fuzzy estimator sliding mode control Lyapunov based design and application to PUMA robot manipulator has proposed in order to design high performance robust and stable FPGA based nonlinear controller in the presence of structure and unstructured uncertainties. The stability of the closed-loop system is proved mathematically based on the Lyapunov method. The first objective in proposed method is removed the chattering which linear boundary layer method is used to solve this challenge. The second target in this work is compensate the model uncertainty by MIMO fuzzy inference system, in the case of the m-link robotic manipulator, if we define membership functions for each input variable, the number of fuzzy rules applied for each joint is which will result in a low computational load. The third target in this research is applied mathematical model free to MIMO fuzzy estimator sliding mode algorithm and eliminate the chattering with minimum computational load and the final main goal is design FPGA based proposed methodology which in this case the performance is improved by using the advantages of sliding mode algorithm, artificial intelligence compensate method, adaptive algorithm and FPGA while the disadvantages removed by added each method to previous method. Fuzzy logic method by adding to the sliding mode controller has covered negative points in fuzzy and sliding algorithms. Higher implementation speed and small chip size versus an acceptable performance is reached by designing FPGA-based sliding mode controller. This implementation considerably reduces the chattering phenomenon and error in the presence of certainties. The controller works with a maximum clock frequency of 63.29 MHz and the computation time (delay in activation) of this controller is 0.1 . As a result, this controller will be able to control a wide range of robot manipulators with a high sampling rates because its small size versus high speed markets.
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Farzin Piltan, N. Sulaiman, Amin Jalali & Koorosh Aslansefat
[74] [75]
[76] [77] [78] [79]
F. J. Lin, et al., "FPGA-based fuzzy sliding-mode control for a linear induction motor drive," 2005, pp. 1137-1148. R. R. Ramos, et al., "A fixed-frequency quasi-sliding control algorithm: application to power inverters design by means of FPGA implementation," Power Electronics, IEEE Transactions on, vol. 18, pp. 344-355, 2003. F. J. Lin, et al., "FPGA-based adaptive backstepping sliding-mode control for linear induction motor drive," Power Electronics, IEEE Transactions on, vol. 22, pp. 1222-1231, 2007. S. Lentijo, et al., "FPGA based sliding mode control for high frequency power converters," 2004, pp. 3588-3592. B. Armstrong, et al., "The explicit dynamic model and inertial parameters of the PUMA 560 arm," 2002, pp. 510-518. P. I. Corke and B. Armstrong-Helouvry, "A search for consensus among model parameters reported for the PUMA 560 robot," 2002, pp. 1608-1613.
International Journal of Robotics and Automation, (IJRA), Volume (2): Issue (5): 2011
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International Journal of Control and Automation Vol. 5, No. 1, March, 2012
Methodology of FPGA-Based Mathematical Error-Based Tuning Sliding Mode Controller Farzin Piltan, Iman Nazari, Sobhan Siamak and Payman Ferdosali Industrial Electrical and Electronic Engineering SanatkadeheSabze Pasargad CO (S.S.P. Co), NO:16 ,PO.Code 71347-66773, Fourth floor Dena Apr , Seven Tir Ave , Shiraz , Iran
[email protected] Abstract Most of nonlinear controllers need real time mobility operation so one of the most important devices which can be used to solve this challenge is Field Programmable Gate Array (FPGA). FPGA can be used to design a controller in a single chip Integrated Circuit (IC).Design a nonlinear controller for second order nonlinear uncertain dynamical systems is one of the most important challenging works. This paper focuses on the design of a FPGAbased chattering free mathematical error-based tuning sliding mode controller (MTSMC) for highly nonlinear dynamic robot manipulator, in presence of uncertainties. In order to provide high performance nonlinear methodology, sliding mode controller is selected. Pure sliding mode controller can be used to control of partly known nonlinear dynamic parameters of robot manipulator. Conversely, pure sliding mode controller is used in many applications; it has an important drawback namely; chattering phenomenon which it can causes some problems such as saturation and heat the mechanical parts of robot manipulators or drivers. In order to reduce the chattering this research is used the switching function in presence of mathematical error-based method instead of switching function method in pure sliding mode controller. The results demonstrate that the FPGA-based sliding mode controller with switching function is a model-based controllers which works well in certain and partly uncertain system. Pure sliding mode controller has difficulty in handling unstructured model uncertainties. To solve this problem applied mathematical model-free tuning method to FPGA-based sliding mode controller for adjusting the sliding surface gain ( ). Since the sliding surface gain ( ) is adjusted by mathematical model free-based tuning method, it is nonlinear and continuous. In this research new is obtained by the previous multiple sliding surface slopes updating factor . FPGA-based Chattering free mathematical errorbased tuning sliding mode controller is stable controller which eliminates the chattering phenomenon without to use the boundary layer saturation function. Lyapunov stability is proved in mathematical error-based tuning sliding mode controller with switching (sign) function. This controller has acceptable performance in presence of uncertainty (e.g., overshoot=0%, rise time=0.8 second, steady state error = 1e-9 and RMS error=1.8e-12). To have higher implementation speed with good performance TVSC is implemented on Spartan 3E FPGA using Xilinx software (controller computation time=30.2 ns, Max frequency=63.7 MHz and controller action frequency=33 MHZ). Keywords: real time mobility operation, Field Programmable Gate Array (FPGA), nonlinear controller, FPGA-based chattering free mathematical error-based tuning sliding mode controller, uncertainties, chattering phenomenon, robot arm, sliding mode controller, adaptive methodology
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1. Introduction The international organization defines the robot as “an automatically controlled, reprogrammable, multipurpose manipulator with three or more axes.” The institute of robotic in The United States Of America defines the robot as “a reprogrammable, multifunctional manipulator design to move material, parts, tools, or specialized devices through various programmed motions for the performance of variety of tasks” [1]. Robot manipulator is a collection of links that connect to each other by joints, these joints can be revolute and prismatic that revolute joint has rotary motion around an axis and prismatic joint has linear motion around an axis. Each joint provides one or more degrees of freedom (DOF). From the mechanical point of view, robot manipulator is divided into two main groups, which called; serial robot links and parallel robot links. In serial robot manipulator, links and joints is serially connected between base and final frame (end-effector). Most of industrial robots are serial links, which in degrees of freedom serial link robot manipulator the axis of the first three joints has a known as major axis, these axes show the position of end-effector, the axis number four to six are the minor axes that use to calculate the orientation of end-effector and the axis number seven to use to reach the avoid the difficult conditions (e.g., surgical robot and space robot manipulator). Dynamic modeling of robot manipulators is used to describe the behavior of robot manipulator such as linear or nonlinear dynamic behavior, design of model based controller such as pure sliding mode controller and pure computed torque controller which design these controller are based on nonlinear dynamic equations, and for simulation. The dynamic modeling describes the relationship between joint motion, velocity, and accelerations to force/torque or current/voltage and also it can be used to describe the particular dynamic effects (e.g., inertia, coriolios, centrifugal, and the other parameters) to behavior of system [1-10]. The Unimation PUMA 560 serially links robot manipulator was used as a basis, because this robot manipulator is widely used in industry and academic. It has a nonlinear and uncertain dynamic parameters serial link 6 degrees of freedom (DOF) robot manipulator. A nonlinear robust controller design is major subject in this work. Controller is a device which can sense information from linear or nonlinear system (e.g., robot manipulator) to improve the systems performance [3]. The main targets in designing control systems are stability, good disturbance rejection, and small tracking error [5]. Several industrial robot manipulators are controlled by linear methodologies (e.g., Proportional-Derivative (PD) controller, Proportional- Integral (PI) controller or Proportional- Integral-Derivative (PID) controller), but when robot manipulator works with various payloads and have uncertainty in dynamic models this technique has limitations. From the control point of view, uncertainty is divided into two main groups: uncertainty in unstructured inputs (e.g., noise, disturbance) and uncertainty in structure dynamics (e.g., payload, parameter variations). In some applications robot manipulators are used in an unknown and unstructured environment, therefore strong mathematical tools used in new control methodologies to design nonlinear robust controller with an acceptable performance (e.g., minimum error, good trajectory, disturbance rejection). Sliding mode controller (SMC) is a significant nonlinear controller under condition of partly uncertain dynamic parameters of system. This controller is used to control of highly nonlinear systems especially for robot manipulators, because this controller is a robust and stable [11-30]. Conversely, pure sliding mode controller is used in many applications; it has two important drawbacks namely; chattering phenomenon, and nonlinear equivalent dynamic formulation in uncertain dynamic parameter. The chattering phenomenon problem can be reduced by using linear saturation boundary layer function in sliding mode control law [3150]. Lyapunov stability is proved in pure sliding mode controller based on switching (sign) function. The nonlinear equivalent dynamic formulation problem in uncertain system can be
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solved by using artificial intelligence theorem or online tuning methodology. Fuzzy logic theory is used to estimate the system dynamic. However fuzzy logic controller is used to control complicated nonlinear dynamic systems, but it cannot guarantee stability and robustness. Pure sliding mode controller has difficulty in handling unstructured model uncertainties. It is possible to solve this problem by combining sliding mode controller and adaption law which this method can helps improve the system’s tracking performance by online tuning method [51-61]. To have high implementation speed, small size device and high speed processing, FPGA is introduced to design FPGA-based mathematical error-based tuning sliding mode controller because FPGA has parallel architecture. FPGAs Xilinx Spartan 3E families are one of the most powerful flexible Hardware Language Description (HDL) programmable IC’s. To have the high speed processing FPGA based sliding mode controller in Xilinx ISE 9.1 is designed and implemented [62-63].
2. Literature Review Chattering phenomenon can causes some problems such as saturation and heats the mechanical parts of robot arm or drivers. To reduce or eliminate the oscillation, various papers have been reported by many researchers which one of the best method is; boundary layer saturation method [1]. In boundary layer linear saturation method, the basic idea is the discontinuous method replacement by linear continuous saturation method with small neighborhood of the switching surface. This replacement caused to considerable chattering reduction. Slotine and Sastry have introduced boundary layer method instead of discontinuous method to reduce the chattering [21]. Slotine has presented sliding mode controller with boundary layer to improve the industry application [22]. Palm has presented a fuzzy method to nonlinear approximation instead of linear approximation inside the boundary layer to improve the chattering and control the result performance [23]. Moreover, Weng and Yu improved the previous method by using a new method in fuzzy nonlinear approximation inside the boundary layer and adaptive method [24]. Control of robot arms using conventional controllers are based on robot arm dynamic modelling. These controllers often have many problems for modelling. Conventional controllers require accurate information of dynamic model of robot arms. When the system model is unknown or when it is known but complicated, it is difficult or impossible to use conventional mathematics to process this model [32]. In various dynamic parameters systems that need to be training on-line, adaptive control methodology is used. Mathematical model free adaptive method is used in systems which want to training parameters by performance knowledge. In this research in order to solve disturbance rejection and uncertainty dynamic parameter, adaptive method is applied to sliding mode controller. Mohan and Bhanot [40] have addressed comparative study between some adaptive fuzzy, and a new hybrid fuzzy control algorithm for robot arm control. They found that self-organizing fuzzy logic controller and proposed hybrid integrator fuzzy give the best performance as well as simple structure. Temeltas [46] has proposed fuzzy adaption techniques for VSC to achieve robust tracking of nonlinear systems and solves the chattering problem. Conversely system’s performance is better than sliding mode controller; it is depended on nonlinear dynamic equqation. Hwang et al. [47] have proposed a Tagaki-Sugeno (TS) fuzzy model based sliding mode controller based on N fuzzy based linear state-space to estimate the uncertainties. A MIMO FVSC reduces the chattering phenomenon and reconstructs the approximate the unknown system has been presented for a nonlinear system [42]. Yoo and Ham [58] have proposed a MIMO fuzzy system to help the compensation and estimation the torque coupling. This method can only tune the consequence part of the fuzzy rules. Medhafer et al. [59] have proposed an indirect adaptive fuzzy sliding mode controller to
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control nonlinear system. This MIMO algorithm, applies to estimate the nonlinear dynamic parameters. Compared with the previous algorithm the numbers of fuzzy rules have reduced by introducing the sliding surface as inputs of fuzzy systems. Guo and Woo [60]have proposed a SISO fuzzy system compensate and reduce the chattering. Lin and Hsu [61] can tune both systems by fuzzy rules. Eksin et. al [83] have designed mathematical model-free sliding surface slope in fuzzy sliding mode controller. In above method researchers are used saturation function instead of switching function therefore the proof of stability is very difficult. FPGA can be used in wide range area because it is a flexible, technology independent, higher performance, high operation speed, low cost hardware, and fast prototyping [62]. However FPGA has many advantages but one of the most important drawbacks is capacity limitation. In this works design FPGA-based sliding mode controller by Xilinx ISE 9.2 is presented. Research on FPGA-based control of systems is considerably growing as their applications such as industrial automation, robotic surgery and space station's robot arm demand more accuracy, reliability, high performance. For instance, the FPGA-based controls of robot manipulator have been reported in [62-69]. Shao and Sun [63]have proposed an adaptive control algorithm based on FPGA for control of SCARA robot manipulator. They are designed this controller into two micro base controller, the linear part controller is implemented in the FPGA and the nonlinear estimation controller is implemented in DSP. Moreover this controller is implemented in a Xilinx-FPGA XC3S400 with the 20 KHz position loop frequency. The FPGA based servo control and inverse kinematics for Mitsubishi RV-M1 micro robot is presented in [64, 66] which to reduce the limitation of FPGA capacitance they are used 42 steps finite state machine (FSM) in 840 n second. Meshram and Harkare [67-68] have presented a multipurpose FPGA-based 5 DOF robot manipulator using VHDL coding in Xilinx ISE 11.1. This controller has two most important advantages: easy to implement and flexible. Zeyad Assi Obaid et al. [70] have proposed a digital PID fuzzy logic controller using FPGA for tracking tasks that yields semi-global stability of all closed-loop signals. The basic information about FPGA have been reported in [62, 68-72]. A review of design and implementation of FPGA-based systems has been presented in [62]. The FPGA-based sliding mode control of systems has been reported in [7376]. Lin et al. [73] have presented low cost and high performance FPGA-based fuzzy sliding mode controller for linear induction motor with 80% of flip flops. The fuzzy inference system has 2 inputs and one output with nine rules. Ramos et al. [74] have reported FPGA-based fixed frequency quasi sliding mode control algorithm to control of power inverter. Their proposed controller is implemented in XC4010E-3-PC84 FPGA from XILINX with acceptable experimental and theoretical performance. FPGA-based robust adaptive backstepping sliding mode control for verification of induction motor is reported in [73]. A FPGA chip is programmed by Hardware Description Language (HDL) which contains two types of languages, Very High Description Language (VHDL) and Verilog. VHDL is one of the powerful programming languages that can be used to describe the hardware design. VHDL was developed by the Institute of Electrical and Electronics Engineers (IEEE) in 1987 and Verilog was developed by Gateway Design Automation in 1984 [62, 71]. This research focuses on FPGA-based sliding mode control of robot manipulator and it is implemented in XA3S1600E FPGA from Xilinx in Xilinx-ISE 9.2i software using VHDL code. Problem Statements: One of the significant challenges in control algorithms is a linear behavior controller design for nonlinear systems (e.g., robot manipulator). Some of robot manipulators which work in industrial processes are controlled by linear PID controllers, but the design of linear controller for robot manipulators is extremely difficult because they are hardly nonlinear and uncertain [1-2, 6]. To reduce the above challenges, the nonlinear robust
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controller is used to control of robot manipulator. Sliding mode controller is a powerful nonlinear robust controller under condition of partly uncertain dynamic parameters of system [7]. This controller is used to control of highly nonlinear systems especially for robot manipulators. Chattering phenomenon and nonlinear equivalent dynamic formulation in uncertain dynamic parameter are two main drawbacks in pure sliding mode controller [20]. The chattering phenomenon problem in pure sliding mode controller is reduced by using linear saturation boundary layer function but prove the stability is very difficult. In this research the nonlinear equivalent dynamic formulation problem and chattering phenomenon in uncertain system is solved by using on-line tuning theorem [8]. To estimate the system dynamics, mathematical error-based sliding mode controller is designed. Pure sliding mode controller has difficulty in handling unstructured model uncertainties. It is possible to solve this problem by combining sliding mode controller and mathematical error-based tuning. This method is based on resolve the on line sliding surface gain ( ) as well as improve the output performance by tuning the sliding surface slope updating factor ( ). Mathematical errorbased tuning sliding mode controllers is stable model-free controller and eliminates the chattering phenomenon without to use the boundary layer saturation function. Lyapunov stability is proved in mathematical error-based tuning fuzzy sliding mode controller based on switching (sign) function. To have high implementation speed, small size device and high speed processing, FPGA is introduced to design FPGA-based mathematical error-base sliding mode controller because FPGA has parallel architecture. FPGAs Xilinx Spartan 3E families are one of the most powerful flexible Hardware Language Description (HDL) programmable IC’s. To have the high speed processing FPGA based sliding mode controller in Xilinx ISE 9.1 is designed and implemented. Section 2, is served as an introduction to the sliding mode controller formulation algorithm and its application to control of robot manipulator. Part 3, introduces and describes the methodology (design PFGA-based mathematical error-based sliding mode controller) algorithms and proves Lyapunov stability. Section 4 presents the simulation results and discussion of this algorithm applied to a robot arm and the final section is describing the conclusion.
3. Theorem: Dynamic Formulation of Robotic Manipulator, Sliding Mode Formulation Applied to Robot Arm, Proof of Stability and Applied to XILINX-FPGA Dynamic of Robot Arm: The equation of an n-DOF robot manipulator governed by the following equation [1, 4, 15-29, 63-74]: (1) Where τ is actuation torque, M (q) is a symmetric and positive define inertia matrix, is the vector of nonlinearity term. This robot manipulator dynamic equation can also be written in a following form [1-29]: (2) Where B(q) is the matrix of coriolios torques, C(q) is the matrix of centrifugal torques, and G(q) is the vector of gravity force. The dynamic terms in equation (2) are only manipulator position. This is a decoupled system with simple second order linear differential dynamics. In other words, the component influences, with a double integrator relationship, only the joint variable , independently of the motion of the other joints. Therefore, the angular acceleration is found as to be [3, 41-62]:
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(3) This technique is very attractive from a control point of view. Sliding Mode Methodology: Consider a nonlinear single input dynamic system is defined by [6]: (4) Where u is the vector of control input, is the derivation of , is the state vector, is unknown or uncertainty, and is of known sign function. The main goal to design this controller is train to the desired state; , and trucking error vector is defined by [6]: (5) A time-varying sliding surface
in the state space
is given by [6]: (6)
where λ is the positive constant. To further penalize tracking error, integral part can be used in sliding surface part as follows [6]:
The main target in this methodology is kept the sliding surface slope zero. Therefore, one of the common strategies is to find input outside of
(7)
near to the [6]. (8)
where ζ is positive constant. (9)
If S(0)>0 To eliminate the derivative term, it is used an integral term from t=0 to t=
(10)
S(
Where
is the time that trajectories reach to the sliding surface so, suppose defined as (11)
and (12) Equation (12) guarantees time to reach the sliding surface is smaller than trajectories are outside of
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(13) suppose S is defined as (14) The derivation of S, namely,
can be calculated as the following; (15)
suppose the second order system is defined as; (16) Where is the dynamic uncertain, and also since approximation , is defined as
, to have the best (17)
A simple solution to get the sliding condition when the dynamic parameters have uncertainty is the switching control law: (18) where the switching function
is defined as [1, 6] (19)
and the as,
is the positive constant. Suppose by (8) the following equation can be written (20)
and if the equation (12) instead of (11) the sliding surface can be calculated as (21) in this method the approximation of
is computed as [6] (22)
Based on above discussion, the sliding mode control law for a multi degrees of freedom robot manipulator is written as [1, 6]: (23) Where, the model-based component is the nominal dynamics of systems and first 3 DOF PUMA robot manipulator can be calculate as follows [1]:
for (24)
and
is computed as [1]; (25)
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by replace the formulation (25) in (23) the control output can be written as; (26) By (26) and (24) the sliding mode control of PUMA 560 robot manipulator is calculated as; (27) where
in PD-SMC and
in PID-SMC.
Proof of Stability: the lyapunov formulation can be written as follows, (28) the derivation of
can be determined as, (29)
the dynamic equation of IC engine can be written based on the sliding surface as (30) it is assumed that (31) by substituting (30) in (29) (32) suppose the control input is written as follows (33) by replacing the equation (33) in (32) (34)
+
+ −
it is obvious that (35) the Lemma equation in robot arm system can be written as follows (36) the equation (11) can be written as (37) therefore, it can be shown that
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(38) Consequently the equation (38) guaranties the stability of the Lyapunov equation. Figure 1 is shown pure sliding mode controller, applied to robot arm. Field Programmable Gate Array (FPGA): A Field Programmable Gate Array (FPGAs) is a small Field Programmable Device (FPD) that supports thousands of logic gates. Research on FPGA is significantly growing as their applications such as Fast Fourier Transforms (FFT), Discrete Cosine Transforms (DCT), convolution, robotic system, Finite Impulse Response (FIR) filters, power electronics and nonlinear control systems. FPGA is a high speed, low cost, short time to market and small device size. Several semiconductor vendors provide a wide range of FPGAs such as Xilinx, Altera, Atmel and Lattice that each one has own unique architecture. Xilinx and Altera are two well known companies in the silicon technology market. These two companies are the best indicator of FPGA for universities and for giant companies developing digital technology [62]. FPGA was invented by Xilinx Company which this company is the leaders in this technology and the biggest name in the FPGA world. However Xilinx simply can support intermediate generated files but most of FPGA based designer worried about the generated the following files i.e. generated by IP cores, SOF, POF and RBF file programming, and Xilinx settings file which they can settings all part of project [82]. Altera tools are used as a Graphical User Interface (GUI) more than Xilinx which GUI area is more user-friendly for users. Check the delay on the segment in Altera is based on cheap viewer which this part is very helpful. A FPGA chip is programmed by Hardware Description Language (HDL) which contains two types of languages, Very High Description Language (VHDL) and Verilog. VHDL is one of the powerful programming languages that can be used to describe the hardware design. VHDL was developed by the Institute of Electrical and Electronics Engineers (IEEE) in 1987 and Verilog was developed by Gateway Design Automation in 1984 [62, 71]. This research focuses on FPGA-based sliding mode control of robot manipulator and it is implemented in XA3S1600E FPGA from Xilinx in Xilinx-ISE 9.2i software using VHDL code. The introduction of language and architecture of Xilinx FPGA such as VHDL or Verilog in sliding mode control of robot arm will be investigated in this section. The Xilinx Spartan 3E FPGAs has 5 major blocks: Configurable Logic Blocks (CLBs), standard and high speed Input/output Blocks (IOBs), Block RAM’s (BRAMs), Multipliers Blocks, and Digital Clock Managers (DCMs). CLBs is include flexible look up tables (LUTs) to implement memory (storage element) and logic gates. There are 4 slices per CLB each slice has two LUT’s. IOB does control the rate of data between input/output pins and the internal logic gates or elements. It supports bidirectional data with three state operation and multiplicity of signal standards. BRAMs require the data storage including 18-Kbit dual-port blocks. Product two 18-bit binary numbers is done by multiplier blocks. Self-calibrating, digital distributing solution, delaying, multiplying, dividing and phase-shift clock signal are done by DCM [72].
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Figure 1: Block Diagram of a Sliding Mode Controller: Applied to Robot Arm
4. Methodology: Design FPGA-based Mathematical Error-based Chattering Free Sliding Mode Controller with Switching Function Sliding mode controller has difficulty in handling unstructured model uncertainties. It is possible to solve this problem by combining sliding mode controller and mathematical errorbased tuning method which this method can helps to eliminate the chattering in presence of switching function method and improves the system’s tracking performance by online tuning method. In this research the nonlinear equivalent dynamic (equivalent part) formulation problem in uncertain system is solved by using on-line mathematical error-based tuning theorem. In this method mathematical error-based theorem is applied to sliding mode controller to estimate the nonlinear equivalent part. Sliding mode controller has difficulty in handling unstructured model uncertainties and this controller’s performance is sensitive to sliding surface slope coefficient. It is possible to solve above challenge by combining mathematical error-based tuning method and sliding mode controller which this methodology can help to improve system’s tracking performance by on-line tuning (mathematical errorbased tuning) method. Based on above discussion, compute the best value of sliding surface slope coefficient has played important role to improve system’s tracking performance especially when the system parameters are unknown or uncertain. This problem is solved by tuning the surface slope coefficient ( ) of the sliding mode controller continuously in realtime. In this methodology, the system’s performance is improved with respect to the classical sliding mode controller. Figure 2 shows the mathematical error-based tuning sliding mode controller. Based on (23) and (27) to adjust the sliding surface slope coefficient we define as the fuzzy based tuning.
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Figure 2. Block Diagram of a Mathematical Error-based Sliding Mode Controller: Applied to Robot Arm (39) If minimum error ( ) is defined by; (40) Where is adjusted by an adaption law and this law is designed to minimize the error’s parameters of adaption law in mathematical error-based tuning sliding mode controller is used to adjust the sliding surface slope coefficient. Mathematical error-based tuning part is a supervisory controller based on the following formulation methodology. This controller has three inputs namely; error change of error ( ) and the second derivative of error ( ) and an output namely; gain updating factor . As a summary design a mathematical error-based tuning is based on the following formulation: +C
(41)
Where is gain updating factor, ( ) is the second derivative of error, ( ) is change of error, is error and C is a coefficient. FPGA supports thousands of gates; it has high operational speed, accurate in response, low cost, short time to market and small size device. As shown in Figure 2, FPGA-based mathematical error-based sliding mode controller divided into two main parts: switching part and equivalent part. Figure 3 shows the discontinuous RTL and VHDL schematic. The first part is focoused on the error compute after that derivation of error is calculated and error multiple by constant coefficient moreover these two
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parts are added to compute the sliding surface slope . Last part is focused on compute the discontinuous torque with respect to switching function to eliminate the chattering.
Figure 3. RTL to Design Discontinuous Part The table 1 indicates the Summary of XA Spartan-3E FPGA Attributes. After implementation mathematical error-based tuning sliding mode controller the most significant resources are; the LUT’s (610 out of 29504), CLB (77 out of 3688), Slice (305 out of 14752), Multipliers (27 out of 36), registers (397), and Block RAM memory (648 K) which there are 4 slices per CLB, each slice has two LUT’s. So, Number of 4 input LUTs=610, slices,
CLB’s, 610 registers and as a Map report Peak memory usage is 175 MB and
registers in the XA3S1600E FPGA. Table 2 demonstrates the FPGA-based sliding mode controller operation summary applied to XA3S1600E-spartan. Table 1. Summary of XA Spartan-3E FPGA Attributes [82]
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Table 2. XA3S1600E Device Utilization Summaries
The most important contributions in this section are: the successful implementation of pure sliding mode controller for PUMA 560 robot manipulator in a XA3S1600E FPGA and the successful application of FPGA-based controller to position control of robot manipulator. Proof of Stability: The Lyapunov function in this design is defined as (42)
where
is a positive coefficient,
parameter. Since
,
is minimum error and
is adjustable
is skew-symetric matrix; (43)
If the dynamic formulation of robot manipulator defined by (44) the controller formulation is defined by (45) According to (43) and (44) (46) Since (47)
The derivation of V is defined
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(48)
Based on (46) and (47) (49)
where
suppose
is defined as follows (50)
according to 48 and 49; (51)
Based on (52)
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where
is adaption law,
is considered by (53)
The minimum error is defined by (54)
Therefore
is computed as (55)
(56)
For continuous function
, and suppose
it is defined the fuzzy logic
system in form of (57) the minimum approximation error
is very small.
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(58)
5. Results Pure sliding mode controller has difficulty in handling unstructured model uncertainties. It is possible to solve this problem by combining sliding mode controller and mathematical error-based tuning in a single IC chip or combining sliding mode controller by fuzzy logic method (FSMC). These methods can improve the system’s tracking performance by online tuning method or soft computing method. Proposed method is based on resolve the on line sliding surface slope as well as improve the output performance by tuning the sliding surface slope coefficient. The sliding surface gain ( ) of this controller is adjusted online depending on the last values of error , change of error ( ) and power two of derivative of error ( ) by sliding surface slope updating factor ( . Fuzzy sliding mode controller is based on applied fuzzy logic in sliding mode controller to estimate the dynamic formulation in equivalent part. Mathematical error-based tuning sliding mode controller is stable model-based controller which does not need to limits the dynamic model of robot manipulator and eliminate the chattering phenomenon without to use the boundary layer saturation function. This section is focused on compare between Sliding Mode Controller (SMC), Fuzzy Sliding Mode Controller (FSMC) and FPGA-based mathematical error-based tuning Sliding Mode Controller (MTSMC). These controllers were tested by step responses. In this simulation, to control position of PUMA robot manipulator the first, second, and third joints are moved from home to final position without and with external disturbance. The simulation was implemented in Matlab/Simulink environment. trajectory performance, torque performance, disturbance rejection, steady state error and RMS error are compared in these controllers. These systems are tested by band limited white noise with a predefined 10%, 20% and 40% of relative to the input signal amplitude. This type of noise is used to external disturbance in continuous and hybrid systems and applied to nonlinear dynamic of these controllers. Trajectory: Tracking performances: Based on (27) in sliding mode controller; controllers performance are depended on the gain updating factor ( ) and sliding surface slope coefficient ( ). These two coefficients are computed by trial and error in SMC. The best possible coefficients in step FSMC are; and the best possible coefficients in step SMC are; . In mathematical error-based tuning sliding mode controller the sliding surface gain is adjusted online depending on the last values of error , change of error ( ) and the second derivation of error ( ) by sliding surface slope updating factor ( . Figure 4 shows tracking performance in mathematical error-based tuning sliding mode controller (MTSMC), fuzzy sliding mode controller (FSMC) and SMC without disturbance for step trajectory.
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Figure 4. FSMC, MTSMC, Desired Input and SMC for First, Second and Third Link Step Trajectory Performance without Disturbance Based on Figure 4 it is observed that, the overshoot in MTSMC is 0%, in SMC’s is 1% and in FSMC’s is 0%, and rise time in MTSMC’s is 0.6 seconds, in SMC’s is 0.483 second and in FSMC’s is about 0.6 seconds. From the trajectory MATLAB simulation for MTSMC, SMC and FSMC in certain system, it was seen that all of three controllers have acceptable performance. Disturbance rejection: Figures 5 to 7 show the power disturbance elimination in MTSMC, SMC and FSMC with disturbance for step trajectory. The disturbance rejection is used to test the robustness comparisons of these three controllers for step trajectory. A band limited white noise with predefined of 10%, 20% and 40% the power of input signal value is applied to the step trajectory. It found fairly fluctuations in SMC and FSMC trajectory responses.
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Figure 5. Desired Input, MTSMC, FSMC and SMC for First, Second and Third Link Trajectory with 10% External Disturbance: Step Trajectory Based on Figure 5; by comparing step response trajectory with 10% disturbance of relative to the input signal amplitude in MTSMC, FSMC and SMC, MTSMC’s overshoot about (0%) is lower than FSMC’s (0.5%) and SMC’s (1%). SMC’s rise time (0.5 seconds) is lower than FSMC’s (0.63 second) and MTSMC’s (0.65 second). Besides the Steady State and RMS error in MTSMC, FSMC and SMC it is observed that, error performances in MTSMC (Steady State error =1.08e-12 and RMS error=1.5e-12) are bout lower than FSMC (Steady State error =1.08e-6 and RMS error=1.5e-6) and SMC’s (Steady State error=1.6e-6 and RMS error=1.9e-6).
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Figure 6. Desired Input, MTSMC, FSMC and SMC for First, Second and Third Link Trajectory with 20% External Disturbance: Step Trajectory Based on Figure 6; by comparing step response trajectory with 20% disturbance of relative to the input signal amplitude in MTSMC, FSMC and SMC, MTSMC’s overshoot about (0%) is lower than FSMC’s (1.8%) and SMC’s (2.1%). SMC’s rise time (0.5 seconds) is lower than FSMC’s (0.63 second) and MTSMC’s (0.66 second). Besides the Steady State and RMS error in FTFSMC, FSMC and PD-SMC it is observed that, error performances in MTSMC (Steady State error =1.2e-12 and RMS error=1.8e-12) are about lower than FSMC (Steady State error =1.7e-5 and RMS error=2e-5) and SMC’s (Steady State error=1.8e-5 and RMS error=2e-5). Based on Figure 6, it was seen that, MTSMC’s performance is better than FSMC and SMC because MTSMC can auto-tune the sliding surface slope coefficient as the dynamic manipulator parameter’s change and in presence of external disturbance whereas FSMC and SMC cannot.
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Figure 7. Desired Input, MTSMC, FSMC and SMC for First, Second and Third Link Trajectory with 40% External Disturbance: Step Trajectory Based on Figure 7; by comparing step response trajectory with 40% disturbance of relative to the input signal amplitude in MTSMC, SMC and FSMC, MTSMC’s overshoot about (0%) is lower than FSMC’s (6%) and PD-SMC’s (8%). SMC’s rise time (0.5 seconds) is lower than FSMC’s (0.7 second) and MTSMC’s (0.8 second). Besides the Steady State and RMS error in MTSMC, FSMC and SMC it is observed that, error performances in MTSMC (Steady State error =1.3e-12 and RMS error=1.8e-12) are about lower than FSMC (Steady State error =10e-4 and RMS error=0.69e-4) and SMC’s (Steady State error=10e-4 and RMS error=11e-4). Based on Figure 7, FSMC and SMC have moderately oscillation in trajectory response with regard to 40% of the input signal amplitude disturbance but MTSMC has stability in trajectory responses in presence of uncertainty and external disturbance. Based on Figure 7 in presence of 40% unstructured disturbance, MTSMC’s is more robust than FSMC and SMC because MTSMC can auto-tune the sliding surface slope coefficient as the dynamic manipulator parameter’s change and in presence of external disturbance whereas FSMC and SMC cannot. Torque performance: Figures 8 and 9 have indicated the power of chattering rejection in MTSMC, SMC and FSMC with 40% disturbance and without disturbance.
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Figure 8. MTSMC, SMC and FSMC for First, Second and third Link Torque Performance without Disturbance Figure 8 shows torque performance for first three links PUMA robot manipulator in MTSMC, SMC and FSMC without disturbance. Based on Figure 8, MTSMC, SMC and FSMC give considerable torque performance in certain system and all three of controllers eliminate the chattering phenomenon in certain system. Figure 9 has indicated the robustness in torque performance for first three links PUMA robot manipulator in MTSMC, SMC and FSMC in presence of 40% disturbance. Based on Figure 9, it is observed that SMC and FSMC controllers have oscillation but MTSMC has steady in torque performance. This is mainly because pure SMC with saturation function and fuzzy sliding mode controller with saturation function are robust but they have limitation in presence of external disturbance. The MTSMC gives significant chattering elimination when compared to FSMC and SMC. This elimination of chattering phenomenon is very significant in presence of 40% disturbance. This challenge is one of the most important objectives in this research.
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Figure 9. MTSMC, SMC and FSMC for First, Second and Third Link Torque Performance with40% Disturbance Based on Figure 9 it is observed that, however mathematical tuning error-based sliding mode controller (MTSMC) is a model-based controller that estimate the nonlinear dynamic equivalent formulation by system’s performance but it has significant torque performance (chattering phenomenon) in presence of uncertainty and external disturbance. SMC and FSMC have limitation to eliminate the chattering in presence of highly external disturbance (e.g., 40% disturbance) but MTSMC is a robust against to highly external disturbance. Steady state error: Figure 10 is shown the error performance in MTSMC, SMC and FSMC for first three links of PUMA robot manipulator. The error performance is used to test the disturbance effect comparisons of these controllers for step trajectory. All three joint’s inputs are step function with the same step time (step time= 1 second), the same initial value (initial value=0) and the same final value (final value=5). Based on Figure 4, MTSMC’s rise time is about 0.6 second, SMC’s rise time is about 0.483 second and FSMC’s rise time is about 0.6 second which caused to create a needle wave in the range of 5 (amplitude=5) and the different width. In this system this time is transient time and this part of error introduced as a transient error. Besides the Steady State and RMS error in MTSMC, FSMC and SMC it is observed that, error performances in MTSMC (Steady State error =0.9e-12 and RMS error=1.1e-12) are about lower than FSMC (Steady State error =0.7e-8 and RMS error=1e-7) and SMC’s (Steady State error=1e-8 and RMS error=1.2e-6).
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Figure 10. MTSMC, SMC and FSMC for First, Second and Third Link Steady State Error without Disturbance: Step Trajectory The MTSMC gives significant steady state error performance when compared to FSMC and SMC. When applied 40% disturbances in MTSMC the RMS error increased approximately 0.0164% (percent of increase the MTSMC RMS ), in FSMC the RMS error increased error= approximately 6.9% (percent of increase the FSMC RMS error= )in SMC the RMS error increased approximately 9.17% (percent of increase the PD-SMC RMS error= ). In this part MTSMC, SMC and FSMC have been comparatively evaluation through MATLAB simulation, for PUMA robot manipulator control. It is observed that however MTSMC is independent of nonlinear dynamic equation of PUMA 560 robot manipulator but it can guarantee the trajectory following and eliminate the chattering phenomenon in certain systems, structure uncertain systems and unstructured model uncertainties by online tuning method. Timing Detail: As a simulation result in XILINX ISE 9.1, it is observed that; this controller is able to make as a fast response at 15.716 clock period with 63.29 of a maximum frequency and 4.407 for minimum input arrival time after clock. From investigation and synthesis summary, 30.286 for maximum input arrival time after clock with 33.018 frequencies, this design has 15.716 delays for each controller to 46 logic elements and also the offset before CLOCK is 55.773 for 132 logic gates. Figure 11 has indicated the displacement, error performance, teta discontinuous (torque performance) at different
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time. All three joint’s inputs are step function with the same step time (step time= 6 micro second), the same initial value (initial value=0) and the same final value (final value=5).
Figure 11. FPGA-based MTSMC for First, Second and Third Link for Desired and Actual Inputs, Error Performance, and Torque Performance in 11.5 . As shown in Figure 11 at 11.5 (steady state response), the actual response is close to desired response therefore the FPGA-based MTSMC steady State error is , the desired displacement is 5, the actual displacement is 5.000062 and the torque performance is 0.78 N.m.
6. Conclusion Refer to this research, a position FPGA-based mathematical error-based tuning sliding mode controller (MTSMC) is proposed for PUMA robot manipulator. Pure sliding mode controller with saturation function and fuzzy sliding mode controller with saturation function have difficulty in handling unstructured model uncertainties. It is possible to solve this problem by combining fuzzy sliding mode controller and mathematical error-based tuning. Since the sliding surface gain ( ) is adjusted by mathematical error-based tuning method, it is nonlinear and continuous. The sliding surface slope updating factor ( ) of mathematical error-based tuning part can be changed with the changes in error, change of error and the second change of error. Sliding surface gain is adapted on-line by sliding surface slope updating factor. In pure sliding mode controller and fuzzy sliding mode controller the sliding surface gain is chosen by trial and error, which means pure sliding mode controller and errorbased fuzzy sliding mode controller have to have a prior knowledge of the system uncertainty. If the knowledge is not available error performance and chattering phenomenon are go up. In mathematical error-based tuning sliding mode controller the sliding surface gain are updated on-line to compensate the system unstructured uncertainty. The stability and convergence of the mathematical error-based tuning sliding mode controller based on switching function is guarantee and proved by the Lyapunov method. The simulation results exhibit that the mathematical error-based tuning sliding mode controller works well in various situations. Based on theoretical and simulation results, it is observed that mathematical errorbased tuning sliding mode controller is a model-based stable control for robot manipulator. It is a best solution to eliminate chattering phenomenon with saturation function in structure and
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unstructured uncertainties. To have the high speed processing, FPGA based mathematical error-based sliding mode controller is designed and implemented. As a timing report after simulation result in XILINX ISE 9.1, it is observed that this controller is able to make as a fast response at 15.716 clock period with 63.29 of a maximum frequency and 4.407 for minimum input arrival time after clock. From investigation and synthesis summary, 30.286 for maximum input arrival time after clock with 33.018 frequencies, this design has 15.716 delays for each controller to 46 logic elements and also the offset before for 132 logic gates. CLOCK is 55.773
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Authors Farzin Piltan is research head manager of Sanaat Kade Sabz Pasargad (SSP. Co) research center, IRAN, which this company persuades to research and development of innovative technology through excellence in education, research and development. His current research is interested including nonlinear control, artificial control system and applied nonlinear controller in FPGA. He also has more than 30 publications in 2011.
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Iman Nazari is an expert control and automation engineer of SSP Co. research center. His current research interests including control & automation and robotics.
Sobhan Siamak is an expert artificial intelligence engineer of SSP Co. research center. His current research interests including artificial intelligence, nonlinear control and optimization.
Payman Ferdosali is an expert control and automation engineer of SSP Co. research center. His current research interests including real time systems, on-line tuning, Control and optimization.
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118
Refrences:
[1] Farzin Piltan, N. Sulaiman, M. H. Marhaban, Adel Nowzary & Mostafa Tohidian.“Design of FPGA-based Sliding Mode Controller for Robot Manipulator”, International Journal of Robotic and Automation,2 (3): 183-204, 2011 [2] Farzin Piltan, Atefe Gavahian, N. Sulaiman & M. H. Marhaban.“Novel Sliding Mode Controller for Robot Manipulator using FPGA”,Journal of Advanced Science & Engineering Research, 1 (1): 115-123, 2011 [3] Farzin Piltan, N. Sulaiman, Amin Jalali & Koorosh Aslansefat,“Evolutionary Design of
Mathematical tunable FPGA Based MIMO Fuzzy Estimator Sliding Mode Based Lyapunov Algorithm: Applied to Robot Manipulator”, International Journal of Robotics and Automation,2
(5):317-343, 2011
[4] Farzin Piltan, Iman Nazari, Sobhan Siamak, Payman Ferdosali,“Methodology of FPGA-Based Mathematical error-Based Tuning Sliding Mode Controller”,International Journal of Control and Automation, 5(1), 89-118, 2012
BIODATA OF AUTHOR
Farzin Piltan was born on 1975, Shiraz, Iran. In 2004 he is jointed the research and development company, SSP Co, Shiraz, Iran. In addition to 7 textbooks, Farzin Piltan is the main author of more than 50 scientific papers in refereed journals. He is
editorial board of
international journal of control and automation (IJCA), International Journal of Intelligent System and Applications (IJISA), IAES international journal of robotics and automation, International Journal of Reconfigurable and Embedded Systems and reviewer of (CSC) international journal of robotics and automation. His main areas of
research interests are
nonlinear control, artificial control system and applied to FPGA, robotics and artificial nonlinear control and IC engine modeling and control. Website: www.iranssp.com Email:
[email protected] 
