Discrete Bandwidth, Nonblocking, Multirate Switching in 3-Stage Clos ...

Discrete Bandwidth, Nonblocking, Multirate Switching in 3-Stage Clos Networks Wojciech Kabacinski










































and 









Institute of Electronics and Telecommunications ul. Piotrowo 3a, 60-965 [email protected]. 























Abstract – This paper investigates the strictly non-blocking switching operation of generalised, three-stage Clos switching networks in a multirate environment. The analysis done in this paper determines the minimum number of middle stage switches required for the strictly non-blocking operation of such switches. Both sufficient and necessary conditions are proved for the discrete bandwidth case, although the results obtained may be extended for the continuous bandwidth case as well.

I. INTRODUCTION In the design of Broadband Integrated Services Digital switching Networks (B-ISDN), based on ATM technology, the decision whether to accept a new connection or not is made up by the Call Admission Control (CAC) function. The problem of CAC in connection-oriented ATM switching may be addressed by a concept known as the effective or equivalent bandwidth of a connection (or call) [2]. In this concept an appropriate effective bandwidth is assigned to each connection and each connection is treated as if it required this effective bandwidth throughout the active period of the connection. The effective bandwidth of the connection is usually some value between its average rate and its peak rate. A given set of connections can be admitted, provided that the sum of the effective bandwidths is less than or equal to the total available bandwidth of the connection path. Since a multitude of possible connection magnitudes can be accommodated, we consider the switching operation in a multirate environment, which also supports broadband integrated service switching. The problem of admitting an incoming call in such a multirate switching environment concerns not only links between switching nodes in the network, but also the switching fabric. In the switching node, such a switching fabric may be composed of several stages of elements called ATM switching modules, or simply ATM switches. The process of deciding whether a new connection can be accommodated in the switching fabric may be time consuming, incurring substantial computational overhead and it may fail due to the blocking state of the switching fabric. These computations may be reduced, if the switching fabric is non-blocking. In such a switching fabric, when a new call can be accommodated in the input link, and it can be accommodated in the output link, then it can be accommodated in the switching fabric [3]. Moreover, in blocking switching

Fotios K. Liotopoulos Computer Technology Institute Akteou 11 & Poulopoulou, Thesseo 11851 Athens, GREECE [email protected]

fabrics, where the routing of an admitted connection requires rearrangements of existing connections, more complex hardware and more computationally intensive rearrangement and routing algorithms are required. The cost we pay for non-blocking switching is additional hardware resources, (e.g. additional middle-stage switching modules in three-stage Clos switches). But this cost can most of the times be tolerated, since replicating a commonly used switching module in a regular structure is not very hard or very costly after all, especially with the mass production of switching modules. One of the first non-blocking switching networks was the crossbar switch. In 1953, C. Clos proposed a class of space-division three-stage switching networks, and proved strictly non-blocking conditions of such networks [6]. The theory of non-blocking switching networks was later extended to time-division, as well as multirate switching networks. Three-stage time-division switching networks, composed of digital matrices, were proposed by Charransol et al. [4]. Non-blocking conditions for such switching networks were proved by A. Jajszczyk [8]. Non-blocking operation of time-division three-stage switching networks in the case, when one connection may occupies more than one channel (i.e., multi-channel switching) were considered in [9], [13]. In the case of multirate switches, an elegant model was proposed by Melen and Turner [14]. They also proved an upper bound of non-blocking conditions in the case of continuous bandwidth. This upper bound was later improved by Chung and Ross [5]. Asymmetrical switch configurations were considered in [7]. More generalised three-stage Clos switching networks were considered by Liotopoulos and Chalasani [11], [12]. The results obtained in cited papers were limited to b = 0 or B ∈ (1 – b, β]. Both sufficient and necessary non-blocking conditions for any B and b > 0 in the case of symmetrical three-stage Clos switches were proved in [10]. In this paper, non-blocking conditions for a generally asymmetrical multirate three-stage Clos switching network are considered. The results given are in some cases generalisation of known results, but they also include new results. The paper is organised as follows. In Section 2, the model used in this paper is described. In Section 3, nonblocking conditions for a three-stage Clos switch, operating in a multirate environment, are given and proved for the discrete bandwidth case. Both sufficient and nec-

essary conditions are considered. In Section 4, some numerical examples are given, followed by the concluding remarks. II. MODEL DESCRIPTION A. The Switch Architecture An architecture of the generalised 3-stage Clos switch is shown in Fig. 1. It consists of p (p ≥ 2) switches in the first stage, m switches in the second stage, and q (q ≥ 2) switches in the third stage. The first stage switch i, 1 ≤ i ≤ p, has n1,i input links of capacity β1,i , and mv1,i output links of capacity β2,i . This switch is connected with each one of the second stage switches by means of v1,i links. The third stage switch k, 1 ≤ k ≤ q, has n3,k output links of capacity β3,k, and mv3,k input links of capacity β4,k. It is connected to each one of the second stage switches by means of v3,k links. In further considerations we will use the normalised bandwidth in the links. This means that the capacity of the link with the highest bit rate is equal to 1. Links with lower bit rate have a capacity less than 1. For instance, when the link of the highest bit rate is the link of capacity 622 Mb/s (OC-12), then the link with raw capacity 155 Mb/s (OC3) has a normalised capacity equal to 0.25.

Fig. 1. Architecture of a generalised, multirate, 3-stage Clos Switch.

B. Connections A connection will be denoted by a triple (i, k, ω), where i is the first stage switch, 1 ≤ i ≤ p, k is the third stage switch, 1 ≤ k ≤ q, and ω is a weight representing the effective bandwidth required by the connection. This weight in general may be any value greater than or equal to 0 and less than or equal to min{β1,i , β3,k}, since it has to be accommodated in one of the input links of switch i, as well as in one of the output links of switch k. To set up a new connection (i, k, ω), a second stage switch is to be found, such that it has a free bandwidth of weight ω in one link to the first stage switch i and in one link to the third stage switch k. In order to preserve the cell order we will assume that a connection is routed through one second stage switch and only one link to that switch. In this case, the following conditions should be fulfilled: β1,i ≤ β2,i and β3,k ≤ β4,k.

Let us assume, that in an input link of switch i, x connections of weights ω1, ω2, …, ωx are already set up. The sum of weights of these connections have to be not greater than β1,i , ∑lx=1ω l ≤ β1,i . Similarly in an output link of the third stage switch k we have ∑lx=1ω l ≤ β 3,k . If through an interstage link from the first stage switch i, y connections of weights ω1, ω2, …, ωy, are already set up, then we have ∑ly=1ω l ≤ β 2,i . Similarly in the interstage link to the third stage switch k we have y ∑l =1ω l ≤ β 4, k . In an input (output) link already carry-

ing x connections, a new connection of weight ω can be set up iff ∑lx=1ω l ≤ β1,i − ω ( ∑lx=1ω l ≤ β 3,k − ω ). If these conditions are not true, the input link or the output link is inaccessible by a new connection of weight ω. Similarly, an interstage link from the first stage switch i (or to the third stage switch k), already carrying y connections, is accessible by a new connection (i, k, ω) if y y ∑l =1ω l ≤ β 2,i − ω ( ∑l =1ω l ≤ β 4, k − ω ). Otherwise this

link is inaccessible by a new connection. A new connection is compatible with the state of, a link if this link is accessible for this connection. A new connection (i, k, ω) is compatible with the state of the switching network, if it is compatible with one of the input links of the first stage switch i, and with one of the output links of the third stage switch k. Let us assume that the new connection (i, k, ω) is to be set up, and this connection is compatible with one of the input links of switch i and with one of the output links of switch k. To set up this connection a middle stage switch accessible by this connection is to be found. A middle stage switch is accessible by a connection (i, k, ω), if one of its links to the first stage switch i and one of its links to the third stage switch k are both accessible by this connection. The definitions of Strictly Non-Blocking (SNB) and Wide Sense Non-blocking (WSN) operation [1] can be extended to the multirate environment as follows: Definition 1: A switching network is SNB, if it is always possible to set up a connection compatible with the state of the switching network, without rearranging already existing connections, regardless of the state of the switching network and path searching algorithm used. Definition 2: A switching network is WSN, if it is always possible to set up a connection compatible with the state of the switching network, without rearranging already existing connections, provided that the given path search algorithm is used. C. Discrete and continuous bandwidth Usually, the weights of all connections belong to a closed interval [b, B], where 0 ≤ b ≤ B ≤ 1. Two cases are defined [5], [11], [12]:

Discrete Bandwidth: The weights of all connections belong to a given finite set {b1, ..., bK}, where b1 is a divisor of bk, k = 2, ..., K. Denote b = b1 and B = max{bk : k = 1, 2, ..., K}. A connection of weight b shall from now on be called “quantum”. In further considerations we will assume that B ≤ β, where β = min{β1, β3), β1 = min {β1,i }, and β 3 = min {β 3, k }. 1≤ i ≤ p

1≤ k ≤ q

Continuous Bandwidth: The weights of all connections belong to a closed interval [b, B], where 0 ≤ b ≤ B ≤ β ≤ 1, where β is defined similarly as in the discrete bandwidth case. In this paper, the strictly non-blocking operation of the generalised three-stage Clos switching network in the discrete bandwidth case will be considered. III. NON-BLOCKING CONDITIONS IN THE DISCRETE BANDWIDTH CASE

 min{A (k ,B );B (i )}  2 2 +  + 1 v3,k C2 (k ,B )    

,

(

)

B1 (k ) = ∑ n3, x β3, x b , x =1

(

)

C1 (i,B ) =  β 2,i − B + b b ,

(

)

B2 (i ) = ∑ n1, x β1, x b , x =1

(

• •

•

:

B1(k)

: A1(i)

m2

i B2 (i)

k

A2 (k)

: :

Fig. 2. Worst case scenario for connection placement in the strictly nonblocking mode.

( ) ( ) A2 (k ,B ) = (n3, k − 1)β3,k b  + (β3, k − B ) b , x = p, x ≠i

•

(1)

A1(i,B ) = n1,i − 1 β1,i b +  β1,i − B b ,

x = q, x≠k

•

A1(i,ω) represents the maximum number of quanta, that can constitute a state of first stage switch i, compatible with a connection of weight ω. A2(k,ω), represents the maximum number of quanta, that can constitute a state of third stage switch k, compatible with a connection of weight ω. B1(k) represents the maximum number of quanta, that can fit in all third stage switches, but switch k. B2(i) represents the maximum number of quanta, that can fit in all first stage switches, but switch i. C1(i,ω) represents the maximum number of quanta, that can make a trunk of internal links, connecting a first stage switch i with some second stage switch, inaccessible by a connection of weight ω. C2(k,ω) represents the maximum number of quanta, that can make a trunk of internal links, connecting a third stage switch k with some second stage switch, inaccessible by a connection of weight ω. m1

The non-blocking conditions in the discrete bandwidth case when 1/b is and integer and β = v = 1 were given in [5]. The case with β < 1 was considered in [11]. We will now determine similar conditions for the architecture shown in Fig. 1, for the general case. Theorem 1: The three-stage switching network shown in Fig. 1 is non-blocking in the strict sense for the discrete bandwidth case, if and only if:  min{A (i,B );B (k )} 1 1 m ≥ max   v C i B ( ) , 1≤ k ≤ q    i 1, 1  î 1≤i ≤ p

•

)

C2 (k ,B ) =  β 4,k − B + b b .

Proof. Necessary conditions can be proved by showing a blocking state in the switching network with one less switch than the minimum value of m given by (1). The following path searching algorithm will be used. If a new connection of weight ω appears in the same first stage switch as the last connection set up, we start to search a path from the interstage link through which the last connection was set up. When a new connection appears in another first stage switch, we start to search a path from the middle stage switch next to the last engaged. First, let us intuitively define the quantities A1(i,ω), A2(k,ω), B1(k), B2(i), C1(i,ω), and C2(k,ω), which are formally defined in Theorem 1, (see also Fig.2):

Let us now assume, that the maximum value of (1) is obtained for i = i1 and k = k1. The following set of events leads to the occupancy of all middle stage switches. Step 1: Set up (β2,i1 – B + b)/b connections (i1, k, b), where k ≠ k1, (q > 1). Step 2: Set up a connection (i1, k, γ), where γ = β2,i1 – b(β2,i1 – B + b)/b < B. Step 3: Set up a connection (i1, k, b), disconnect the connection (i1, k, γ), and then set up (β2,i1 – B)/b connections (i1, k, b). Step 4: Repeat Steps 2 and 3 until v1,i1C1(i1, B) min{A1(i1, B);B1(k1)}/v1,i1C1(i1, B) connections of weight b are set up in the first stage switch i1. These connections will occupy m1 = min{A1(i1, B);B1(k1)} /v1,i1C1(i1, B) middle stage switches in such a way, that they will be inaccessible by a new connection of weight B from the first stage switch i1. Step 5: Repeat Steps 1 to 4 for connections (i, k1, b), i ≠ i1, (p > 1). These connections will occupy the next m2 = min{A2(k1, B);B2(i1)}/v3,k1C2(k1, B) middle stage switches, and these switches will be inaccessible by a new connection of weight B to the third stage switch k1.

In the above switching network, m1 + m2 middle stage switches are occupied and a new connection (i1, k1, B) will occupy the second stage switch numbered m1 + m2 +1. It should be noted that the weight B is available in one of the input links of the first stage switch i1, as well as in one of the output links of the third stage switch k1. Sufficiency can be proved by showing the worst state in the switching network. In order to maximise the utilisation of all links and minimise capacity fragmentation of the switch, we consider that only quantum connections are already set up in the switching network, (i.e., ω=b). Suppose we want to add a new connection (i, k, ω), 0 < b ≤ ω ≤ B. In switch i at most β1,i /b connections of weight b can be set up in each of n1,i – 1 input links, and (β1,i – ω)/b such connections may be set up in the remaining link. The total number of connections is A1(i, ω) = (n1,i – 1)β1,i /b + (β1,i – ω)/b. The interstage link is inaccessible by a new connection if C1(i, ω) = (β2,i – ω)/b + 1 = β2,i – ω + b)/b connections of weight b are already set up through this link. So the connections from switch i can occupy A1(i, ω)/ v1,i C1(i, ω) middle stage switches. However, in all third stage switches, except switch k, it is possible to set up no

(

)

more than B1 (k ) = ∑ xx ==1q , x ≠ k n3, x β 3, x b  connections

of weight b, so no more than B1(k)/v1,i C1(i, ω) middle stage switches will be occupied. Similar considerations for the third stage switch k show that the set of A2(k, ω)/ v3,kC2(k, ω), but not more than B2(i)/v3,k C2(k, ω) middle stage switches will be inaccessible by the connection (i, k, ω), where A2(k, ω) = (n3,k – 1) β3,k/b

(

)

+ (β3,k – ω)/ b, and B2 (i ) = ∑ xx ==1p , x ≠i n1, x β1, x b . In

the worst case these sets of middle stage switches are disjoint and one more switch is needed for a connection (i, k, ω), so  min{A1 (i,ω );B1 (k )}  min{A2 (k ,ω );B2 (i )} m≥ +  + 1 (2) v1,i C1 (i ,ω ) v3, k C2 (k ,ω )    

( ) ( ) A2 (k ,ω ) = (n3, k − 1)β 3, k b + (β3, k − ω ) b  , A1 (i,ω ) = n1,i − 1 β1,i b +  β1,i − ω b , x = q, x≠ k

(

)

x = p, x≠i

(

)

B1 (k ) = ∑ n3, x β3, x b , B2 (i ) = ∑ n1, x β1, x b  . x =1

(

)

x =1

(

)

C1 (i ,ω ) =  β 2,i − ω + b b  , C2 (k ,ω ) =  β 4, k − ω + b b .

The function (2) must be maximised through all i, 1 ≤ i ≤ p, k, 1 ≤ k ≤ q, and ω, and it reaches maximum for ω = B. Putting ω = B in (2), we obtain formula (1). IV. NUMERICAL EXAMPLES We will give now some numerical examples of Theorem 1.

Example 1: Let us now consider a 3 stage Clos switching network with the following parameters: β2,1 = 0.9, p = 3 n1,1 = 3, β1,1 = 0.7, v1,1 = 1, β2,2 = 0.9, n1,2 = 4, β1,2 = 0.8, v1,2 = 2, β2,3 = 0.9, n1,3 = 5, β1,3 = 0.9, v1,3 = 2, β4,1 = 0.9, q = 5 n3,1 = 3, β3,1 = 0.8, v3,1 = 1, β4,2 = 0.9, n3,2 = 3, β3,2 = 0.8, v3,2 = 1, β4,3 = 1, n3,3 = 4, β3,3 = 0.9, v3,3 = 1, β4,4 = 1, n3,4 = 5, β3,4 = 0.9, v3,4 = 2, β4,5 = 1. n3,5 = 5, β3,5 = 0.9, v3,5 = 2, The connection weights belong to the set {0.1, 0.2, 0.3, 0.4, 0.5, 0.6, 0.7}, so b = 0.1 and B = 0.7. It can be calculated that: A1(1, 0.7) =14 B1(1) = 158 A2(1, 0.7) = 17 B2(1) = 91 A1(2, 0.7) =25 B1(2) = 158 A2(2, 0.7) = 17 B2(2) = 91 A1(3, 0.7) =38 B1(3) = 164 A2(3, 0.7) = 29 B2(3) = 91 B1(4) = 167 A2(4, 0.7) = 38 B1(5) = 167 A2(5, 0.7) = 38 For all i, A1 is less than each of B1, as well as for all k, A2 is less than each of B2. Links from the first stage switches will be inaccessible by a new connection of weight B, if each of them carries three connections of weight b (C1(i, 0.7) = 3). Links between the second and the third stage will be inaccessible by this connection, if three or four connections of the weight b set up through them, for the links with capacity 0.9 and 1, respectively (C2(k = 1 and 2, 0.7) = 3, C2(k = 3, 4 and 5, 0.7) = 4). Formula (1) is maximised for i = 3 and k = 3. So the switching network is non-blocking, if m ≥ 38/(2*3) + 29/(1*4) = 14. Example 2: In this example, we consider a 3 stage Clos switching network with following parameters: β2,1 = 1, p = 3 n1,1 = 6, β1,1 = 0.7, v1,1 = 1, β2,2 = 1, n1,2 = 8, β1,2 = 0.7, v1,2 = 1, β2,3 = 1, n1,3 = 10, β1,3 = 0.9, v1,3 = 1, β4,1 = 0.9, q = 3 n3,1 = 2, β3,1 = 0.8, v3,1 = 1, β4,2 = 0.9, n3,2 = 3, β3,2 = 0.8, v3,2 = 1, β4,3 = 0.9, n3,3 = 3, β3,3 = 0.8, v3,3 = 1, The connection weights also belong to the set {0.1, 0.2, 0.3, 0.4, 0.5, 0.6, 0.7}, so b = 0.1 and B = 0.7. It can be calculated that in this case: A1(1, 0.7) =35, B1(1) =48, A2(1, 0.7) =9, B2(1) =181, A1(2, 0.7) =49, B1(2) =40, A2(2, 0.7) =17, B2(2) =181, A1(3, 0.7) =83, B1(3) =40, A2(3, 0.7) =17, B2(3) =181. In this case for i = 1, A1(1, 0.7) is less than each one of B1, but for i = 2 and 3 each of B1 is less than A1(i, 0.7). For all k, A2(k, 0.7) is less than B2. Links from the first stage switches will be inaccessible by a new connection of weight B, if each one of them carries four connections of weight b (C1(i, 0.7) = 4). Links between the second and the third stage will be inaccessible by this connection, if three connections of the weight b will be set up through them (C2(k, 0.7) = 3). All possible values of formula (1) are given in Table 1. From this Table it can be concluded that the switching network is non-blocking if m ≥ 16. Let us now consider the space-division three-stage Clos switching network with p > 1, q > 1, n1,i = n1, n3,k = n2,

v1,i = v3,k = 1, all β = 1, and b = B = 1. In this case A1 = n1 – 1, B1 = (q – 1) × n2, A2 = n2 – 1, and B2 = (p – 1) × n1. So formula (1) can be now rewritten in the following way: m ≥ min {n1 − 1;(q − 1)× n2 }+ min {n2 − 1;( p − 1)× n1}+ 1 . We have three cases: Case 1: n1 – 1 and n2 – 1 are minimum. In this case: m ≥ n1 + n2 − 1 . Case 2: n1 – 1 and (p – 1) × n1 are minimum. In this case: m ≥ n1 − 1 + ( p − 1)× n1 + 1 = pn1 . Case 3: (q – 1) × n2 and n2 – 1 are minimum. In this case: m ≥ (q − 1)× n2 + n2 − 1 + 1 = qn2 . It is obvious, that (p – 1) × n1 and (q – 1) × n2 cannot be both minimum at the same time. So for the spacedivision network we can write, that m ≥ min{n1 + n2 − 1;qn2 ; pn1 }. For n1,i = n1, n3,k = n2, v1,i = v3,k = v, β1,i =β1, β3,k =β2, and β2,i =β4,k = 1 we obtain an asymmetrical three-stage Clos network. In this case A1 (i,B ) = (n1 − 1)β1 b  + (β1 − B ) b  , B1 (k ) = (q − 1)× n2 β 2 b  , B2 (i ) = ( p − 1)× n1 β1 b ,

A2 (k ,B ) = (n2 − 1)β 2 b + (β 2 − B ) b , C1 (i ,B ) = (1 − B + b ) b 

C 2 (k ,B ) = (1 − B + b ) b  .

Considering all cases, similarly as in the space-division case (see Egn (3) ), we obtain:  (n − 1)β1 b  + β1 − B b   m ≥ min  1  v (1 − B + b ) b  î 

 (n − 1)β 2 b  + (β 2 − B ) b   + 2  + 1; v (1 − B + b ) b   

 (n1 − 1)β1 b  + β1 − B b    ( p − 1)× n1 β 2 b    +  + 1; v (1 − B + b ) b     v (1 − B + b ) b    (n2 − 1)β 2 b  + (β 2 − B ) b    (q − 1)× n2 β1 b     +  + 1. v (1 − B + b ) b     v (1 − B + b ) b   

V. CONCLUSIONS In this paper we analysed the strictly non-blocking operation of generalised three-stage Clos switches, operating in a discrete bandwidth, multirate environment. We have proved the sufficient and necessary conditions for such switching networks to be non-blocking in the strict sense. The derived conditions provide generalised results, which verify earlier work as sub-cases. This work is useful to ATM switch designers, as it provides generalised analytical results for the design of highperformance, cost-efficient broadband switches.

Table 1. Number of middle stage switches for each i and k, in Example 2 k=1

2

3

 35   9  i= 1   +   + 1 = 12  4  3

 35   17   35   17   4  +  3  + 1 = 14  4  +  3  + 1 = 14      

2

 48   9   4  +  3  + 1 = 16    

 40   17   40   17   4  +  3  + 1 = 16  4  +  3  + 1 = 16        

3

 48   9   4  +  3  + 1 = 16    

 40   17   40   17   4  +  3  + 1 = 16   +   + 1 = 16      4  3

VI. REFERENCES [1] V. Benes: Mathematical Theory of Connecting Networks and Telephone Traffic, New York, Academic Press, 1965. [2] A.W. Berg and W. Whitt: Extending the effective bandwidth concept to networks with priority classes, IEEE Communi. Mag., vol. 36, No. 8, 1998, 78-83. [3] K.S. Chan, S. Chan, and K.L. Yeung: Wide-sense nonblocking multicast ATM switches, IEEE GLOBECOM ’97, Phoenix 1997, paper S15.3. [4] P. Charransol, J. Hauri, C. Athenes, and D. Hardy: Development of a Time Division Switching Network Usable in a Very Large Range of Capacities, IEEE Trans. Commun., vol. 27, No. 7, 1979, 982-988. [5] S.-P. Chung, and K.W. Ross: On Nonblocking Multirate Interconnection Networks, SIAM J. Comput., vol. 20, No. 4, 1991, 726-736. [6] C. Clos: A Study of Non-blocking Switching Networks, Bell System Tech. J., vol.32, 1953, 406-424. [7] M. Collier, T. Curran: The Strictly Non-Blocking Condition for Three-Stage Networks. Proc. 14th Int. Teletraffic Congres ITC'94, Antibes, France, 1994, 635-644. [8] A. Jajszczyk: On Nonblocking Switching Networks Composed of Digital Symmetrical Matrices. IEEE Trans. Commun., vol. 31, No. 1, 1983, 2-9. [9] W. Nonblocking Switching Networks for Multichannel Connections. IEEE Trans. Commun., vol. 43, No. 2/3/4, 1995, 222-224. [10] W. multirate switching networks, Sixth IFIP Workshop on Performance Modelling and Evaluation of ATM Neworks, Ilkley, 1998, 26/1-26/10. [11] F.K. Liotopoulos and S. Chalasani: Strictly Nonblocking Operation of 3-stage Clos Switching Networks, ”Performance Modelling and Evaluation of ATM Networks", vol.II, by Chapman & Hall, London 1996. [12] F.K. Liotopoulos and S. Chalasani: Analysis of the Strictly Nonblocking Operation of 3-stage Clos Switching Networks”, 3rd IFIP Workshop on Performance Analysis of ATM Switches, 71/1-11, Bradford, UK, July 1995. [13] G. Niestegge: Nonblocking Multirate Switching Networks, The 5th ITC Seminar, Lake Como, Italy, 1987. [14] R. Melen,and J.S. Turner: Nonblocking multirate networks, SIAM J. Comput., vol. 18, No. 2, 1989, 301-313. [15] I. Svinnset: Nonblocking ATM Switching Networks, IEEE Trans. Commun., vol. 42, No. 2/3/4, 1994, 1352-1358. !

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