A Generic Circuit Modeling Strategy Combining Symbolic ... - Wolfram

A GENERIC CIRCUIT MODELING STRATEGY COMBINING SYMBOLIC AND NUMERIC ANALYSIS Ralf Sommer, Manfred Thole, Eckhard Hennig ITWM – Institut für Techno- und Wirtschaftsmathematik, Kaiserslautern, Germany {sommer, thole, hennig}@itwm.uni-kl.de

ABSTRACT In this paper we present a generic modeling strategy for the derivation of approximated symbolic expressions for small-signal characteristics of analog circuits. This approach is characterized by a tight interaction between symbolic and numeric computations to ensure continuous error control and verification of the results. The workflow may also be extended to the derivation of nonlinear circuit characteristics.

1. INTRODUCTION Just as in numerical circuit simulation appropriate modeling of circuits and devices holds the key for obtaining suitable results from symbolic circuit analyses. In fact, for the latter, the usability of the results depends much more on the choice of the models than in numerical simulation. While numerical simulations are usually aimed at very high accuracy, which is achieved by choosing complex component models, symbolic analysis is employed in a different way: Symbolic analysis has a rather qualitative character because one of its goals is to obtain interpretable analytical formulas describing particular circuit characteristics of interest. This can only be achieved if circuit or device models are used which are as simple as possible and only describe the effect under investigation. Moreover, models for symbolic circuit analysis should be designed with the fact in mind that expressions must be processed using computer algebra, which restricts the set of usable modeling functions to those which can be inverted analytically. On the other hand, for symbolic analysis to be close to numerical circuit simulation (e.g. SPICE), symbolic device models must have the same or similar numerical properties as their counterparts in numerical analysis. The symbolic device and circuit modeling strategy was designed to meet

this requirement. It will be demonstrated how symbolic analysis can be applied in combination with numerical reference simulations to generate analytic expressions which are guaranteed to be meaningful and reliable. In section 2, an outline of the methodology is given followed by several examples, in which the details of the modeling strategy are clarified. As an example an operational amplifier will be analyzed in section 3. It will also be shown that the derived analysis results may be used for design. This will be achieved by extracting information which can be used to find circuit modifications such that new performance requirements are met. The following sections contain additional information to the slides of the presentation following this paper. Equations and diagrams are therefore not repeated here and referred to when necesary. All computations were performed using our symbolic circuit analysis and design toolbox Analog Insydes [1] running under Mathematica 3.0 [2]. PSpice Design Center [3] was used for additional numerical circuit simulations. 2. SYMBOLIC ANALYSIS WORK FLOW In this section a modeling strategy for the derivation of approximated symbolic expressions for small-signal circuit characteristics is presented. A particularly important aspect of this approach is the interaction between symbolic and numeric computations to ensure continuous error control and verification of the results. The symbolic circuit model generation strategy can be divided into the following steps: 1. Start with a numerical SPICE simulation of the circuit under examination and make sure that the effect of interest can be observed. 2. Focus on one task or effect of interest only and use the mathematically simplest analysis method (do not take a sledgehammer to crack a nut, e.g. transient analysis for a small-signal effect) 3. Generate a symbolic netlist with numerical reference

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information for semi-symbolic analyses and symbolic approximation techniques (including extraction of small-signal parameters from the simulator output file) Select the same set of device models for symbolic analysis as for the preceding numerical analyses in Step 3. Ensure validity of netlist and models by comparing semi-symbolic analysis results with the numerical simulation. Iteratively select simpler device models as long as the deviation from the SPICE reference simulation is tolerable. Check deviations by semi-symbolic analysis without employing approximation methods. Perform symbolic analysis using symbolic approximation, pole/zero extraction, etc. Always check numerically evaluated results against the reference simulation. For any result (numeric & symbolic): Perform plausibility check ("do not trust any simulation results...")

Slide 5 shows a graphical representation of the modeling strategy. 3. EXAMPLE: ANALYSIS AND DESIGN OF AN OPERATIONAL AMPLIFIER In the following example an operational amplifier is analyzed step by step according to the flow diagram. Symbolic analysis is applied to extract a formula which describes the underlying overshoot effect in terms of the circuit parameters. It will be highlighted how numerical circuit simulation, symbolic analysis, and –especially– symbolic approximation techniques can be combined.

Circuit Description The circuit under investigation (slide 6) is an operational amplifier for use in an integrated circuit [4]. The circuit diagram of this operational amplifier topology is not fully designed yet, and some parts of the circuit were simplified. The current sources and the voltage source establish the DC operating points for the amplifier stages. These sources are implemented using transistors and resistors, but were substituted by ideal sources for simplicity. The input signals applied to the basis of the transistors Q1 and Q2 are amplified in four cascaded amplifier stages. The first stage is composed of the transistors Q1 and Q2 which form a differential amplifier. The current source I1 establishes the bias points for the transistors Q1 and Q2 which are assumed to be matching. If the input voltage applied to the bases are identical the current I1 splits equally between the transistors Q1 and Q2 because of the circuit’s symmetry. Thus, the emitter bias currents are 10µA. The collec-

tor currents are slightly less than 10µA since a small fraction of the emitter current is due to the base current. The second amplifier stage is formed by transistor Q3 which acts as an emitter follower. Current source I4 supplies the DC bias current to the emitter of transistor Q3. The third amplifier stage is composed of transistor Q4 which forms a common emitter amplifier. The output signal is taken from the collector of transistor Q4, and the DC bias current for the collector of transistor Q4 is provided by the current source I3. The final stage of the amplification is formed by transistor Q5, Q6 and the emitter resistors. This circuit is similar to a class B push-pull circuit. Because of the extremely high voltage gain a very small DC input voltage can result in a saturation or cutoff of the output stages. In fact, a slight mismatch of the input transistors can cause this behavior, even for zero input voltages. That is the reason why the circuit is working under feedback.

Numerical Simulation Slide 6 shows an operational amplifier circuit together with the two transient simulations performed at different frequencies of a rectangular input signal. From the transient behavior it can be seen that dynamic effects are involved yielding a more distorted signal for higher frequencies.

Formulate Design Goals and Tasks As a consequence of the effects observed in the numerical simulation the following design goal is formulated: How can the circuit be modified for reduced distortion and less overshoot in the step response? To solve this design task a systematic approach using symbolic analysis techniques is taken. Prerequisites for successful application of symbolic techniques are to keep the approach simple by concentrating on selected circuit characteristics only and to avoid mathematical overload of the problem. To keep symbolic results compact and interpretable the underlying cause of the observed effect has to be clearly identified. For the application of symbolic analysis, problem classes which can be rooted to linear effects have the best chances for being solvable. Hence, a closer look at an AC analysis was taken. From Slide 7 it can be recognized that the frequency response exhibits a resonance peak which obviously originates from a frequency compensation problem. All tasks related to the compensation of the circuit can be solved by applying linear transfer function analysis and symbolic approximation. This reflects the principle that no “sledgehammer should be taken to crack a nut”, which means that transient analysis can be avoided.

Generate Analog Insydes Netlist For the application of symbolic analysis, especially symbolic approximation, the next step is to generate a symbolic netlist including the numerical reference information. Slide 8 shows the input data from PSpice which is being used to generate the Analog Insydes netlist. While this circuit description and the numerical values of the elements are contained in the simulator input file the operating point information and the values for the small-signal parameters of the transistors have to be extracted from the simulator output file. This task is performed by the netlist translator spice2ai which can be directly called from the Mathematica command line. The output is a netlist containing symbolic values for each network element as well as the corresponding numerical reference information. Since the generated Analog Insydes netlist has only a generic model reference for each transistor corresponding device model definitions have to be added to the data base. Device models have to be provided either by implementing a globally accessible library or by adding model statements to the netlist.

Ensure Validity of Netlist and Models The next step in the flow is to ensure the validity of the netlist and the models. Therefore, the two small-signal models shown in slide 10 have been defined. The first one with the selector PSpiceAC contains the complete smallsignal equivalent circuit as used in PSpice. The other model definition stored under the selector SimpleAC contains a simplified small-signal equivalent circuit without ohmic base, emitter and collector resistances. Now everything is prepared for symbolic and semisymbolic network analysis. First, we let Analog Insydes replace all model references in the netlist by the full PSpice model. Once it is ensured that the results obtained using this model are identical to the numerical PSpice simulation then simpler models can be introduced step by step. The result of the semi-symbolic transfer function is shown in slide 11. The function is a polynomial of order 22 which has an estimated number of terms of more than 2.7⋅1018 in fully symbolic form. It should be noticed that before solving this semi-symbolic system of equations Mathematica’s floating point accuracy has to be set to infinity since it has to be ensured that no numerical errors are introduced during the elimination process. The reason why floating-point precision is insufficient is that the coefficients of the characteristic polynomial have a much wider range than can be handled reliably by machine-precision calculations. Since the poles and zeros are very sensitive with respect to the polynomial coefficients the only way to exclude errors is to

use arbitrary-precision arithmetic as provided by a computer algebra system.

Find the Most Simple Models To avoid excessive expression growth during the subsequent symbolic analysis the complexity of the device models has to be reduced. An approximated model must be as simple as possible but must still cover the effect of interest within an acceptable tolerance as compared with the PSpice simulation. Once such a model is found symbolic analysis and symbolic approximation can be applied to derive formulas describing the frequency behavior of the operational amplifier. Slide 12 shows the semi-symbolic analysis results when expanding the circuit with the simplified AC (SimpleAC) model. Note that the resulting polynomial is only of order eight and has an estimated number of terms of about seven million when computed in fully symbolic form.

Semi-symbolic Analysis vs. PSpice Simulation A comparison of the semi-symbolic analysis results derived by Analog Insydes with the numerical simulation results obtained by PSpice is shown in slide 12. To check the correspondence between both functions the Analog Insydes CSDF reader is used to read in the PSpice simulation data. As illustrated in the slide the two curves are identical which means that numerical information passed to the symbolic analysis tool as well as all symbolic device models are correct. Again, the results are compared, which is shown in slide 13. The transfer function derived with the simple AC model exhibits a slight deviation in the high-frequency behavior. On the other hand, up to the cut-off frequency of the amplifier, the traces show no significant deviation. For the following symbolic analysis it is therefore sufficient to use this simplified PSpice transistor equivalent circuit.

Symbolic Analysis and Symbolic Approximation In order to extract an interpretable formula describing the behavior of the circuit in the region of interest it is necessary to compute an approximated symbolic transfer function. Therefore, simplification-before-generation techniques followed by further postprocessing steps are used. Simplification Before Generation (SBG) is performed on the system of symbolic circuit equations using one or more design points. The selection of design points has a large impact of the approximation results; an appropriate choice of design point frequencies and errors requires some experience. Since the task is to compute a good approximation of the resonance region one design point is placed near the dominant complex pole pair in the s-plane. The other design point was placed on the imaginary axis

at 10kHz to ensure a valid approximation with respect to the lower frequency gain: dp = 8 ReplacementTable ž Join@dpdiffamp, 8s ® N@2 Pi I 10. * 10^3D, MaxError ® 0.2 30. * 10^- 12, s ® N@2 PiI 1.* 10^6D, MaxError ® 0.2 10000., Comp -> 30. * 10^- 12, s ® N@2 PiI 1.0 * 10^3D, MaxError ® 0.2