IOP PUBLISHING
SEMICONDUCTOR SCIENCE AND TECHNOLOGY
doi:10.1088/0268-1242/24/10/105015
Semicond. Sci. Technol. 24 (2009) 105015 (6pp)
A new integration-based procedure to separately extract series resistance and mobility degradation in MOSFETs ´ ˜ 1 , Alvaro Juan Muci1 , Denise C Lugo Munoz D Latorre Rey1 , 1 Adelmo Ortiz-Conde , Francisco J Garc´ıa-S´anchez1 , Ching-Sung Ho2 and Juin J Liou3,4 1
Solid-State Electronics Laboratory, Sim´on Bol´ıvar University, Caracas 1080, Venezuela Powerchip Semicond. Corp., Hsinchu Science-Based Industrial Park, Hsinchu, Taiwan, Republic of China 3 School of Electrical Engineering and Computer Science, University of Central Florida, Orlando, FL 32816-2450, USA 4 Department of ISEE, Zhejiang University, Hangzhou, People’s Republic of China 2
E-mail:
[email protected]
Received 7 April 2009, in final form 23 June 2009 Published 18 September 2009 Online at stacks.iop.org/SST/24/105015 Abstract A new procedure is presented to separate and extract source-and-drain series resistance and mobility degradation factor parameters in MOSFET compact models. It also allows us to extract the device’s channel conductance. The procedure is not based on fitting, but on directly calculating the three parameters by solving a system of three simultaneous equations. The equations represent the measured source-to-drain output resistance, obtained from the output characteristics, and its first and second integrals with respect to gate voltage. This method may be applied to a single device, measured in strong inversion as a function of gate voltage, at a small drain bias. (Some figures in this article are in colour only in the electronic version)
In what follows we present a new procedure to be applied to the strong inversion ID (VGS ) characteristics of a single transistor, measured at a small drain bias. It is based on the source-to-drain output resistance equation, obtained from the MOSFET’s model, and on its first and second integrals with respect to gate voltage. From these, a system of three simultaneous equations is obtained which can be solved for the parameters in question independently of each other. The procedure does not rely on any fitting of the model to the measured data. This permits us to unambiguously separate the effects of mobility degradation and source-and-drain series resistance. The procedure has been validated using data from a single experimental short channel device. The above-threshold drain current of a MOSFET in the triode region may be modeled in terms of intrinsic voltages by a simple equation of the form [12, 13] W Vds Cox μeff Vgs − VT − Vds . (1) ID = L 2
1. Introduction Source-and-drain series resistance and mobility degradation are two very important parameters for MOSFET characterization and modeling. Frequently these two parameters affect the device’s transfer characteristics, ID (VGS ), in a similar way. Therefore, their observable effects are difficult to separate. This fact hampers one’s ability to extract their values independently of each other from measured characteristics. Several procedures have been suggested to get around this obstacle [1–9], in some cases from the saturation region and using devices with several channel lengths [10]. Another method was recently presented to extract these two parameters independently of each other by using bias conditions under which the channel carrier mobility is kept constant while extracting the source-and-drain series resistance [11]. 0268-1242/09/105015+06$30.00
1
© 2009 IOP Publishing Ltd Printed in the UK
J Muci et al
Semicond. Sci. Technol. 24 (2009) 105015
If the source-and-drain series resistance is significant, the device’s intrinsic gate and drain voltages are RDS Vgs = VGS − ID , 2 Vds = VDS − ID RDS ,
2. Parameter equations Instead of trying to fit the explicit drain current model, represented by (9) in strong inversion and low drain voltage, directly to the measured characteristics, we propose to obtain equations from which to directly calculate the model parameters RDS , θ and K. To that end, the measured source-todrain resistance, Rm , is expressed using (9) as
(2) (3)
where VGS and VDS are the externally applied gate and drain voltages, respectively, RDS is the total source-and-drain series resistance, and the rest of the parameters have their usual meaning. Many models have been proposed to represent gate-fielddependent channel mobility degradation [8–16]. A widely used model for the gate-field-dependent effective mobility has the form [17–21] μeff =
1+
μ0 Eeff n ,
VDS θ n−1 1 −1 = RDS + VGT + VGT . (10) K K ID A point of caution should be pointed out, which is that if n were equal to unity, the effects of RDS and θ on the measured source-to-drain resistance, Rm , would be inseparable. The fact that frequently n = 1 is what allows the separation of these two parameters’ effects at small drain voltages. It is worth mentioning that performing a direct fit of (10) to the experimental data would generate considerable convergence problems. However, the method that we will now develop is immune to such inconveniences since it does not rely on fitting but on direct calculation of the sought after parameters. In what follows, to ensure that the MOSFET will be operating under strong inversion conditions where the model represented by (9) is considered to be valid, we will set a lower limit of the excess gate voltage, VGTL , chosen above the moderate inversion region, VGTL VT , from which to begin the extraction procedure. The resultant source-to-drain resistance is θ n−1 1 −1 RmL = RDS + VGTL + VGTL . (11) K K Next, we integrate (10) from this lower limit to VGT >VGTL , and assuming that the parameters RDS , θ and K, stay constant, or at most are weakly dependent on VGT , we get VGT FI ≡ Rm dVGT VGTL θ n VGT 1 n + ln VGT − VGTL + RDS (VGT −VGTL ). = K VGTL nK (12) Rm ≡
(4)
Eo
where μ0 represents the low-field mobility, E0 is a constant electric field and n is the mobility degradation exponent due to the gate field. This mobility degradation exponent has been traditionally obtained by fitting the experimental data to the drain current equation assuming that drain and source series resistance effects are negligible. For strong inversion conditions, the mobility model of (4) may be conveniently expressed by μeff =
μ0 1 + θ (Vgs − VT )n
,
(5)
where θ and n are the mobility degradation factor and degradation exponent due to the gate field, respectively. Substituting (5) in (1), and assuming a very small drain bias, Vds Vgs − VT , VGS ID RDS /2, we may neglect the quadratic term in (1) and approximate (2) by VGS ≈ Vgs , to get ID =
KVGT (VDS − ID RDS ) , n 1 + θ VGT
(6)
W Cox μo , L
(7)
Integrating again the first integral (FI), represented by the previous equation, we find the second integral (SI): VGT SI ≡ F I dVGT VGTL n+1 θ VGT VGT n+1 VGT − VGTL + = ln K VGTL n (n + 1)) K θV n RDS (VGT − VGTL ) 1 + GTL . + (VGT − VGTL )2 − 2 k n (13)
where K=
and VGT is defined as the excess gate voltage above threshold: VGT ≡ VGS − VT .
(8)
Solving (6) for ID the following explicit expression of the drain current is obtained: KVGT VDS ID = n . 1 + KVGT RDS + θ VGT
Let us now define an operator, comprising the difference of the second to first integrals (DSF), as
(9)
DSF ≡ SI − VGT FI.
Note that RDS and θ turn up in different terms of the denominator of (9). This circumstance will allow the separation of their effects in the extraction process.
(14)
Assuming that the parameter n is known in the mobility model, equations (10), (11) and (14) constitute a system of three linear algebraic equations from which the three parameters RDS , θ 2
J Muci et al
Semicond. Sci. Technol. 24 (2009) 105015
and K may be uniquely calculated as follows: the mobility degradation factor is nume θ , θ= deno θ
0.10
(15) 0.08
where nume θ = (n + 1)(VGT − VGTL )[Rm VGT (VGT − VGTL )
0.06
(15a)
ID ( mA )
+ RmL VGTL (VGT − VGTL ) + 2DSF], and
n−1 n−1 deno θ = 2 DSF(n + 1)VGT VGTL VGT − VGTL 3 n n+2 n+2 + Rm (n + 1)VGT VGTL + (1 − n)VGT VGTL − 2VGT VGTL n 3 n+2 n+2 − RmL (n + 1)VGT . VGTL + (1− n)VGT VGTL − 2VGT VGTL
0.04
VGS < (VT +VGTL) n = 1.84 VT = 0.53 V Extracted parameters: θ = 0.153 V-1 RDS = 64.7 Ω K = 30.2 mA / V
2
0.02
(15b) The inverse of the channel conductance is nume K 1/K = , (16) deno where n−1 n−1 nume K = −VGT VGTL 2DSF(n + 1) VGTL − VGT n−1 n+1 n+1 2 − 2 VGT + (n + 1)VGT VGTL + Rm (1 − n)VGTL
n−1 n+1 n+1 2 , − 2 VGTL + (n + 1)VGTL VGT + RmL (1 − n)VGT
Lm = 90 nm VDS = 10 mV
0.00 0.0
0.2
0.4
0.6
0.8
VGS ( V )
1.0
1.2
1.4
Figure 1. Transfer characteristics (symbols) of an experimental 90 nm mask channel length test MOSFET, measured at a small drain voltage of 10 mV. Also shown is the corresponding play-back (continuous line) obtained from the drain current model using the calculated parameters indicated in the inset.
(16a) and
2 n n 2 deno = (n + 1) VGT VGTL + VGT VGTL n+1 n+1 − 2n VGT VGTL + VGT VGTL n+2 n+2 + (n − 1) VGT . + VGTL
Measured Playback VGS > (VT +VGTL)
To illustrate the proposed procedure we use 65 nm technology experimental MOSFETs with a physical gateoxide thickness of 2.5 nm. Firstly, the mobility degradation exponent n is extracted from a 0.85 μm mask channel length test device. The value of the exponent in the mobility degradation model, as found by fitting the experimental data directly to the drain current equation, neglecting the source and drain parasitic resistances in this long channel device, is n = 1.84. This value is comparable to the traditional value for electrons of about n = 1.85 [17, 18], reported since 1996. Next, the values of the drain current model parameters RDS , θ and K are extracted by applying the presently proposed method to a 90 nm short channel length device, fabricated in the same batch as the test long channel device. To start the procedure we need to find its threshold voltage, VT , value using any of the known conventional threshold voltage extraction methods [22]. Here we have used the maximum of the second derivative method. The VT value for this 90 nm device turns out to be 0.53 V. To ensure that the device operates in strong inversion, we established a lower limit of the excess gate voltage of VGTL = VT +0.5 V from which to start the procedure.
(16b)
The total source-and-drain series resistance is nume R RDS = , (17) deno where n n nume R = −2 DSF (n + 1) VGT − VGTL 2 n n+1 n+2 +Rm 2 (n + 1) VGT VGTL − 2nVGTL VGT − 2VGT 2 n n+1 n+2 +RmL 2 (n + 1) VGTL VGT − 2nVGT VGTL − 2VGTL . (17a)
3. Parameter extraction Before proceeding to extract the drain current model parameters, it is necessary to establish the nature of the mobility degradation model to be used. To that end, the value of the exponent n is extracted, as is traditionally done, by fitting the experimental data from a long channel device directly to the drain current equation. The underlying assumption here is that the total source-to-drain resistance in a long channel device is much greater than the parasitic source and drain series resistances, Rm RDS , and therefore RDS may be neglected in such a device. Once the value of n is known, the proposed procedure may be applied to unambiguously extract the RDS , θ and K model parameters of short channel devices whose RDS is non-negligible.
Figure 1 presents the experimental above-threshold transfer characteristics data of the 90 nm device, measured at a small drain voltage of 10 mV. Figure 2 shows the corresponding source-to-drain resistance, Rm , as a function of the gate overdrive, VGT . The first and second integrals, FI and SI, are then obtained by the numerical integration of Rm . From them, the difference operator, DSF, is calculated using (14). Figure 3 shows these three intermediate auxiliary variables calculated as functions of VGT . Finally, the values of the parameters θ , K and RDS are directly calculated using 3
J Muci et al
Semicond. Sci. Technol. 24 (2009) 105015
125
100
RDS ( Ω )
120
θ = 0.153 V-1
RDS = 64.7 Ω K = 30.2 mA / V
115
110
20
0.6
35
Figure 2. Measured total source-to-drain resistance (symbols) of the test device, as a function of the gate overdrive. Also shown is the corresponding play-back (continuous line) obtained from the drain current model using the calculated parameters indicated in the inset.
VDS = 10 mV
n = 1.84
0.2
VDS = 10 mV
VGT ( V )
Lm = 90 nm
0.4
0.0 40
0.60 0.65 0.70 0.75 0.80 0.85 0.90 0.95
30 25 20 0.6
0.7
0.8
VGT ( V )
0.9
Figure 4. Resulting model parameters: total source-and-drain resistance, RDS , mobility degradation factor, θ, and channel conduction coefficient, K, of the test device as functions of the gate overdrive, calculated from equations (15), (16) and (17).
40
F I (Ω.V )
40
Lm = 90 nm
K ( mA / V 2 )
105
60
0 0.8
2
θ ( V -1.84 )
Rm ( Ω )
80
Measured Playback: n = 1.84 VT = 0.53 V
30 20
VDS = 10 mV
10
degradation model, that is, exponent n, remains equal for all devices of any channel length within the same lot.
Lm = 90 nm
0
4. Discussion S I ( Ω.V2 )
8
Figure 4 presents the resulting three model parameters: total source-and-drain resistance, RDS , mobility degradation factor, θ , and channel conduction coefficient, K, of the 90 nm mask channel length device, calculated in strong inversion as functions of VGS above the lower extraction limit VGSL . The source-and-drain resistance exhibits a slight gate voltage dependence [23, 24]. Likewise, the mobility degradation factor and the channel conduction coefficient, extracted by the present method, exhibit only minor gate voltage dependences. Such a small variation of the calculated parameters’ values as the gate voltage is changed, within the strong inversion range considered, is indicative of the assumed model’s suitability to represent the behavior of these devices. Figures 1 and 2 include, for comparison to the original data, the playbacks (continuous lines) obtained from inserting the calculated parameters into the drain current model. The particular values used for this play-back, indicated within the figures, correspond to those calculated at the highest values of the gate voltage shown in figure 4. The present procedure extracts the sum of the drain series and the source series resistances (RD + RS ). In general, these two resistances have comparable values, but often they are not equal. When that is the case, the separation of RDS into RS and
6 4 2 0
DSF ( Ω.V2 )
0 -10 -20 -30 -40 0.60 0.65 0.70 0.75 0.80 0.85 0.90 0.95
VGT ( V )
Figure 3. The first and second integrals, FI and SI, obtained by numerical integration of Rm , and the difference operator, DSF, calculated from equation (14), as functions of the gate overdrive.
equations (15), (16) and (17), respectively, using the known value of n = 1.84 previously obtained from the long channel device. We are assuming that the nature of the mobility 4
J Muci et al
Semicond. Sci. Technol. 24 (2009) 105015
RD might be useful for compact modeling, but it is beyond the proposed procedure’s present scope. Some methods have been put forward to extract the asymmetry between these resistances (RD − RS ). One was suggested by our own group in 1994 [25, 26] and another by Deen’s group in 1995 [27]. A review of various schemes to extract the individual values of drain and source resistances can be found in [28].
[8] [9]
5. Conclusions
[10]
We have presented a new procedure that permits us to separately extract the mobility degradation factor and the source-and-drain series resistance parameters of MOSFET compact models using a simple mobility degradation model with a known mobility degradation exponent n. This method may be applied to any single transistor, once a mobility model has been assumed or established. The procedure is not based on any fitting process. Rather, it is based on calculating the model parameters using the source-to-drain output resistance data measured in strong inversion ID (VGS ) at a small drain bias, and its first and second integrals, numerically calculated with respect to gate voltage. In addition to allowing the separation and calculation of these two important parameters, the procedure also extracts the channel conductance of the device. The proposed method has been illustrated by applying it to an experimental MOSFET of 90 nm channel length and 2.5 nm gate-oxide thickness. The resulting parameter values calculated for this device exhibit slight gate voltage-dependent variations, within the strong inversion range considered. Such near constancy of the extracted values provides reassuring evidence that the model assumed in this case is an adequate representation of the device’s behavior.
[11]
[12] [13] [14] [15]
[16] [17]
[18]
References
[19]
[1] Lou C L, Chim W K, Chan D S H and Pan Y 1998 A novel single-device DC method for extraction of the effective mobility and source-drain resistances of fresh and hot-carrier degraded drain-engineered MOSFETs IEEE Trans. Electron Devices 45 1317–23 [2] Lim G M, Kim Y C, Kim D J, Park Y W and Kim D M 1998 Additional resistance method for extraction of separated nonlinear parasitic resistances and effective mobility in MOSFETs Electron. Lett. 36 1233–4 [3] Ho C S, Lo Y C, Chang Y H and Liou J J 2006 Determination of gate-bias dependent source/drain series resistance and effective channel length for advanced MOS devices Solid-State Electron. 50 1774–9 [4] Karlsson P R and Jeppson K O 1996 An efficient method for determining threshold voltage, series resistance and effective geometry of MOS transistors IEEE Trans. Semicond. Manuf. 9 215–22 [5] Lu C Y and Cooper J A Jr 2005 A new constant-current technique for MOSFET parameter extraction Solid-State Electron. 49 351–6 [6] Risch L 1983 Electron mobility in short-channel MOSFET’s with series resistances IEEE Trans. Electron Devices 30 959–61 [7] Niu G, Cressler J D, Mathew S J and Subbanna S 1999 A total resistance slope-based effective channel mobility extraction
[20]
[21] [22]
[23]
[24] [25]
5
method for deep submicron CMOS technology IEEE Trans. Electron Devices 46 1912–4 Chen W P N, Su P, Goto K I and Diaz C H 2009 Series resistance and mobility extraction method in nanoscale MOSFETs J. Electrochem. Soc. 156 H34–8 Kar G S, Maikap S, Banerjee S K and Ray S K 2002 Series resistance and mobility degradation factor in C-incorporated SiGe heterostructure p-type metal–oxide semiconductor field-effect transistors Semicond. Sci. Technol. 17 938–41 Garc´ıa-S´anchez F J, Ortiz-Conde A, Cerdeira A, Estrada M, Flandre D and Liou J J 2002 A method to extract mobility degradation and total series resistance of fully-depleted SOI MOSFETs IEEE Trans. Electron Devices 49 82–7 Lin D W, Cheng M L, Wang S W, Wu C C and Chen M J 2007 A constant-mobility method to enable MOSFET series-resistance extraction IEEE Electron Device Lett. 28 1132–4 Liou J J, Ortiz-Conde A and Garc´ıa S´anchez F J 1998 Analysis and Design of MOSFETs: Modeling, Simulation and Parameter Extraction (New York: Kluwer) Schroder D K 2006 Semiconductor Material and Device Characterization 3rd edn (New York: Wiley) Selberherr S, Hansch W, Seavey M and Slotboom J 1990 The evolution of the MINIMOS mobility model Solid-State Electron. 33 1425–36 He J, Bian W, Tao Y, Liu F, Song Y, Hu J, Zhang X, Wu W, Wang T and Chan M 2007 Linear cofactor difference extrema of MOSFET’s drain–current and application to parameter extraction IEEE Trans. Electron Devices 54 874–8 Taur Y 2000 MOSFET channel length: extraction and interpretation IEEE Trans. Electron Devices 47 160–70 Chen K, Clement Wann H C, Ko P K and Hu C 1996 The impact of device scaling and power supply change on CMOS gate performance IEEE Electron Device Lett. 17 202–4 Chen K, Hu C, Fang P, Lin M R and Wollesen D L 1997 Predicting CMOS speed with gate oxide and voltage scaling and interconnect loading effects IEEE Trans. Electron Devices 44 1951–7 Nayfeh H M, Leitz C W, Pitera A J, Fitzgerald E A, Hoyt J L and Antoniadis D A 2003 Influence of high channel doping on the inversion layer electron mobility in strained silicon n-MOSFETs IEEE Electron Device Lett. 24 248–50 Wong M and Xuejie Shi X 2006 Analytical I–V relationship incorporating field-dependent mobility for a symmetrical DG MOSFET with an undoped body IEEE Trans. Electron Devices 53 1389–97 Morifuji E, Patil D, Horowitz M and Nishi Y 2007 Power optimization for SRAM and its scaling IEEE Trans. Electron Devices 54 715–22 Ortiz-Conde A, Garc´ıa-S´anchez F J, Liou J J, Cerdeira A, Estrada M and Yue Y 2002 A review of recent MOSFET threshold voltage extraction methods Microelectron. Reliab. 42 583–96 Kim D M, Kim H C and Kim H T 2003 Modeling and extraction of gate bias-dependent parasitic source and drain resistances in MOSFETs Solid-State Electron. 47 1707–12 Lim K Y and Zhou X 2000 A physically-based semi-empirical series resistance model for deep-submicron MOSFET I–V modeling IEEE Trans. Electron Devices 47 1300–2 Ortiz-Conde A, Liou J J and Garc´ıa S´anchez F J 1994 Simple method for extracting the difference between the drain and source series resistances in MOSFETs Electron. Lett. 30 1013–5
J Muci et al
Semicond. Sci. Technol. 24 (2009) 105015
and drain resistances from measurements on a MOS transistor IEEE Trans. Electron Devices 42 1388–90 [28] Garc´ıa S´anchez F J, Ortiz-Conde A and Liou J J 1999 On the extraction of the source and drain series resistances of MOSFETs Microelectron. Reliab. 39 1173–84
[26] Ortiz-Conde A, Garc´ıa S´anchez F J and Liou J J 1996 An improved method for extracting the difference between the drain and source resistances in MOSFETs Solid-State Electron. 39 419–21 [27] Raychaudhuri A, Kolk J, Deen M J and King M I H 1995 A simple method to extract the asymmetry in parasitic source
6