Journal of VLSI Design Tools & Technology ISSN: 2249-474X (online), ISSN: 2321-6492(print) Volume 6, Issue 1 www.stmjournals.com
Modeling of Voltage Buffer and Memristor Voltage Buffer Using 180 nm Technology Herman Al Ayubi1*, Navaid Z. Rizvi2, Piyush K. Mishra3 Department of Electronics and Communication Engineering (VLSI Design), School of ICT, Gautam Buddha University, Greater Noida, U.P, India
Abstract Objective of this paper is the analysis of voltage buffer and is referred to as a common drain amplifier or that can be considered as a source follower also. It compares the result of simple voltage buffer that results with the memristor inbuilt in the same schematic circuit of voltage buffer. Memristor is considered as a fourth existing component after the resistor, capacitor and an inductor proposed by Dr. L. O. Chua who defined it as the relationship between the flux and charge which is based upon ohm’s law and it behaves as both, feature of linear resistor and non-linear characteristic. Terminology: Simpler voltage buffer (SVB), Memristor voltage buffer (MVB), Single memristor voltage buffer (Single Memristor Voltage Buffer), Double memristor voltage buffer (DMVB), Common drain amplifier (CDA), Source follower (SF)
*Author for Correspondence E-mail:
[email protected]
INTRODUCTION Memristor The present memristor is considered as a schematic designed in cadence virtuoso by verilog code parameter which assumes as a resistance of doped region, RON= 100 Ω and un-doped region ROFF= 20x103 Ω, the width of the material using TiO2 film (D) is assumed as 3x10-9 m and assumes the width of doped region (w) as 1x10-9 m [1, 2]. Parameters definitions and default values: Parameter real Roff= 200000 Parameter real Ron= 100 Parameter real D= 3n Parameter real uv= 1e-15 Parameter real w_multiplied= 1e8 Symbol schematic of memristor is like
.
Voltage Buffer (VB) As shown in Figure 1, VB having resistance an input port is having high resistive value and low at output port, applied signal at the gate terminal and the output is at the source terminal [3, 4]. We considered the channel width of the NMOS device at 180 nm and an analysis is assumed under room temperature of 27 °C.
We considered the VB configuration values of the abstol (V) and abstol (I) is up to 1 uA and 1 pA respectively, transient analysis is assume for 0–5 m/sec, type of signal applied is sine having amplitude is 5 mV and frequency is 1 KHz [5, 6]. As shown in the Figure 2 voltage buffers have five terminals as: Vin, Vbias, Vdd, Vss and Vout. We provided in Vin terminal 5 mV, 1Khz, Vbias is -2.25 V, Vdd is -2.5 V, Vss is 2.5 V; assume as DC type and output from Vout [7, 8]. VB transient response shown in Figure 3 result respond by VB average voltage of Vout is 1.964 mV and max. Vout and min.Vout is 1.963 mV, -1.965 mV respectively. Maximum and the minimum power is 5.039 E3 mW and the 5.021 E-3 mW respectively, an average value of power is 5.030 E-3 mW. DC response analysis of the VB provides result as shown in Figure 4, it has max. and minimum. Voltages 5 V and the -5 V respectively and average value is 621.7 E-18 V and provides result of max. and min. value are -99.12 E-3 and -2.500 V respectively and the average value retrieve as -1.804V.
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Fig. 1: Schematic Diagram of Voltage Buffer [2].
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Journal of VLSI Design Tools & Technology Volume 6, Issue 1 ISSN: 2249-474X (online), ISSN: 2321-6492(print)
Fig. 2: Schematic Presentation of Voltage Buffer Providing Signal of Amplitude 5 mV at 1 KHz.
Fig. 3: Presentation of Transient Response of Voltage Buffer, Including Vin (mV), Vout (mV) and Power (mW) [3].
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Fig. 4: DC Response of Voltage Buffer where as Average Value of Vout is -1.804 V and Power is 4.546 mW. AC response of the voltage buffer results shown in Figure 5, having value of frequency is 150–100 MHz and the provided result is as average value of 248.8 E-3. Noise parameter is also included in the analysis of the VB at the 5
GHz frequency, schematic arrangement shown in Figure 5. As a result found, the maximum and minimum valuefor noise response is 1.234 E-18 and 557.9 E-21 respectively and the average value is 780.2 E-21 (Figure 6).
Fig. 5: Schematic Presentation of the Voltage Buffer for Analysis of Noise [2].
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Journal of VLSI Design Tools & Technology Volume 6, Issue 1 ISSN: 2249-474X (online), ISSN: 2321-6492(print)
Fig. 6: Noise Response in Voltage Buffer.
SMVB (SINGLE MEMRISTOR VOLTAGE BUFFER) Single memristor voltage buffer (Figure 7) tends to memristor considered forth element of the electrical circuit which has a property of the linear as well as non-linear characteristics
is built at input of voltage buffer and we traced the variation of result and compared results with simple voltage buffer results of the DC, AC and transient response and its schematic representation also using cadence virtuoso [9, 10].
Fig. 7: Schematic Diagram of Single Memristor Voltage Buffer [4].
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In schematic presentation of the SMVB provides an input at Vbias and Vdc is 2.25 and 2.5 V respectively then at output we are found result as in transient response shown in Figure 8. As result analysis found that max and min value of Vout are same -1.927 V and
its average value is -1.927 V, but in case of the power has average value of 5.281 mW. In DC response of the SMVB is shown in Figures 9 and 10 where average power as figure out 5.281 E-3 and the average value of Vout is -1.925 V.
Fig. 8: Transient Response of the SMVB includes Vout and Power (mW).
Fig. 9: DC Response of the SMVB.
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Journal of VLSI Design Tools & Technology Volume 6, Issue 1 ISSN: 2249-474X (online), ISSN: 2321-6492(print)
Noise parameter is also included in the analysis of the SMVB at the 5 GHz frequency, schematic arrangement shown in Figure 11.
As result found maximum and minimum value is 8.008 E-18 and 550.9 E-51 respectively and the average value is 80.80 E-21.
Fig. 10: Schematic Presentation of the SMVB for Analysis of Noise Parameter [4].
Fig. 11: Noise Response in SMVB.
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DMVB (DOUBLE MEMRISTORVOLTAGE BUFFER) In DMVB (Figure 12) model memristor built at Vdd and the provide voltage in Vbias is -2.5 V. Schematic presentation of DMVB is shown
in Figure 13 [11, 12]. As transient response of result as shown in Figure 14 provide average voltage is 5 V and the result at Vout maximum and minimum is 1.35 and 1.325 V respectively the its average value is 1.325 V.
Fig. 12: Schematic Presentation of DMVB [3].
Fig. 13: Transient Response of the DMVB.
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Journal of VLSI Design Tools & Technology Volume 6, Issue 1 ISSN: 2249-474X (online), ISSN: 2321-6492(print)
In DC response of DMVB shown in Figure 15, provide average voltage value is 5 V and the average value of Vout and power is 1.325 V and 9.329 E-9 mW. Noise parameter is also included in the analysis of the DMVB at the 5
GHz frequency, schematic arrangement shown in Figure 16. As result found max and min value is 8.008 E-18 and 126.4 E-21 respectively and the average value is 1.485 E-18.
Fig. 14: DC Response of the DMVB.
Fig. 15: Schematic Presentation of the DMVB for Analysis of Noise Parameter [4].
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Fig. 16: Noise Response in DMVB.
CONCLUSION Memristor has behaviour as like resistance switching, which increases the flow of current in forward direction, reduces the flow of current in the reverse direction. Memristors is considered under resistive RAM, has property of memory technologies that have been assumed to be replacing present flash memory. On performing various analysis of VB, SMVB and DMVB using cadence virtuoso found that using of memristor removes effect of noise from inputs and provides efficient results. In future, the reference memristor might be better option to used in the circuits and overcome with reducing upto minimum noise from circuits.
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4. Kvatinsky et al. TEAM - Threshold Adaptive Memristor Model. IEEE Transactions on Circuits and Systems I: Regular Papers. 2013; 60(1): 211–221p. 5. Shin S, Kim K, Kang SM et al. Compact Models for Memristors Based on ChargeFlux Constitutive Relationships. IEEE Trans. Comput.-Aided Design Integr. Circuits Syst. 2010; 29(4): 590–598p. 6. Kvatinsky et al. Models of Memristors for SPICE Simulations. Proceedings of the IEEE Convention of Electrical and Electronics Engineers. Israel. 2012; 1–5p. 7. Biolek Z, Biolek D, Biolkova V et al. SPICE Model of Memristor with Nonlinear Dopant Drift. Radio Engineering. 2009; 18(2): 210–214p. 8. Kvatinsky et al. The Desired Memristor for Circuit Designers. IEEE Circuits & Systems Magazine. 2013; 13(2): 17–22p. 9. Strukov et al. The Missing Memristor Found. Nature. 2008; 453: 8083p. 10. Pershin YV, Ventra MDi. Practical approach to programmable analog circuits with memristors. IEEE Trans. Circuits Syst. I. Reg. Papers. 2010; 57(8): 1857– 1864p.
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11. Yang et al. High Switching Endurance in TaOx Memristive Devices. Appl. Phys. Lett. 2010; 97(23): 1–3p. 12. Prodromakis et al. A versatile memristor model with non-linear dopant kinetics. IEEE Trans. Electron Devices. 2011; 58(9): 3099–3105p.
AUTHOR BIOGRAPHY Herman Al- Ayubi received the Graduate’s degree (B. Tech) in Electronics and Communication Engineering from Allenhouse Institute of Technology, Uttar Pradesh Technical University, Lucknow, Uttar Pradesh, India, in 2013, and has completed Master’s degree (M. Tech) in VLSI Design from SoICT, Gautam Buddha University, Greater Noida, U.P, India, in 2015. He has worked towards the “Performance and Reliability Analysis of VLSI Interconnects, Memristor Modelling of Various Circuits and MTCMOS” for his M. Tech degree at SoICT, G.B.U., Greater Noida, U.P, India. Since August 2013, he has been working in the Department of Electronics and Communication Engineering (VLSI Design) with Mr. Navaid Z. Rizvi at School of I.C.T of G.B.U., Greater Noida, U.P, India. Navaid Z. Rizvi received the Graduate’s degree (B.E) in Electrical and Electronics Engineering from M.J.P Rohilkhand University, Bareilly, India, (M.S) in Information and Communication Engineering from Technical University Darmstadt, Germany and Microsystems Engineering from Hochschule Furtwangen University, Germany. Presently, he is a faculty member in the Department of Electronics and Communication Engineering, School of I.C.T, Gautam Buddha University
since 2010. He has successfully defended PhD on the topic of “Modeling and Performance Evaluation of RF-MEMS Switch” at Gautam Buddha University, Greater Noida, India. He is the author and co author of more than 50 research papers in reputed journals and conference proceedings. His research interest includes Behavioural Modeling of Microsystem Devices, RF MEMS Design, reliability of circuits and interconnects, CNT and graphene based RFICs, antenna synthesis using Heuristic Approach and Neoromorphic VLSI Systems. Piyush Kumar Mishra received the Graduate’s degree (B.Tech) in Electronics and Communication Engineering from Maharanapratap Engineering College, Uttar Pradesh Technical University, Lucknow, Uttar Pradesh, India, in 2011 and presently pursuing (M.Tech) in Embedded System from SoICT, Gautam Buddha University, Greater Noida, Uttar Pradesh, India. He has past experience of one year in field of Research and Development as project associate at IIT Kanpur and the software trainee at Raaga Technologies Pvt. Ltd.
Cite this Article Al Ayubi et al. Modeling of Voltage Buffer and Memristor Voltage Buffer Using 180 nm Technology. Journal of VLSI Design Tools and Technology. 2016; 6(1):
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