Multiple-Hop Routing Based on the Pulse-Position Modulation Header Processing Scheme in All-Optical Ultrafast Packet Switching Network H. Le Minh, Student Member, IEEE, Z. Ghassemlooy, Senior Member, IEEE, and Wai Pang Ng, Member, IEEE Optical Communications Research Group, School of Computing, Engineering and Information Sciences Northumbria University, Newcastle upon Tyne, NE1 8ST, UK Email:
[email protected],
[email protected],
[email protected] Abstract— In this paper we present modeling and simulation of multiple-hop all-optical packet routing based on the pulseposition modulation header processing (PPM-HP) scheme in ultrafast optical packet switching network. Optical core node employing PPM-HP requires a dedicated routing table based on PPM scheme that will result in significantly reduced number of routing table entries. In this scheme, the header address correlation, using optical AND gates, is carried out by employing only a single bit-wise for each entry rather than a multiple-bit stream as in the existing systems thus resulting in reduced header processing time and avoiding the slow gain-recovery of AND gates. The reduced routing table also offers embedding multiple transmitting modes (unicast, multicast, broadcast) in optical layer and improves core network scalability where the number of core/edge nodes could be altered without the need for changing the number of routing table entries. The simulation results for the optical signal-to-noise ratio (OSNR) of packets at each hop are presented and compared with the theoretical calculations. Index Terms—Packet switching, pulse position modulation, pulse position routing table, address correlation, symmetric Mach-Zehnder, optical switch, OSNR.
I.
L
INTRODUCTION
imitation imposed by the speed of the current electronic devices used for switching and routing results in an unnecessary bottleneck in ultra high-speed optical networks, where the full potential of the network is not fully exploited. To overcome this limitation it would be beneficial to perform packet header processing and packet switching entirely in the optical domain at every node within the network. In recent years, a number of all-optical packet header processing and routing/switching schemes has been proposed such as (i) alloptical self-routing where the address bits within the packet header field are extracted at the intermediate node to directly control the on/off states of the node optical switches [1]. Although this scheme is relatively less complex, but it is not suitable for a large scale network because of increased header length for multiple-hop routing path, (ii) all-optical label switching scheme where packet header processing and switching operations at each node are carried out using multiple internal wavelength sources [2], thus resulting in increased node cost, and (iii) the all-optical address correlation that uses optical logic gates (AND, XOR) to match the N-bit packet header address (i.e. target node address) with all 2N
possible entries of routing table (RT) within the intermediate node. This scheme suffers from a large delay due to (i) the exponential increase in the number of RT entries with N and (ii) the response-time of the all-optical logic gates based on the nonlinear element (NLE) such as TOAD [3], UNI [4], SMZ [5], which depend on the NLE gain recovery time [6]. An alternative header processing scheme based on PPM-HP has been proposed in [7, 8], where the incoming packet-header address bits and the routing table entries are both converted into a PPM format before being compared with each other. The advantages of this scheme are (i) significantly reduced RT entry number, (ii) only a single bitwise AND gate is required for all address correlation, thus resulting in reduced address correlation time and avoiding the low response-time of alloptical logic gates, and (iii) offering multiple transmitting modes (unicast, multi-cast and broadcast) embedded in optical layer. In this paper, we introduce a multiple-hop all-optical packet routing employing PPM-HP, and investigate its performance by means of theoretical calculation and simulations. The paper is organized as follow: after introduction, multiple-hop packet switching based on PPM-HP is presented in section II. Section III shows the calculation of the multiple-hop OSNR penalty and the achieved gain in correlation-time. Results and discussions of multiple-hop packet switching and OSNR penalty are presented in section IV. Finally, section V will conclude the paper. II. MULTIPLE-HOP ROUTING USING THE PPM-HP A. Multiple-hop routing with PPM-HP Figure 1 shows an all-optical core network with K edge nodes and a number of core nodes. Each edge node is identified by a unique decimal address ∈ {0,1,2,…,K-1}. In the core network, packets are routed from a source edge node to a target edge node via a defined shortest path through a number of core nodes. At a source edge node, the incoming electrical low-speed data packets having the same target edge node are electro-optically converted and time-multiplexed onto an optical high-speed packet at bit rate of 1/Tb, where Tb is the data bit duration. The optical packet header is composed of a clock pulse and the N-bit edge-node target address (note 2N ≥ K). At a core node, based on the PPM-HP, with M output ports, see Figure 2, the packet address is extracted and converted into a PPM format by the PPM header extraction module (PPM-HEM). Converted PPM address is then
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P(t) P
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Figure 1: A core optical network with 16 edge nodes
Figure 2: Node structure based on PPM-HP
P(t+τCEM)
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Figure 3: Diagram of the PPM header extraction module for N = 4 0000000010000000 xPPM(t) Node 1 – E1(t) 1110010010001010 0th 1st
…
…
8th
… …
m1(t)
&1
0000000010000000
15th
Figure 4: Correlation between xPPM(t) of address #8 (i.e. “1000”) and E1(t) of core node 1
compared with M entries of the pulse position routing table (PPRT) to generate control signals for the optical switch (OS) module where data packet is switched out of node [8]. Example in Table I illustrates the composition of the PPRTs for three core nodes numbered as 1, 2 and 3 which are highlighted in Figure 1, with N = 4 and all node have one input and M = 3 outputs. If a packet is routed from the source edge node #6 (0110) to the target edge node #8 (1000), the decimal value of the target address, which is 8, matches with one of the values in the sets D1, D2 and D2 in the PPRTs of the core nodes 1, 2, 3, respectively. As a result, packet will be routed to the edge node #8 through core nodes 1, 2 and 3 by subsequently switched to the expected output ports O-1, O-2 and O-2, respectively. B. Node structure employing PPM-HP The PPM-HP core node with M-output ports is composed of a number of main modules including clock extraction module (CEM), PPM-HEM, PPRT, AND gates, OS control module and OS module, see Figure 2. The incoming packet P(t) is split and input to the CEM, PPM-HEM and OS with the delays of 0,
τCEM (required time for clock extraction) and τtot (total required time for PPM header processing), respectively. CEM extracts the clock pulse c(t) by employing two cascading SMZ switches where the input of CEM is the incoming packet and the SMZ control signals are the amplified and delayed (by Tb) versions of the incoming packet. c(t) is then split and applied to the SMZ-demultiplexer-based serial-to-parallel converter (SPC), PPM address conversion (PPM-AC) and PPRT modules with the delays of 0, τAC and τPPRT, respectively for enabling and synchronizing SPC, PPM-AC and PPRT modules, respectively. Note that x(t) = αc(t+τAC) where α is the splitting factor. The packet header bits [aN-1 aN-2 … a0], where aN-1 is the most significant bit, are extracted from the delayed packet αP(t+τCME) in the SPC before being applied to the PPM-AC module via optical amplifiers and delay units [τN-1,…,τ1, τ0], see Figure 3. The signal at the output of the PPM-AC module is given by:
N −1 xPPM (t ) = x t + ∑ ai × 2i × Ts , i =0
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ai ∈ {0,1} .
This full text paper was peer reviewed at the direction of IEEE Communications Society subject matter experts for publication in the IEEE GLOBECOM 2006 proceedings.
(1)
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…
attn. Attenuator Optical fiber Optical pre-amplifier
Figure 5: The signal and ASE noise power propagation from the source edge node to the target edge node via H core nodes
Note that the additional delay induced to x(t) is equal to the product of decimal value of the header address and a defined PPM slot duration Ts. The delay is generated using a series of 1×2 optical switches based on SMZ employing a semiconductor optical amplifier (SOA) as the NLE. At the ith switch (i = 0,1,…,N-1), the single input pulse is either switched to the output 1 (OP1) or output 2 (OP2) depending on the status “1” or “0” of the address bit ai , respectively. The switched pulse appearing at OP1 will experience a delay of 2 i × Ts whereas no delay is introduced at OP2. The PPRT is initialized by single pulse e(t), i.e. (1 – 2α)c(t+τPPRT) with delay units. PPRT outputs are
E k (t ) = ∑ e(t + d k × Ts ),
∀ d k ∈ Dk .
(2)
dk
Each Dk set contains all of the decimal values of address patterns assigned for the node output kth (k = 1,2,…,M), see Table I. If the equivalent decimal value of incoming packet header address (i.e. target edge-node address) matches one element of the Dk, then that packet is switched to the kth output of the node. Address correlations are carried out by an array of optical AND gates based on the SMZ switches, see Figure 4, with the logical outputs are given by: N −1 i 1 if d k = ∑ ai × 2 ∀k i =1 m k (t ) = x PPM (t ) × E k (t ) = , (3) N −1 0 if d k ≠ ∑ ai × 2 i ∀k i =1 k = 1, 2,..., M d k ∈ Dk . Actually, only one bit-wise AND operation is required to carry out address correlation for each PPRT entry. Because of PPM format of xPPM(t), the matching pulse vector M(t) = [m1(t) m2(t) … mM(t)] for M PPRT entries has only one non-zero element. If there are more than one non-zero elements in M(t) due to pulses located in multiple PPRT entries at the 8th position, the packet is switched to multiple outputs multicast mode rather than a single output O-1. If all entries have pulses at the 8th position, then the packet is broadcasted from this particular core node. For switching a short packet, where an OS with a short switching window is a requirement, a single matching pulse would be ideal. However, for switching long packets, the mk(t) is passed through the OS control module to obtain a block of high-powered pulses Ck(t), see Figure 2. The
OS control module is composed of amplifiers and multiple delay units to ensure that the gain of the SWk in OS is flat during the switching duration. III. OSNR PERFORMANCE AND CORRELATION-TIME GAIN A.
OSNR Performance The data packet with power Pin is transmitted from a source edge node to a target edge node via H core nodes, see Figure 5. The packet signal is first amplified and passed through a fiber span before being applied to a node. The unpolarized amplified spontaneous emission (ASE) power of pre-amplifier and OS modules is given by [9]:
(4) Pase ,i = 2n sp ,i hf 0 (Gi − 1)B0 i = 0,1,...H . where nsp,i and Gi are the spontaneous-emission factor and the gain, respectively, of the amplifier, where i = 0 represents the pre-amplifier and i > 0 denotes the amplifier in OS modules. hf0 and B0 are the product of plank constant with the operating optical frequency and the optical bandwidth of the system (i.e. filter optical bandwidth), respectively. The OSNR after a chain of H core nodes is given as the ratio of the signal power to the accumulated ASE noise powers after Hth core node: H −1 G H ∏ (Gh Lh ) Pin h=0 , (5) OSNR H = H −1 H Pase ,h ∏ (G k Lk −1 ) + Pase , H ∑ h=0 k = h +1 where Lh is the total loss incurred from the output of previous-hop OS to the next-hop OS. B. Correlation-time Gain The correlation-time gain R is defined as the ratio of the correlation-time required for sequentially correlating packet address with entire 2N routing table entries and the correlationtime required for correlation-time required for correlating PPM–converted address with M PPRT entries. Assuming that M AND gates are used and the minimum duration required between two AND operations is TAND, due to the gain recovery of NLE, both sequential address correlation and PPRT correlation will require 2N×N×TAND/M and 2N×Ts seconds, respectively, with TAND ≥ Tb. Thus, R is:
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(a)
(b)
(c)
(d)
(e)
(f)
(g) (h) (i) Figure 6: The waveforms of (a) input packets to node 1, (b) extracted clock at node 1, (c) extracted clock at node 2, (d) extracted clock at node 3, (e) switched packets to node 1 – output 1, (f) switched packets to node 1 – output 2, (g) switched packets to node 1 – output 3, (h) switched packets to node 2 – output 2, (i) switched packets to node 3 – output 2
R=
N × T AND M × Ts
(6)
IV. RESULTS AND DISCUSSIONS Three-hop routing (H = 3) based on PPM-HP is simulated in VPI simulation package according to the link from edge node #6 to #8 in the core network depicted in Figure 1 and the parameters given in Table II. Each packet has a clock bit, N = 4 bits of address to fully encode the number edge node addresses and 512 bits in payload. Sixteen optical data packets having target addresses indexed from 0 to 15 are transmitted at 100 Gb/s from edge node #6 with the packet separation is 1 ns, see Figure 6(a). The pre-amplifier will boost the launch power Pin before the packets are transmitted through the first fiber span. The links between core nodes are composed of fiber spans and attenuators. The suitable core node input power of 1.4 mW is maintained for node performance consistency by using the attenuators (attn.). Each fiber span comprises of 30 km and 5 km of SMF and DCF, respectively. The extracted clock pulses from the incoming packets observed at core nodes 1, 2 and 3 are displayed in Figures 6(b), (c), and (d), respectively. In the 1st hop, input packets are
switched to the outputs O-1, O-2 and O-3, see Figures 6(e), (f) and (g). At the 2nd and 3rd hops, packets with target address #8 that arrives to the nodes 2 and 3 are switched to node 2 – O-2 and node 3 – O-2, see Figures 6(h) and (i) respectively. Finally, a packet reaches the edge node #8 after being routed via 3 core nodes. Note from Figure 6 the presence of power overshooting at the start of the switched packets. This is due to signal amplification by the SOA of SMZ switch in OS module leading to the SOA gain saturation, thus reducing the overall gain of the OS for the subsequent signal. This overshooting effect depends on the number of bits “0” and “1” at the start of incoming packets, which is accumulated after each hop, thus resulting in the magnitude variation of the extracted clock pulses and hence data packets with different bit patterns. Figures 6(b), (e), (f) and (g) show low magnitude variation of clock and switched packets at hop 1 whereas the clock and switched packets after hops 2 and 3 display larger magnitude variations. Note that the PPRT of core node 1 in Table I defines the broadcasting and multicasting modes for the incoming packets with target addresses of #0 and #1. As a result, all outputs of node 1 will have the switched packets which are addressed of #0, while outputs O-1 and O-3 will have the switched packet
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45
TABLE II MAIN CALCULATION AND SIMULATION PARAMETERS Data packet bit rate – 1/Tb
T he or etica l, O SNR 0 = 40 dB
1554 nm
Data & control pulse widths – FWHM
2 ps
PPM slot duration Ts
5 ps
Average transmitted power Pin Average power of Ck(t) Optical bandwidth Bo
5 mW
9 dB
First span loss 1/L0
- 9 dB
Pre-amplifier nsp
1.4
SOA length
500 µm
SOA nsp
2
Inject current to SOA
150 mA 0.25
Splitting factor α
addressed of #1. This transmitting mode selection property of PPM-HP routing will permit grouping of a number of different target edge nodes by using a single address such as #0 or #1. The noise power increases proportionally with the number of hops as expressed in (5) and depicted in Figure 5. Figure 7 shows the theoretical and simulated OSNR results against the number of hops. In theoretical calculation, we have assumed that all switched packets have the same power, however, in practice, packets with different starting patterns experience magnitude variation which increases with the number of hops thus resulting in reduced packet powers. This effect is illustrated in Figure 7 where for lower number of hops (i.e. ≤ 3) there is a good agreement between the theoretical and simulated OSNR results whereas for higher number of hops the simulated OSNR reduces faster than the predicted one. At hop 5, the simulated OSNR drops to 16dB, which is 4 dB lower than predicted OSNR (i.e. the required OSNR of 20 dB for proper system operation [9]). Increasing the input OSNR0 does not result in much improved OSNR in later hops because Pase,0 < Pase,h and the hop gain is unity. Employing optical filter with reduced bandwidth will result in reduced ASE, but the ASE reduction is offset by spreading of signal pulses in highspeed packets with a very short duration Tb. By assuming that TAND = Tb, the proposed PPM-HP improves the correlation-time gain R by a factor of 2.67. Further improvement in R could be achieved by reducing Ts but at the cost of increased susceptibility of PPM-HP to the timing jitter in a longer routing path (i.e. more hops and longer fiber spans).
The paper has presented the PPM-HP node operation, multiple-hop routing and OSNR performance for a core network with 16 edge nodes. PPM-HP offers faster correlation time and avoids the speed limitation imposed by slow gain-
0
1
2
3
4
5
Number of hops
Figure 7: OSNR of transmitted signal vs. the number of hops
recovery of NLE-based optical AND gates where a single bitwise operation is required per PPRT entry correlation. PPRT structure provides packet switching in multiple transmitting mode capability (i.e. unicast, multicast and broadcast) which are embedded in optical layer. It also allows adding/dropping core/edge nodes (provided that 2N ≥ K) with no effect on the number of PPRT entries. Predicted and simulated results for OSNR illustrated that after four hops, the OSNR dropped to the required system level. The proposed PPM-HP node can be further improved to deal with incoming packets from multiple inputs or different wavelengths by employing input buffers to avoid the collision between the incoming packets and to provide sufficient time for the CEM, HEM, AND gates and OS to recover fully following every header processing. The proposed PPM-HP is also a potential solution for IP over all-optical network where every node is only required to resolve a subset of the IP header address using PPRT. REFERENCES [1]
[2]
[3] [4] [5] [6]
[7]
V. CONCLUSIONS
25
10
- 18 dB
Pre-amplifier gain G0
Simu la tio n, OSNR 0 = 40d B
15
18 dB
Total loss of a hop 1/Lh (h = 1,2,…H)
Simu la tio n, OSNR 0 = 34d B 30
20
1.4 mW 300 GHz
Gh (h = 1,2,…H)
Simu la tio n, OSNR 0 = 28d B
35
64 bytes (512 bits)
Wavelength of data packet
T he or etica l, O SNR 0 = 34 dB
40
100 Gb/s OSNR (dB)
Packet payload length
T he or etica l, O SNR 0 = 28 dB
[8] [9]
X. C. Yuan, V. O. K. Li, C. Y. Li, and P. K. A. Wai, "A novel self routing address scheme for all optical packet switched networks with arbitrary topologies," IEEE Light. Tech., vol. 21, pp. 329-339, 2003. D. J. Blumenthal, B. Olsson, G. Rossi, T. E. Dimmick, L. Rau, M. Masanovic, O. Lavrova, R. Doshi, O. Jerphagnon, J. E. Bowers, V. Kaman, L. A. Coldren, and J. Barton, "All-optical label swapping networks and technologies," IEEE Light. Tech., vol. 18, pp. 20582075, 2000. T. Houbavlis and K. E. Zoiros, "Ultrafast pattern-operated alloptical Boolean XOR with SOA assisted Sagnac switch," Opt. Eng., vol. 42, pp. 3415-3416, 2003. S. A. Hamilton and B. S. Robinson, "40 Gb/s all-optical packet synchronization and address comparison for OTDM networks," IEEE Pho. Tech. Lett., vol. 14, pp. 209-211, 2002. K. E. Stubkjaer, "Semiconductor optical amplifier-based all-optical gates for high-speed optical processing," IEEE. Quan. Elec., vol. 6, pp. 1428-1435, 2000. Y. Ueno, S. Nakamura, and K. Tajima, "Nonlinear phase shifts induced by semiconductor optical amplifiers with control pulses at repetition frequencies in the 40-160 Ghz range for use in ultrahighspeed all-optical signal processing," Opt. Soc. America, vol. 19, pp. 2573-2589, 2002. H. Le-Minh, Z. Ghassemlooy, and W. P. Ng., "Ultrafast header processing in all-optical packet switched-network," proc. of ICTON2005, Barcelona, Spain, vol. 2, pp. 50-53, 2005. H. Le-Minh, Z. Ghassemlooy, and W. P. Ng., "A novel node architecture for all-optical packet switched network," proc. of NOC2005, London, UK, pp. 209-216, 2005. G. P.Agrawal, Lightwave Technology: Telecommunication Systems. NewYork: Wiley-Interscience, 2005, ch. 6.
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