INSTITUTE OF PHYSICS PUBLISHING
JOURNAL OF MICROMECHANICS AND MICROENGINEERING
J. Micromech. Microeng. 14 (2004) 335–340
PII: S0960-1317(04)68395-1
Polydimethylsiloxane-based pattern transfer process for the post-IC integration of MEMS onto CMOS chips Daniel Sang-Won Park, Kabseog Kim, Brandon Pillans and Jeong-Bong Lee Erik Jonsson School of Engineering and Computer Science, The University of Texas at Dallas, Richardson, TX 75083, USA E-mail:
[email protected]
Received 4 September 2003 Published 18 November 2003 Online at stacks.iop.org/JMM/14/335 (DOI: 10.1088/0960-1317/14/3/004) Abstract This paper presents a novel pattern transfer process of LIGA and UV-LIGA MEMS onto CMOS chips using polydimethylsiloxane (PDMS) replication and electroplating-based post-IC integration techniques. An array of cylindrical posts was fabricated by the standard LIGA process and an inverse replica was made using a PDMS replication technique. The replicated PDMS mold was used to transfer the LIGA MEMS onto a CMOS chip using electroplating. For the pattern transfer of UV-LIGA MEMS onto CMOS chips, double-layered circular spiral inductors were fabricated using the UV-LIGA technique as metallic master molds. Inverse replicas of the inductors were built in PDMS as double-layered PDMS electroplating mold (PEM). This PEM was aligned and attached onto the chips, and electroplating was performed to transfer the metallic UV-LIGA MEMS inductors onto the chips. The transferred inductors showed a self-resonant frequency of 7.5 GHz, an inductance of 2.11 nH, and a Q-factor of 78.9 at 0.6 GHz.
1. Introduction Integration of microelectromechanical systems (MEMS) and microelectronics is essential to utilize the benefits of both micromachining techniques and already-established integrated circuit (IC) technologies. The integration of LIGA (a German acronym that stands for lithography, electroplating, and molding) onto microelectronics provides advantages of LIGA high aspect ratio microstructures (HARMs) including higher actuation force and larger displacement in actuator systems, higher sensitivity due to larger mass in sensor application and on-chip signal sensing and controlling between MEMS and microelectronics. Recently, several efforts were made for the integration of LIGA microstructures onto complementary metal oxide semiconductor (CMOS) wafers/chips with the use of polymethyl methacrylate (PMMA) pattern transfer process and molding techniques. Menz et al reported the quasimonolithic integration of LIGA microstructures on top of a CMOS wafer using aligned molding with hot embossing and 0960-1317/04/030335+06$30.00
electroplating [1]. Both et al also demonstrated the integration of LIGA microstructures on microelectronic circuits using hot embossed polymer molding by pick-and-place assembly and electroplating [2]. On the other hand, Stadler et al realized the direct integration of LIGA structures with CMOS circuitry and demonstrated a one-dimensional cantilever accelerometer [3]. However, the damage from the direct exposure of synchrotron radiation caused the degradation of the performance of the microelectronic circuits. Ultraviolet (UV)-LIGA also showed its direct integration capability to accelerometers and angular rate sensors onto CMOS wafers using thick photoresist molds for electroplating [4]. This paper presents the realization of polydimethylsiloxane (PDMS) pattern transfer of LIGA HARMs and UV-LIGA microstructures onto CMOS test chips. PDMS has been used mostly in microfluidics. Two examples include a fluidic switch and a side channel flow controller [5] and three-dimensional micro-channels [6]. In this work, PDMS replication is utilized for simple and inexpensive generation of thick electroplating molds for
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CMOS-compatible electroplating technique. Such a PDMSbased pattern transfer process does not require injection molding/hot embossing machines for molding, and it can eliminate the possible degradation in circuit performance by direct synchrotron radiation exposure. In this paper, fabrication processes for the integration of LIGA HARMs and UV-LIGA microstructures onto circuit chips are presented. In addition, processing issues and the characterization of the transferred microstructures are discussed.
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2. Pattern transfer of LIGA HARMs A pattern transfer technique for the integration of the LIGA HARMs onto a CMOS chip was investigated using PDMS replication [7] and CMOS-compatible electroplating techniques. PDMS used in this work is optically transparent, inexpensive and commercially available (a set of RTV 615A (pre-polymer) and 615B (a curing agent), GE Silicones, Waterford, NY). Figure 1 shows the process flow for the PDMS-based pattern transfer of LIGA HARMs onto a chip. The standard LIGA process was used to prepare a metallic master mold that has an array of cylindrical posts on a stainless steel substrate (figure 1(a)). A mixture of pre-polymer PDMS and a curing agent was cast onto the metallic master mold (figure 1(b)). A flat glass with a weight was then placed on top of the cast PDMS to eliminate the formation of the thin layer of PDMS on top of the metallic mold. The sample was cured at 100 ◦ C for 1 h. The PDMS mold was then peeled off with care from the metallic master mold (figure 1(c)). Figure 2(a) shows scanning electron microscope (SEM) photomicrograph of 500 µm high nickel posts (200 µm in diameter) in a metallic master mold prepared by the standard LIGA process and figure 2(b) shows the replicated PDMS mold. Note that most of processing steps were carried out in non-clean room environment except for a few steps in the preparation of an x-ray mask for the fabrication of the first metallic master mold. Test chips (approximately 3 mm by 3 mm in size) were fabricated using the CMOS foundry service, MOSIS [8]. Although the integration of MEMS on microelectronics is usually preformed on a wafer-scale, there are demands for prototype chip-scale integration in small laboratories and businesses. In these cases, special care [9] must be given for the post-IC integration process of MEMS onto small chips. The test chip was attached on a Si wafer and surrounded by four Si supporting pieces with polyimide PI2555 (HD Microsystems, Detroit, MI) as an adhesive prior to the integration process of the LIGA HARMs onto the chip. Figure 1(d ) shows a test chip prepared with supporting Si pieces on a Si wafer with the replicated PDMS mold on it. The size of the supporting Si pieces should be a little bit larger than the test circuit chips so that the edge-bead problem would not occur in the chip areas. The thickness of the supporting pieces should be the same as the thickness of the chips, and the gaps between the chips and supporting Si pieces should be minimized so that seed layer deposited in the subsequent processing maintains continuous current conduction path in the electroplating process. Substantial areas between the chips were in intimate contact with nearly 0 µm gap. Only a small 336
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Figure 1. The process flow for the pattern transfer of LIGA HARMs: (a) LIGA-processed metallic master mold; (b) PDMS cast onto the metallic mold; (c) the replicated PDMS mold; (d) PDMS mold on a Si circuit chip with metallic seed layer and adhesive polyimide layer; and (e) transferred LIGA HARMs on a chip.
portion of areas between the chips showed a gap of at most 15 µm. Once the chip was attached on a Si carrier substrate, a Cr (20 nm)/Cu (200 nm) seed layer was deposited using
PDMS-based pattern transfer process for the post-IC integration of MEMS onto CMOS chips
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Figure 2. SEM photomicrographs for (a) a LIGA-processed metallic mold insert and (b) a replicated PDMS mold.
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Figure 3. An SEM photomicrograph of transferred LIGA HARMs on a chip.
magnetron sputtering to ensure step coverage of seed layer throughout the sample. For the integration of LIGA HARMs onto the test chip, it was necessary to introduce an adhesive layer between the test chip and the replicated PDMS mold. A 3 µm thick polyimide PI2555 layer was spin-coated on the chip. The replicated PDMS mold was then cut into 5 mm by 5 mm pieces, and the PDMS mold was aligned and attached to the test chips under the contact aligner using a low magnification microscope with an alignment accuracy of less than 20 µm (figure 1(d)). Because there might be air entrapped between the PDMS mold and the chip after PDMS was attached onto the chip with PI layer, a vacuum pump was used to remove the air, followed by curing of PI layer. Plasma etching was carried out to remove the PI layer to expose the seed layers for electroplating using 5% CF4/O2 at 300 mTorr with an incident power of 300 W for approximately 20 min. Nickel electroplating was carried out at 55 ◦ C with a current density of 10 mA cm−2 to create metallic HARMs on the test circuit chip through the PDMS mold in nickel electroplating bath (Ni(SO3·NH2)2 (nickel sulfamate 450 mL, H3BO3 (boric acid) 37.5 g and C12H25NaO4S (sodium dodecyl sulfate (or lauryl sulfate) 3 g in 1 L of de-ionized water). Finally, the PDMS
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Figure 4. The process sequence for the PDMS-based pattern transfer process for a spiral inductor: (a) spin-coating of PDMS; (b) peeled-off PDMS; (c) PDMS mold on a Si circuit chip with bottom electrodes, metallic seed layer and adhesive polyimide layer; and (d ) transferred metallic inductor on a chip.
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Figure 5. (a) SEM photomicrographs of a metallic master mold for 2-turn circular spiral inductor; (b) the corresponding PDMS mold; (c) optical photomicrographs for the PDMS mold on a chip; (d) the PDMS mold after PR removal in the top trenches in PDMS; (e) SEM photomicrograph of the transferred inductor on a chip.
mold was removed by immersing the sample in Dynasolve 210 (Dynaloy, Inc., Indianapolis, IN) for less than 1 h. The adhesive PI layer was removed by plasma etching and the seed layer was removed in the metal etchant (figure 1(e)). The transferred 500 µm thick nickel posts on the chip are shown in figure 3. The transferred metallic HARMs on the chip showed no observable dimensional changes compared to the original metallic master mold.
3. Pattern transfer process of UV-LIGA MEMS The PDMS-based pattern transfer process in conjunction with electroplating was further investigated for the integration 338
of UV-LIGA microstructures on test circuit chips. Radio frequency (RF) MEMS passive components such as airsuspended circular spiral inductors were chosen as test vehicles. Figure 4 shows the process sequence for the pattern transfer process of such inductors. A UV-LIGA process with SU-8 2025 photoresist (MicroChem, Newton, MA) was used to prepare a metallic master mold for circular spiral inductors (figure 4(a)). Figure 5(a) shows the SEM photomicrograph of the metallic master mold in nickel for the spiral inductor (width of 80 µm and gap of 80 µm for the inductor coil). The metallic master mold is a double-layered structure and it consists of 45 µm thick coil structures at the bottom and
PDMS-based pattern transfer process for the post-IC integration of MEMS onto CMOS chips
45 µm thick via structures on top. This double-layered metallic master mold was used for the PDMS replication process to obtain a double-layered PDMS electroplating mold (PEM) (figure 4(b)). Such a PEM prevents deformation of mold structures, encountered in our previous work [10], by virtue of the additional PDMS bottom layer (figure 5(b)), which was used for both thick sacrificial layer and electroplating mold for via post structures. The test chips on a carrier Si substrate were prepared with 5 µm thick bottom electrodes using SJR5740 positive photoresist (Shipley, Phoenix, AZ) mold in a copper electroplating bath (CuSO4·5H2O (cupric sulfate) 250 g and H2SO4 (sulfuric acid) 50 mL in 1 L de-ionized water). Copper plating was carried out at room temperature with a current density of 5 mA cm−2. Once the SJR5740 photoresist mold was completely removed and the PI layer was coated, the replicated PDMS was transferred to the test chips using the same method described in section 2, followed by curing of PI layer (figure 4(c)). After the PI layer was opened, copper was electroplated to fill up the bottom trenches for via posts. A bi-layer of Ti (20 nm)/Cu (200 nm) electroplating seed layer was then deposited in the top PDMS trenches by e-beam evaporation. Since there was an electrical connection from the bottom surface in the top trenches to the top surface of PDMS, it was necessary to remove the seed layer in the top surface of PDMS to prevent any unnecessary electroplating in the top PDMS surface. Hence, S1813 (Shipley, Phoenix, AZ) positive photoresist (PR) was poured on the PDMS mold, and then overflowing PR was scraped off by a piece of transparency. After baking of the PR, the optimal exposure dose of 200 mJ cm−2 for the complete exposure of the PR on the top PDMS surface and partial exposure of the PR in the top PDMS trenches was used. Once the PR in the top surface of PDMS was developed, the unnecessary seed layer on the top PDMS surface was etched away (figure 5(c)). Flood UV exposure was performed to remove the PR in the top PDMS trenches (figure 5(d)). Another copper electroplating step was performed to fill up the top trenches of the PDMS mold, followed by the removal of the PDMS mold, adhesive PI layer and seed layer, resulting in the complete pattern transfer of UV-LIGA inductors on chips (figure 4(d)). Figure 5(e) shows SEM photomicrograph of the overall view and the close-up view of a via post for the transferred spiral inductor on the test chip with the air suspension gap of 45 µm.
Figure 6. An SEM photomicrograph for the replicated PDMS showing residual thin layer of PDMS where Ni posts were present.
Figure 7. Vertical and lateral etch rates of PDMS.
lateral etch rates of PDMS when 8.75% O2 in CF4 was used at the incident power of 300 W for various working pressures. Since the lateral etch rate of PDMS is not zero, care should be taken to minimize the dimensional change of the transferred structures. 4.2. RF characterization
4. Discussions and RF characterization 4.1. Characterization in plasma etching of PDMS Although either a flat glass with a weight was placed on top of the cast/spin-coated PDMS or the sandwich molding configuration [6] was used to eliminate the formation of a thin PDMS residual layer on top of metallic master mold, a residual thin layer (approximately a few micrometer) was formed in the replicated PDMS mold. Figure 6 shows an SEM photomicrograph of this thin layer of PDMS. This thin layer in the PDMS mold must be opened for the pattern transfer process. Dry etching using a reactive ion etcher with a mixture of CF4 and O2 gases was used. Figure 7 shows the vertical and
For the characterization of the RF performance of the transferred inductor, the same type of circular spiral inductor was fabricated on 1–10 cm Si substrate with 2 µm thick SiO2 using the same process. The RF characteristics of the transferred inductor were measured using Anritsu 37369A vector network analyzer with a Cascade Summit 12k on-wafer probing system. First, the Cascade HPC150 ground-signal-ground (GSG) probes were calibrated using a Cascade 114-456A calibration substrate. The calibration method used was Load–Reflect–Reflect– Match (LRRM) using Cascade WinCal software v2.30 and the S-parameter data were captured using the same software in the frequency sweep range of 0.4–40 GHz. 339
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transfer of multiple numbers of metallic RF/microwave passive modules onto active circuit containing substrates in a wafer level to create a future generation high performance intelligent microsystems in low cost manner.
Acknowledgments
Figure 8. Q-factor and series inductance (Ls) of the PDMS pattern transferred air-suspended 2-turn spiral inductor.
In order to eliminate the effect of parastics in ground planes and signal pads from the device under test (DUT), deembedding of these parastics was essential [11]. After the de-embedding procedure, de-embedded Y-parameters were used to obtain the series inductance (Ls) and quality factor (Q-factor) of the transferred inductor by Ls = Im(1/y11)/ω and Q = Im(1/y11)/Re(1/y11). Figure 8 shows the Q-factor and the series inductance as a function of frequency for the PDMS pattern transferred 2-turn circular spiral inductor. The transferred inductor showed a self-resonant frequency of 7.5 GHz, an inductance of 2.11 nH, and a Q-factor of 78.9 at 0.6 GHz (the peak Q-frequency). The low peak Q-frequency is due to the use of low-resistivity Si substrate and large outer dimension of the inductor. This can be substantially improved by using a high-resistivity Si substrate and optimizing the design for the given inductance [12].
5. Conclusions A PDMS-based pattern transfer process using electroplatingbased post-IC integration techniques was accomplished by realizing the pattern transfer of LIGA HARMs onto CMOS test chips. The UV-LIGA RF MEMS passives were also transferred onto CMOS chips using double-layered PDMS electroplating mold (PEM) and electroplating techniques. The RF characteristics of the transferred 2-turn circular spiral inductor were measured to obtain a self-resonant frequency of 7.5 GHz, a series inductance of 2.11 nH and a Q-factor of 78.9 at 0.6 GHz. Since this process is low temperature and substrateindependent in nature, it may be used in a wide range of applications including the direct integration of 3D thick microstructures onto circuit chips. One could envision pattern
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This work was supported by the National Science Foundation under the grant ECS-0296108. The supports of UTD clean room staffs and machine shop staffs for the fabrication of devices are acknowledged. The LIGA mold insert was fabricated at the Center for Advanced Microstructures and Devices (CAMD) at Louisiana State University (LSU). We thank the support of Raytheon System Company for the high frequency measurement of RF devices. Valuable technical discussions with Dr M Tinker, Mr A Nallani, Mr H Lu and Mr K Colinjivadi of UTD Micro/Nano Devices and Systems Laboratory are greatly appreciated.
References [1] Menz W, Bacher W, Bier W, Hagena O F, Mohr J and Seidel D 1996 Combination of LIGA with other microstructure technologies Microsyst. Technol. 2 162–6 [2] Both A, Bacher W, Heckele M, Muller K-D, Ruprecht R and Storhrmann M 1996 Fabrication of LIGA-acceleration sensors by aligned molding Microsyst. Technol. 2 104–8 [3] Stadler S and Ajmera P K 2001 Integration of LIGA structures with CMOS circuitry Sensors Mater. 14 151–66 [4] Chang S et al 1998 An electroformed CMOS integrated angular rate sensor Sensors Actuators A 66 138–43 [5] Duffy D C, Schueller O J A, Brittain S T and Whitesides G M 1999 Rapid prototyping of microfluidic switches in polydimethylsiloxane and their actuation by electro-osmotic flow J. Micromech. Microeng. 9 211–7 [6] Jo B H, Lerberghe L M V, Motsegood K M and Beebe D J 2000 Three-dimensional micro-channel fabrication in polydimethylsiloxane (PDMS) elastomer J. Microelectromech. Syst. 9 76–81 [7] Kim K, Park S, Lee J-B, Manohara H, Desta Y, Murphy M and Ahn C H 2002 Rapid replication of polymeric and metallic high aspect ratio microstructures using PDMS and LIGA technology Microsyst. Technol. 9 5–10 [8] The metal oxide semiconductor implementation service (MOSIS) VLSI Fabrication Service, University Southern California, CA, USA [9] Lee J-B, English J, Ahn C-H and Allen M G 1997 Planarization techniques for vertically integrated metallic MEMS on silicon foundry chips J. Micromech. Microeng. 7 44–54 [10] Park S W, Kim K S, Davis W A and Lee J-B 2003 Wafer level batch transfer process of RF MEMS passive device using PDMS 35th Int. Symp. on Microelectronics (2002) pp 169–74 [11] Arcioni P, Castello R, De Astis G, Sacchi E and Svelto F 1998 Measurement and modeling of Si integrated inductors IEEE Trans. Instrum. Meas. 47 1372–8 [12] Yue C P and Wong S S 2000 Physical modeling of spiral inductors on silicon IEEE Trans. Electron Devices 47 560–8
