Reference Design Cookbook 2 - Power Management - Talking ...

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Reference Design Cookbook II Power Management Products 2Q 2006

2

➔

Reference Design Cookbook Welcome to TI Power Management’s Second in a Series of Reference Design Cookbooks Welcome to TI’s latest Power Management Cookbook! Based on popular demand and distribution of over 20,000 copies of the first Reference Design Cookbook, we are happy to bring you Issue 2. This is a collection of complete power solutions and design documentation from TI’s extensive library of reference designs and evaluation modules (EVMs) available to our customers. It includes input from Robert Kollman, his Design Services team and TI Applications Engineers. TI has hundreds of other reference designs that may be found at: www.ti.com/powerreferencedesigns. If you want to view more of these, please check this website. It is frequently updated with new circuits. If you would like to access the first issue of the Cookbook from 2005, please download at the URL referenced above, or request a copy by calling; 972-644-5580 and mention Lit #: SLUB009. TI hopes you enjoy these “recipes”, and that this Cookbook will help simplify and streamline your power supply designs.

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Texas Instruments 2Q 2006

Table of Contents

Converter Design Topology

➔

Inside VIN

VOUT

IOUT (A)

Part Number

Page

Synchronous Boost

0.9 to 6.5

1.8 to 5.5

0.5

TPS61020

4

Synchronous Buck

3.8 to 17.0

3.3

1.5

TPS62111

6

Synchronous Buck

3.1 to 3.5

1.8

3.0

TPS54317

8

Synchronous Buck

6.0 to 18.0

3.3

3.0

TPS54356

10

Synchronous Buck

4.25 to 5.75

3.3

20.0

TPS40021

12

Synchronous Buck

5.5

1.0

4.0

TPS40040

14

Synchronous Buck

12.0

1.8

5.0

TPS40100

16

Synchronous Buck

10.0 to 14.0

1.5

10.0

TPS40190

18

Dual Synchronous Buck

6.5 to 15.0

3.3, 1.5

15.0, 10.0

TPS5124

20

Dual Synchronous Buck with Regulator

4.75 to 5.25

1.22, 3.3, 2.5

2.0, 2.0, 0.3

TPS75003

22

Non-Synchronous Buck

10.8 to 33.0

3.6

3.0

TPS40200

24


4.5 to 8.0

1.4

1.6

TPS40222

26


10.8 to 19.8

5.0

3.0

TPS5430

28

12.0

2.5, 0.4

6.0, 3.0

TPS51116

30

34.0 to 57.0

12.0

1.0

TPS23750

32

–48.0

12.0

10.0

UCC2897

34

4.5 to 5.5

12.0

1.0

UCC3807

36

Synchronous Battery-Pack Charger

13.0 to 24.0

12.0 to 19.2

0 to 6.0

bq24721

38

Digital Half Bridge

36.0 to 75.0

12.0

8.0

UCD8220

40

Multi-Channel Buck for DDR Isolated Flyback for Power over Ethernet Isolated Active Clamp Boost Converter

3

➔

Reference Design Cookbook

TI has many other reference designs that may be found at: www.ti.com/powerreferencedesigns


Reference Design Cookbook II for Power Management Products

4

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TPS61020 Synchronous Boost Converter for Battery-Powered Applications

Description The TPS6102x family of synchronous boost converters provides a solution for products powered by either a one-cell, two-cell, or three-cell alkaline, NiCd or NiMH, or one-cell Li-Ion or Li-Polymer battery. Output currents can go as high as 200 mA while using a single-cell alkaline discharged down to 0.9 V. It can also be used for generating 5 V at 500 mA from a 3.3-V rail or Li-Ion battery. The boost converter is based on a fixed frequency, pulse-width-modulation (PWM) controller using a synchronous rectifier to obtain maximum efficiency. At low load currents the converter enters the Power Save Mode to maintain high efficiency over a wide load current range.

Web Links: Reference Designs: www.ti.com/powerreferencedesigns

Datasheets, User’s Guides, Samples, Software: www.ti.com

Part Number Search: TPS61020

The TPS6102x devices keep the output voltage regulated even when the input voltage exceeds the nominal output voltage. The output voltage can be programmed by an external resistor divider, or is fixed internally on the chip. The converter can be disabled to minimize battery drain. During shutdown, the load is completely disconnected from the battery. Specifications Parameter

Test Conditions

Min

Typ

Max

Unit

Input Voltage

0.9

6.5

V

Output Voltage

1.8

5.5

V

Output Current Output Ripple Voltage Efficiency

500

mA

VIN = 1.2 V; IO = 100 mA; PWM Mode

16

mVPP

VIN = 1.2 V; IO = 10 mA; PFM Mode

18

mVPP

VIN = 3.0 V; IO = 250 mA

96

%

VIN = 1.4 V; IO = 300 mA

85

%

Evaluation Module TPS61020EVM L1 6.8 µH SW

VOUT C2 2.2 µF

VBAT 0.9 V to 6.5-V Input

C1 10 µF

EN LBI

FB

PS

LBO

C3 47 µF

VOUT 3.3 V Up to 200 mA

1.5 Low Battery Output

PGND

GND TPS61020



Synchronous Boost Converter for Battery-Powered Applications

5

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TPS61020 Output Voltage in Continuous Mode

Efficiency vs. Output Current 100

Output Voltage 20 mV/div

90 80 VBAT = 2.4 V VBAT = 1.8 V

60 50

VBAT = 0.9 V

Inductor Current 200 mA/div

Efficiency – %

70

40 30 20 10 0

VI = 1.2 V, RL = 33 Ω, VO = 3.3 V

VO = 3.3 V 1000

100

10

1

IO – Output Current - mA

t – Time – 1 µs/div

Output Voltage in Power Save Mode

Efficiency vs. Input Voltage 100

VO = 3.3 V

Output Voltage 20 mV/div, AC

IO = 100 mA

95 90

IO = 10 mA

80 75

IO = 250 mA

70

Inductor Current 100 mA/div, DC

Efficiency – %

85

VI = 1.2 V, RL = 330 Ω, VO = 3.3 V

65 60 55 50 0.9

1.4

1.9

2.4

2.9

3.4

3.9

4.4

4.9

VI – Input Voltage – V

t – Time – 50 µs/div

Maximum Output Current vs. Input Voltage

Load Transient Response

Output Current 100 mA/div, DC

1200 VO = 3.3 V 1000 800 600

VI = 1.2 V, IL = 100 mA to 200 mA, VO = 3.3 V

Output Voltage 20 mV/div, AC

Maximum Output Current – mA

1400

400 200 0 0.9

1.7

2.5

3.3

4.1

4.9



5.7

6.5

t – Time – 2 ms/div


6

➔

TPS62111 1.5-A Synchronous Buck Converter with Light Load Efficiency

Description The TPS6211x family of synchronous buck converters with integrated FETs can provide up to 1.5 A of output current from inputs as low as 6 V. The circuit below uses the TPS62111 fixed output voltage option configured to provide 3.3 V and up to 1500 mA with a 6.8-µH inductor and 22-µF output capacitor. The TPS6211x achieves high efficiency over the entire load current range by switching from traditional pulse width modulation (PWM) at high load to pulsed frequency modulation (PFM) or Power Save Mode at light load. Specifications Parameter

Test Conditions

Min

Input Voltage

3.8

Output Voltage

3.201

Load Current

Output Ripple Voltage Efficiency




Typ 3.3

Max

Unit

17

V

3.399

V

3.8 V < VIN < 4.3 V

0

500

mA

4.3 V < VIN < 6.0 V

0

1200

mA

6.0 V < VIN < 17 V

0

1500

mA

VIN = 8.4 V; IO = 100 mA

25

40

mVPP

VIN =8.4 V; IO = 1500 mA

5

10

mVPP

VIN =8.4 V; IO = 1 mA

83

%

VIN =8.4 V; IO = 750 mA

90

%

Evaluation Module TPS62110EVM-001 VI = 3.8 V to 17 V

TPS62111

VIN VIN EN

VO = 3.3 V 1 MΩ

PG

VINA CI = 10 µF 25 V

6.8 µH SW SW

1 µF LBC

AGND

CO = 22 µF 6.3 V

FB

LBI SYNC GND

GND

PwPd PGND PGND



1.5-A Synchronous Buck Converter with Light Load Efficiency

7

➔

TPS62111 Load Transient

Efficiency vs. Output Current 100 90

VI = 8.4 V VO = 3.3 V ILOAD = 150 mA to 1350 mA TA = 25° C

4.2 V

Efficiency – %

80 70

5V

60

VO = 50 mV/div

8.4 V

50 40

12 V

IO = 500 mA/div

30 VO - 1.5 V TA = 25° C PFM Mode

20 10 0 0.0001

0.001

0.01

0.1

1

t – Time = 20 µs/div

10

Output Ripple

Line Transient

V1 = 8.4 V, VO = 3.3 V

ILOAD = 100 mA, TA = 25° C

CH1 = 20 mV/div

C1 = 5 V/div

CH2 = 5 V/div

C2 = 50 mV/div VI = 7.2 V to 12 V VO = 3.3 V ILOAD - 800 mA TA - 25° C

t – Time = 2 ms/div


CH4 = 200 mA/div



TPS54317

8

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1.1-MHz, Highly Efficient 3-A Buck Converter

Description

Web Links: Reference Designs:

The TPS54317 DC/DC converter is designed to provide up to 3 A output from an input voltage source of 3 V to 6 V. This device features extended operating frequency range. This evaluation module is designed to demonstrate the small PCB areas that may be achieved when designing with the TPS54317 regulator, and does not reflect the high efficiencies that may be achieved when designing with this part. The switching frequency is set at a nominal 1.1 MHz, allowing the use of a small-footprint 1.5-mH output inductor. The high- and low-side MOSFETs are incorporated inside the TPS54317 package along with the gate-drive circuitry. The low drain-to-source on resistance of the MOSFETs allows the TPS54317 to achieve high efficiencies and helps to keep the junction temperature low at high output currents. The compensation components are provided external to the IC, and allow for an adjustable output voltage and a customizable loop response. Additionally, the TPS54317 provides a full feature set including programmable undervoltage lockout, synchronization, adjustable switching frequency, enable, and power-good functions. Specifications Parameter

Test Conditions

Input Voltage

www.ti.com/powerreferencedesigns



Min

Typ

Max

Unit

3.1

3.3

3.5

V

VOUT Set Point

1.8

IOUT Range

VIN = 3.3V

V

0

3

A

Operating Frequency

1.1

MHz

Output Ripple

4

mVPP

90.5

%

Efficiency

VIN = 3.3 V, = VO = 1.8 V, IO = 0.6 A

Evaluation Module TPS54317EVM-159

+VIN GND

VIN

J1

TP1

2 1

2200 pF

C1 + 150 µF TP2

SYNC 550 kHz

350 kHz

R4 41.2 kΩ

GND JP2 SS/ENA C5 C4 0.1 µF

1

C9 10 µF 1

C7 150 pF

24 23 22 21 20 19 18 17 16 15 14 13

VSNS AGND RT NC SYNC SS/EN VBIAS VIN VIN VIN PGND PGND

PwPd

COMP PWRGD BOOT PH PH PH PH PH PH NC PGND PGND

R2 9.76 kΩ

R3 6.81 kΩ

R1

TP3

442 Ω

R7 0

10 kΩ C6 3300 pF

U1 TPS54317RHF

JP1 VIN

GND

R5

C8

1 2 3 4 5 6 7 8 9 10 11 12

C3 0.047 µF L1 1.5 µH

TP4 1 2 C2 100 µF

PwrGd

TP6

R6

JP3

10 k

PU

C10 100 µF

C11 1000 pF

J2 VOUT GND

TP5

VIN

Open



TPS54317

9

➔

1.1-MHz, Highly Efficient 3-A Buck Converter Load Transient Response


VOUT = 20 mV/div (ac Coupled)

95

VI = 3 V VI = 4 V

IOUT = 1 A/div, .75 A to 2.2 A step

85

VI = 5 V VI = 6 V

80

75

0

0.5

1.5 2 2.5 1 IO – Output Current A

3

3.5 1 ms/div

Measure Loop Response

Load Regulation 0.3

60

120 90

40 30

0.1

20 Gain

Output Voltage Variation - %

0.2

180 150

Phase

50

0

Gain

60 30

10

Phase °C

Efficiency - %

90

0

0 0

–0.1

0

0

–0.2 –0.3 0

0.5

1 1.5 2 IO – Output Current – A

2.5

3

0 10

100

1k 10k 100k f – Frequency – Hz

1M

Power Up, VOUT Relative to VIN

Line Regulation 0.3

Output Voltage Deviation - %

0.2

VOUT = 1 V/div IO = 1.5 A

0.1

IO = 0 A

VIN = 1 V/div

0 IO = 3 A

-0.1 -0.2 -0.3 3

4

5



6

5 ms/div


10

TPS54356

➔

12-V to 3.3-V, 3-A Buck Converter Input with Bi-Directional Synchronization

Description The TPS54356 DC/DC converter is designed to provide up to 3-A output from an input voltage source of 6 to 10 V. This evaluation module is designed to demonstrate the small PCB areas that may be achieved when designing with the TPS54356 regulator, and does not reflect the high efficiencies that may be achieved when designing with this part. The switching frequency is set at a nominal 500 kHz, allowing the use of a relatively small footprint 22-µH output inductor. The high-side MOSFET is incorporated inside the TPS54356 package along with gate drive circuitry for an external synchronous FET. The low drain-to-source on resistance of the MOSFET allows the TPS54356 to achieve high efficiencies and helps to keep the junction temperature low at high output currents. The compensation components are provided internal to the IC. The TPS54356 is a full featured device including programmable under-voltage lockout, bidirectional synchronization, adjustable switching frequency, enable and power good functions. Specifications Parameter Input Voltage Output Voltage Set Point Output Current Range Switching Frequency Output Ripple Max Efficiency

Test Conditions

Min 6.0

VIN = 6 V to 18 V

0




Typ 12.0 3.3

Max 18.0

Unit V V A kHz mVPP %

3 500 5

Full Load VIN = 6.0 V, VOUT = 3.3 V, IOUT = 0.5 A

10 92

Evaluation Module TPS54356EVM-058 Pull Up 3.3 or 5 V PU01

VIN GND

J1

TP4 1 2

TP1

C1 C9 100 µF 10 µF

R6 Open

TP5 SYNC

J3 TP9 UVLO

TP10

1 2

SS / ENA

J4

RT

R7 R4 Open Open

C3 0.1 µF TP8

U1 TPS54356PWP

R8 10.0 k

VIN 4.5 to 20 V Max 6 to 18 V Nom +

TP2 Power Good

R11 Open

1 2

1 2 3 4 5 6 7 8

VIN BOOT VIN PH UVLO PH PWRGD LSG RT VBIAS SYNC PGND ENA AGND COMP VSENSE PwPd 17

R12 Open C6 Open

16 15 14 13 12 11 10 9

L1 22 µF

8765 4 321

TP3

Q1

D1 MBRS340T3

2 1

R10 4.7

+

Si4888DY

C4 1.0 µF

J2

3.3 V

Back Side

C11 1500 pF

VOUT GND

C2 C3 C10 330 µF 100 µF 0.1 µF TP6

TP7 R9 0

J4 Open = Enable J4 Closed = Disable J3 = Bidirectional Synchronization J3 = Output if R4 open or short J3 = Input if R4 69 kΩ to 215 kΩ



TPS54356

11

12-V to 3.3-V, 3-A Buck Converter Input with Bi-Directional Synchronization

➔

Power Up with Tracking

Efficiency vs. Output Current 100 VI = 6 V

95

VI = 12 V VI = 5 V/div

90

Efficiency – %

85 80

VI = 18 V VO = 2 V/div

75 70 65 60

V(PWRGD) = 2 V/div

55 50 0

1 2 3 IO – Output Current – A

4


Power Down with Tracking

Load Regulation

Output Voltage Change – %

0.3

VI = 5 V/div

0.2

0.1

VI = 12 V VI = 6 V

VO = 2 V/div

0 VI = 18 V –0.1 V(PWRGD) = 2 V/div –0.2

–0.3 0

1

2

3

4


IO – Output Current – A

Load Transient

VO = 50 mV/div (AC Coupled)

IO = 1 A/div




12

TPS40021

➔

Synchronous Buck Converter Delivers 20 A from Standard 5-V Input

Description


This is a synchronous buck design that uses the TPS40021 to generate a 3.3-V output at up to 20 A from a 5-V input. The TPS40021 is a low-input voltage synchronous buck controller with integrated N-channel MOSFET drivers and Predictive Gate Drive™ technology for high efficiency in a small footprint. A user-programmable operating frequency and synchronization input make the TPS40021 a versatile device that can be used in a wide variety of applications. The focus for this design was to generate a low-voltage/high-current output from a standard 5-V input. Specifications Parameter Input Voltage Output Voltage Load Current Switching Frequency Output Ripple Voltage Efficiency

Test Conditions




Min 4.25 3.25 0 255

Typ 5 3.3

Max 5.75 3.35 20 345 30

300 20 91 95 90

VIN = 5 V; IO = 20 A VIN = 5 V; IO = 20 A VIN = 5 V; IO = 10 A VIN = 5 V; IO = 1 A

Unit V V A kHz mVPP % % %

Reference Design PMP1050 4.5 V to 5.5 V Input TP1 VIN GND

J1

VIN

1 2

+

C6 1 µF C603

TP2

TP3 R2 10 kΩ 0603

R6 2.61 kΩ 0603

C19 0.022 µF 0603 C22 3300 pF

R7 121 kΩ

0603

C24 133 pF

1 2 3 4 5 6 7 8

ILIM/SYNC VDD OSNS FB COMP SS/SD RT SGND PwPd

BT1 HDRV SW BT5 PVDD LDRV PGND PGD

+

C12 1 µF 0603

U1 TPS40021PWP 16 15 14 13 12 11 10 9

C4 47 µF 1210

+

C5 47 µF 1210

D

Q1 Si7858DP

R3 G

0 603

R4

603

C21 10 µF

C23 2700 pF

0603

0603

TP5

2

D

Q5 Si7880Dp G

R12 10 kΩ

VIN

C9 + 1 150 µF 2

C10 + 1 C11 + 1 150 µF 2 150 µF 2

C14 + 10 µF 1210

1

J2 3.3 V @ 20 A GND

S

TP7 TP9

R13 2 kΩ

L1B1 2.2 µH

VOUT R8 0

C13 1 µF

17

0603

TP4

S

0

R10 10 kΩ

R9 11.8 kΩ

0603

0603

R1 1 kΩ 0603

C3 47 µF 1210

R11 49.9

TP6

TP8

0603

R603 TP10

R14 2.61 kΩ 0603



TPS40021

13

Synchronous Buck Converter Delivers 20 A from Standard 5-V Input

➔

Transient Response (VIN = 5 V, IOUT = 0 A to 15 A) Channel 3 = Output Current, Channel 4 = Output Voltage

Efficiency (VIN = 5 V) 100 90

3

Efficiency – %

80 70 60

.1 ms 10.0 A 2.19 A

4

.1 ms 100m V 0.0m V

50

4

40 30 20 10 0

0

2

4

6

8

10

12

14

16

18

3

20


Output Voltage Precision

Loop Response (VIN = 5 V, IOUT = 20 A) 180

3.45

50

150

3.43

40

120 90

3.41

30

Phase

60

Gain

10

30

0

0

Phase - °

Gain – dB

20

IO – Output Voltage - V

60

3.39 3.37 3.35 3.33 3.31 3.29 3.27 3.25

100

1k

10k

100k 200k

1

3

5

7

9

11

13

15

17

19

21


f – Frequency – Hz

Output Voltage Ripple (VIN = 5 V, IOUT = 20 A)

4

5 µs 20.0m V 1.2m V


4


14

TPS40040

➔

Cost-Optimized Synchronous Buck Converter Provides 4 A from 5.5 V

Description


This reference design uses the TPS40040 controller to provide an output voltage of 1 V at a current up to 4 A from a regulated 5.5-V input voltage. The TPS40040 is a low-cost synchronous buck controller that operates over the input voltage range of 2.25 V to 5.5 V. The TPS40040 integrates several circuit functions, such as over-current, soft start, and fixed switching frequency to minimize the number of external components required. The controller also provides a short circuit threshold that is user selectable between one of three values. The protection level is set by a single external resistor from COMP to GND. The controller ensures a monotonic startup of the output voltage whether the output voltage starts from zero volts or from a pre-biased output level. The controller utilizes voltage mode operation at a fixed 300 kHz switching frequency (or 600 kHz for the TPS40041) to maximize circuit efficiency. This reference design achieves a peak efficiency of greater than 88%. The actual design PWB area is less than 0.8 in2. Specifications Parameter

Test Conditions


Datasheets, User’s Guides, Samples: www.ti.com


Min

Typ

Input Voltage VOUT

V

1

V

0

4

Switching Frequency Efficiency

Unit

5.5 All

IOUT

Max

A

300

kHz

88

%

5.5 V at 4 A

Reference Design PMP1632A L2 0.33 µH 5.5 V +

C15 10 µF 10 V

C14 220 µF 10 V R12 0

U2 TPS40040

TP9

C16 1 µF

1 HDRV ENB 2 SW FB 3 COMP BOOT 4 LDRV VDO GND 9

8

7

Q3 = A

2

8 7 6 5

FDS6892A 1

C20 0.1 µF

6

R14 13 kΩ R18 Open

R13 5.23 kΩ

C23 820 pF

C22 100 pF

R15 100 kΩ R17 143 kΩ


TP11 +

5

Q3 = B

4

C21 33 pF

L3 TP10 2.2 µH

FDS6892A

C17 220 µF 10 V

C18 220 µF 10 V

C19 220 µF 10 V

1 2

J3 1V@4A GND TP12

3

TP13 R16 49.9


Cost-Optimized Synchronous Buck Converter Provides 4 A from 5.5 V

15

➔

TPS40040 Switch Node Waveforms (VIN = 12 V, VOUT 5.5 V) (Loaded Current Stepped Between 0.5 A and 1 A)

Efficiency 96.0 94.0 Efficiency – %

92.0 90.0 88.0 86.0 84.0 5.5 V Output 1 V Output

82.0 80.0 78.0

0

0.5

1

1.5

2

2.5

3

3.5

4

4.5

Output Current – A

180

Control Loop Gain/Stability (VIN = 15 V, VOUT 5.5 V, Loaded to 4 A)

–60

–180

Gain

Phase

60

Startup (VIN = 12 V, VOUT = 5.5 V @ 1 A, 1 V @ 4 A, 1.8 V @ 1.8 A)

100

Frequency

100 k

Load Transients (VIN = 12 V, VOUT 5.5 V)



16

TPS40100

➔

12-VIN, 5-A Synchronous Buck Converter with Voltage Margining and Tracking

Description


This design utilizes the TPS40100 in a synchronous buck configuration to generate a 1.8-V/5-A output from a 12-V input. In addition to providing this power conversion, voltage margining, tracking, and device enable are supported through the use of userconfigurable jumpers. The TPS40100’s voltage margining feature allows the output to be adjusted 3% or 5% above or below the nominal 1.8 V through the use of a digital input. The TPS40100 also has an integrated tracking control loop that can limit the output voltage according to the input voltage on the Tracking Input line. This feature is useful in designs where power-up sequencing is needed. Other features of the TPS40100 include a wide input voltage range (4.5 V to 18 V), integrated gate drivers for N-channel MOSFETs, adaptive gate-drive circuitry for improved efficiency, programmable Under Voltage Lockout (UVLO) protection, and programmable overcurrent protection. Specifications Parameter Input Voltage Output Voltage Load Current Switching Frequency Output Ripple Voltage Efficiency

Test Conditions




Min 10.8 1.76 0 255

Typ 12 1.8 5 300 20 89 72

VIN = 12 V; IO = 5 A VIN = 12 V; IO = 5 A VIN = 12 V; IO = 0.5 A

Max 13.2 1.84 6.5 345 30

Unit V V A kHz mVPP % %

Reference Design PMP1048 J1 MGUP VIN J2 MGDN VIN

1 2

VIN

1 2

3

VIN

R1 10 kΩ R603

TP1 J3 VIN = 12 V GND

1 2

VIN

3

Q2 2N7002

1 2

R3 0 R603

R2 10 kΩ R603

Q2 2N7002

1 2

R4 0 R603

VIN +

TP3 TP4

TP2

VIN

R18 6.34 kΩ R603 3

J6 EN VIN

1 2

Q12 2N7002

1 VIN

R25 10 kΩ R603

2

+

24 23 22 21 20 19

MGU MGD SYNC PC VO ISNS

R14 0 VIN SW HDRV BST V5BP LDRV

18 17 16 15 14 13

C7 220 µF

+

C8 220 µF

R24 10.7 kΩ R603

R22 187 kΩ R603

C17 0.1 µF C603


R28 C28 11 kΩ 0.047 µF 0603 L3 0603

TP14

4.7 µH 0.492” sq

D2 BAT54 R19 0

C15 1 µF C603

C18 0.022 µF R23 250 C603 Ωk R603

Q3 Si4408DY TP13 SO8

C13 1 µF C603

7 8 25 9 10 11 12

1 2

U2 TPS40100RGE R15 C11 180 pF 41.2 kΩ C603 R603 1 COMP 2 FB 3 TRKOUT 4 C14 TRKIN R16 D1 5 0.01 µF BAS16 28 kΩ UVLO C603 6 R603 ILIM R17 4.99 kΩ VIN R603 C16 R21 0.015 µF R20 51.1 C603 49.9 kΩ kΩ R603 R603 R603 C12 0.027 µF C603

RT BIAS PwPd GND SS GM PGND

J5 TRKIN VIN

1

C6 220 µF

R7 10 kΩ R603

R9 0

R11 10 kΩ R603

C9 1 µF C603

Q7 Si4408DY SO8

C27 C1 + 1 C2 + 1 C3 + 1 1 µF + 150 µF 2 150 µF 2 150 µF 2 1210

J8 2 1

VOUT GND

TP14

TP6


TPS40100

17

12-VIN, 5-A Synchronous Buck Converter with Voltage Margining and Tracking

➔

Transient Response (VIN = 12 V, IOUT = 0 A to 5 A) Channel 3 = Output Voltage Channel 4 = Output Current

Efficiency (VIN = 12 V) 100 90

3

80

1 ms 50 mV

Efficiency – %

70 60 4

50

1 ms 5.0 A

40

3

30 20 10 0

0.0

0.1

0.2 0.3 0.4 0.5 IO – Output Current – A

0.6

4

Tracking Input Response Channel 3 = 5-V Tracking Input Channel 4 = 1.8-V Output

Loop Response (VIN = 12 V, IOUT = 5 A) 60

180

50

150 Phase

Gain – dB

30

120 90

20

60

10

30

Gain

0

100

0

1k 10 k f – Frequency – Hz

Phase – °

40

100 k

Output Voltage Ripple (VIN = 12 V, IOUT = 5 A) 3

1 ms 50 mV

3



18

TPS40190

➔

12-V Input, 1.5-V Output, 10-A Synchronous Buck Converter

Description The TPS40190EVM-001 evaluation module (EVM) is a synchronous buck converter providing a fixed 1.5-V output at up to 10 A from a 12-V input bus. The EVM is designed to startup from a single supply, so no additional bias voltage is required for startup. The module uses the TPS40190 reduced pin count synchronous buck controller. TPS40190EVM-001 is designed to use a regulated 12-V (10 V to 14 V) bus to produce a high current, regulated 1.5-V output at up to 10 A of load current. The TPS40190EVM001 is designed to demonstrate the TPS40190 in a typical regulated bus to low-voltage application while providing a number of test points to evaluate the performance of the TPS40190 in a given application. The EVM can be modified to support output voltages from 0.9 V to 3.3 V by changing a single set resistor. Specifications Parameter VIN VOUT IOUT Switching Frequency Output Ripple Peak Efficiency

Test Conditions




Min 10 1.45 0 240

R6 = 9.53 k, R5 = 105 k

Typ 12 1.50 300 25 87 85 83 84 83 81

VIN = 14 V, IOUT = 10 A VOUT = 1.5 V, 8 A < 1OUT < 12 A VIN =10 V VIN = 12 V VIN = 14 V VOUT = 1.5 V, IOUT = 15 A VIN=10 V VIN = 12 V VIN = 14 V

Full Load Efficiency

Max 14 1.55 10 360 50

Unit V V A kHz mVPP %

%

Evaluation Module TPS40190EVM-001 TP1 DISABLE

Q1 2N7002

1 3 1

ENABLE

2

VIN

R2 0.11 kΩ

C4 1

R3 100 kΩ

VIN

C3 270 pF

5

R7 2 49.9 kΩ TP2

C2 15 pF R1 0.45 kΩ

C1 R4 R5 1800 pF 49.0 kΩ Open

TP3

VIN C5 0.1 µF

1

Optional component not populated on PCB

2

For loop response testing only

U1 TPS40190DRC 1 2 3 4 5

EN FB COMP VDD GND

TP4

HDRV SW BOOT LDRV BP5 11 PwPd

10 9 8 7 6

3 2 1

R8 0

1 2

C12 1

L1 2.2 µH

TP5

C7 0.1 µF D1 1 MBR8038

Q3 Si7808DP


3 2 1

R9 1 C8 1

TP6 10 V - 14 VIN

J1

GND TP7

1.5 V

5 4

C6 4.7 µF

C10 10 µF 1.5 V

Q2 Si7300DP

4

1.5 V R5 100 kΩ

C8 10 µF 1.5 V

C11 330 µF 2.5 V

C13 22 µF 3.3 V

C14 1

1 2

TP8 TP9 1.5 V @ 10 A J2 GND TP10 TP11


TPS40190

19

12-V Input, 1.5-V Output, 10-A Synchronous Buck Converter

➔

Efficiency vs. Load Current 100 90

Efficiency – %

80 70 60 50 40 30 20

8

10

12

14

0 0

2

10

8

6

4

Load Current – IOUT – A

Line and Load Regulation

Output Voltage – VOUT – (V)

1.505 1.5 1.495 1.49 1.485 1.48

8

12

14

1.475 0

2

4

6

8

10

Load Current – IOUT – A



20

TPS5124

➔

Dual Synchronous Converter Provides 3.3 V at 15 A and 1.5 V at 10 A from a 12-V Bus

Description


The TPS5124 is a dual independent synchronous buck controller. Both controllers internal to the TPS5124 operate at 180° phase shift and the input ripple is partially cancelled and therefore the required input capacitance is reduced. Other features include separate soft start circuit and standby control. See the TPS5124 data sheet (SLUS571) for detail. This EVM is designed to operate from 12-V bus voltage. It generates two outputs, 3.3 V at 15 A and 1.5 V at 10 A. Specifications Parameter Input Voltage Switching Frequency Channel 1 Output Current Range Output Ripple Full Load Efficiency Channel 2 Output Current Range Output Ripple Efficiency

Test Conditions




Min 6.5

Typ 12 300

Max 15

6.5 V VIN 15 V IOUT = 15 A VIN = 12 V, VOUT = 3.3 V, IOUT = 15 A

0

15 33 90.6

16 66

6.5 V VIN 15 V IOUT = 10 A VIN = 12 V, VOUT = 1.53 V, IOUT = 10 A

0

10 15 85.5

12 30

Unit V kHz

mVPP %

mVPP %

Evaluation Module TPS5124EVM-001 TP7

TP8 VO1

R7

VIN

49.9 D

R12 1.5

C12 5600 pF

C2 2.2 µF

R1 10 kΩ

VIN

R2 14 R6 100 kΩ

C14 0.027 µF

2 3

R3 3.48 kΩ

1 JP2

C15 0.1 µF

C23 1000 pF

5

C16 47 pF C17 0.1 µF

1 JP1

C17 0.1 µF

6 7 8 9

TP10 VO2

4

10

R16 C18 0.01 µF

49.9

12

C22 5600 pF

TP9 R11 10 kΩ

C19 0.01 µF

13 14

R8 1.1 kΩ R10

11

C20 0.027 µF

15

INV1 FB1

LH1 OUT1_L1

SS1

LL1

NC

OUT1_D

CT

OUTGND1

NC

TRIP1

GND

VCC

REF

TRIP2

STBY1

VREF5

STBY2

VLDS

SCP

OUTGND2

NC

OUT2_D

SS2

LL2

FB2

OUT2_U

INV2

TP1

VO1

S

U1 TPS5124DBT 1

Q1 Si7868DB L1 2.2 µH

G

30

C8 0.1 µF

D

29

Q2 Si7868DB C27 100 µF

G

28

2

TP11

R13 28 kΩ

24

1

C18 0.1 µF

23

R14 14 kΩ

21

C10 0.1 µF

C6 0.1 µF

C1 2.2 µF

C13 10 µF

VIN +

+

2 1

TP5 1

TP4

S

18

C28 100 µF Q4 Si7868DB

G

17 16

LH2

R15 1.5

S

L2 2.2 µH

G

Q3 Si7868DB

C3 2.2 µF

C30 C 29 100 µF 100 µF

1

C31 C32 100 µF 0.01 µF

1 2

TP12

D

C11 0.1 µF

R9 13 kΩ

TP2

2

J2 1

19

2

C4 C5 150 µF 1 150 µF 1

20

C21 1000 pF

J1

TP3

26

22

1

C24 C25 C7 100 µF 100 µF 0.01 µF

S

27

25

C26 100 µF

VO2

J3

TP6

D 1 VIN



TPS5124

21

➔

Dual Synchronous Converter Provides 3.3 V at 15 A and 1.5 V at 10 A from a 12-V Bus Gain and Phase vs. Oscillator Frequency (Channel 1)

Overall Efficiency vs. Output Current VOUT1 (3.3 V) Enabled Only 96

50

VIN = 6.5 V

180 160

40

95

Phase

120

93 92

Phase – °

20

Gain – dB

Efficiency – %

140

30

VIN = 12 V

94

100 10 80

Gain

0

60

91 –10 90

40

VIN = 15 V VOUT = 3.3 V IOUT = 15 A

–20

VIN = 15 V 89 2

12

9

6

3

15

20 0

–30 100

10 k

1k

100 k

fOSC – Frequency – Hz

IOUT – Output Current – A

Gain and Phase vs. Oscillator Frequency (Channel 2)

Overall Efficiency vs. Output Current VOUT2 (1.5 V) Enabled Only 92

180

40

VIN = 6.5 V

160

90

30 140

88 120

VIN = 12 V

84 82

VIN = 15 V

Gain 0

78

–20

76 6

4

2

8

10

IOUT – Output Current – A

–30 100

80 60

Phase

40

–10

80

0

100

10

Phase – °

Gain – dB

Efficiency – %

20 86

L = 0.6 µH VIN = 12 V VOUT = 1.5 V IOUT = 10 A

20 0

1k

10 k

–20 100 k

fOSC – Frequency – Hz

Overall Efficiency vs. Output Power Both Channels Enabled 96

Efficiency – %

94

VIN = 6.5 V

92

90

VIN = 15 V

88

VIN = 12 V 86 0

0.2

0.4

0.6

0.8

1.0

Output Power Over the Full Power



22

TPS75003

➔

Converter Provides Dual 2-A Buck Outputs and 300-mA Regulator

Description


The TPS75003 is a multi-channel power management IC. The device consists of two step-down controllers, each capable of providing up to 3 A of output current and a 300-mA linear regulator. The input voltage input range is 2.2 V to 6.5 V. The buck controllers can be configured for output voltages between 1.2 V and 6.5 V and the linear regulator can be configured for output voltages between 1.0 V and 6.5 V. Individual enable pins and soft start capacitors for each output allow minimization of inrush currents at startup. Specifications Parameter VIN VOUT1 VOUT2 VOUT3 IOUT1 IOUT2 IOUT3 VOUT1 Ripple Voltage VOUT2 Ripple Voltage VOUT1 Efficiency VOUT1 Efficiency VOUT2 Efficiency VOUT2 Efficiency

Test Conditions




Min 4.75 1.16 3.14 2.38 0 0 0

–40° C to 85° C, IOUT1 = 0 to 2 A –40° C to 85° C, IOUT1 = 0 to 2 A –40° C to 85° C, IOUT1 = 0 to 0.30 A

Typ 5 1.22 3.3 2.5

VIN = 5.0 V; IO = 2 A VIN = 5.0 V; IO = 2 A VIN = 5 V; IO = 10 mA VIN = 5 V; IO =1 A VIN = 5 V; IO = 10 mA VIN = 5 V; IO =1 A

Max 5.25 1.28 3.47 2.63 2 2 300

Unit V V

A A mA mVPP mVPP % % % %

20 40 69 79 84 91

Evaluation Module TPS75003EVM-092 Q2

EN1

100 µF

D2

100 µF Sanyo POSCAP

6TPB100M

m

IS1 12

13

14

Sumida Vishay SS32 CDRH8D43-150

VIN 0.1 µF

IN1

SW1

DGND

R1

15

SS1 16

EN1 17

AGND

1.5 nF

18

SS3 19

IN3

1.2 V, 2 A

Siliconix Si2323DS

0.01 µF

VIN

L2 15 µH

20

11

FB1

1 µF DGND

Q1

9

8

VIN 0.1 µF

1.5 nF

EN3 EN2

FB2

IS2

IN2

7

6

SW2

DGND

5 SS2

EN2

FB3

10 µF

4

10

3

1

2

2.5 V, 300 mA

EN3

OUT3

m Siliconix Si2323DS

D2

ON Semiconductor

MBRM120


L1 5 µH Sumida CDRH6D38-5R0

10 pF 3.3 V, 2 A 100 µF Sanyo POSCAP 6TPB100M


TPS75003

23

➔

Converter Provides Dual 2-A Buck Outputs and 300-mA Regulator Output Ripple (VOUT = 1.2 V, IOUT = 2 A)

Efficiency VIN = 5 V

80

VOUT2 = 3.3 V

IO(AC) – AC – Coupled Output Voltage – mV

100

VOUT1 = 1.2 V Efficiency – %

80

60

40

60 40 20 0

20 0

500

1000

1500

2000

5

10 15

20 25 30 35 40 µ

45 50

Output Voltage vs. Time (EN2 = VOUT3, EN1 = VOUT2)

Output Ripple (VOUT = 3.3 V, IOUT = 2 A) 80

6

60

5

40

4 VO – Output Voltage – V

VO(AC) – AC – Coupled Output Voltage – mV

0

20 0

VOUT2 = 3.3 V

VOUT3 = 2.5 V

3 2 1

VOUT1 = 1.2 V

0 IOUT1 = IOUT2 = 2 A

0

5

10 15


20 25

30 µ

35 40

45 50

0

5 10 15

20 25 30 35 40 45 t – Time – ms

50


24

TPS40200

➔

Flexible, Wide Input Range 3-A Buck Converter for 12-V and 24-V Inputs

Description


The TPS40200 is a flexible non-synchronous controller with a built-in 200-mA driver for P-channel FETs. The circuit operates with inputs up to 52 V with a power-saving feature that turns off driver current once the external FET has been fully turned on. The circuit operates with voltage-mode feedback and has feed-forward input-voltage compensation that responds instantly to input voltage change. The integral 700-mV reference is trimmed to 1%, providing the means to accurately control low voltages and supports many of the features of more complex controllers. Clock frequency, soft start, and overcurrent limit are each easily programmed by a single, external component. The part has undervoltage lockout, and can be easily synchronized to other controllers or a system clock to satisfy sequencing and/or noise-reduction requirements. Ultra-wideinput operating range makes this controller suitable for a wide range of low-current applications. Specifications Parameter

Test Conditions




Min

Input Voltage

10.8

Output Voltage

3.45

Load Current

0

Switching Frequency

Typ 3.6

250

280

Max

Unit

33

V

3.75

V

3

A

310

kHz

40

mV/PPK

Output Ripple Voltage

Reference Design PMP1510 J8 10.8 - 33 V GND

TP1

1 2

C1 220 µF

+

R2 73.2 kΩ

R2 0.02

R3

TP2

1 RC 2 SS 3 COMP 4 FB

8 VDD 7 ISNS 6 DRV 5 GND

3

1

R4

2

Q1 NDS9407

4

0

76

F = 280 kHz

8

5

C6 820 pF C7 22 pF

TP4 R5 100 kΩ

C13 470 pF

C8 0.1 µF

C14 0.47 µF

47 pF

20 kΩ

1

TP5 2

D1 MBRS340

C9 220 µF

1 2

J2 3.6 V @ 3 A GND

C11 22 µF

TP7

R6 R7

L2 10 µH

+

TP6

C15

C4 3.3 µF

1.0 kΩ C5 100 pF

U1 TPS40200D

TP3

C3 3.3 µF

TP8

100 kΩ

R9

TP9

49.9

R9 24.3 kΩ



Flexible, Wide Input Range 3-A Buck Converter for 12-V and 24-V Inputs Load Regulation

Efficiency 88

3.584

86

12 VIN 24 VIN

3.582

84

VOUT – V

82 80 78

12 VIN 24 VIN

76 74

3.580 3.578 3.576 3.574 3.572

72

0

0.5

1.0

1.5

2.0

2.5

3.0

0

3.5

IOUT – A

Output Ripple (VOUT = 3.65 V, IOUT = 3 A)

1.0

1.5

2.0

2.5

3.0

3.5


Load Transient (VIN = 3.6, Load Current = .5 A and 3 A)

Control Loop (VIN = 33 V, Gain 1) (VIN = 10.8 V, Gain 2)

–60

–180

Gain

Phase

60

Start Up (VIN = 12 V, VOUT = 3.6 V)

0.5

180

Efficiency – %

25

➔

TPS40200

100


Frequency

100 k


26

TPS40222

➔

5-V Input, 1.6-A Output, Non-Synch. Buck Converter with Minimal External Components

Description The TPS40222EVM-001 evaluation module (EVM) is a non-synchronous buck converter with a 4.5-V to 8-V input range with a built in N-channel power FET, that can deliver 1.6 A of output current. The EVM is designed to operate with a minimum of components and yet has the features of more complex buck converters. The TPS40222EVM-001 is designed to use a 4.5- to 8-V input voltage to produce a high current, regulated 1.4 V output at up to 1.6 A of load current. This application board is designed to demonstrate the TPS40222 in a typical voltage bus to low-voltage application while providing a number of test points to evaluate the performance of the IC. The EVM can be modified to support output voltages from 0.8 V to 6.3 V by changing a single resistor. The TPS402224EVM-001 has been built with the internal clock operating at 1.25 MHz. Specifications Parameter Input Voltage Range No-Load Input Current

Test Conditions

Output Voltage Ripple Output Load Current Output Over Current Switching Frequency Peak Efficiency




Min 4.5

VIN = 5 V, IOUT = 0 A, R5 = 120 Ω (10-mA Load) R2 = 10.0 k, R1 = 7.5 k

Output Voltage


Typ

Unit V mA

1.44

V 2 mVPP A A MHz %

11 1.35

1.40 8 10

VIN = 5 V, IOUT = 1.0 A 0

1.6 2.6 1.25

1.0 VOUT = 3.3 V, 0.1 A < IOUT < 1.0 A V5V_IN = 5 V VOUT = 1.25 V, IOUT = 1.6 A V5V_IN = 5.0 V

Full Load Efficiency

Max 8

1.5

90 % 74

Evaluation Module TPS40222EVM-001 D2 BAT17

TP1 J1 2 1

C1 22 µF

C2 0.1 µF

C3 2.2 µF

TP2

1 FB 2 GND 3 SW

U1 TPS40222

6 BOOST 5 AVIN 4 PVIN PwPd 7

+VIN GND

1

1

R3 10

Optional components not installed. 1

C5 100 nF

TP1

L1 3.3 µH

1 2

D1 RSX201L-30

C4


C6 22 µF 6.3 V

C7 22 µF 6.3 V

C8 22 µF 6.3 V

R4 C9 51.1 2.2 µF R1 7.5 kΩ R2 10 kΩ

J1

+VOUT GND

R5 120 TP5 TP4


TPS40222

27

5-V Input, 1.6-A Output, Non-Synch. Buck Converter with Minimal External Components

➔

Efficiency vs. Load (VIN = 5, VOUT = 1.25) 0.9 0.8 Efficiency – %

0.7 0.6 0.5 0.4 0.3 Efficiency

0.2 0.1

0 0.0000 0.2000 0.4000 0.6000 0.8000 1.0000 1.2000 1.4000 1.6000 1.8000 Load Current – A

Line and Load Regulation 1.403

Output Voltage – V

1.4025

5

4.5

7

1.402 1.4015 1.401 1.4005 1.4 1.3995 1.399 1.3985 0.0000

0.2000

0.4000

0.6000

0.8000

1.0000

1.2000

IOUT – Load Current – A

1.4000

1.6000

1.8000

Revision Tested E1

Typical Ripple Voltage



28

TPS5430

➔

Small, 3-A Integrated MOSFET Buck Converter from a 12-V or 15-V Input

Description The TPS5430 DC/DC converter is designed to provide up to a 3-A output from a typical bus voltage of 12 V or 15 V. This evaluation module is designed to demonstrate the small PCB areas that may be achieved when designing with the TPS5430 regulator and does not reflect the high input voltages that may be used when designing with this part. The switching frequency is internally set at a nominal 500 kHz. The high-side MOSFET is incorporated inside the TPS5430 package along with the gate-drive circuitry. The low drain-to-source on resistance of the MOSFET allows the TPS5430 to achieve high efficiencies and helps to keep the junction temperature low at high output currents. The compensation components are provided internal to the IC whereas an external divider allows for an adjustable output voltage. Additionally, the TPS5430 provides an enable input. The absolute maximum input voltage is 24 V.

Specifications Parameter

Test Conditions

Input Voltage




Min

Typ

Max

Unit

10.8

12 or 15

19.8

V

VOUT

5.0

IOUT

V

0

3

Switching Frequency Output Ripple

Full Load

Efficiency

12 VIN, 1 A Load

A

500

kHz

20

mVPP

92.3%

%

Evaluation Module TPS5430EVM-136

VIN GND

J1

TP1 2 1

TP2

VIN 10.8 V to 19.8 V C1 10 µF

EN JP1 GND

7 5 2 3 6

U1 C2 TPS5430DDA 0.01 µF VIN BOOT 1 ENA 8 NC PH NC 4 GND VSNS PwPd 9

TP6

L1 15 µH D1 B340A

TP3 +

C3 220 µF

R3 0

J2 TP4

1

VOUT 5.0 V

2

GND

TP5 R1 10.0 kΩ R2 3.24 kΩ



TPS5430

29

➔

Small, 3-A Integrated MOSFET Buck Converter from a 12-V or 15-V Input Load Transient



VIN = 10.8 V VIN = 12 V

Efficiency – %

95

VIN = 15 V

90 VIN = 18 V

85

IOUT = 1 A/div, .75 A to 2.25 A Step

VIN = 19.8 V

80 75 0.5

1

1.5 2 2.5 IO – Output Current – A

3

3.5

Measured Loop Response

Load Regulation vs. Output Current 0.3

60 50

0.2

40

180 150

Phase

120

30 0.1

90

20 10

Gain

Output Voltage Variation – %

200 ms/div

0 –0.1 –0.2 –0.3 0

0.5

1 1.5 2 IO – Output Current – A

2.5

3

30

0

0

–10

–30

–20

–60

–30

–90

–40

–120

–50

–150 –180 1M

–60 10

Line Regulation vs. Input Voltage

60

Gain

100

1k 10 k f – Frequency – Hz

100 k

Phase – °

0

Output Voltage Ripple

0.1

Output Voltage Deviation – %

0.08


0.06 0.04

IO = 3 A

IO = 0 A

0.02 0

PH - 5 V/div

–0.02 –0.04

IO = 1.5 A

–0.06 –0.08 –0.1 10.8


13.8 16.8 VI – Input Voltage – V

19.8

Time = 500 ns/div


30

TPS51116

➔

Integrated Buck Converter Plus LDO for DDR and DDR2

Description


The TPS51116 provides a complete power supply solution for both DDR/SSTL-2 and DDR2/SSTL-18 memory systems. It integrates a synchronous buck controller with a 3-A sink/source tracking linear regulator. The TPS51116 offers the lowest total solution costs where system space is at a premium. This reference design operates from a 12-V rail and can provide a VDDQ voltage of either 2.5 V (DDR) or 1.8 V (DDR2) at 6-A maximum. The VTT output voltage (1.25 V or 0.9 V) is supplied from an internal linear regulator and is equal to half of the VDDQ output. This output voltage can either source or sink 3-A maximum and is supplied by the VDDQ output. The synchronous buck controller operates at 400 kHz using a pseudo-constant frequency PWM with an adaptive on-time control and implements current mode control. Specifications Parameter Input Voltage Output Voltage (VDDQ) Output Voltage Tol (VTT) Load Current (VDDQ) Load Current (VTT) Switching Frequency Output Ripple Voltage Efficiency 1 Efficiency 2

Test Conditions




Min 10.8 2.425 –40 0 –3

VTT = VDDQ/2

Typ 12 2.5 0

Max 13.2 2.575 40 6 3

400 25 92 92

VIN = 12 V; IO = 9 A VIN = 12 V; IO = 9 A VIN = 12 V; IO = 4.5 A

Unit V V mV A A kHz mVPP % %

40

Reference Design PMP1516 Notes: 1) For a VDDQ of 1.8 V (VTT - 0.9 V), R9 = 0 Ω and R8 = Open. 1) For a VDDQ of 2.5 V (VTT - 1.25 V), R8 = 0 Ω and R9 = Open.

VIN

VDDQ

TP2 TP4

R1 51.1 VTT J1 TP1 1 1.25 V @ 3 A 2 GND TP8 VTTREF GND (10 mA Max)

J4

C5 22 µF 6.3 V

C6 22 µF 6.3 V MODE

1 2

R3 3.32 kΩ C10 0.033 µF

C10 330 pF

1 2 3 4 5 6 7 8 9 10

5

U1 TPS51116PWP VLDOIN VBST VTT DRVH VTTGND LL VTTSNS DRVL GND PGND MODE CS VTTREF V5IN COMP PGOOD VDDQSNS S5 SVDDQSET S3 PwPd 21

C12 0.01 µF R8 Open MODE

20 19 18 17 16 15 14 13 12 11

C4 0.1 µF

3 2 1

R2 0 5 4

R14 Open

R12 0

C15 4.7 µF 6.3 V

C2 22 µF 16 V

L1 TP6 1 µH Q2 Si7636DP

+ C8

220 µF 4V

+ C13

TP11

22 µF 10 V

OUT IN GND

TP7

10.8 V - 13.2 VIN

J3 VDDQ 2.5 V @ 6 A

1 2

GND

TP9

1 2

J5

PG GND

VIN

U2 UA78M05

TP10

Open

C9 47 µF 6.3 V

J2

2 GND TP3

+ C3

VDDQ

R4 Open

R6 5.76 kΩ 5V

R11 0

C1 22 µF Q1 Si7344DP 16 V

3 2 1

R5 100 kΩ R9 Open R10 Open R13 Open R16 0

4

TP4 1

R7 0 C14 1 µF 6V

1 2

J6 (optional) Ext 5 V Bias GND

R15 Open

VDDQ



TPS51116

31

Integrated Buck Converter Plus LDO for DDR and DDR2

➔

Turn On: 0.5 V/div, 200 µS/div VIN = 12 V; 2.5 V @ 4 A, 1.25 V @ 1 A,

Efficiency 93

Efficiency – %

92

91 VIN = 12 V

90

89

88

0

1

2

3

4

5

6

7

8

9

10


Output Ripple: 20 mV/div, 1µS/div VIN = 12 V; 2.5 V @ 9 A

–60

–180

Gain

Phase

60

180

Control Loop VIN = 12 V; IO = 4 A

Frequency

100

100 k

Voltage Tracking Top Trace: VTT x 2 (1.25 V x 2) Bottom Trace: VDDQ

Transient Response Top Trace: 2.5 V @ 50 mV/div Bottom Trace: IO @ 2 A/div

2.499 2.498

Output Voltage

2.497 2.496 2.495 2.494 2.493 2.492

2.5 V

1.25 V X 2

2.491 2.490

1

2

3


4

5 6 7 Output Current – A

8

9

10


32

TPS23750

➔

IEEE 802.3af PD Controller with Integrated DC/DC

Description


This reference design uses a TPS23750 in an isolated, discontinuous mode flyback converter for Power-over-Ethernet (PoE) applications. An input voltage of 34 to 57 VDC is converted to 12 V at 1 A at efficiencies up to 84%. The high level of integration of the TPS23750 provides a small, cost effective solution for PoE applications.




The TPS23750 integrates the functions of a PoE Powered Device (PD) switch and a primary side DC/DC PWM controller. The PoE front end is IEEE802.3af compliant and contains all necessary functions including detection, classification, undervoltage lockout, and inrush current limit, plus the integrated input switch. The PWM section supports isolated flyback and forward topologies, as well as non-isolated, lowside-switch buck topologies. Specifications Parameter

Min

Typ

Max

Unit

Input Voltage

Test Conditions

34

48

57

VDC

Output Voltage

11.6

12.0

12.4

VDC

Load Current

0

1

A

250

kHz

Switching Frequency Output Voltage Ripple

VIN = 48 VDC, IOUT = 1 A

80

mV

Efficiency

VIN = 48 VDC, IOUT = 1 A

84

%

Reference Design PMP1360 T1 H2019 J2 1 2 3 4 5 6 7 8

Ethernet Power

2

14

3 6

11

1 +

3 AC 4

3 4 AC

AC

AC

– D4 2 HD01-T

+ 34 to 57 VDC –

– 2 D5 HD01-T

1

Data Port R1 C1 0.15 µF 60.4 kΩ

8

D3 SMAJ58A

D7 MURA120

J4

J1 1 2 3 4 5 6 7 8

7

10 9

1 +

1

16 15

C11 0.1 µF 100 V

R3 24.9 kΩ

250 kHz U1 C3 + TPS23750PWP 1 20 22 µF FREQ 19 100 V 2 TMR 3 4 5 6 7 8 9 10

FB BL 18 COMP VBIAS 17 SEN MODE 16 AUX 15 SENP GATE 14 VDD COM 13 DET RSN 12 CLASS RSP 11 VSS PwPd RTN

R6 357 0.25 W

REF

12

C4 1 µF 100 V

C5 R4 1 µF 100 100 V kΩ

C12 0.22 µF

0.5 W

D6 BAS16 C20 0.22 µF

21

C14 2.2 µF 16 V R7 10

2

C6 0.1 µF 100 V

11 12 10 3

R9 100

J3

78

D1 MBRD360

56

D2 MURA120

C8 22 µF 16 V

C9 22 µF 16 V

C10 330 µF 16 V

12 V @ 1 A GND

C13 2200 pF 2 kV

8765

Q1 Si848DY

4

R10 0.25 0.25 W

C18 0.01 µF

REF

R11 4.02 kΩ R15 2 kΩ

U2 TCMT1107 C19 1 µF


C7 22 µF 16 V

+

R5 20

3 21

C15 DNP

R2 C2 47 470 pF 0.25 W

T2 POE13F-12

L1 10 µH

C16 10 pF

TP1 R8 51.1 TP3

R14 C17 121 kΩ 5600 pF

R13 10 kΩ

R12 7.5 kΩ

D8 BAS16

TP2

1 3 2 U3

TL431ACDBZR

R16 2.61 kΩ


TPS23750

33

IEEE 802.3af PD Controller with Integrated DC/DC

➔

Load Step (3 = 1 ms, 100 mV) (4 = 1 ms, .50 A)

Efficiency (VIN = 48 V) (J2 = System Efficiency)

Efficiency – %

90.0

80.0

J2

70.0

J4

60.0 0.00

0.20

0.40 IOUT – A

0.60

0.80

1.00

Output Ripple (VIN = 48 V, 1-A Load Across C10)

120 deg

30 dB

90 deg

20 dB

60 deg

10 dB

30 deg

0 dB

0 deg

-60 deg

-30 dB

-90 deg

-40 dB

-120 deg

10

10 kHz

–180

-20 dB

1 kHz

-30 deg

100 Hz

-10 dB

Frequency

180

150 deg

40 dB 1-Gain

Phase

50 dB 1-Phase

10 Hz

–60

Gain

60

Control Loop (3-kHz Bandwidth, 90 Degrees)

100 k

Input Ripple (VIN = 48 V, 1-A Load Across J2-1 and 3)

Turn On Response (VIN = 48 V) (0-A Load)



34

UCC2897

➔

Negative Clamp Converter Provides 10 A at 12 V from a –48-V Telecom Input

Description


This reference design uses the UCC2897 current mode, active clamp, PWM controller to generate an isolated 12-V/10-A output from a standard –48-V telecom input. Hot swap inrush protection is provided by the TPS2391 hot-swap controller. The self-driven synchronous rectifiers allow this design to achieve efficiencies above 93%. A secondary current-sense resistor provides accurate current limit and output voltage fold back. Remote sensing is also provided, allowing accurate regulation at the point of load. Specifications Parameter Input Voltage Output Voltage Load Current Switching Frequency Output Ripple Voltage Efficiency

Test Conditions



Part Number Search: UCC2897

Min –36 11.78 0 180

Typ –48 12.15

Max –72 12.51 10 220 250

200 200 93.4 93.0

VIN = –48 V; IO = 10 A VIN = –48 V; IO = 7 A VIN = –48 V; IO = 10 A

Unit V V A kHz mVPP % %

Reference Design PMP1714 BIAS D1 BAS16

R36 0.01

2 3

1W

Q10 IRFR7473

C6 1 µF 100 V

C5 1 µF 100 V

C7 1 µF 100 V

C8 1 µF 100 V

1 2 3

D7 BAT54

R4 10 kΩ

R9 6.04 kΩ

R10 150 kΩ

R12 2.49 kΩ

R14 150 kΩ

C23 0.01 µF

D5 12 V R2 2.49 kΩ

C2 100 µF 16 V

C3 DNP

D4 12 V J4

VIN N/C RDEL RTON RTOFF VREF SYNC GND CS RSLOPE

1W

SUD50N06-09L Q5 Si7450DP

Q7 Si7450DP

D6 BAS16

BIAS2 R5 4.99 kΩ C12 1 µF

R6 0.025 1W

BIAS2

1 2 3 4 5 6 7 8 9 10

R30 49.9 kΩ

C100 330 pF R33 10 kΩ

C13 1 µF

R15 24.9 kΩ 4

R17 121 kΩ

U3 PC367N1

3

R19 66.5 kΩ

D8 BAS16

14

U2:D TLC274AID

R8 4.99 kΩ

R11 12.1 kΩ

– 13 + 12

REF

R18 24.9 kΩ

1

4

– 2

3 U2:A 11 + TLC274AID

R35 10 kΩ

R35 1 kΩ VOUT–

1 2

J5 D9 BAS16

C17 1 µF

C18 56pF

R21 20.5 kΩ R22 100 kΩ C19 1500 pF

C22 470 pF


8

U2:C TLC274AID

– 9 + 10

C24 1 µF

–SENSE

R23 49.9 kΩ VOUT–

R20 1 kΩ

C20 4700pF R24 43.2 kΩ R25 49.9 kΩ

R31 1 kΩ

BIAS2 C26 1 µF

C25 1 µF

R7 1 kΩ

VO(–)

VOUT–

REF

U1 TL431AIDBZ

VO(+)

C4 1 µF

R3 0.01

VIN

U4 UCC2897PW

C21 0.01 µF

+

Q4 FTZ491

Q2 FTZ491

5

Q9 MMBT2907

C16 1 µF BIAS

R1 2.49 kΩ D2 MURS110T3

C9 0.047 µF

Q8 MMBT2222

N/C LINEOV LINEUV VDD PVDD OUT AUX PGND SS/SD FB

D3 MURS110T3

8

Q3

BIAS Q6 IREFR9214 C10 1 µF

20 19 18 17 16 15 14 13 12 11

J1

Q1 SUD50N06-09L

7 6

4

250 V

C14 1 µF

VOUT+

7 6

T2 PA1425

VIN

5678

C15 3900 pF

L1 PA1426 8

5

1 8 FAULT RTN 2 7 EN GATE 3 6 FLTTME ISNS 4 5 IRAMP –VIN 4

C11 0.1 µF J3

U5 R16 100 kΩTPS2391DGK

123

R13 100 kΩ

VIN (–)

C1 C19 + 68 µF 1 µF 16 V

J2

VIN (+)

7

R26 49.9 kΩ

U2:B TLC274AID

D10 BAS16

– 6 + 5

R27 100 kΩ R28 49.9 kΩ VOUT+ R29 20.5 kΩ

J6

+SENSE

R31 49.9 kΩ REF


UCC2897

35

Negative Clamp Converter Provides 10 A at 12 V from a –48-V Telecom Input

➔

Output Ripple (VIN = –48 V; IO = 10 A; 100 mV/div; 2 µs/div)

Efficiency 94 92

Efficiency – %

90 88 86 84 82 -34 VIN

80

-48 VIN

-80 VIN

78 0

1

2

3

4

5

6

7

8

9

10

Load Current – A

Turn On (VIN = –48 V; No Load) Channel 1: VOUT; 5 V/div; 5 ms/div

–60

–180

Gain

Phase

60

180

Control Loop (VIN = –48 V; IO = 10 A)

100

Frequency

100 k

Transient Response Top Trace: VO @ 500 mV/div, 200 µs/div Bottom Trace: IO @ 2 A/div, 200 µs/div



36

UCC3807

➔

Boost Converter Provides 12 V from 4.5-V to 5.5-V VIN at 1 A

Description The UCC3807 family of high-speed, low-power ICs contains all of the control and drive circuitry required for off-line and DC/DC fixed-frequency current-mode switching power supplies with minimal external parts count. In addition, the UCC3807 has the a programmable maximum duty cycle, which makes it easier to implement the boost topology.



Part Number Search: UCC3807 Specifications Parameter Input Voltage Output Voltage Load Current Switching Frequency Output Ripple Voltage

Test Conditions

Min

Typ 4.5 12

11.88 0 180

Max 5.5 12.12 1 220 10

200

VOUT = 12 V

Unit V V A kHz mV/PPK

Reference Design PMP1545

TP1 J3 4.5 to 5.5 VDC GND

1 2

1

C1 22 µF 16 V

TP3

R2 6.49 kΩ

C6 470 pF R4 2 kΩ

TP6

R7 100 kΩ

R8 20 kΩ

C8 0.1 µF

R3 15 kΩ

U1 UCC3807D-3

1 TRIG DSCHG 2 COMP VDD 3 FB OUT 4 CS GND freq = 200 kHz

R6 1M R9 332 kΩ

L1 1.4 µH

D1 MBRD660CT 2

1

TP2

2

R1 20 TP4

D 8 7 6 5

L2 3.3 µH

C7 1 µF

C2 22 µF 16 V

C4 22 µF 16 V

1 2

J3

12 V @ 1 A GND

TP5

Q1 Si7882DP

G S

C10 330 pF C11 1000 pF



Boost Converter Provides 12 V from 4.5-V to 5.5-V VIN at 1 A Start Up (VIN = 5 V, VOUT = 12 V, Loaded to 0 A)

Efficiency (VIN = 12 V)

Efficiency – %

37

➔

UCC3807

84 83 82 81 80 79 78

5 VIN

77 76

0.00 0.10 0. 20 0. 30 0.40 0.50 0. 60 0. 70 0.80 0.90 1. 00 1. 10 IOUT – A

Load Transient (VIN = 5 V, VOUT = 12 V, Pulsed to 0.1 A and 1 A)

Load Regulation 12.020 12.010

5 VIN

VOUT – V

12.000 11.990 11.980 11.970 11.960 11.950 0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1

1.1

IOUT – A

Load Transient (VIN = 5 V, VOUT = 12 V, Pulsed to 0.1 A and 1 A)

–60

–180

Gain

Phase

180

60

Control Loop (VIN = 5 V, Gain 1, 1 A, Phased 90 Degrees)

100


Frequency

100 k


38

bq24721

➔

Advanced Multi-Chemistry and Multi-Cell Battery-Pack Charger

Description


The bq2472x family is a synchronous battery-pack charger and path selector with a high level of integration for portable applications. The output voltage, charge current and input current limit are programmable via a simplified SBS-like SMBus interface. It can provide up to 8 A of charge current from an input 8 V to 28 V for 3-cell or 4-cell Li-Ion or Li-Pol applications. The dynamic power management (DPM) function SMBus interface modifies the charge current depending on system load conditions, avoiding ac adapter overload. High-accuracy current-sense amplifiers enable accurate measurement of either the charge current or the ac adapter current, allowing termination of nonsmart packs and monitoring of overall system power. Specifications Parameter

Test Conditions



Part Number Search: bq24721

Min

Typ

Max

Unit

Input Voltage

13

24

V

Battery Regulation Voltage

12

19.2

V

Charge Current (Average)

0

6

A

Adapter Input Current

0

7

A

3

(Average) Switching Frequency Efficiency

VIN = 19.5 V, VBAT = 12.6 V; IO = 3000 mA

300k

Hz

93

%

Evaluation Module bq24721EVM Q1 Si4435 Adapter +

Q2 Si4435

R4 0.010

C1 10 µF Adapter –

C6 1 µF

C7 0.1 µF D1 BAT54C R3 464 kΩ 1%

C8 C9 0.1 µF 0.1 µF

System

bq24721

Pack+

ACDRV VCC

SYS

ACN

BATDRV

ACP

PVCC

BYPASS

R4 33.2 kΩ VREF5R5 1% 5.6 kΩ 1%

Pack Thermistor Sense

HIDRV

ACDET

C10 1 µF

PH

VREF5 AGND

C13 0.1 µF C4 Q4 2x10 µF FDS6670A C17 0.1 µF optional

REGN TS LODRV PGOOD SYNP SRNN SRP SRN BAT

ACGOOD CHGEN

VREF5

EAO EAI FBO

R6 R7 R8 10 kΩ 10 kΩ 10 kΩ SCL SDA ALARM

SMBus IRQ A/D

C3 4x10 µF Q3 FDS6670A L1 10 µH C12 0.1 µF

BTST

R13 118 kΩ 1%

Embedded Controller Host

C2 10 µF

C11 0.1 µF

IOUT

ISYNSET

R2 0.010

C14 0.1 µF

C15 0.1 µF

Q5 Si4435 Pack+

C5 2x10 µF C16 0.1 µF

Pack– C18 0.1 µF optional

R9 7.5 kΩ C20 51 pF C21 2000 pF

C19 0.1 µF R10 C22 20 kΩ 130 pF R11 200 kΩ

R12 33 kΩ

PWPD


Short PowerPAD™ to PGND and AGND


bq24721

39

➔

Advanced Multi-Chemistry and Multi-Cell Battery-Pack Charger Battery Removal (Constant Current Mode)

Efficiency vs. Battery Charge Current 100

bq24720 OVP Response

Ch2 2 V/div

V(BAT) = 16.8 V

Ch2 12.6 V

BAT Inductor Currrent

90

Ch4 2 A/div

V(BAT) = 12.6 V 85

75 0

1

2

3

4

5

6

7

Ch4 0A

PH

VI = 19.5 V TA = 20° C

80

Ch1 20 V/div

Efficiency – %

95

Ch1 0V

8

Battery Charge Current – A


Soft-Start Charge Current

Transient System Load

Soft Start Operation

Power Loop Verification (DPM) Transient Response Constant Current Regulation, Then (DPM) Regulation

Ch3 1 A/div

Ch1 Ch3 Ch4 2 A/div 2 A/div 2 A/div

Ch4 = System Current

Ch1 = Input Current

Ch3 = Battery Current



Ch4 0A

Inductor Current

0A

Ch1 Ch3 0A



40

UCD8220

➔

Digital Half-Bridge Converter

Description


The UCD8220 is a digitally managed push-pull analog PWM controller to be used in digitally managed power supplies using a microcontroller or the TMS320™ DSP family. The UCD8220 is a double-ended PWM controller configured with push-pull drive logic. Systems using the UCD8220 device close the PWM feedback loop with traditional analog methods, but the UCD8220 controller includes circuitry to interpret a timedomain digital pulse train “CLK Signal”. The pulse train sets the operating frequency and maximum duty-cycle limit which are used to control the power-supply operation. This eases implementation of a converter with high-level control features without the added complexity or possible PWM resolution limitations of closing the control loop in the discrete time domain. The UCD8220 reference design is a half-bridge topology switching at 600 kHz. It operates from the standard telecom input range of 36 V to 75 V and produces 12 V at 100 W. Specifications Parameter

Test Conditions

Input Voltage



Part Number Search: UCD8220

Min

Typ

Max

Unit

36

48

75

V

Output Voltage

12

Load Current

V

3

Switching Frequency

8.33

Output Ripple

600

kHz

20

mVPP

VIN = 48; IO = 5 A

90.5

%

VIN = 48; IO = 8.33 A

90

%

Output Ripple Voltage Efficiency

A

Reference Design UCD8220 VIN

J6 1:2 = UCD8620 J6 3:2 = UCD8220

TP15

2

CLK TP34

3

UCD_3.3 V C35 0.22 µF

R58 17.4 kΩ 4 R47 Open

5 2

CTRL TP30

C37 1000 pF

CLF

6 7

TP18

NC

VIN

CLK

NC

3V3

VDD

16 R45 1

15 TP35

TP19 UCD_12 V J11

C33

14

PVDD

C34

AGND

OUT1

CTRL

OUT2

CLF

PGND

13

D20 MBR0530

D19 MBR0530

D21 MBR0530

10

1 2

B Q3 KSC2881 3 E

TP20 OUT1

11

R44 12.1 kΩ

2 C 4 1

2.2 µF

D15 MBR0530

12

R43 12.1 kΩ

R8 2.4 kΩ

4.7 µF ISET

3

J6

U4 UCD8220PWP 1

2

1

Optional Start-Up Circuit for UCD8220

TP21 OUT2

D16

D17

BAS21

BAS21

R48 47

D18 12 V

R36 0.1 µF

TP29 AGND 2

2

8

ILIM C56 0.1 µF

ILIM

CS PwPd 17

2

Note: The power stage and the remainder of the control circuitry is available on www.ti.com in the UCD8220 product folder.

9

CS R49 0

R50 TP17 4.99 kΩ

R51 Open

CS_SENSE

C38 0.01 µF

2



UCD8220

41

Digital Half-Bridge Converter

➔

Clock and VOUT Soft Start (VIN = 48 V, IOUT = 5 A)

Efficiency vs. Output Current (VOUT = 12 V) 0.93 0.92 0.91 0.90 0.89 0.88 0.87 0.86 VIN = 36 V VIN = 48 V VIN = 75 V

0.85 0.84 0.83 1

2

3

4

5 6 IOUT

7

8

9

10

Transient Response (VIN = 48 V, IOUT = 3 A to 8 A)

40

180

30

135

20

90

10

45

0

0

–10

Phase

Gain

UCD8220EVM Magnitude and Phase Plot (VIN = 48 V, IOUT = 8.3 A)

–45

–20

–90 Mag (dB) Phase Margin (deg)

–30 –40 10

100

1,000 10,000 Frequency

–135 –180 100,000

Clock and VOUT During Soft Start (VIN = 48 V, IOUT Set to 5 A)

VOUT Ripple (VIN = 48 V, IOUT = 5 A)



42

Resources

Information at Your Fingertips www.ti.com/selection TI has a full line of selection guides to help in your design process: • Amplifier and Data Converter • Clocks and Timing • DSP • Interface • Logic

• Low-Power RF • MSP430 • Power Management

www.ti.com/aaj-sgad

Download the current Analog Applications Journal (and past issues) to make your design challenges easier. Reference Design Cookbook II for Power Management Products


Resources

43

Reference Design Cookbook I for Power Management Products TI introduced its first “cookbook” of power management reference designs in 3Q 2005. In this catalog, you will find many complete reference designs with tables, schematics and waveforms. A few of the designs included are: • Synchronous Buck Converter • Inverting Buck-Boost Converter • 5-V, 1-A Boost Converter • SEPIC High-Frequency Controller • Negative-Output Flyback Converter • Triple-Output Flyback PWM Controller • Lithium-Ion Charger

Online Available

This cookbook and other reference designs are available on TI’s power management reference design website at: www.ti.com/powerreferencedesigns Also, check out TI’s “Power Quick Search” tool at power.ti.com for recommended power solutions across DC/DC conversion and PWM controller products based on user input criteria.

Thanks for using TI's Design Reference Cookbook II. TI is ready to help you with all your design challenges. Consult TI's website specifically devoted to Power.

power.ti.com



Technology for Innovators

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Safe Harbor Statement This publication may contain forward-looking statements that involve a number of risks and uncertainties. These “forwardlooking statements” are intended to qualify for the safe harbor from liability established by the Private Securities Litigation Reform Act of 1995. These forward-looking statements generally can be identified by phrases such as TI or its management “believes,” “expects,” “anticipates,” “foresees,” “forecasts,” “estimates” or other words or phrases of similar import. Similarly, such statements herein that describe the company’s products, business strategy, outlook, objectives, plans, intentions or goals also are forward-looking statements. All such forward-looking statements are subject to certain risks and uncertainties that could cause actual results to differ materially from those in forwardlooking statements. Please refer to TI’s most recent Form 10-K for more information on the risks and uncertainties that could materially affect future results of operations. We disclaim any intention or obligation to update any forward-looking statements as a result of developments occurring after the date of this publication. Important Notice: The products and services of Texas Instruments Incorporated and its subsidiaries described herein are sold subject to TI’s standard terms and conditions of sale. Customers are advised to obtain the most current and complete information about TI products and services before placing orders. TI assumes no liability for applications assistance, customer’s applications or product designs, software performance, or infringement of patents. The publication of information regarding any other company’s products or services does not constitute TI’s approval, warranty or endorsement thereof. Technology for Innovators, the black/red banner, TMS320 and PowerPAD are trademarks of Texas Instruments. All other trademarks are the property of their respective owners. © 2006 Texas Instruments Incorporated Printed in U.S.A. by (Printer, City, State), on recycled paper

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