Sandeep. N

cover page b_w.pdf Cover page.pdf INDEX.pdf abstract.pdf CH_1.pdf CH_2.pdf CH_3.pdf CH_4.pdf CH_5.pdf references.pdf List of Pub.pdf

SINGLE-PHASE THREE-LEVEL INVERTER WITH MPPT FOR GRID CONNECTED PV SYSTEMS Dissertation submitted to Visvesvaraya National Institute of Technology, Nagpur in partial fulfilment of requirement for the award of degree of

Master of Technology in Power Electronics and Drives by Sandeep. N Under the Guidance of Dr. P. S. Kulkarni

Department of Electrical Engineering

Visvesvaraya National Institute of Technology Nagpur 440 010 (India) May-2014

SINGLE-PHASE THREE-LEVEL INVERTER WITH MPPT FOR GRID CONNECTED PV SYSTEMS Dissertation submitted to Visvesvaraya National Institute of Technology, Nagpur In partial fulfilment of requirement for the award of Degree of

M. Tech In Power Electronics and Drives By Sandeep. N Under the Guidance of Dr. P. S. Kulkarni

Department of Electrical Engineering Visvesvaraya National Institute of Technology Nagpur 440010 (India) May-2014 ©Visvesvaray National Institute of Technology


DECLARATION I, hereby declare that the thesis titled “Single-Phase Three-Level Inverter with MPPT for Grid Connected PV Systems”, submitted herein for the award of degree of Master of Technology in Power Electronics and Drives has been carried out by me in the Department of Electrical Engineering of Visvesvaraya National Institute of Technology, Nagpur. The work is original and has been not submitted earlier as a whole or in part for the award of any degree/diploma at this or any other Institution/University.

Date:-

SANDEEP. N


CERTIFICATE This is to certify that the dissertation entitled “Single-Phase Three-Level Inverter with MPPT for Grid Connected PV Systems”, being submitted by Mr. Sandeep. N, in partial fulfilment of the requirement for the award of degree of MASTER OF TECHNOLOGY IN POWER ELECTRONICS AND DRIVES, is a record of the student’s own work carried by him under my supervision and guidance.

Dr. M. V. Aware Professor and HOD of Department of Electrical Engineering, VNIT, Nagpur Forwarded by-

Dr. P. S. Kulkarni Department of Electrical Engineering VNIT, Nagpur

Date:

ACKNOWLEDGEMENT Acknowledgement is a very small bouquet for the appreciation, recognition actuated by gratitude towards those valuable help, guidance and criticism that led my project to the utter success First I would like to express my gratitude to my supervisor Dr. P. S. Kulkarni for his wisdom, patience, and treasured guidance throughout the project work. I wish to thank Dr. H. M. SURYAWANSHI, former Head Electrical Engg. Department for his course on Power Electronics. His unconventional lecture sessions was one of the mind-bending and rigorous experiences in the class room. I wish to thank Dr. M. V. AWARE, Head Electrical Engg. Department for his course on Electric Drives and who was kind enough in providing me all the help so that I could work voraciously, baring the time limit. I also want to thank all my classmates and the staff of college who directly or indirectly helped and contributed to successful completion of my project. And finally I thank my parents for their love, support and encouragement. And last but not least I am very thankful to God, who loves me abundantly.

Nagpur

Date:

SANDEEP. N

Contents Abstract

i

List of Figures

ii

List of Tables

vi

CHAPTER 1 ........................................................................................................................ 1 Introduction .......................................................................................................................... 1 1.1

Overview and Challenges of Solar Power ........................................................ 1

1.2

Literature Survey ............................................................................................. 2

1.3

Aims and Objectives ....................................................................................... 3

1.4

Outline of the Thesis....................................................................................... 4

CHAPTER 2 ........................................................................................................................ 5 Modelling of Photovoltaic Module ...................................................................................... 5 2.1

Introduction .................................................................................................... 5

2.2

Solar Energy Conversion................................................................................. 6 2.2.1 Solar Photovoltaic Technologies ............................................................ 7

2.3

Mathematical Modelling of PV Module ........................................................... 9

2.4

PV Module Model in Matlab/Simulink ......................................................... 13 2.4.1 Impacts of Irradiation and Temperature on I-V, P-V Curves ............... 15 2.4.2 PV Array under the Conditions of Nonuniform Irradiance...........Error! Bookmark not defined.16

CHAPTER 3 ...................................................................................................................... 20 Single-Phase Single-Stage Grid Connected Inverter ......................................................... 20 3.1

Introduction .................................................................................................. 20

3.2

Multilevel Power Conversion ........................................................................ 22 3.2.1 Cascaded H-Bridge Multilevel Inverter (CHB-MLI) . Error! Bookmark not defined.22

3.2.2 Diode Clamped Multilevel Inverter (DC-MLI) .................................... 25 3.2.3 Transistor Clamped H-Bridge Multilevel Inverter (TCHB-MLI)……. . 25 3.2.1 New Simplified Multilevel Inverter Topology ...................................... 31 3.3

Maximum Power Point Tracking Techniques ................................................ 38 3.3.1 Introduction ........................................................................................ 38 3.3.2 Need For Mppt ................................................................................... 38 3.3.3 Various Mppt Techniques.................................................................... 40

CHAPTER 4 ...................................................................................................................... 48 PV Inverter - System Structure and Control Design .....................................................................48 4.1

Pv Fed Three-Level Inverter for Utility Interface ................................................48

4.2

Control System Components Design .....................................................................51 4.2.1 LCL Filter Design ...........................................................................................51 4.2.2 Current Controller ............................................................................... 56 4.3.2 Voltage Controller ............................................................................... 64

4.3

Active Damping of LCL Filter.................................................................................69

4.4

Performance Evaluation Using Matlab/Simulink .................................................71

4.5

Hardware Impelementation of PV Inverter...........................................................78 4.5.1 PV Array ...........................................................................................................79 4.5.2 Three-Level Inverter and LCL Filter............................................................79 4.5.3 Gate Driver Circuit .........................................................................................80 4.5.4 Notch Filter ......................................................................................................81 4.5.5 Signal Sensing Circuit......................................................................................81

4.6

Generation of Gating Pulses Using TMS320f28027 ............................................82

4.7

Experimental Results .................................................................................................83

CHAPTER 5 ...................................................................................................................... 86 Conclusion and Future Work ............................................................................................................86 5.1

Conclusion ..................................................................................................................86

5.2

Future Work ...............................................................................................................87

References………………………………………………………………………………. 89 List of Publications ....................................................................................................... 91 APPENDICES ..............................................................................................................95 APPENDIX A...................................................................................................... 95 APPENDIX B...................................................................................................... 96 APPENDIX C...................................................................................................... 97 APPENDIX D......................................................................................................98

Abstract The main design objective of photovoltaic (PV) systems has been, for a long time, to extract the maximum available power from the PV array and inject it into the utility. Therefore, the maximum power point tracking (MPPT) of a uniformly irradiated PV array and the maximization of the conversion efficiency important design aspects. When the PV plant is interconnected to the grid, special care has to be taken towards the power quality, reliability of the system, and the implementation of protection and grid synchronization functions. Some of the challenges in front of the modern power plants are to maximize their energy production, development of suitable control strategies to solve the problems related to the partial shading phenomena and different orientation of the PV modules toward the sun. A general grid-connected PV system has more than one power-processing stage. The first stage is a dc-dc converter which draws maximum available power from the solar array by incorporating MPPT and also increases the dc-link voltage level. The output of this stage is inverted using single or multilevel dc-ac inverter before feeding into the grid. The reliability, compactness and cost effectiveness of the PV system can be improved by employing a single stage power processing unit (dc-ac inverter). Inverter in a single-stage system has to extract maximum available power from the solar array by employing a proper MPPT algorithm and dumps the power derived on the grid by maintaining power quality discipline of the grid. A dynamic MPPT called the Ripple Correlation Control is applied to such a single stage configuration and the necessary control design aspects are included. Comparison of multilevel power converters and a novel simplified inerter topology has been presented. The PV source has been modelled using its characteristic equations and the curves demonstrating the various effects of environmental factors on the curves are included. The performance of the proposed system has been analysed by subjecting it to wide variation in the environmental conditions and the results showing the effectiveness is presented. Theoretical and Simulation results are experimentally verified using a laboratory setup.

i

List of Figures 2.1

Construction of PV array....................................................................................

6

2.2

Physical structure of PV cell...............................................................................

6

2.3

Types of PV technologies...................................................................................

7

2.4

Classification of loss mechanism in solar cell..................................................

9

2.5

Electrical equivalent circuit of PV.....................................................................

10

2.6

I-V , P-V characteristics of a practical PV device and the three important

2.7

points......................................................................................................................

11

PV module model in MATLAB-Simulink........................................................

13

a) b)

Block diagram of the PV module model PV module model in a subsystem

2.8

Simulated I-V and P-V characteristics of PV module....................................

2.9

Simulated I-V curves and Simulated P-V curves with various irradiation levels........................................................................................................................

2.10

14

15

Simulated I-V curves and Simulated P-V curves with various temperature Levels.......................................................................................................................

16

2.11

A module with n cells in which........................................................................... a) The top cell is in the sun b) In the shade

17

2.12

Diagram of three PV modules connected in series..........................................

18

2.13

I-V and P-V curves of test A............................................................................

19

2.14

I-V and P-V curves of test B.............................................................................

19

3.1

Classification of MLIs...........................................................................................

23

3.2

Cacaded H-bridge MLI topology........................................................................

23

3.3

Level-shifted multicarrier modulation for seven-level CHB-MLI.................

25

3.4

Gating signals for all the active switches............................................................

26

3.5

Simulated waveforms for a seven-level CHB inverter ( ma  1 , m f  40

ii

f m  50 Hz and E  50V ).....................................................................................

26

3.6

Diode clamped MLI topology..............................................................................

27

3.7

Level-shifted multicarrier modulation for seven-level DC-MLI....................

28

3.8

Gating signals for all the active switches of DC-MLI.......................................

28

3.9

Simulated waveforms for a seven-level DC-MLI inverter ( ma  1

m f  40 , f m  50 Hz and E  50V )....................................................................... 28 3.10

Transistor clamped H-Bridge MLI topology......................................................... 29

3.11

PWM switching signal generation........................................................................... 31

3.12

Complete gate signals of all the active switches(TCHB-MLI)............................ 31

3.13

Simulated waveforms for a seven-level TCHB inverter ( ma  1

m f  40 , f m  50 Hz and E  50V )...................................................................... 31 3.14

New Simplified Multilevel Inverter......................................................................... 33

3.15

Switching sequences for the level generation........................................................ 34

3.16

PWM switching signal generation (NSMLI).......................................................... 35

3.17

Decision signals produced by the comparators .................................................... 36

3.18

Complete gate signals’ of NSMLI........................................................................... 37

3.19

Simulated waveforms for a New simplified MLI ( ma  1 m f  40

f m  50 Hz and E  50V )....................................................................................... 38 3.20

Components for multilevel inverter........................................................................ 38

3.21

The concept of operating point............................................................................... 40

3.22

IV characteristics with load characteristics embedded......................................... 40

3.23

Grid connected PV with MPPT.............................................................................. 40

3.24

Mechanism of P&O algorithm................................................................................ 42

3.25

Flowchart of Hill climbing algorithm..................................................................... 42 iii

3.26

Flowchart of INC algorithm.................................................................................... 43

3.27

Flowchart of modified INC algorithm................................................................... 44

3.28

Flowchart of beta algorithm..................................................................................... 45

3.29

Alternative components of voltage and power v and p .................................... 48

3.30

Block diagram of RCC implementation................................................................. 48

4.1

Power stage configuration of the single phase PV inverter................................ 49

4.2

Output LCL filter of the inverter............................................................................ 53

4.3

Generic magnitude plot of the output filter transfer function H f s  .............. 55

4.4

Magnitude plot of H f  j  using selected filter component values.................. 55

4.5

Different configurations for passive damping [5]................................................. 56

4.6

Different configurations for passive damping [6]................................................. 57

4.7

Block diagram of the LCL filter.............................................................................. 59

4.8

Block diagram of the current controller................................................................. 60

4.9

Bode plot of ideal PR controller, K p  1 and K i  20 ..................................... 61

4.10

Bode diagram of the current controller with......................................................... 62

4.11

Bode diagram of the uncompensated system........................................................ 63

4.12

Bode diagram of the compensated system............................................................ 64

4.13

Step response of the inner current loop................................................................ 64

4.14

50Hz response of the PR current control system................................................ 65

4.15

Time domain response of x1 t  v/s v g t  ........................................................... 66

4.16

Outer voltage loop of the inverter......................................................................... 68

4.17

Bode diagram of the uncompensated outer voltage loop.................................. 69 iv

4.18

Bode diagram of the compensated outer voltage loop......................................

69

4.19

DC link voltage reference generator.....................................................................

70

4.20

System structure for active damping of LCL filter.............................................

71

4.21

Step change in irradiation and temperature.........................................................

72

4.22

MATLAB/SIMULINK simulation results of the proposed topology on the PV and grid side................................................................................................

73

4.23

Injected grid current variations for step change in irradiation.........................

74

4.24

Injected grid current variations for step change in temperature.....................

75

4.25

Transient response of grid current.......................................................................

76

4.26

PV array power versus voltage curve during step change in irradiation........

77

4.27

PV array power versus voltage curve during step change in temperature.....

77

4.28

Efficiency versus input PV power........................................................................

78

4.29

%THD of the current versus output power fed into the grid............................. 78

4.30

Experimental rig of the three-level PV inverter..................................................... 79

4.31

System configuration of the three-level PV inverter............................................. 80

4.32

Photograph of the PV module used for experimentation.................................... 80

4.33

Photograph of the three level inverter used for experimentation....................... 81

4.34

Photograph of the gate driver................................................................................... 81

4.35

Circuit diagram of the analog implementation of BPF......................................... 82

4.36

Photograph of the voltage and current signal sensing circuit.............................. 82

4.37

Time response of BPF............................................................................................... 84

4.38

Time response of BPF with dc offset added.......................................................... 84

4.39

Experimental results current waveform through a resistive load (M=0.6)....... 85

v

4.40

Three level PV inverter o/p and the current......................................................... 86

4.41

Experimental results showing voltage and current waveforms across a resistive load............................................................................................................... 86

4.42

Experimental inverter efficiency v/s modulation index ................................. 86

vi

List of Tables 2.1

Confirmed terrestrial cell and submodule efficiencies at STC.....................

8

2.2

MSX-60 PV Module electrical specifications at STC..................................

14

3.1

Voltage Level and Switching State of the Seven-Level CHB-MLI.............

24

3.2

Voltage Level and Switching State of the Seven-Level DC-MLI................

27

3.3

Voltage Level and Switching State of the Seven-Level TCHB-MLI...........

30

3.4

Switching sequence for each level....................................................................

34

3.5

Switching cases in each state according to comparator output....................

35

3.6

%THD of the output voltage............................................................................

38

4.1

Specifications of PV inverter............................................................................

50

4.2

LCL Filter parameters ......................................................................................

55

4.3

Parameters of PR controller..............................................................................

64

4.4

Summary of parameters of the PV inverter system......................................

72

4.5

Summary of parameters used in experimental work.....................................

84

vii

CHAPTER 1.

INTRODUCTION

CHAPTER 1 INTRODUCTION 1.1

OVERVIEW AND CHALLENGES OF SOLAR POWER

The Global energy needs are increasing rapidly because of population explosion and socio-economic growth. This puts a lot of pressure on the fossil fuels. Fossil fuels (coal, oil and gas) are non-renewable and non-uniformly distributed around the globe. The consumption of fossil fuels causes pollution and produces large quantity of greenhouse gases. Growth in the use of renewable sources generally contributes to energy diversification. It can also reduce fuel imports and insulate the economy from fossil fuel price rises and swings. As a result most of the countries have started promoting the use of renewable energy sources. There are many hurdles in the path to overcome in order to extract and use solar energy more efficiently. Large awareness has to be created especially in Rural India with the Government support. To make solar economically competitive, engineers must find ways to improve the efficiency of the cells and to lower their manufacturing costs. Production per unit cell is very low. Only areas of the world with lots of sunlight are suitable for solar power generation features. Another major problem faced with solar power production is production and disposal of solar panels. The main renewable sources of energy include solar, wind, hydro, biomass, geothermal and ocean energy. Due to the sustainability and ubiquity of solar energy, it is treated as the most secure source of energy, when in comparison to other renewable sources. The sunlight that strikes the earth during 90 minutes is enough to provide the entire planet’s energy needs for one year which implies that the solar energy has huge potential. The total solar energy absorbed by earth is approximately 3,850,000 EJ/year. Solar energy provides an alternate source of energy in rural and urban India as a substitute for fossil fuels. India, a rapidly emerging economy with the world‘s second largest population, is facing a surging energy demand. A large portion of India‘s rural population, which represents 60% of the total

SINGLE-PHASE THREE-LEVEL INVERTER WITH MPPT FOR GRID CONNECTED PV SYSTEMS

1

CHAPTER 1.

INTRODUCTION

population, does not have access to reliable electricity or has limited access and relies heavily on fuels such as wood, diesel, and kerosene to fulfill energy needs. The Jawaharlal Nehru National Solar Mission (JNNSM) was launched on the 11 th January, 2010 by the Prime Minister of India. The objective of the Solar Mission is also to create conditions, through rapid scale-up of capacity and technological innovation to drive down costs towards grid parity. The objective of the National Solar Mission is to establish India as a global leader in solar energy, by creating the policy conditions for its diffusion across the country as quickly as possible.

1.2

LITERATURE SURVEY

In this thesis Literature survey over a span of last 16 years has been presented. Villalva et al. proposed a method of modeling and simulation of photovoltaic arrays. The main objective was to find the parameters of the nonlinear I–V equation by adjusting the curve at three points: open circuit, maximum power, and short circuit [3]. Ding et al. suggested a MATLAB-Simulink-based PV module model and the effect of nonuniform irradiance, presenting both simulation and experimental results [4]. Kjaer et al. have done a review of various Single-Phase Grid-Connected Inverters for Photovoltaic Modules [5]. Rodríguez et al. presented a survey of topologies, controls, and applications of multilevel inverter [6]. Colak et al. presented a review of multilevel voltage source inverter topologies and control schemes is done by, the most common multilevel inverter topologies and control schemes [7]. Wu has presented the fundamentals and the operating principle of various multilevel converters [8]. In [9] Jain and Agarwal compared various Maximum Power Point Tracking (MPPT) techniques applied to single phase Single-Stage Grid-Connected (SSGC) photovoltaic systems and pointed out the specialties of the MPPT techniques applied to SSGC systems. In [10] Liu has proposed an effective method to improve the MPPT speed and accuracy simultaneously called a variable step size inc mppt method. Jain and Agarwal has presented a new algorithm for rapid tracking of approximate maximum power point in photovoltaic systems called the beta (β) method [11]. Casadei et al. has shown the application of ripple correlation control MPPT for single-phase single-stage grid connected inverter [12]. Esram et al. has proposed a dynamically rapid method used for tracking the maximum power point of photovoltaic arrays, known as ripple correlation control, is presented and verified against


2

CHAPTER 1.

INTRODUCTION

experiment [13]. [14] and [15] deals with the IEEE standard for interconnecting distributed resources with electric power systems. Liserre et al. have presented a systematic design of the LCL filter for three phase active rectifier [16]. In [17] Channegowda and John analyzed the LCL filter design procedure from the point of view of power loss and efficiency. Alzola presented analytical method for the Damping Losses in LCL-Filter-Based Grid Converters [18]. A new design method for the passive damped LCL and LLCL filter-based single-phase grid-tied inverter is proposed by Wu [19]. Timbus has discussed the evaluation of current controllers for distributed power generation systems in [20]. Design guidelines for single-phase grid-connected photovoltaic inverters with damped resonant harmonic compensators have been proposed by Castilla [21]. In [22] Liserre et al. has presented the stability assessment of solar photovoltaic and wind turbine connected to grid for large set of grid impedance values. In [23] Zong and Lehn has presented the reactive power control of single phase grid tied voltage sourced inverters for residential PV application. An overview of PIbased solutions for the control of dc buses of a single-phase H-bridge multilevel active rectifier has been proposed by Dell’Aquila [24]. A step-by-step controller design for LCL-type grid-connected inverter with capacitor–current-feedback active-damping has been proposed by Bao [25]. Mukherjee proposed an hybrid damping approach for PWM rectifier/inverter has been analyzed the method for its performance improvement [26]. Shen et al. has demonstrated and presented a new current feedback method for the active damping of the LCL filter for grid connected inverter [27].

1.3

AIMS AND OBJECTIVES

The aims and objectives of the present thesis are as under 

To model the solar PV module and to study its characteristics for varying irradiation and temperature based on the practical datasheet.



To simulate the single-phase three level grid tied inverter with solar PV as a source using MATLAB/SIMULINK.



To carry out design of control system component and MPPT controller for achieving maximum power conversion efficiency and to inject grid current with low distortion.



To carry out development of experimental prototype of three level PV inverter.


3

CHAPTER 1.

1.4

INTRODUCTION

OUTLINE OF THE THESIS

The thesis is organized in five chapters as follows. CHAPTER 1

Deals with the overview and challenges of solar power. This chapter presents the information about the renewable energy. The Jawaharlal Nehru National Solar Mission (JNNSM) is described. Literature survey, Aims and objective of the project work are also discussed.

CHAPTER 2

Presents the modeling and simulation of the Solar Photovoltaic (SPV) module. The behaviour of the I-V and P-V characteristics under different environmental conditions are discussed. The effect of nonuniform irradiation on the characteristics is also discussed.

CHAPTER 3

Analysis and simulation of classical multilevel inverter topologies has been carried out. A new simplified inverter has been simulated and the performance comparison of the topologies on the basis of number of components has been presented. Popular and important MPPT methods are discussed.

CHAPTER 4

Simulation of grid connected PV three level inverter has been carried out. Analysis of %THD in the grid current for various changes in irradiation and temperature are presented. The transient and steady state behavior response of the grid current is presented. The %THD of the injected grid current for various grid voltage disturbance are as shown. The experimental output waveforms of the three level PV inverter is also presented.

CHAPTER 5

Deals with the conclusion and future scope of the project work.


4

CHAPTER 2.

MODELLING OF PHOTOVOLTAIC MODULE

CHAPTER 2 MODELLING OF PHOTOVOLTAIC MODULE OVERVIEW AND CHALLENGES OF SOLAR POWER

2.1

The Sun is one of the most significant source of renewable energy. In one hour the Earth receives enough energy from the Sun to meet its needs for nearly a year. Photovoltaic (PV) energy is presently considered to be one of the most useful natural energy sources due to the following features. 

Free



Abundantly available



Pollution free



Direct conversion into electrical energy



Suitable for remote power generation



Long life span (25 years)

A Photovoltaic (PV) cell is a semiconductor device that directly converts the energy of solar radiation into electric energy. In general, an element that converts sunlight into electricity is called a PV device. The fundamental PV device is the PV cell, while a set of connected cells form a panel or module. Panels are generally composed of series cells in order to obtain large output voltages. Panels with large output currents are achieved by increasing the surface area of the cells or by connecting cells in parallel. A PV array may be either a panel or a set of panels connected in series or parallel to form large PV systems as shown in Fig. 2.1. This thesis focuses on PV arrays and shows how to obtain the parameters of the I–V equation from practical data in datasheets. The given modeling of elementary PV cells or arrays composed of multiple panels may be done with the same procedure and its application under conditions of non-uniform irradiance.


5

CHAPTER 2.


Fig 2.1:

2.2

Construction of PV array.

SOLAR ENERGY CONVERSION

A photovoltaic cell is basically a semiconductor diode whose p–n junction is exposed to light. The incidence of light on the cell generates charge carriers that originate an electric current if the cell is short-circuited. Charges are generated when the energy of the incident photon is sufficient to detach the covalent electrons of the semiconductor—this phenomenon depends on the semiconductor material and on the wavelength of the incident light. Basically, the PV phenomenon may be described as the absorption of solar radiation, the generation and transport of carriers at the p–n junction, and the collection of these electric charges at the terminals of the PV device. The rate of generation of electric carriers depends on the flux of incident light and the capacity of absorption of the semiconductor. The capacity of absorption depends mainly on the semiconductor band gap, on the reflectance of the cell surface (that depends on the shape and treatment of the surface), on the intrinsic concentration of carriers of the semiconductor, on the electronic mobility, on the recombination rate, on the temperature, and on several other factors. A thin metallic grid is placed on the Sun-facing surface of the semiconductor. Fig. 2.2 illustrates the physical structure of a PV cell.

Fig 2.2:

Physical structure of a PV cell.


6

CHAPTER 2.

2.2.1


SOLAR PHOTOVOLTAIC TECHNOLOGIES

There are a number of ways to categorize Photovoltaics [1]. One way is based on the thickness of the semiconductor. Conventional crystalline silicon solar cells are, relatively speaking, very thick-on the order of 200-500 μm (0.008-0.020 in.). An alternative approach to PV fabrication is based on thin films of semiconductor, where “thin” means something like 1-10 μm. Thin-film cells require much less semiconductor material and are easier to manufacture, so they have the potential to be cheaper than thick cells. However, about 80% of all photovoltaics are thick cells and the remaining 20% are thinfilm cells used mostly in calculators, watches, and other consumer electronics. Photovoltaic technologies can also be categorized by the extent to which atoms bond with each other in individual crystals. (1) Single crystal, the dominant silicon technology. (2) Multicrystalline (mc-Si), the cell is made up of a number of relatively large areas of single crystal grains, each on the order of 1 mm to 10 cm in size. (3) Polycrystalline, with many grains having dimensions on the order of 1 μm to 1 mm, as is the case for cadmium telluride (CdTe) cells, copper indium diselenide (CuInSe2,) and polycrystalline, thin-film silicon. (4) Microcrystalline cells with grain sizes less than 1 μm. (5) Amorphous, in which there are no single-crystal regions, as in amorphous silicon (a-Si).

Fig 2.3:

Types of PV technologies.

Consolidated table showing an extensive listing of the highest independently confirmed efficiencies for solar cells and modules [2] are presented in TABLE 2.1.


7

CHAPTER 2.


TABLE 2.1 :

Confirmed terrestrial cell and submodule efficiencies at STC.


8

CHAPTER 2.

2.3


MATHEMATICAL MODELING OF PV MODULE

An ideal solar cell can be considered as a current source wherein the current produced by the solar cell is proportional to the solar irradiation intensity falling on it. Though, the practical behavior deviates from ideal due to the optical and electrical losses as shown in Fig. 2.4, in order to develop an electrical equivalent model for solar cell appropriate components should be added with the ideal current source (representing solar cell) [2].

Fig 2.4:

Classification of loss mechanism in solar cell.

An electrical circuit representing a solar cell is shown in Fig. 2.5. The optical losses is represented by the current source itself, where the generated current is proportional to the light input. The recombination losses are represented by the diode connected parallel to the current source, but in the reverse direction (as the recombination current flows in the opposite direction to the light current). In double diode model, one diode represents the recombination in bulk and in emitter region of the cell, while the second diode represents the recombination in the space charge region of the cell. In single diode model the space charge region is neglected and hence only one diode is enough for the solar cell equivalent circuit. The ohmic losses in the cell occur due to the series and shunt resistance denoted by R s and Rsh respectively. As the name suggests, the series resistance offered by the solar cell in the path of the current flow. The shunt resistance is referred as the leakage path of the current in


9

CHAPTER 2.


a solar cell and, therefore it is represented in parallel with the current source. The mathematical equations describing the characteristics of PV module are given as follows [3].

Fig 2.5:

Electrical equivalent circuit of PV.

  qv pv i pv  I L  I 0,cell exp  aKT  Where I L

    1  

(2.1)

- current generated by the incident light (A)

I 0,cell

- reverse saturation or lekage current of the diode (A)

q

- electron charge ( 1.602176 10

k

- Boltzmann constant ( 1.3806 10

T

- temperature of the p  n junction (K)

a

- diode ideality constant (1-1.5)

19

C) 23

J/K)

The basic equation (2.1) of the elementary PV cell does not represent the I-V characteristic of a practical array. Practical arrays are composed of several connected PV cells and the observation of the characteristics at the terminals of the array requires the inclusion of additional parameters to the basic equation.

  v  Rs i pv  v  Rs i pv    1  pv i pv  I L  I 0 exp pv Vt a Rp     Where I o Vt

(2.2)

- photovoltaic saturation current (A) - thermal voltage of the array (= N s KT / q V)


10

CHAPTER 2.


NS

- cells connected in series

NP

- cells connected in parallel

Fig 2.6:

I-V , P-V characteristics of a practical PV device.

Fig. 2.6 shows the I-V curve of a PV device with three remarkable important points highlighted:

short circuit (0, I sc ), MPP ( Vmpp , I mpp ) and open circuit ( Voc ,0 ).

Manufactures of PV arrays, instead of I-V equation, provides few experimental data about electrical and thermal characteristics. All PV array datasheets bring basically the following information: the nominal open-circuit voltage ( Voc ,n ), the nominal short-circuit current ( I sc ,n ), the voltage at the MPP ( Vmpp ), the current at the MPP ( I mpp ), the opencircuit voltage/temperature coefficient ( KV ), the shortcircuit current/temperature coefficient ( K I ), and the maximum experimental peak output power ( Pmpp ). This information is always provided with reference to the nominal condition or standard test conditions (STCs) of temperature and solar irradiation. Some manufacturers provide I–V curves for several irradiation and temperature conditions. The amount of incident light directly affects the generation of charge carriers, and consequently, the current generated by the device. Assumption I sc  I L is used in modeling of the PV because in practical devices the series resistance is low and the parallel resistance is high. The light generated current of the PV cell depends linearly on the solar irradiation and is also influenced by the temperature according to the following equation I L  I L ,n  K I  T

Where I L ,n

G

Gn

(2.3)

- light-generated current at the nominal condition (250 C and 1000 W/m2)


11

CHAPTER 2.


T

- difference in actual and nominal temperature ( T  Tn ) (K)

G

- irradiation on the device surface (W/m2)

Gn

- nominal irradiation on the device surface (W/m2)

The diode saturation current I o and its dependence on the temperature can be expressed by as shown 3  qEg  Tn  I 0  I 0,n   exp  T   ak

Where E g I 0,n

I 0 ,n 

 1 1   T  T    n 

(2.4)

- bandgap energy of the semiconductor (=1.12eV) - nominal saturation current

I sc,n

expVoc,n / aVt ,n   1

(2.5)

The value of R s can be found out using the following expression for improved accuracy of the model Vm p p 

I m p p Vo c,n  Vm p p 

I

sc

I

sc

Rs  I mpp 

I mpp    I m p p ln  1  I   sc   I m2 p p

(2.6)

I mpp    I m p p ln  1  I   sc  

The basic and generalized equation that describes the relation between i pv and v pv for the single diode PV equivalent module is given by    q v pv  Rs i pv  i pv  N p I L  N p I 0 exp    1 aN s k T    

Where N p

(2.7)

- number of cells connected in parallel

Ns

- number of cells connected in series

Rp

- equivalent parallel resistance of PV module


12

CHAPTER 2.

Rs

2.4


- equivalent series resistance of PV module

PV MODULE MODEL IN MATLAB/SIMULINK

The block diagram of the MATLAB-Simulink-based PV module model is as shown in Fig. 2.7, where the equation describing the characteristics of PV are embedded with three inputs and one output. G is the irradiation, TC is the cell operating temperature, V pv is the output voltage of the PV module, I pv and is the output current of the PV module. A controlled current source is used for simulating the PV module output current. A bypass diode is connected in parallel with the controlled current source. For the sake of convenience, all components in Fig. 2.7(a) are embedded into a subsystem block as shown in Fig. 2.7(b). The subsystem block will be a basic PV module model of MATLAB-Simulink. In the subsystem block, port of out + is the positive terminal of the PV module, port of out – is the negative terminal of the PV module, port of S is the inplane irradiation, and T is cell temperature. The blocks can be connected in series/parallel according to the actual PV array.

(a)

(b)

Fig 2.7: PV module model in MATLAB-Simulink. (a) Block diagram of the PV module model. (b) PV module model in a subsystem. A PV module, MSX-60W, produced by Solarex with 36 series-connected monocrystalline cells, is chosen to evaluate the proposed model. The electrical characteristics specifications under standard test condition (STC) from manufacturer are shown in TABLE 2.2. Simulation of the module with selected PV specification is done to verify the model developed with that of the characteristic curves given in the datasheet. SINGLE-PHASE THREE-LEVEL INVERTER WITH MPPT FOR GRID CONNECTED PV SYSTEMS

13

CHAPTER 2.




Standard Test Conditions (STC): Irradiation=Irradiation = 1000W/m2, Air Mass (AM) = 1.5, Cell operating temperature = 25°C and Wind speed = 1m/s.



Nominal Operating Conditions (NOC): Irradiation = 800W/m2, Air Mass (AM) = 1.5, Cell operating temperature = NOCT and Wind speed = 1m/s. The NOCT usually lies between 42°C and 50°C.



Nominal Operating Conditions (NOC): Irradiation = 800W/m2, Air Mass (AM) = 1.5, Cell operating temperature = NOCT and Wind speed = 1m/s. Parameters Maximum power Voltage at Pmpp

Variable Pmpp

Value 60W

Vmpp

17.1V

Current at Pmpp

I mpp

3.5A

Short circuit current

I sc

3.8A

Open circuit voltage

Voc

21.1V

Temperature coefficient of Voc

α

-80mV/0C

Temperature coefficient of I sc

β

0.065%/0C

TABLE 2.2 :

MSX-60 PV module electrical specifications at STC

The simulated I-V and P-V characteristics of the MSX-60 PV module modeled in MATLAB-Simulink are as shown in Fig. 2.8.

(a) Fig 2.8:

(b) Simulated I-V and P-V characteristics of PV module.

Before the load is connected, the module sitting in the sun will produce an opencircuit voltage Voc , but no current will flow. If the terminals of the module are shorted together (which doesn’t hurt the module at all, by the way), the short-circuit current I sc will flow, but the output voltage will be zero. In both cases, since power is the product of SINGLE-PHASE THREE-LEVEL INVERTER WITH MPPT FOR GRID CONNECTED PV SYSTEMS

14

CHAPTER 2.


current and voltage, no power is delivered by the module and no power is received by the load. When the load is actually connected, some combination of current and voltage will result and power will be delivered. 2.4.1

IMPACTS OF IRRADIATION AND TEMPERATURE ON I-V, P-V CURVES

The light generated current I L by the PV varies linearly with the solar irradiation. The latitude and the environmental conditions of the site affect the solar irradiation. If the irradiance is decreased to half of the reference irradiance (1000W/m2), then the module produces half the peak current ( I mpp ). The expression for the Voc shows a logarithmic relation with irradiance. Thus the module voltage will not change considerably even with a large change in radiation intensity. Fig. 2.9 shows the simulated I-V and P-V characteristics of PV module for various irradiation levels and at constant cell temperature (T=250C). Voc 

kT  I L  ln   q  I0 

(2.8)

(a) Fig 2.9:

(b)

(a) Simulated I-V curves (b) Simulated P-V curves with various irradiation levels.

As cell temperature increases, the open-circuit voltage decreases substantially while the short-circuit current increases only slightly. Cells vary in temperature not only because ambient temperatures change, but also because insolation on the cells changes. Since only a small fraction of the insolation hitting a module is converted to electricity and carried SINGLE-PHASE THREE-LEVEL INVERTER WITH MPPT FOR GRID CONNECTED PV SYSTEMS

15

CHAPTER 2.


away, most of that incident energy is absorbed and converted to heat. To help system designers account for changes in cell performance with temperature, manufacturers often provide an indicator called the NOCT, which stands for nominal operating cell temperature.  NOCT  200 Tcell  Tamb   0.8 

Where

  .S 

(2.9)

Tcell - cell temperature (oC) Tamb - ambient temperature (oC)

S

- irradiation (kW/m2)

Fig. 3.0 shows the simulated I-V and P-V characteristics of PV module for various temperature levels and at constant irradiation ( S =1000 W/m2).

(a) Fig 2.10:

(b)

(a) Simulated I-V curves (b) Simulated P-V curves with various temperature levels.

2.4.2

PV ARRAY UNDER THE CONDITIONS OF NONUNIFORM IRRADIANCE

The performance of a photovoltaic (PV) array is affected by temperature, solar insolation, shading, and array configuration. Often, the PV arrays get shadowed, completely or partially, by the passing clouds, neighbouring buildings and towers, trees, and utility and telephone poles. The situation is of particular interest in case of large PV installations such as those used in distributed power generation schemes. Under partially shaded conditions, the PV characteristics get more complex with multiple peaks. To help understand this important shading phenomenon, consider Fig. 2.11 in which an n -cell SINGLE-PHASE THREE-LEVEL INVERTER WITH MPPT FOR GRID CONNECTED PV SYSTEMS

16

CHAPTER 2.


module current I and output voltage V shows one cell one cell separated from the others. The equivalent circuit of the top cell has been drawn while the other (n − 1) cells in the string are shown as just a module with current I and output voltage Vn 1 . In Fig. 2.11(a), all of the cells are in the sun and since they are in series, the same current I flow through each of them. In Fig. 2.11(b), however, the top cell is shaded and its current source I L has been reduced to zero. The voltage drop across RP as current flows through it causes the diode to be reverse biased, so the diode current is also (essentially) zero. That means the entire current flowing through the module must travel through both RP and R s in the shaded cell on its way to the load. That means the top cell, instead of adding to the output voltage, actually reduces it.

(a) Fig 2.11:

(b)

A module with n cells in which (a) the top cell is in the sun (b) in the shade.

one cell shaded will drop to VSH  Vn 1  I R p  Rs



(2.10)

With all n cells in the sun and carrying I , the output voltage was V so the voltage of the bottom n  1 cells will be

 n 1 Vn 1   V  n 

(2.11)

Combining (2.10) and (2.11) gives


17

CHAPTER 2.


 n 1 VS H   V  I R p  Rs   n 

(2.12)

The drop in voltage  V at any given current I , caused by the shaded cell, is given by  V= V  V SH  V=

(2.13)

V  I R s  R p  n

(2.14)

Since the parallel resistance R p is so much greater than the series resistance R s , equation (2.14) simplifies to  V=

V  IR p n

(2.15)

At any given current, the I-V curve for the module with one shaded cell drops by  V. The voltage drop problem in shaded cells could be corrected by adding a bypass diode across each cell. When a solar cell is in the sun, there is a voltage rise across the cell so the bypass diode is cut off and no current flows through it—it is as if the diode is not even there. When the solar cell is shaded, however, the drop that would occur if the cell conducted any current would turn on the bypass diode, diverting the current flow through that diode. To evaluate the performance of the proposed model under nonuniform irradiance conditions, simulations have been carried out. Given three PV modules, all are connected in series to obtain the I–V and P–V characteristics under the conditions of nonuniform irradiance [4]. Three PV module models are employed; the models are named PVM1, PVM2, and PVM3, respectively, and they have their own inputs of temperature and irradiance as shown in Fig. 2.12.

Fig 2.12:

Diagram of three PV modules connected in series


18

CHAPTER 2.


Fig. 2.13 shows the I-V and P-V characteristics under different irradiation levels as follows: S1 = 1000 W/m2, S 2 = 600 W/m2, and S 3 = 600 W/m2. The module’s temperature is 25 oC, it is named test A and there are two power peaks.

(a) Fig 2.13:

(b) (a) I-V (b) P-V curves of test A

Another simulation has been carried out with the different incident irradiation of the three modules as follows - S1 = 1000 W/m2, S 2 = 800 W/m2, and S 3 = 600 W/m2. The module’s temperature is 25 oC, it is named test B and there are three power peaks. The numbers of power peaks depend on in-plane irradiation levels in the series of PV modules. The short circuit current of each PV module under different irradiance is different; the associated bypass diode would be conducted when the passing current is greater than its short-circuit current. Fig. 2.14 shows the I-V and P-V characteristics under different irradiation levels of the three modules.

(a) Fig 2.14:

(b) (a) I-V (b) P-V curves of test B


19

SINGLE-PHASE SINGLE-STAGE GRID CONNECTED INVERTER

CHAPTER 3.

CHAPTER 3 SINGLE-PHASE

SINGLE-STAGE GRID

CONNECTED

INVERTER 3.1

INTRODUCTION

A general grid-connected PV system has more than one power-processing stage. The first stage is a dc-dc converter which draws maximum available power from the solar array by incorporating maximum-power point tracking (MPPT) and also increases the dclink voltage level. The output of this stage is inverted using single or multilevel dc-ac inverter before feeding into the grid. The reliability, compactness and cost effectiveness of the PV system can be improved by employing a single stage power processing unit (dc-ac inverter). Inverter in a single-stage system has to extract maximum available power from the solar array by employing a proper MPPT algorithm and dumps the power derived on the grid by maintaining power quality discipline of the grid. In general the grid connected inverters can be classified as follows [5]. 

The number of power processing stages in cascade.



The type of power decoupling between the PV module(s) and the single-phase grid.



Whether they utilizes a transformer (either line or high frequency) or not.



The type of grid-connected power stage.

Power decoupling is normally achieved by means of an electrolytic capacitor. This component mainly limits the lifetime and hence it should be kept as small as possible and preferably film capacitors should be used as a substitute. The size of the decoupling capacitor can be expressed

C 

Ppv 2 gV pv vˆ pv


(3.1)

21

CHAPTER 3.


Where

Ppv

- nominal power of the PV module

g

- nominal grid frequency (rad/sec)

V pv

- nominal mean voltage across the capacitor

vˆ pv

- amplitude of the ripple voltage across the capacitor

Multilevel inverter performance is high compared to the conventional two level inverters due to their reduced harmonic distortion, lower electromagnetic interference. In recent years, multilevel inverters have gained much attention in the application areas of medium voltage and high power owing to their various advantages such as Multilevel inverter performance is high compared to the conventional two level inverters due to their reduced harmonic distortion, lower electromagnetic interference. In recent years, multilevel inverters have gained much attention in the application areas of medium voltage 

lower common mode voltage.



lower voltage stress on power switches.



lower dv / dt ratio to supply lower harmonic contents in output voltage and current.



Production of higher power quality waveform, improved electromagnetic compatibility.



They can operate with a lower switching frequency.

Comparing two-level inverter topologies at the same power ratings, MLIs also have the advantages that the harmonic components of line-to-line voltages fed to load are reduced owing to its switching frequencies. Some of the popular MLIs and the control strategy have been presented in [6]. The most common and suitable for PV application MLI topologies classified into three types are cascaded H-Bridge MLI (CHB-MLI), diode clamped MLI (DC-MLI), and transistor clamped H-Bridge MLI (TCHB-MLI) [7]. In this thesis the following classical topologies have been studied, simulated and the results are presented. At last a new simplified multilevel inverter topology has been proposed, which consists of fewer components with low complexity gate drives and control signals. The


22

CHAPTER 3.


proposed inverter operating principles and the switching functions are analyzed. The simulated performance results are presented.

3.2

MULTILEVEL POWER CONVERSION Multilevel Inverter

Multiple DC source

Single DC source

Cascaded Hbridge

Symmetrical

Diode clamped

Asymmetrical

Fig. 3.1.

3.2.1

Flying capacitor

Classification of MLIs.

CASCADED H-BRIDGE MULTILEVEL INVERTER (CHB-MLI)

The topology is based on the series connection of H-bridges with separate DC sources. Since the output terminals of the H-bridges are connected in series, the DC sources must be isolated from each other. Fig. 3.2 shows the power circuit of a sevenlevel inverter with three cells in series [8].

Fig. 3.2.

Cascaded H-Bridge MLI topology.


23


CHAPTER 3.

The CHB inverter in Fig. 3.2 can produce a voltage with seven voltage levels. The various switching states and the corresponding output voltages are summarized in TABLE 3.1. It can be observed from TABLE 3.1, that some voltage levels can be obtained by more than one switching state. The voltage level E, for instance, can be produced by six sets of different (redundant) switching states. The switching state redundancy is a common phenomenon in multilevel converters. It provides a great flexibility for switching pattern design, especially when space vector modulation schemes are employed for the control of inverter.

Switching State

Output Voltage VAO

3E 2E

E

0 E

2E

3E

TABLE 3.1 :

S11

S31

S12

S32

S13

S33

1 1 1 1/ 0 1 1/ 0 1/ 0 1/ 0 0 1/ 0 1/ 0 0 0 1/ 0 0

0 0 0 1/ 0 0 1/ 0 1/ 0 1/ 0 1 1/ 0 1/ 0 1 1 1/ 0 1

1 1 1/ 0

0 0 1/ 0 0 1/ 0 0 1/ 0 1/ 0 1/ 0 1 1/ 0 1 1/ 0 1 1

1 1/ 0 1 1 1/ 0 1/ 0 1 1/ 0 1/ 0 1/ 0 0 1/ 0 0 0 0

0 1/ 0 0 0 1/ 0 1/ 0 0 1/ 0 1/ 0 1/ 0 1 1/ 0 1 1 1

1 1/ 0 1 1/ 0 1/ 0 1/ 0 0 1/ 0 0 1/ 0 0 0

vH 1

vH 2

vH 3

E E E 0 E 0 0 0

E E 0

E 0 E E 0 0 E 0 0 0

E 0 0 E E 0 E

E 0 E 0 0 0 E 0 E 0 E E

E 0 E E E

Voltage Level and Switching State of the Seven-Level CHB-MLI.

Switches on the same leg operate complementarily that is when S11 is on, S 41 is off and vice-versa. In the above table logic 1 represents the switch is on and logic 0 represents that the corresponding switch is off. The number of voltage levels ( m ) in a CHB inverter can be found from m  (2H  1)


(3.2)

24

CHAPTER 3.


Where H is the number of H bridge cells. The CHB inverter introduced above can be extended to any number of voltage levels. The total number ( N ) of active switches (IGBTs) required can be calculated by N  6(m 1)

(3.3)

A level-shifted multicarrier modulation scheme is employed for gating the switches. It requires (m 1) triangular carriers, all having the same frequency and amplitude. The (m 1) triangular carriers are vertically disposed such that the bands they occupy are

contiguous. The frequency modulation index is given by m f  f cr / f m and the amplitude modulation index is defined as ma 

Vˆm

Vˆcr  m  1

for 0  ma  1

(3.4)

Where Vˆm is the peak amplitude of the modulating wave vm and Vˆcr is the peak amplitude of each carrier wave. Fig. 3.3 shows the shows scheme for the level-shifted multicarrier modulation which is in-phase disposition (IPD), where all carriers are in phase.

Fig. 3.3.

Level shifted multicarrier modulation for seven level CHB-MLI. '

The uppermost and lowermost carrier pair, vcr1 and v cr1 , are used to generate the ' gatings for switches S11 and S31 in power cell H 1 . vcr 2 and v cr 2 generates gatings for ' S12 and S32 in power cell H 2 . vcr 3 and v cr 3 generates gatings for S13 and S33 in power

cell H 3 . The gate signals for the lower switches in each H-bridge are complementary to their corresponding upper switches, and thus for simplicity they are not shown SINGLE-PHASE THREE-LEVEL INVERTER WITH MPPT FOR GRID CONNECTED PV SYSTEMS

25


CHAPTER 3.

The gating pulses for all the active switches and the output voltage and current waveform for and with inverter feeding an R-L load of 50Ω and 80mH are as shown in Fig. 3.4 and Fig. 3.5 respectively.

Fig. 3.4.

Gating signals for all the active switches.

0

100V / div

0

t 10 ms / div 

5 A / div Fig. 3.5.

Simulated waveforms for a seven-level CHB inverter ( ma  1 , m f  40 , f m  50 Hz and E  50V )

3.2.2

DIODE CLAMPED MULTILEVEL INVERTER (DC-MLI)

The diode-clamped multilevel inverter employs clamping diodes and cascaded dc capacitors to produce ac voltage waveforms with multiple levels. Fig. 3.7 shows the topology of seven level diode clamped inverter.


26

CHAPTER 3.


Fig. 3.6.

Diode clamped MLI topology.

The key components that differ with this topology from a conventional two-level inverter are clamping diodes. To explain how the staircase voltage is synthesized, the neutral point O has been assumed as the output voltage reference and the switching combinations have been analyzed for output voltage VAO as seen in TABLE 3.2. For a total dc bus voltage of 6E , the voltage stress for each device is clamped to E by the clamping diodes. Six complementary switch pairs exist. The complementary switch pair is defined such that turning on one of the switches will exclude the other from being turned on. Six complementary pairs are ( S1 , S1' ), ( S 2 , S 2' ), ( S3 , S3' ), ( S 4 , S 4' ), ( S5 , S5' ), and ( S 6 , S 6' ). Switching State

Output Voltage VAO

3E 2E E 0 E 2E 3E

TABLE 3.2 :

S1

S2

S3

S4

S5

S6

1 0 0 0 1 1 0

1 1 0 0 1 0 0

1 1 1 0 0 0 0

1 1 1 1 0 0 0

1 1 1 1 0 0 0

1 1 1 1 0 0 0

Voltage Level and Switching State of the Seven-Level DC-MLI.


27

CHAPTER 3.


Fig. 3.7 shows the shows scheme for the level-shifted multicarrier modulation which is in-phase disposition (IPD), where all carriers are in phase.

Fig. 3.7.

Level-shifted multicarrier modulation for seven-level DC-MLI.

The gating pulses for all the active switches and the output voltage and current waveform for and with inverter feeding an R-L load of 50Ω and 80mH are as shown in Fig. 3.8 and Fig. 3.9 respectively.

Fig. 3.8.

Fig. 3.9.

Gating signals for all the active switches of DC-MLI.

Simulated waveforms for a seven-level DC-MLI inverter ( ma  1 , m f  40 , f m  50 Hz and E  50V )


28

CHAPTER 3.

3.2.3


TRANSISTOR CLAMPED H-BRIDGE MULTILEVEL INVERTER (TCHB-MLI)

Transistor clamped H-Bridge MLI is the modified version of the H-Bridge inverter. The modification is done by adding bidirectional switch to the H-Bridge module and the number of bidirectional switches depends on the output voltage levels required. Fig. 3.10 shows the topology of seven level TCHB-MLI which consists of two bidirectional switches added to the basic H-Bridge module.

Fig. 3.10.

Transistor clamped H-Bridge MLI topology.

The operation of the TCHB-MLI can be divided into seven states. Out of total 6 active switches only 4 switches operates at high frequency and remaining switches operates at line frequency. The required seven levels of output voltage are generated as follows 1)

Maximum positive output ( 3E ): S1 is ON connecting load positive terminal A to upper source E , and S2 is ON, connecting the load negative terminal O to ground. All other controlled switches are OFF.

2)

Two-third positive output ( 2E ): S5 is ON connecting load positive terminal A to middle source E , and S2 is ON, connecting the load negative terminal O to ground. All other controlled switches are OFF.

3)

One-third positive output ( E ): S6 is ON connecting load positive terminal A to bottom source E , and S2 is ON, connecting the load negative terminal O to ground. All other controlled switches are OFF.


29

CHAPTER 3.

4)


Zero output : This level can be produced by two switching combinations; switches S1 and S3 are ON, or S2 and S4 are ON, and all other controlled switches are

OFF. 5)

One-third negative output ( E ): S5 is ON connecting load positive terminal A to upper source - E , and S3 is ON, connecting the load negative terminal to + E of upper source. All other controlled switches are OFF.

6)

Two-third negative output ( 2E ): S6 is ON connecting load positive terminal A to middle source - E , and S3 is ON, connecting the load negative terminal to + E of upper source. All other controlled switches are OFF.

7)

Maximum negative output ( 3E ): S4 is ON connecting load positive terminal A to bottom source - E , and S3 is ON, connecting the load negative terminal to + E of upper source. All other controlled switches are OFF.

TABLE 3.3 shows the switching combinations that are required to generate the seven output-voltage levels ( E , 2E , 3E , 0 , E , 2E , 3E ). Switching State

Output Voltage VAO

3E 2E E 0 E 2E 3E TABLE 3.3 :

S1

S2

S3

S4

S5

S6

1 0 0 1/ 0 0 0 0

1 1 1 1/ 0 0 0 0

0 0 0 1/ 0 1 1 1

0 0 0 1/ 0 0 0 1

0 1 0 0 1 0 0

0 0 1 0 0 1 0

Voltage Level and Switching State of the Seven-Level TCHB-MLI.

The PWM modulation technique for the TCHB-MLI consists of three reference signals ( Vref 1 , Vref 2 , and Vref 3 ) which are compared with a carrier signal ( Vcarrier ). The reference signals have the same frequency and amplitude and are in phase with an offset value that was equivalent to the amplitude of the carrier signal. If Vref 1 had exceeded the peak amplitude of Vcarrier , Vref 2 was compared with Vcarrier until it had exceeded the peak


30


CHAPTER 3.

amplitude of Vcarrier .Then, onward, Vref 3 would take charge and would be compared with Vcarrier until it reached zero. Once Vref 3 had reached zero, Vref 2 would be compared until

it reached zero. Then, onward, Vref 1 would be compared with Vcarrier . Fig. 3.11 shows the reference waves and carrier signals which are compared for producing the gating signals of the active switches. The complete gate signals for all the active switches are shown in Fig. 3.12. It can be seen that the gate signals for S2 and S3 are of without PWM and at line frequency.

Fig. 3.11.

Fig. 3.12.

PWM switching signal generation for TCHB-MLI.

Complete gate signals for all the active switches of TCHB-MLI.

Fig. 3.13.

Simulated waveforms for a seven-level TCHB_MLI ( ma  1 , m f  40 , f m  50 Hz and E  50V ).


31

CHAPTER 3.

3.2.1


NEW SIMPLIFIED MULTILEVEL INVERTER TOPOLOGY

This section presents an overview of a new simplified multilevel inverter topology. This topology requires less number of components compared to conventional topologies. It is also more efficient since the inverter has a component which operates the switching power devices at line frequency. Therefore, there is no need for all switches to work in high frequency which leads to simpler and more reliable control of the inverter. A general method of multilevel modulation SPWM is utilized to drive the inverter and can be extended to any number of voltage levels. The new converter topology used in the power stage offers an important improvement in terms of lower component count and reduction of layout complexity when compared to conventional topologies. As only part of the power stage switches operates at high frequency and the number of switches conducting current is less results in simpler and more reliable control system for inverter and also the efficiency of inverter is more. Fig. 3.14 shows the topology of the new simplified multilevel inverter. In conventional multilevel inverters, the power semiconductor switches are combined to produce a high-frequency waveform in positive and negative polarities. However, there is no need to utilize all the switches for generating bipolar levels. This idea has been put into practice by the new topology. This topology is a hybrid multilevel topology which separates the output voltage into two parts. One part is name level generation part called the level generator and is responsible for level generating in positive polarity. This part requires high-frequency switches to generate the required levels. The switches in this part should have high-switchingfrequency capability. The other part is called polarity generation part called the polarity generator and is responsible for generating the polarity of the output voltage, which is the low-frequency part operating at line frequency. The principal idea of this topology as a multilevel inverter is that the left stage in Fig. 3.14 generates the required output levels (without polarity) and the right circuit (fullbridge converter) decides about the polarity of the output voltage. This part, which is named polarity generation, transfers the required output level to the output with the same direction or opposite direction according to the required output polarity. It reverses the voltage direction when the voltage polarity requires to be changed for negative polarity.


32

CHAPTER 3.


Fig. 3.14.

New simplified MLI topology.

The required output positive voltage levels produced by the level generator are generated as follows: 1) Maximum positive output ( 3E ): Switch S1 is ON connecting load positive terminal a to upper source E , and the load negative terminal b is connected to ground. All other controlled switches are OFF. Fig. 3.15 (a) shows the current paths that are active at this stage. 2) Two-third positive output ( 2E ): Switches S 2 , S 3 are ON connecting load positive terminal a to middle source E , and the load negative terminal b is connected to ground. All other controlled switches are OFF. Fig. 3.15 (b) shows the current paths that are active at this stage. 3) One-Third positive output ( E ): Switches S 2 , S 4 , S 5 are ON connecting load positive terminal a to bottom source E , and the load negative terminal b is connected to ground. All other controlled switches are OFF. Fig. 3.15 (c) shows the current paths that are active at this stage. 4) Zero output: Switches S 2 , S 4 , S 6 are ON connecting load positive terminal a to

b and the load negative terminal b is connected to ground. All other controlled switches are OFF. Fig. 3.15 (d) shows the current paths that are active at this stage.


33

CHAPTER 3.


Fig. 3.15.

Switching sequences for different level generation.

TABLE 3.4 shows the switching combinations of the level generator that are required to generate the four output-voltage levels ( 0 , E , 2E , 3E ). Switching State

Output Voltage Vab

3E 2E E 0 TABLE 3.4 :

S1

S2

S3

S4

S5

S6

1 0 0 0

0 1 1 1

0 1 0 0

0 0 1 1

0 0 1 0

0 0 0 1

Switching sequence for each level.

The pulses for the switches are produced using multilevel PWM scheme. Three reference signals and one carrier signal is used for generation of gating pulses. Fig. 3.16 shows the reference waves and carrier signals. According to Fig. 3.16 , three states are considered. The first state is when the reference signal v ref 1 is within the carrier wave ( v carrier ).The second state is when v ref 2 is within the carrier wave ( v carrier ). Finally, the

third state is when v ref 3 is within the carrier wave ( v carrier ). These states gets repeated itself every half a period of the reference wave and the time period of the same is divided into 10 regions covering one complete cycle of the reference wave as shown in the Fig. 3.17.


34


CHAPTER 3.

Fig. 3.16.

PWM switching signal generation of NSMLI.

The three states are described as follows : 0  t  1 and  4  t   : 1  t   2 and  3  t   4 :  2  t   3

State 1 State 2 State 3

(3.5)

The modulation index for a inverter is defined as the ratio of amplitude of the reference signal to the amplitude of carrier signal. Since the proposed inverter PWM modulation technique utilizes three carrier signals, the modulation index is redefined to be ma 

Vˆm 3Vˆ

(3.6)

cr

States Compare Active Switches TABLE 3.5 :

One

Two

+

-

+

-

S 2 S 4 S5

S 2 S 4 S6

S 2 S3

S 2 S 4 S5

Three + S1

S 2 S3

Switching sequence in each state according to comparator output.

The output of the comparators represents the comparison between the reference and carrier wave. These outputs are used for the transition between modes in each state with minimum commutation of switches to improve the efficiency of the inverter during switching states. Fig. 3.17 shows the output waveforms of the comparators.


35

CHAPTER 3.


Fig. 3.17.

Decision signals produced by the comparators.

The number of switches in the path of conducting current also plays an important role in the efficiency of overall converter. For example, a seven-level cascade topology has 12 switches, and half of them, i.e., six switches, conduct the inverter current in each instance. However, the number of switches which conduct current in the proposed topology ranges from three switches (for generating level 3) to five switches conducting for other levels, while two of the switches are from the low-frequency (polarity generation) component of the inverter. For modulation index greater than 0.66, the phase angle displacement is determined by  Vˆcr ˆ  Vm

1   5  sin 1 

   

 2Vˆcr ˆ  Vm

 2   6  sin 1 

   

3     2

(3.7)

 4    1  7  2   6

 8  2   5 The gating signals are constructed by adding portions of the PWM decision signals produced by the comparators together through appropriate logic gates. Having the three SINGLE-PHASE THREE-LEVEL INVERTER WITH MPPT FOR GRID CONNECTED PV SYSTEMS

36

CHAPTER 3.


comparator outputs and the output regions defined it is possible to define the switching signal for each high frequency switch. The switching function logic of all the high frequency switches can be constructed as follows S1  C3  R3 S 2  S1 S 3  C 2  R2  R4   C 3  R3

(3.8)

S 4  C 2  R1  R2  R4  R5 

Where ‘‘+’’ is a logical OR, ‘‘  ’’ is a logical AND and ‘‘-’’ is logical inverse (NOT). R x represents the time period of the corresponding region and C x represents the

comparator output. The complete gating signals derived from the equations (3.8) and the output voltage and current waveform for ma  1 and m f  40 with inverter feeding an R-L load of 50Ω and 80mH are as shown in Fig. 3.18 and Fig. 3.19 respectively.

Fig. 3.18.

Complete gating signals of the NSMLI.

The gating signal for the output stage, which changes the polarity of the voltage, is simple. Low-frequency output stage is an H-bridge inverter and works in two modes: forward and reverse modes. In the forward mode, switches 7 and 8, and the output voltage polarity is positive. However, switches 9 and 10 conduct in reverse mode, which will lead to negative voltage polarity in the output. Thus, the low-frequency polarity generation stage only determines the output polarity and is synchronous with the line


37

CHAPTER 3.


frequency. TABLE 3.6 shows the %THD of the output voltage for all the inverter topologies.

Fig. 3.19:

Simulated waveforms for a New simplified MLI ( ma  1 m f  40 , f m  50 Hz and E  50V ).

Modulation index m a 0.2 0.4 0.6 0.8 1

CHB-MLI DC-MLI TCHB-MLI NSMLI %THD %THD %THD %THD 106 108.5 109.2 104.2 44 44.73 47.3 43.2 33.52 33.73 36.83 32.86 24.36 24.63 24.86 24.23 18.23 18.22 17.64 17.91

TABLE 3.6 :

%THD of the output voltage.

One of the promising advantages of the topology is that it requires less highswitching-frequency components. In the proposed converter, as can be seen, half of the switches in the full-bridge converter will not require to be switched on rapidly since they are only switched at zero crossings operating at line frequency (50 Hz). Thus, in this case, the reliability of the converter and also related expenses are highly improved. Fig. 3.20 shows the comparative graph of number of components (main switches + diodes) required for all the four topologies with respect to the number of output voltage levels.

Fig. 3.20:

Components for multilevel inverter.


38

CHAPTER 3.

3.3 3.3.1


MAXIMUM POWER POINT TRACKING TECHNIQUES INTRODUCTION

Under uniform solar irradiation conditions, PV panels exhibits a unique operating point where PV power is maximized. The PV power characteristic is nonlinear considering a single PV cell, which varies with the level of solar irradiation and temperature. In order to track the continuously varying Maximum Power Point (MPP) of the solar array, the Maximum Power Point Tracking (MPPT) should be applied in PV systems. The MPPT scheme ensures the operation of system at Maximum Power Point regardless of environmental conditions and load conditions. Since the existing solar cell technology does not allow appreciably high conversion efficiencies, it is always endeavoured to have the high conversion efficiencies using MPPT capability embedded with the solar PV system. Thus, in order to overcome this problem, several methods for extracting the maximum power have been proposed in the literature and a careful comparison of these methods can result in important information for the design of these systems. Some of the popular and important MPPT techniques are presented in this thesis. 3.3.2

NEED FOR MPPT

While the I –V curve for a photovoltaic cell, module, or array defines the combinations of voltage and current that are permissible under the existing ambient conditions, it does not by itself tell us anything about just where on that curve the system will actually be operating. This determination is a function of the load into which the PVs deliver their power. Just as PVs have an I –V curve, so do loads. As shown in Fig. 3.21, the same voltage is across both the PVs and load, and the same current runs through the PVs and load. Therefore, when the I –V curve for the load is plotted onto the same graph that has the I –V curve for the PVs, the intersection point is the one spot at which both the PVs and load are satisfied. This is called the operating point. Since power delivered to any load is the product of current and voltage, there will be one particular value of resistance that will result in maximum power. The operating point of the module varies throughout the day depending on intensity of solar radiation, temperature etc.


39

CHAPTER 3.


Fig. 3.21:

The concept of operating point.

Fig. 3.22 shows, the characteristic curves with a fixed resistance and it can be seen that the operating point slips off the MPP as conditions change and the module becomes less and less efficient. The purpose of MPPT is to keep the PVs operating at their highest efficiency point at all times.

Fig. 3.22:

IV characteristics with load characteristics embedded

MPPT is an electronic instrument that extracts maximum power available from PV array at any given instant [9]. It ensures that maximum amount of power that generated by PV array is transferred to load. Fig. 3.23 shows the typical arrangement of singlephase single-stage grid connected PV with MPPT capability.

Lac VS

PV

Sensing Circuitry+MPPT

Fig. 3.23:

Vs

I

Utility

Grid connected PV with MPPT.


40

CHAPTER 3.

3.3.3


VARIOUS MPPT TECHNIQUES

The function of a MPPT technique is to automatically find the V m or I m at which a PV array should operate to obtain maximum power output Pm under a given irradiance and temperature. A number of algorithms exists, and the most important and widelyused algorithms with their specific approach are discussed in the following sections [10].

A)

Hill Climbing Method (P&O)

The most popular algorithm is the hill climbing method. It is applied to single-stage single-phase grid connected PV system by perturbing the modulation index ‘M’ at regular intervals and by recording the resulting array current and voltage values, thereby obtaining the power. The P&O method operates by periodically incrementing or decrementing the output voltage of the PV panel and comparing the power obtained in the current cycle with the power of the previous one. Decrementing (incrementing) the voltage decreases (increases) the power when operating on the left of the MPP and increases (decreases) the power when on the right of the MPP. Subsequent perturbation should be kept the same if there is a increase in power and should be decreased if there is a decrease in power. The process is repeated periodically until the MPP is tracked and the system then oscillates about the MPP. Perturbation step size decides the range of oscillations about MPP. The algorithm of this scheme is described in the following with the help of mathematical expressions In the voltage source region,

In the current source region,

At MPP ,

Ppv V pv Ppv V pv Ppv V pv

 0  M  M  M (i.e. Increment M)

 0  M  M  M (i.e. Decrement M)

(3.9)

 0  M  M or M  0 (i.e. retain M)

Where M is the modulation index of the inverter. The number of perturbations made by the MPPT algorithm per second is known as the perturbation frequency or the MPPT frequency. Fig. 3.24 shows the mechanism of P&O algorithm.


41

CHAPTER 3.


Fig. 3.24:

Mechanism of P&O algorithm.

Flowchart for the hill climbing algorithm is given in Fig. 3.25

Fig. 3.25: B)

Flowchart of Hill climbing algorithm.

Incremental Conductance method (INC method)

In the incremental conductance method, the MPP is tracked by matching the PV array impedance with the effective impedance of the converter reflected across the array terminals. The latter is tuned by suitably increasing or decreasing the value of ‘M’. Mathematically, the algorithm can be explained as follows


42

CHAPTER 3.


In the voltage source region,

In the current source region,

At MPP ,

I pv V pv I pv V pv I pv V pv







I pv V pv I pv V pv I pv V pv

 M  M  M

 M  M  M

(3.10)

 M  M or M  0

The flowchart for the Incremental Conductance is shown in Fig. 3.27. In INC algorithm, there is no need to calculate instantaneous power output from the PV module. Since INC method considers only the side of operation, the drift in the tracking is avoided.

Fig. 3.26: C)

Flow chart of INC algorithm.

Modified Incremental conductance algorithm

The step size is generally fixed for the INC method. This causes the power drawn for the PV array to have faster dynamics but leads to increased steady state oscillations. Thus there has to be a trade off in selection of the step size. A modified variable step size INC SINGLE-PHASE THREE-LEVEL INVERTER WITH MPPT FOR GRID CONNECTED PV SYSTEMS

43

CHAPTER 3.


MPPT algorithm is proposed, which automatically adjusts the step size to track the PV array maximum power point. Compared with the conventional fixed step size method, the proposed approach can effectively improve the MPPT speed and accuracy simultaneously [11]. The flowchart of modified INC method is given in Fig. 3.27.

Fig. 3.27: D)

Flow chart of modified INC method.

Beta (β) algorithm

All the conventional tracking methods use fixed, small iteration steps, determined by the accuracy and tracking speed requirements. If the step-size is increased to speed up the tracking, the accuracy of tracking suffers and vice versa. This algorithm works in two stages. The first stage takes the operating point (OP) quickly within a close range of the actual MPP. The second stage consisting of a conventional scheme that is used to bring the OP to the exact MPP. In the first stage, the scheme tracks an intermediate variable, that appears in the analysis, rather than tracking power. This overcomes the limitation of the conventional schemes where there is no way to predict the iteration step size and the


44

CHAPTER 3.


duty cycle needed to track the MPP. The fast tracking of the first stage does not compromise the accuracy of the tracking because it is followed by a conventional scheme in the second stage, which tracks power with fine steps. But since the first stage brings the OP within a close proximity of MPP, the second stage does not require a long time. dPpv dV pv

 I pv  V pv 

 I pv ln  V  pv

c

I pv

(3.11)

V pv

   c  v pv  ln  I o  c    

(3.12)

q K  T 

(3.13)

β is independent of insolation, but depends on temperature. If the temperature varies within a fixed limit, the variation of the magnitude of β at MPP lies within a small fixed range of βmax to βmin. The βmax is the value at maximum temperature and maximum insolation and βmin is the value at minimum temperature and minimum irradiation. The flowchart for the Beta algorithm is shown as in Fig. 3.28.

Fig. 3.28:

Flow chart of Beta algorithm.


45

CHAPTER 3.

E)


Ripple Correlation Control (RCC) algorithm

The basic principle of the RCC MPPT algorithm is to exploit current and voltage oscillations caused by the pulsations of the instantaneous power, which are inherent in single-phase power systems. Analyzing these oscillations allows us to obtain information about the power gradient and evaluate if the PV system operates close to the maximum power point. When high quality, unity power factor current is fed into the grid, it results in a power sinusoid of twice the grid frequency. This causes second harmonic components to be present either in the current or the voltage on the input side. For example, in case of a rigid DC voltage source ( Vin ), the current ( iin ) drawn from the source will contain second harmonic components as per the following equations. Viniin  Vg I g sin 2 t 

Vg I g 2

1  cos 2t 

(3.14)

Where Vg and I g are the amplitudes of the grid voltage and current, respectively, and  is the fundamental angular frequency of the grid voltage. It may be noted that PV is a

special source with I-V characteristics as shown in Fig. 2.6. If the PV fed system supplies double sinusoid power, Pg (t) to the grid, both iPV and vPV will contain second harmonic components. Thus, the PV voltage oscillates between VPV (max) and VPV (min) around its average value of VPV at twice the grid frequency and can be represented by the following expression v pv  t   VPV  v pv sin  2t 

(3.15)

Where v pv is the amplitude of the second harmonic current component. The PV output power is given by Ppv  t   i pv  t   v pv  t 

(3.16)

 VPV  I PV   v pv  I PV  i pv VPV   sin  2t   v pv  i pv  sin 2  2t 

The average quantity VPV  I PV corresponds to the active power Ps . The power pulsation at the angular frequency 2 is reflected on the dc link bus of the VSI as a voltage pulsation superimposed to the average of the dc link voltage Vdc . RCC method is based on measuring and processing the current and/or voltage ripple due to the SINGLE-PHASE THREE-LEVEL INVERTER WITH MPPT FOR GRID CONNECTED PV SYSTEMS

46

CHAPTER 3.


switching behaviour of the converter connected to the PV panels array. The oscillations of the instantaneous power are inherent in a single phase PV system and can themselves be considered as embedded dynamic test signals useful in determining p / v [12]. The basic principle of the MPPT will be described in the following section. let us consider a periodic function x  t  having the moving average component x  t  over the period T and the alternative component x  t  , defined, respectively, as x t  

t

1 x  d T t T

(3.17)

x t   x t   x t 

(3.18)

Applying these definitions to the output voltage and power of the PV panels leads to v t   v t   v t 

(3.19)

p t   p t   p t 

(3.20)

The voltage and power alternative components utilized in (3.19) and (3.20) can be evaluated on the basis of (3.17) and (3.18) leading to t

1 v  t   v  t    v  d T t T

p t   p t  

(3.21)

t

1 p  d T t T

(3.22)

Assuming the voltage and power oscillation frequency is known, a filtering approach can be usefully adopted to extract the alternative components of p(t) and v(t). In particular, highpass filters (HPFs) can be used instead of (3.21) and (3.22). The cutoff frequency of the filter is set to be higher than the ripple frequency. This reduces high frequency noise problems [13].  t   p  sign   p  t  v  t  dt   sign    v   t T  SINGLE-PHASE THREE-LEVEL INVERTER WITH MPPT FOR GRID CONNECTED PV SYSTEMS

(3.23)

47

CHAPTER 3.


The quantity sign (∂p/∂v) is a clear indication of the region where the PV panel is working 

 p / v   0 means

p and v are in phase agreement. The operating point is

on the left side of the MPP on the (I–V ) characteristic. 

 p / v   0 means

p and v are in phase opposition. The operating point is

on the right side of the MPP on the I–V characteristic. These relationship between power and voltage ripple are as shown in Fig. 3.29

Fig. 3.29:

Alternative components of voltage and power v and p

Fig. 3.30 shows the block diagram implementation of RCC, where only the quantity corresponding to the average value of the product v and p its sign are computed. In particular, the sign is extracted by a hysteretic comparator, set by a small band around zero, with the output values [−1, 1] representing sign (∂p/∂v).

Fig. 3.30:

Block diagram of RCC implementation.


48

PV INVERTER-SYSTEM STRUCTURE AND CONTROL DESIGN

CHAPTER 4.

CHAPTER 4 PV INVERTER - SYSTEM STRUCTURE AND CONTROL DESIGN 4.1

PV

FED

THREE-LEVEL

INVERTER

FOR

UTILITY

INTERFACE In this chapter, the design of the single phase PV inverter power stage with MPPT capability is described, as shown in Fig. 4.1. Firstly, the inverter design specifications are given. Secondly, based on the specifications, the choice of the switching scheme is briefly described. Thirdly, the selection of the DC-link capacitor is discussed based on its lifetime and size. Following this, the design equations on DC-link capacitance are developed based on the power balance and double-line frequency ripple voltage. Following, the design guide for the output filter is discussed based on the IEEE-1547 standard [14] and the filter configuration is described. The system is applied with two main and important types of damping schemes.

Fig. 4.1.

Power stage configuration of the single phase PV inverter.


49

CHAPTER 4.


The power circuit topology includes an LCL filter as a interface between the inverter and grid. Sinusoidal pulse width modulation (SPWM) with unipolar switching, LCL filter is employed to achieve decreased switching ripple with only a small increase in filter hardware as compared to that of the L or LC filter with bipolar switching. The voltage controller produces the gird current reference by comparing the actual dc link voltage with the maximum power point voltage given by the MPPT algorithm, which is then multiplied with the grid voltage template provided by the grid synchronizer. The control voltage produced by the injected grid current regulator is used to generate pulses for the grid connected PV inverter. The basic specifications used in simulation for the inverter design are listed in Table 4.1. Rated grid voltage* Rated grid current Switching frequency Nominal DC-link voltage Percentage DC-link voltage ripple TABLE 4.1 :

10V (RMS) 6A (RMS) 10kHz 21.1V 10%

Specifications of PV inverter.

A conventional method of grid synchronization for grid connected DC/AC inverter is to duplicate the grid voltage so that output current reference has the same phase as the grid voltage. While this method is simple, it carries the distortions and transients from the grid to the output current, which is undesirable for grid connected applications. In addition, this method of grid synchronization cannot provide inverters the ability of controlling reactive power flow. A full bridge configuration with SPWM unipolar voltage switching scheme is used (as the switching circuit of the inverter. By selecting the full bridge configuration, the minimal allowed DC-link voltage can be set to be the peak value of the AC grid voltage (plus margins). Thus, power MOSFETs, instead of higher voltage IGBTs, can be used as the switching devices which enable use of a high switching frequency (> 10 k Hz ) without introduction of excessive switching loss. Using unipolar voltage switching scheme effectively moves the first major harmonic of the bridge output voltage from order m f  1 to the order of 2m f  1 , where m f is the frequency modulation ratio - the ratio between the switching frequency and the fundamental frequency. The output filter thus reduces its size for “free”. Since this full bridge configuration with SPWM unipolar voltage switching scheme is SINGLE-PHASE THREE-LEVEL INVERTER WITH MPPT FOR GRID CONNECTED PV SYSTEMS

50


CHAPTER 4.

commonly used in voltage sourced inverters. The DC-link capacitor is important for the power decoupling between the input power to the inverter and their output power to the utility grid. Normally, electrolytic capacitors are used for their large capacitance and low cost. However, in PV applications where the inverters are usually exposed to outdoor temperatures, the lifetime of such electrolytic capacitors is shorten drastically. Film capacitors are a clear the alternative given their long life expectancy and wide operating temperature range. Unfortunately, film capacitors are far more expensive than the electrolytic ones in term of cost per farad, hence the size of the capacitance has to be smaller to keep the price of the capacitor acceptable. However, smaller capacitance would weaken the power decoupling ability of the DC-link capacitor which may cause DC-link voltage fluctuations that lead to distortion of the inverter output current to the grid. There are two factors that can cause undesirable DC-link voltage variations. The first one, which can be referred to as the transient DC fluctuation is caused by the rapid increase/decrease of the input power flowing into the DC-link capacitor. However, in PV application, the chance of rapid DC input power variation is little due to the nature of the sun. Therefore, the transient DC fluctuation is not a major concern when designing a VSI for PV application. The second factor, which can be referred to as the AC fluctuation of the DC-link voltage is caused by the double-line frequency ripple power generated from the grid side (refer to equation (3.15)). This double-line frequency ripple component can couple through the DC voltage control loop to cause a significant amount of distortion on the current reference signal. A notch filter or an average filter can be applied to the feedback signal of the DC-link voltage in the voltage control loop, so that this double-line frequency ripple component is filtered out before entering the voltage controller. This prevents the output current from having distortions that are resulted from the DC voltage control loop. Then the capacitance of the DC-link capacitor can be easily obtained given the magnitude of the maximum allowed ripple voltage.

C DC 

S 2 g V dcVdcmax , ripple n

(4.1)

Finally, substituting, these parameters from the inverter specifications

C DC 

60  2.16 mF 2  314  21  2.1

Based on this, a 2.2mF capacitor is selected for the simulation study. SINGLE-PHASE THREE-LEVEL INVERTER WITH MPPT FOR GRID CONNECTED PV SYSTEMS

51

CHAPTER 4.

4.2 4.2.1


CONTROL SYSTEM COMPONENTS DESIGN LCL FILTER DESIGN

Traditionally, the grid interface filter was a simple first-order L filter. However, such a filter is bulky and inefficient, and it cannot meet the regulatory requirements specified in [14] and [15] for the switching range of mid- to high-power inverter applications. Hence, there has been a significant interest in higher order filters, particularly LCL filters, to meet the grid interconnection standards at significantly smaller size and cost. The dynamic performance of the grid-connected voltage source converter with a third-order LCL filter was comparable to the performance of the grid-connected voltage source converter with a first-order L filter. However, selecting the parameters of the LCL filter is a more complicated process compared to those of an L filter. A step-by-step procedure and the basic guideline for the selection of the LCL filter parameters for damping the LCL filter of a front end 3-phase active rectifier was proposed in [16]. The design of filter from the point of view of efficiency considering the current harmonic requirements of IEEE 1547 (which are derived from IEEE 519-1992 [15]) as the primary criteria for the design of the filter, but with a goal to reduce the size and weight (and therefore cost) of the individual filter components was proposed in [17]. The lowest order harmonics that appeared on the harmonic spectrum of the output voltage of the full-bridge are at the sidebands of 2 m f .Since the inverter switching frequency is set to be greater than the audible frequency (10 k Hz ), the lowest order of the harmonics of the inverter is

2m f  1  399 .

According to the IEEE Distributed Resource (DR)

interconnection standard, IEEE-1547, any current harmonic which has an order that is greater than 35 must have a magnitude that is no greater than 0.3% of the rated current of the DR output. (The original harmonic regulation table in IEEE-1547 can be found in Appendix A). Thus, the primary design guide for the inverter output filter is to make the magnitude of the major harmonic current of the inverter less than 0.3% of the rated current. A third order LCL filter, Fig. 4.2(a), was used to meet the aforementioned harmonic reduction target. Assumption made here is that the ac supply voltages contain only positivesequence fundamental component, which then means that they can be treated as short circuits with zero impedance when performing system stability and harmonic analyses, Fig. 4.2(b). SINGLE-PHASE THREE-LEVEL INVERTER WITH MPPT FOR GRID CONNECTED PV SYSTEMS

52

CHAPTER 4.


(a)

(b)

Fig. 4.2.

Output LCL filter of the inverter.

v in stands for the terminal voltage or the output voltage of the full bridge, which consists

of a fundamental component and higher order harmonics components. Solving the grid current in Laplace domain using superposition yields the following transfer functions: I g s 

Vin s  V

g

sC d Rd  1 s L1 L2 C d  s C d Rd L1  L2   s L1  L2 

(4.2)



s 2 L1C d  sC d Rd  1 s 3 L1 L2 C d  s 2 C d Rd L1  L2   s L1  L2 

(4.3)

0

I g s 

V g s 



Vin  0

3

2

From the above equation (4.2) and (4.3), one can observe that the grid current i g t  depends on both the terminal voltage vin t  and the grid voltage v g t  . As discussed before, the output filter design will not take harmonic grid voltage distortion into consideration because IEEE-1547 allows the presence of harmonic current distortion caused by grid voltage distortion. Therefore, equation (4.3) will not be taken into consideration in output filter design. The terminal voltage vinv t  contains a fundamental component and higher frequency components which could result in higher frequency distortions on the grid current i g t  . Therefore, Equation (4.2) is used as the output filter transfer function as:

H f s  

I g s 

Vin s  V

 g 0

sC d Rd  1 s L1 L2 C d  s C d Rd L1  L2   s L1  L2  3

2

(4.4)

The RMS value of the higher order frequency components of vt(t) can be calculated using the look up table (refer to Appendix A), given the nominal DC-link voltage V dcn . SINGLE-PHASE THREE-LEVEL INVERTER WITH MPPT FOR GRID CONNECTED PV SYSTEMS

53

CHAPTER 4.


Vin  jh g  

1 2

 

The VˆAo

h

Vˆ  2

Vdcn 1    k h Vdcn 2 1 / 2V 2 Ao h n dc

(4.5)

is the peak value of each harmonic voltage between one leg of the bridge and

the center point of the DC-link. k h  

Vˆ 

Ao h n dc

1 / 2V

is tabulated as a function of m a and the

orders of harmonics (refer to Appendix B for details about the harmonics table). table). Therefore, combining equation (4.4) and (4.5), the RMS value of the harmonic current can be expressed as: I g  jh g  

1 2

 H f  jh g   k h   Vdcn

(4.6)

Remember that I g  jh g  cannot exceed 0.3% of the rated current of the inverter. Therefore, given the RMS value of the rated grid current the following relationship can be derived: H f  jh g  

0.3%  2  I grated

(4.7)

Vdcn  k h 

Given from Appendix B, the worst case k h  at 2m f  1 is 0.37. Then, substituting the parameters from the inverter specification and using a switching frequency of 10kHz, we get the magnitude of the filter transfer function H f  jh g  at 2m f  1 . H f  j 2m f  1314   H f  j 125286  

0.3%  2  6  3.27  10 3  50 dB 21  0.37

(4.8)

At   125286 , the magnitude of H f  j 125286  from the magnitude plot of H f  j  should at most be -50dB. This is the guideline of choosing the values for L1 , L2 , C d

and R d .Selection of damping resistor value for passive damping must be sufficient to avoid oscillation, but losses cannot be so high as to reduce efficiency. Hence a careful design is required which takes into consideration the losses and the stability margin. The tuning of different passive damping methods and an analytical estimation of the damping losses allowing the choice of the minimum resistor value resulting in a stable current control and SINGLE-PHASE THREE-LEVEL INVERTER WITH MPPT FOR GRID CONNECTED PV SYSTEMS

54

CHAPTER 4.


not compromising the LCL-filter effectiveness has been proposed in [18]. So initially the damping resistor value is considered to be zero and the value total sum of the inverter side and grid side inductance L1  L2   0.1 p.u as proposed by [16]. Finally, the LCL filter components are chosen following this guideline and the values of each component are shown in Table 4.2 and the MATLAB magnitude plot is shown in Fig. 4.4.

Generic magnitude plot of the output filter transfer function H f s  .

Fig. 4.3.

The value of damping resistor is selected based on the criteria

Rd  Rdsw Rdsw 

(4.9)

1 C f 2f sw

L1 [mH] 1

L2 [mH] 0.5

TABLE 4.2 :

Fig. 4.4.

C d [µF]

R d [Ω]

2.5

4

LCL filter parameters.

Magnitude plot of using selected filter component values.


55

CHAPTER 4.


The consequent resonant frequency is 5.5 kHz, which is approximately one-half of the switching frequency and thus satisfying the criteria that 10   g    res   sw .The impedance of the filter capacitor at the resonant frequency is 12Ω. The damping value is chosen as onethird, i.e., 4Ω which also satisfies the equation (4.8). For an application with a stiff grid, a passive damping method is often preferred for its simpleness and low cost. In [19] a new passive damping scheme with low power loss for the LLCL filters is proposed. Also, a simple engineering design criterion is proposed to find the optimized damping resistor value, which is both effective for the LCL filter and the LLCL filter. Compared with the LCL filter, the proposed passive damped LLCL filter can not only save the total filter inductance and reduce the volume of the filter but also reduce the damping power losses for a stiff grid application. Fig. 4.5 and Fig. 4.6 shows the different topological circuits for passive damping proposed by [18] and [19].

Fig. 4.5.

Different configurations for passive damping [5].


56

CHAPTER 4.


Fig. 4.6. 4.2.2

Different configurations for passive damping [6].

CURRENT CONTROLLER

The current controller is used to regulate the current injected into the grid. The grid current injected has to be kept in phase with the grid voltage since only active power has to be transferred from the PV generation system. There are various controllers that are discussed in literature for such a control; some of the popular controllers are [20]. A. The dq Control The dq control structure is using the abc → dq transformation module to transform the control variables from their natural frame abc to a frame that synchronously rotates with the frequency of the grid voltage. As a consequence, the control variables are becoming dc signals. Specific to this control structure is the necessity of information about the phase angle of utility voltage in order to perform the transformation. Normally, proportional–integral (PI) controllers are associated with this control structure. A typical transfer function of a PI controller is given by.

G PI s   K p 

Ki s

(4.9)

Where K p is the proportional and K i is the integral gain of the controller


57

CHAPTER 4.


B. Stationary Frame Control Since in the case of stationary reference frame control, the control variables, e.g., grid currents, are time-varying waveforms, PI controllers encounter difficulties in removing the steady-state error. As a consequence, another type of controller should be used in this situation. The transfer function of resonant controller is defined as

G PR s   K p  K i

s s 2

(4.10)

2

Because this controller acts on a very narrow band around its resonant frequency ω, the implementation of harmonic compensator for low-order harmonics is possible without influencing at all the behavior of the current controller. The transfer function of the harmonic compensator is given by GHC s  

K

h 3, 5, 7

s

ih

s  h  2

2

(4.11)

C. The abc Frame Control Historically, the control structure implemented in abc frame is one of the first structures used for pulse width modulation (PWM) driven converters. Usually, implementation of nonlinear controllers such as hysteresis controller has been used. The main disadvantage of these controllers was the necessity of high sampling rate in order to obtain high performance. Nowadays, due to the fast development of digital devices such as microcontrollers (MCs) and DSPs, implementation of nonlinear controllers for grid-tied applications becomes very actual. In this thesis, a proportional resonant (PR) compensator is used to track a sinusoidal current reference signal since, with the PR controllers, the converter reference tracking performance can be enhanced and previously known shortcomings associated with conventional PI controllers can be alleviated. These shortcomings include steady-state errors in single-phase systems and the need for synchronous d–q transformation in three-phase systems [21]. Another advantage associated with the PR controllers and filters is the possibility of implementing selective harmonic compensation without requiring excessive SINGLE-PHASE THREE-LEVEL INVERTER WITH MPPT FOR GRID CONNECTED PV SYSTEMS

58


CHAPTER 4.

computational resources. The plant modeling, PR compensator design and the closed loop stability is discussed in this section. The block diagram of the LCL filter as a interface between inverter and grid is as shown in the Fig. 4.7.

Fig. 4.7.

Block diagram of LCL filter.

From the above block diagram and combining the equation (4.2) and (4.3) the expression for the grid current can be derived as follows

 s 2 L1C d  sC d Rd  1 I g s   G p s  V g  Vinv sC d Rd  1 

  

(4.12)

Where, G p s  

sCd Rd  1 s L1 L2 C d  s C d Rd L1  L2   sL1  L2  3

2

Since the magnitude and phase response of

(4.13)

s 2 L1Cd  sCd Rd  1 are 0dB and 0o at the sCd Rd  1

fundamental frequency of the grid. Therefore, equation (4.12) can be simplified to equation (4.14). I g s   G p s Vinv  V g 

(4.14)

Given the plant model, a PR compensator, Gc s  is then added to the closed loop and the equivalent closed loop diagram can be seen in Fig. 4.8.


59


CHAPTER 4.

Fig. 4.8.

Block diagram of the current controller.

From Fig. 4.8 the relationship between the input and the output of the current loop can be derived as: I g s   H 1 s   I g* s   H 2 s   V g s 

(4.15)

Where, H 1 s  

H 2 s  

G c s   G p s 

G c s   G p s   1 G p s 

1  Gc s   G p s 

(4.16)

(4.17)

To successfully track the i g* t  signal without steady state errors, the magnitude of

H 1  j  in equation (4.15) has to equal to 1 at the fundamental frequency of the i g* t  .Thus, it is clear that if Gc  j  has a infinite gain at the fundamental frequency, H 1  j  would have a unity gain. On the other hand, if Gc  j  has a infinite gain at the fundamental frequency, H 2  j  in equation (4.17) would results in 0 at the fundamental frequency so that the H 2  j  term can be neglected. Therefore, it is not necessary to have the grid voltage feed-forward in the current control loop. To conclude, the controller, Gc  j  has to have an infinite gain at the fundamental frequency in order to track the current reference, i g* t  . A


60

CHAPTER 4.


proportional-resonant (PR) controller meets the aforementioned controller requirement. An ideal PR controller which has an infinite gain at  g has a transfer function shown in equation (4.10) and a generic bode plot is shown in Fig. 4.9. However, the infinite gain of the controller leads an infinite quality factor of the system, which cannot be achieved in either analog or digital controller implementation. Furthermore, since the gain of an ideal PR controller at other frequencies is low, it is no adequate either to eliminate the higher order harmonics influenced by the grid voltage or to react to slight grid frequency variation.

Bode plot of ideal PR controller, K p  1 and K i  20 .

Fig. 4.9.

This is undesirable because the harmonic grid voltage distortion would results in a significant amount of harmonic grid current distortion. Therefore, a damping term ζ is introduced to form a non-ideal PR controller transfer function shown in equation (5.7). This damping term ζ reduces the infinite gain at the fundamental frequency to a finite large gain but increases the bandwidth of the controller. Gc s   K p 

K i  2    o  s s  2     o  s   02 2

(4.18)

Where  o  2f o , K i is the fundamental harmonic gain, and ξ is the damping factor. The harmonic compensator G HC s  is responsible for the attenuation of the low-frequency harmonics injected into the grid. In view of that, the compensator includes a bank of damped bandpass filters tuned to resonate at odd multiples of the grid frequency


61

CHAPTER 4.


K n  2    n  o  s

h

G HC s    n 3

s  2    n   o  s  n o  2

(4.19)

2

where n can take the values 3, 5, . . . , h, h being the highest current harmonic to be attenuated, and K n is the n-harmonic gain. Notice that, in a situation in which no harmonic attenuation is required, then h = 0 and the compensator transfer function can be written as G HC s   1 . Fig. 4.10 shows the Bode diagram of the controller Gc s  for different values

of K i and ξ with K p  0 .

(a)

(b)

(c) Fig. 4.10.

Bode diagram of the current controller with (a) constant

damping factor

ξ, (b) constant harmonic gain K i , and (c) constant product K i ξ.


62

CHAPTER 4.


The following properties can be observed: 1) the magnitude peak value is given by 20 log K i (dB); 2) the magnitude bandwidth and the phase shape are governed by ξ ; and 3) for

constant value of the product K i ξ, the magnitude diagrams overlap for practically all frequencies, except for anarrow range around the grid frequency. PR controller can provide large gain at f o , but it also introduces negative phase shift at the frequencies higher than the selected frequency, especially at the frequencies close to the selected resonance frequency, which damages the PM of the system. To avoid this side effect, the crossover frequency fc is suggested to be set far away from the selected resonance frequency [22]. Where the proportional gain is tuned in the same way as that for a PI controller, and it basically determines the dynamics of the system in terms of bandwidth, phase, and gain margin. The closed loop gain of the current control loop with the PR compensator can be simply obtained by equation (4.20). Fig. 4.11 shows the bode plot uncompensated current loop with three main frequencies indicated; resonant frequency f r , grid fundamental frequency f o and the gain cros over frequency f c . The values of the PR controller for improving the performance of the inner current loop and the improved parametres ( f c and gain at fundamental frequency T fo ) are as shown in TABLE 4.3.

T s  = GC s   Ginv s   G P s   K  2     o  s  Vdc sC d Rd  1    K P  2 i  3 (4.20) 2  2 s  2     o  s   0  Vtri s L1 L2 C d  s C d Rd L1  L2   s L1  L2  

Fig. 4.11.

Bode diagram of the uncompensated system.


63

CHAPTER 4.


Ki

Kp



100

10

0.1

Before compensation After compensation T fo [dB] T fo [dB] f C [Hz] f C [Hz] 106

TABLE 4.3 :

10

1.24 10 3

80

Parameters of PR controller.

Fig. 4.12 shows the bode plot compensated current loop with three main frequencies indicated and with the improved system performance parameters marked.

Fig. 4.12.

Fig. 4.13.

Bode diagram of the compensated system.

Step response of the inner current loop.

Fig. 4.14 shows the 50Hz response of the PR current control system. The control loop is exhibiting a overshoot of 20% and however the transient and steady state response is satisfactory.


64

CHAPTER 4.


Fig. 4.14. 4.3.2

50Hz response of the PR current control system.

VOLTAGE CONTROLLER

The DC-link voltage can be regulated by a closed loop voltage controller. The variation or imbalance in the PV power and the power being injected into grid is reflected on the DC link of the inverter. When the PV power is more than the power injected, the dc link voltage increases and vice-versa. Thus regulation of the dc link voltage requires the amount of current to be injected and thus a simple PI controller can be used for generation of required grid current for maintaining the DC link voltage stiff at the reference value. Grid voltage has to be sensed for the synchronization of the PWM inverter and to maintain the injected grid current in phase with it. If the grid voltage is sensed directly without any filtering then during weak grid situation the reference current generated will involve the harmonics and the current injected gets distorted. Hence a proper grid synchronization method is required for having unity power factor (UPF) operation of the inverter. A low complexity method of grid synchronization is introduced in [23]. Effort has been taken to minimize the computational processes of reproducing a parallel component and an orthogonal component of the grid voltage by means of using only a two by two state matrix. The grid voltage synchronizer consists of two parts:  

A grid voltage estimator An amplitude identifier

The grid voltage estimator takes the grid voltage as its input and outputs one signal which is aligned with the grid voltage (parallel component) and the other signal which is 90 leading the grid voltage (orthogonal component). This estimator has a state space form of: SINGLE-PHASE THREE-LEVEL INVERTER WITH MPPT FOR GRID CONNECTED PV SYSTEMS

65

CHAPTER 4.


A B      o   x1   K sync   x1   0    x    0  v g  x1   x    0 o   2   2  

(4.21)

C    v g   y1  1 0   x1  v          g   y 2  0 1   x 2 

The term K sync introduces damping to the oscillator which widens the estimator’s bandwidth and reduces the gain at  o . As a result, x1 tracks the input v g ,at its fundamental frequency while also rejecting other harmonics that appeared on the grid voltage. The behaviour of this grid synchronizer is analyzed by means of studying its responses in time domain. Normally, the harmonics that appeared on the grid voltage are predominately low order odd harmonics due to thyristor bridges and diode rectifiers in the system. The harmonics that are multiple of three are mainly trapped inside the delta connection of distribution transformers so that they are not presented in the local grid. Therefore, the predominate harmonics that appeared on the local grid are in the order of 5th, 7th, 11th, 13th. Fig. 4.15 shows the parallel component of the grid voltage produced by the synchronizer with grid voltage having a %THD of 5%. For grid connected PV system only active (parallel) component of the grid current control is required.

Fig. 4.15.

Time domain response of x1 t  v/s v g t 

The outer voltage loop is modeled which is required for controlling the DC link voltage to a value corresponding to the VMPP .The differential equation on the DC side is: SINGLE-PHASE THREE-LEVEL INVERTER WITH MPPT FOR GRID CONNECTED PV SYSTEMS

66

CHAPTER 4.

C DC


dvdc t   i dc t  dt

(4.22)

idc t  consists of two components, a DC component, I dc and a double-line frequency AC

component, i dc , ripple t  . Both of them can be obtained from the power balance equation

vdc t   idc t   Vˆg  cos g t  Iˆg  cos g t   

vdc t   I dc  vdc t   idc,ripplet  

Vˆg  Iˆg 2

cos  

Vˆg  Iˆg 2

(4.23)

cos2 g t   

(4.24)

From (6.3), the two components of the DC current can be expressed as:

I dc 

Vˆg  Iˆg

2vdc t 

idc ,ripple t  

cos  

Vgrms

2vdc t 

Iˆg cos 

Vˆg  Iˆg  cos2 g t    2v dc t 

(4.25)

(4.26)

Since we align the parallel component of the current reference signal with the grid voltage using a grid synchronization function block, the grid current i g t  has its parallel component aligned with the grid voltage. Therefore equation (4.25) can be rewritten to be

I dc 

V grms

2v dc t 

Iˆg

(4.27)

The complete model of the voltage loop can be drawn and is shown in Fig. 4.16. A notch filter, H n s  has a form of equation (4.28) is applied to the voltage loop to filter out the double-line frequency current ripple component idc , ripple t  because the double-line frequency ripple current produces a double-line frequency ripple voltage on the DC-link. This is undesirable because this ripple signal would couple through the voltage controller and


67

CHAPTER 4.


cause undesirable high frequency component would appear on the current reference signal of the current control loop.

H n s  

s 2  2   1   n  s   n2

(4.28)

s 2  2   2   n  s   n2

Fig. 4.16.

Outer voltage loop of the inverter.

Where  n is twice the fundamental frequency,  1 is chosen to be 0.006 and  2 is chosen to be 1. The current loop, GCCL s  has the form of

GCCL s  

GC s   G P s  GC s   G P s   1

(4.29)

A simple PI controller is used as the DC voltage loop compensator, which has the form of:

GV s   K P 

KI s

(4.30)

The bode plot of uncompensated and compensated outer voltage loop are as shown in Fig. 4.17 and Fig. 4.18 respectively. A selection of K P = 0.2 and K I = 3 yields a phase margin of 64.6 0 and the gain cross over frequency f C  9.65 Hz which matches with the design that the

voltage closed-loop

bandwidth should be approximately equal to 1/150th of the closed current loop to reduce, at minimum, oscillation in the dc voltage and in the ac current [24]. The reference DC link voltage to be maintained is generated by the MPPT controller.


68

CHAPTER 4.


Fig. 4.17.

Fig. 4.18.

Bode plot of uncompensated outer voltage loop.

Bode plot of compensated outer voltage loop.

The scheme of DC link voltage reference generator is shown in Fig. 4.19. When

signp / v   0 the integrator increases its output Vdc , and the dc link voltage reference Vdc , ref moves toward the MPP. When signp / v   0 the integrator decreases its output

Vdc , and the dc link voltage reference Vdc , ref moves back toward the MPP. The input signal Vdc** represents the initial voltage reference; i.e., the starting value of the integrator. When the

control system is enabled, the quantity Vdc computed by the MPPT algorithm is added to Vdc** , giving the actual reference of the dc link voltage Vdc , ref .Then, the regulation of the

current I g injected into the mains allows the dc link voltage to be controlled around the reference value. In this way, all the power coming from the PV generator is transferred to the grid.


69

CHAPTER 4.


Fig. 4.11.

4.3

DC link voltage reference generator.

ACTIVE DAMPING OF LCL FILTER

A direct way to damp the resonance of the LCL filter is introducing a passive resistor to be in series or parallel with the filter inductors or filter capacitor, which is called passivedamping method. Among which, adding a resistor in series with the filter capacitor has been widely adopted for its simplicity and relatively low power loss. However, it will weaken the switching harmonic attenuation ability. Adding a resistor in parallel with the filter capacitor will not impair the low-and high-frequency characteristics of the LCL filter, but the power loss brought by this resistor is too large to be accepted. In order to avoid the power loss resulted from the passive resistor, the concept of virtual resistor was proposed in place of the passive resistor, and the virtual resistor can be realized through proper control schemes. Such methods are called active damping methods. In recent years, the design of current regulator and capacitor– current-feedback active-damping for LCL-type grid-connected inverter has been extensively discussed. A step-by-step controller design for LCL-type grid-connected inverter with capacitor–current-feedback active-damping has been proposed in [25]. A hybrid passive-active damping solution with improved system stability margin and enhanced dynamic performance is proposed for high power grid interactive converters [26]. In this thesis, a novel current control strategy based on a new current feedback for grid-connected voltage source inverters with an LCL-filter proposed in [27] has been applied to grid connected PV system and the performance is compared with that of the passive damped LCL filter. The system structure for such a novel current control strategy based grid connected PV is as shown in Fig. 4.20. In the novel control strategy the capacitor of LCLfilter is split into two parts, and the current flowing between these two parts is measured and used as the feedback of a current controller. In this way, without any damping resistor, the inverter control system is degraded from third-order to first-order, as a first-order system with L-filter. Consequently, the control loop gain and bandwidth can be increased and many existent current control methods can be implemented to minimize steady-state error and current harmonic distortion. SINGLE-PHASE THREE-LEVEL INVERTER WITH MPPT FOR GRID CONNECTED PV SYSTEMS

70


CHAPTER 4.

Fig. 4.21.

System structure for active damping of LCL filter.

Capacitor is split into two parts and the current flowing between them is used as the feedback current for the current controller. Assuming C1    C and C1  1     C with then the current i12 between the two capacitors is given as i12  i2  1     iC

or

i12  1     i1    i2

(4.31)

Where i2 the total currents of filter capacitor and the current is i12 is the weighted average of the inverter current and the grid current. The transfer function for vinv and i12 as follows.

I 12 s  1     1     L  C  s 2  1  Vinv s    1     L2  C  s 3  L  s

(4.32)

Where L = L1  L2 and  

L2 L1

Considering   1   the equation (4.32) becomes I 12 s  1  Vinv s  L  s

Considering the ESRs of inductor in LCL-filter the transfer function becomes SINGLE-PHASE THREE-LEVEL INVERTER WITH MPPT FOR GRID CONNECTED PV SYSTEMS

71


CHAPTER 4.

I 12 s  1  Vinv s  L  s  R1  R2

Thus the transfer function of the LCL filter is degraded from order three to one which makes the loop gain and the cross-over frequency with new control strategy much higher than those with conventional control strategies, resulting in minor steady-state error and a better dynamic response in close-loop control. The design of the PR current controller for controlling the injected grid current and the voltage controller for regulating the voltage is same as that of the passive damping. The MSX-60W panel specifications are considered for the simulation study of the inverter system. The summary of parameters of the PV inverter system used for simulation of the passive and active damped LCL filter is shown in TABLE 4.4. Passive damping PR Ki

100

Active damping

PI

PR

PI

L2 L1 [mH] [mH] 10 0.1 0.2 3 120 14 0.06 0.5 5 0.5 1 TABLE 4.4 : Summary of parameters of the PV inverter system.

Kp

4.4



Kp

Ki

Ki

Kp



Kp

Ki

C

[µF] 2.5



0.5

PERFORMANCE EVALUATION USING MATLAB/SIMULINK

Simulation was conducted in MATLAB/SIMULINK environment to verify the effectiveness of the proposed design approach, and all the parameters are chosen to be the same as those in the aforementioned design. Simulation of the three level inverter with MPPT for grid connected PV system incorporated with passive and active damped LCL filter has been carried out. The performance of the power conditioning system connected to the photovoltaic array has been evaluated both in steady state and transient operating conditions determined by startup and solar irradiance variations. The transient and steady state response of the system is tested dynamically for changes in irradiation and also in temperature. Ripple correlation control MPPT is used for tracking the maximum power available. The variation in the irradiation and temperature over the PV array is as shown in Fig. 4.21.


72


CHAPTER 4.

Fig. 4.21.

System structure for active damping of LCL filter.

Step change in irradiation and temperature is done at t =1s and t =2s. The variation in the power extracted from the PV array, active and reactive power injected into grid, array current and DC link voltage is shown in Fig. 4.22 (a)-(e). It can be seen that the reactive power injected into grid is almost zero ensuring the unity power factor operation of the three level grid tied inverter. The variation in the array voltage, current is smooth and also the transient response exhibits fast dynamic behaviour of the control system designed with satisfactory performance.

Fig. 4.22.

MATLAB/SIMULINK simulation results of the proposed topology on the PV and grid side.


73

CHAPTER 4.


The variation in the injected grid current for step change in irradiation is as shown in Fig. 4.23 (a). Fig. 4.23 (b)-(d) shows the magnified view of the selected portion in the Fig. 4.23 (a). The %THD of the grid current for all the selected portion is shown in Fig. 4.23 (e)-(g) and it can be seen that the injected current %THD is less than 5% for all the variations in the irradiations which complies with the IEEE STD 1547-1992.

Fig. 4.23.

Injected grid current variations for step change in irradiation.


74

CHAPTER 4.


The variation in the injected grid current for step change in temperature with irradiation level maintained at 800 W / m2 is as shown in Fig. 4.24 (a). Fig. 4.23 (b)-(d) shows the magnified view of the selected portion in the Fig. 4.24 (a). The %THD of the grid current for all the selected portion is shown in Fig. 4.24 (e)-(g) and it can be seen that the injected current %THD is less than 5% for all the variations in the temperature which complies with the IEEE STD 1547-1992.

Fig. 4.24.

Injected grid current variations for step change in temperature.


75

CHAPTER 4.


(a)

(b) Fig. 4.25.

Transient response of grid current.


76


CHAPTER 4.

Fig. 4.26 shows the performance of the PV generation system in tracking the maximum power point of the PV panels during a transient of solar irradiance. From the starting operating point, the system reaches the MPP in 1. Then, as a consequence of a 30% increase of the solar irradiance, the operating points move to the new MPP in 2. Then, as a consequence of a 50% decrease of the solar irradiance, the operating points move to the new MPP in 3.

Fig. 4.26.

PV array power versus voltage curve during step change in irradiation.

Fig. 4.27 shows the performance of the PV generation system in tracking the maximum power point of the PV panels during a transient of temperature on PV array. From the starting operating point, the system reaches the MPP in 1. Then, as a consequence of a 60% increase of the temperature, the operating points move to the new MPP in 2. Then, as a consequence of a 40% decrease of the temperature, the operating points move to the new MPP in 3 and the irradiation level is maintained at 800 W / m 2 .

Fig. 4.27.

PV array power versus voltage curve during step change in temperature.


77

CHAPTER 4.


The variation in efficiency of the proposed configuration, as it operates from low power to rated power condition is determined by noting down the power fed extracted from the PV array and the power fed into the grid. For obtaining variations in the power generated the irradiation level was changed in a step of 100 W / m 2 . Fig. 4.28 shows the efficiency versus the power extracted from the PV array for both passive and active damped LCL based grid tied PV inverter. From the curves it can be seen that the efficiency of power transfer is more with active damping due to the absence of the damping resistor to damp the inherent resonance effect of the filter and the efficiency increases with the increase in the power generated.

Fig. 4.20.

Efficiency versus input PV power.

The variation in the %THD of the grid current injected for both passive and active damping method with respect to the power injected into the grid is as shown in Fig. 4.29. The active damping method shows a reduced %THD as compared to passive damped LCL. However in both the methods the %THD of the grid current is less than 5% and it decreases with the increase in the amount of power being injected.

Fig. 4.29.

%THD of the current versus output power fed into the grid.


78

CHAPTER 4.

4.5


HARDWARE IMPELEMENTATION OF PV INVERTER

Prototype system configuration for testing the three-level PV inverter with an output LCL filter is as shown in the Fig. 4.30. The block diagram of the circuit configuration is shown in Fig. 4.31. The prototype includes the following components 1)

PV array

2)

Three-Level inverter

3)

Controller

4)

Passive damped LCL filter

5)

Fundamental grid voltage extractor

6)

Signal sensing circuit

Fig. 4.30.

Experimental rig of the three-level PV inverter.

A load of 110Ω is used for testing the performance of the PV inverter. The variation in efficiency of the configuration, as it operates from low power to rated power condition, a number of experiments were performed using a resistive load of 110Ω (in place of the grid). The gating pulses are generated by the DSP, which senses the fundamental grid voltage extracted using notch filter. A unipolar PWM technique of gating the inverter switches is employed. SINGLE-PHASE THREE-LEVEL INVERTER WITH MPPT FOR GRID CONNECTED PV SYSTEMS

79

CHAPTER 4.


Fig. 4.31. 4.5.1

System configuration of the three-level PV inverter.

PV ARRAY

The solar array used in the hardware is consists of 74Wp PV module manufactured by WAREE industry. The panels are kept at 36° on the terrace of Electrical Engineering Department, VNIT Nagpur. Fig. 4.32 shows the PV array used for the experiment.

Fig. 4.32. 4.5.2

Photograph of the PV module used for experimentation.

THREE-LEVEL INVERTER AND LCL FILTER

The three-level inverter implemented consists of four power switches which are pulse width modulated for controlling the power flow. Fig. 4.33 shows the configuration of the inverter and the LCL filter. Power MOSFET IRFP250N is used as the power switch. A


80


CHAPTER 4.

Toroid core T-16 is used for the design of inductor, consisting of number of turns wound using SWG-17 wire. A damping resistor of 5Ω with the capacitor is used

Fig. 4.33. 4.5.3

Photograph of the three level inverter used for experimentation.

GATE DRIVER CIRCUIT

The switch between the source and the load is known as high side switch. When the MOSFET turns on the drain and source terminals are at the same voltage. In order to turn the MOSFET on, and keep it turned on; the gate to source voltage must be between 10V20V. The pulses from the DSP are given to the gate driver circuit which provides isolation and the amplified pulses that are used for gating the power switches. A TLP 250 IC is used for gating the switches. The photograph of the driver circuit is as shown in the Fig. 4.34.

Fig. 4.34.

Photograph of the gate driver.


81

CHAPTER 4.

4.5.4


NOTCH FILTER

When the grid voltage is sensed and feedback is taken directly without any filter, then during weak grid situation (when voltage consists of harmonics) the current reference wave gets distorted and there by the actual current. Hence a band pass filter (BPF) tuned to extract the fundamental component of the grid voltage is implemented for reference current generation by sensing the grid voltage [14]. The circuit configuration is as shown in Fig. 4.35

Fig. 4.35. 4.5.5

Circuit diagram of the analog implementation of BPF.

SIGNAL SENSING CIRCUIT

The MPPT controller needs two input parameters I PV and V PV for deciding the modulation index at a particular insolation. So sensor circuits give a proportional output of these voltage and current from the PV array and the output signals from the sensor circuits are given to ADC channels of DSP. The Winson WCS2702 provides economical and precise solution for both DC and AC current sensing in industrial, commercial and communications systems. The output from the current sensor is proportional to the current output from the PV array. The sensitivity of the sensor is 1mV/mA and the maximum current that can be measured using WCS 2702 is 2A. The photograph of the voltage and current signal sensing circuit is as shown in the Fig. 4.36.

Fig. 4.36.

Photograph of the voltage and current signal sensing circuit.


82

CHAPTER 4.

4.6


GENERATION OF GATING PULSES USING TMS320F28027

DSP TMS320F28027 from Texas Instrument is used as the core controller for producing the control pulses of the three level inverter. The grid voltage is sensed through BPF and is given to the adc input of the DSP which is taken as the reference carrier wave for the production of gate pulses. Some of the features of the controller are  High-Efficiency 32-Bit CPU ( TMS320C28027)  60 MHz (16.67-ns Cycle Time)  50 MHz (20-ns Cycle Time)  40 MHz (25-ns Cycle Time)  16 x 16 and 32 x 32 MAC Operations Module  16 x 16 Dual MAC  Harvard Bus Architecture – Flash, SARAM, OTP, Boot ROM Available  Atomic Operations  Fast Interrupt Response and Processing  Unified Memory Programming Model  Code-Efficient (in C/C++ and Assembly)  Low Cost for Both Device and System: – One SCI (UART) Module  Single 3.3-V Supply – One SPI Module  No Power Sequencing Requirement  Integrated Power-on and Brown-out Resets  Small Packaging, as Low as 38-Pin Available  Low Power – High-Resolution PWM (HRPWM) Module  No Analog Support Pins – Enhanced Capture (eCAP) Module Clocking)  Two Internal Zero-pin Oscillators  On-Chip Crystal Oscillator/External Clock Input  Dynamic PLL Ratio Changes Supported  Watchdog Timer Module  Missing Clock Detection Circuitry  Up to 22 Individually Programmable, – 38-Pin DA Thin Shrink Small-Outline  Multiplexed GPIO Pins With Input Filtering  Peripheral Interrupt Expansion (PIE) Block That Supports All Peripheral Interrupts  Three 32-Bit CPU Timers The DSP is linked to MATLAB through Code Composer Studio (CCS V5) and the gating signals are produced using the two PWM blocks. Since the two switches of the inverter on the same leg should not be turned on at a time, the dead band unit inside the


83

CHAPTER 4.


controller is used for providing the dead band of 2µs. The values of the components used for experimental work is as tabulated in TABLE 4.5. f s [kHz]

V dc [Volts]

3

20

TABLE 4.5 :

4.7

L1 [mH] 1

L2 [mH] 1.5

C d [µF]

R d [Ω]

2.5

2.5

Summary of parameters used in experimental work.

EXPERIMENTAL RESULTS

The time response of the band pass filter used for sensing the grid voltage is as shown in the Fig. 4.37.

Grid voltage (0.5V/div) BPF o/p (0.5V/div)

Fig. 4.37.

Time response of BPF.

However the range of voltage that can be sensed through the Analog to Digital Converter (adc) of the DSP ranges from 0 to 3.3V max, therefore a dc offset is added to the output of the BPF and the offsetted signal is given as i/p to the adc. Fig. 4.38 shows the o/p of BPF after adding offset. BPF o/p (1V/div)

Grid voltage (0.5V/div)

Fig. 4.38.

Time response of BPF with dc offset added.


84

CHAPTER 4.


It can be seen from the Fig.s that the grid voltage is somewhat distorted and contains harmonics in it; however the o/p of the BPF is harmonic free, exhibits fast dynamic response and is in phase with the grid voltage. A load of 110Ω, 5A was used for testing the performance of the PV inverter and was fixed at a constant value. The modulation index of the inverter was varied and the resulting current waveforms are as shown in Fig. 4.40 (a)-(b).

current given to the resistive load (0.5A/div) with M=0.6

(a)

current given to the resistive load (0.5A/div) with M=0.9

(b)

Fig. 4.39.

Experimental results: current waveform through a resistive load (M=0.6).

Fig. 4.40 shows the PV inverter o/p voltage and the current fed into the grid for modulation index M=0.8. It can be seen from the magnified plot of the current that it is has a high frequency ripple super imposed due to the inverter switching, and spikes in the current is due to the LCL filter inherent resonance. However the current %THD is found to be 3.8% which is well below the IEEE-1547 (

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