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A 210-GHz fT SiGe HBT With a Non-Self-Aligned Structure S. J. Jeng, B. Jagannathan, J.-S. Rieh, Member, IEEE, J. Johnson, K. T. Schonenberg, D. Greenberg, A. Stricker, H. Chen, M. Khater, D. Ahlgren, G. Freeman, Member, IEEE, K. Stein, Member, IEEE, and S. Subbanna
Abstract—A record 210–GHz SiGe heterojunction bipolar transistor at a collector current density of 6–9 mA/ m2 is fabricated with a new nonself-aligned (NSA) structure based on 0.18 m technology. This NSA structure has a low-complexity emitter and extrinsic base process which reduces overall thermal cycle and minimizes transient enhanced diffusion. A low-power performance has been achieved which requires only 1 mA collector current to . The performance is a result of narrow base reach 200-GHz width and reduced parasitics in the device. Detailed comparison is made to a 120–GHz self-aligned production device. Index Terms—Bipolar transistors, germanium, semiconductor heterojunctions, silicon.
Fig. 1. Cross section SEM of a 0.2-m wide NSA SiGe HBT.
II. DEVICE FABRICATION AND VERTICAL PROFILE SCALING I. INTRODUCTION
I
N recent years, the demand for high-speed transistors is increasing with the bandwidth required by telecommunication systems. The viable materials of choice for the implementation of these systems include Si(Ge), GaAs, and InP. For a long time, the application of Si-based bipolar technology has been believed to be limited up to 10 Gb/s systems mainly due to its operation speed limit, despite the advantages such as high reliability, low cost, and the high level of integration over GaAs and InP technologies. Recently, however, 40 Gb/s communication sub-systems have been demonstrated with a 120–GHz SiGe BiCMOS technology [1], [2]. As continuing efforts Gb/s applications, we report in to push up the speed for of 210 GHz at room temperature, this letter SiGe HBTs with which is a record for Si-based transistors (versus previously reported best value of 156 GHz [3]) and comparable to or higher than recently reported InP-based HBT results [4]–[6]. Simultaneously achieved was the low current level associated with the GHz), important for low–power high speed (1 mA for operation of the systems, which can be favorably compared with the recently reported low current result with InP-based HBT (1 GHz) [6]. The device reported here is fabmA for ricated on a new nonself-aligned (NSA) structure, which is developed to investigate the vertical profile design of SiGe HBTs.
Manuscript received July 27, 2001; revised August 20, 2001. The review of this letter was arranged by Editor K. De Meyer. S. J. Jeng, B. Jagannathan, J.-S. Rieh, K. T. Schonenberg, D. Greenberg, H. Chen, M. Khater, D. Ahlgren, G. Freeman, K. Stein, and S. Subbanna are with IBM Communications R & D Center, Hopewell Junction, NY 12533 USA (e-mail:
[email protected]). J. Johnson and A. Stricker are with Essex Junction, VT 05452 USA. Publisher Item Identifier S 0741-3106(01)09416-2.
A typical self-aligned (SA) structure with a base-after-gate integration scheme has been summarized in [7]. The major difference between a NSA and a SA structure is that the emitter opening and extrinsic base processes are simplified in the NSA structure. After sub-collector definition and the -collector epitaxial layer deposition, the deep and shallow trench isolations were defined. Subsequently an in-situ boron-doped SiGe base cm peak boron, 25% peak Ge) is grown layer ( by a UHV-CVD process. The base layer is also doped with carbon to minimize the transient enhanced diffusion effect [8]. On top of the base layer, oxide was grown first and followed by nitride and oxide deposition. An emitter opening is patterned and etched on this stack of oxide/nitride/oxide films using a standard lithography process. Before stripping the last oxide layer, a collector pedestal implant is done to enhance the performance. Subsequently, the oxide is stripped, and an in-situ phoscm peak phosphorus) is phorus-doped polysilicon ( deposited as emitter contact. The emitter is capped with a thick nitride layer, and then patterned and etched. A boron implant with nitride-capped emitter polysilicon as the mask is performed to reduce extrinsic base resistance. After an emitter RTA and contact silicidation, the emitter, base, and collector metal contacts are formed. The cross section SEM of the completed structure is shown in Fig. 1 for a typical NSA device with a 0.2 m wide emitter. Because the emitter polysilicon extension beyond the emitter edge is larger than the self-aligned extrinsic base sidewall thickness, the base resistance component under the emitter polysilis dominant and nonoptimized, and thus is icon expected to be relatively low. This is a simplifying tradeoff made for the purpose of vertical profile optimization without the complicating effects of a nearby extrinsic base. As a result, the transient enhanced diffusion effects on the intrinsic devices caused
0741–3106/01$10.00 © 2001 IEEE
JENG et al.: A 210-GHz
SiGe HBT WITH A NON-SELF-ALIGNED STRUCTURE
Fig. 2. Output characteristics of a 0:22 m Gummel plot in inset.
Fig. 3.
jh j plot for 0:22 2 5 m
2 3:2 m NSA SiGe HBT, with
and 0:22
2 0:8 m
NSA devices.
by the extrinsic base implant damage is minimized, and the additional extrinsic base to collector pedestal capacitance resulting from a deep extrinsic base is minimized in the NSA structure. III. RESULTS AND DISCUSSIONS The common emitter output characteristics of a 210–GHz m m SiGe HBT with the emitter dimension of are displayed in Fig. 2, with Gummel plots shown in inset. The output characteristic is ideal, and the early voltage is as high as 1000 V. The base current ideality is about 1.05–1.12 and close to is about 2.5 K . ideal. The pinched base sheet resistance and were measured to be 3.3 V and 5.5 V, The of 1.8 respectively, and a dc current gain of 450 and product for the V were obtained for the device. The device is now 378 VGHz, which is far larger than the Johnson Limit (200 VGHz) [9]. We believe that the Johnson limit is significantly underestimated mostly due to the incorrect parameter values used in the estimation and that there still is room for improvement of speed, retaining reasonable breakdown voltages. data for all devices were extracted by extrapolating The value at GHz with a -20 dB/dec gain fall-off, as the characteristics for 210–GHz shown in Fig. 3. Thus, obtained
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2
Fig. 4. f characteristics at various V for 0:22 5 m NSA device, f for 0:22 0:8 m NSA, and 120–GHz SA devices at V = 1 V, and f for 0:22 5 m NSA device at V = 1 V.
2 2
NSA devices with emitter sizes of m and m are shown in Fig. 4, as a function of collector current at various conditions. The typical distribution within m device is GHz. The typical a wafer for a is 6–9 mA/ m . Note that collector current density at peak m NSA the collector current at 200 GHz for the device is as small as 1 mA. There is only a slight change in m devices at a lower . At performance for V, the is GHz, while at V, is GHz. The at V is GHz for a m NSA device. values, individual component In order to achieve the high of delay and transit times comprising the total delay were considered and reduced. Optimization of layer design and doping profiles along with careful choice of thermal cycles resulted in a reduction in basewidth, collector-base depletion width and parasitics. Fig. 4 well depicts the results of this approach, which characteristics of the 210-GHz NSA and compares the 120-GHz SA devices as a function of collector current at fixed of 1 V. The breakdown of emitter to collector delay time into several time components has been described in detail elsewhere [10]. The RC charging time of the collector-base for NSA device junction, is 0.217 ps, which is a factor of two lower compared to the for both 210-GHz NSA and 120-GHz SA device. Total re120-GHz SA devices are similar, hence the reduction in flects the lowered collector and emitter resistances (by 50%) for , which is an indicator the NSA device. The sum of of transit across neutral base and basecollector depletion region, was calculated as 0.483 ps for 210-GHz NSA device, which is % less than that of an 120-GHz SA device, demonstrating the reduction in vertical layer thickness. The charging of the for emitter-base depletion capacitance, % less than that 210-GHz NSA device is 0.059 ps which is for a 120-GHz SA device. IV. CONCLUSION The combination of vertical scaling and lower device resistances and capacitances have made possible a record 210–GHz values from a SiGe HBT at a low collector current and at
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IEEE ELECTRON DEVICE LETTERS, VOL. 22, NO. 11, NOVEMBER 2001
room temperature. These results are achieved with a relatively and . This demonstrates the extendibility high of SiGe HBT technologies to very high frequency and high bit-rate applications. Because most of the transit time improvement is a result of RC delay reduction, it appears that even further improvements are possible by more aggressive basewidth scaling.
ACKNOWLEDGMENT The authors would like to thank IBM Advanced Semiconductor Technology Center for fabricating the wafers for this letter and Mike Longstreet, Jose De Sousa, and Dale Jadus for measurements.
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[2] G. Freeman, Y. Kwark, M. Meghelli, S. Zier, A. Rylyakov, M. Sorna, T. Tanji, O. Schreiver, K. Walter, J. Rieh, B. Jagannathan, A. Joseph, and S. Subbanna, “40 Gbit/sec circuits built from a 120 GHz f SiGe technology,” in GaAs 2001 Symp., Oct. 2001. [3] A. Gruhle, H. Kibbel, A. Schurr, D. Behammer, and U. König, “SiGe frequency,” in Proc. SOTAPOCS XXXI, HBT’s with 156 GHz f 1999, p. 1179. [4] Y. Betser, D. Scott, D. Mensa, S. Jagannathan, T. Methew, and M. J. Rodwell, “InAlAs/InGaAs HBT’s with simultaneously high values of f and f for mixed analog/digital applications,” IEEE Electron Device Lett., vol. 22, pp. 56–58, Feb. 2001. [5] D. Sawdai, E. Kaneshiro, A. Gutierrez-Aitken, P. Grossman, K. Sato, W. Kim, G. Leslie, J. Eldredge, T. Block, P. Chin, L. Tran, A. Oki, and D. Streit, “High performance, high yield InP DHBT production process for 40 Gbps applications,” in 2001 Int. Conf. Indium Phosphide and Related Materials, Nara, Japan, May 2001, pp. 493–496. [6] M. Sokolich, C. H. Fields, and M. Madhav, “Submicron AlInAs/InGaAs HBT with 160 GHz f at 1 mA collector current,” IEEE Electron Device Lett., vol. 22, pp. 8–10, Jan. 2001. [7] S. A. St. Onge, D. Harame, J. Dunn, S. Subbanna, D. Ahlgren, G. Freeman, B. Jagannathan, S. Jeng, K. Schonenberg, K. Stein, R. Groves, D. Coolbaugh, N. Feilchenfeld, P. Geiss, M. Gordon, P. Gray, D. Hershberger, S. Kilpatick, R. Johnson, A. Joseph, L. Lanzerotti, J. Malinowski, B. Orner, and M. Zierak, “A 0.24 m SiGe BiCMOS mixed-signal RF production technology featuring a 47 GHz f HBT and 0.18 m L CMOS,” in Proc. BCTM, 1999, pp. 117–120. [8] L. D. Lanzerotti, J. C. Sturm, E. Stach, R. Hull, T. Buyuklimanli, and C. Magee, “Suppression of boron outdiffusion in SiGe HBT’s by carbon incorporation,” IEDM Tech. Dig., pp. 249–252, Dec. 1996. [9] E. O. Johnson, “Physical limitations on frequency and power parameters of transistors,” RCA Review, vol. 26, pp. 163–177, June 1965. [10] P. M. Asbeck, “Bipolar transistors,” in High-Speed Semiconductor Devices, S. M. Sze, Ed. New York: Wiley, 1990.
