Single-Cycle Architecture Instructions

Single-Cycle Architecture Instructions CMPT 250 2002-3 What follows is a brief description of the opcodes used in the machine language for the single-cycle architecture we’re building. Opcode 0000000 0000001 0000010 0000011 0000100 0000101 0000110 0000111 000100x 000101x 000110x 000111x 00100xx 00101xx 00110xx 00111xx 010xxxx 011xxxx

Mneumonic TR INC ADD

SUB DEC TR AND OR XOR NOT TRB SR SL ST LD

Register Transfer R[DR] ← R[SA] R[DR] ← R[SA] + 1 R[DR] ← R[SA] + R[SB] R[DR] ← R[SA] + R[SB] + 1 R[DR] ← R[SA] + R[SB] R[DR] ← R[SA] − R[SB] R[DR] ← R[SA] − 1 R[DR] ← R[SA] R[DR] ← R[SA] ∧ R[SB] R[DR] ← R[SA] ∨ R[SB] R[DR] ← R[SA] ⊕ R[SB] R[DR] ← R[SA] R[DR] ← R[SB] R[DR] ← sr R[SB] R[DR] ← sl R[SB] undefined M [R[SA]] ← R[SB] R[DR] ← M [R[SA]]

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Opcode 1000000 1000001 1000010 1000011 1000100 1000101 1000110 1000111 100100x 100101x 100110x 100111x 10100xx 10101xx 10110xx 10111xx 110x000 110x001 110x010 110x011 110x100 110x101 110x110 110x111 111xxxx

Mneumonic TR INC ADDI

SUBI DEC TR ANDI ORI XORI NOTI TRAI SRI SLI BRC BRN BRV BRZ BRNC BRNN BRNV BRNZ JMP

Register Transfer R[DR] ← R[SA] R[DR] ← R[SA] + 1 R[DR] ← R[SA] + CST R[DR] ← R[SA] + CST + 1 R[DR] ← R[SA] + CST R[DR] ← R[SA] − CST R[DR] ← R[SA] − 1 R[DR] ← R[SA] R[DR] ← R[SA] ∧ CST R[DR] ← R[SA] ∨ CST R[DR] ← R[SA] ⊕ CST R[DR] ← R[SA] R[DR] ← CST R[DR] ← sr CST R[DR] ← sl CST undefined P C ← P C + OFFSET if C, else P C ← P C + 1 P C ← P C + OFFSET if N , else P C ← P C + 1 P C ← P C + OFFSET if V , else P C ← P C + 1 P C ← P C + OFFSET if Z, else P C ← P C + 1 P C ← P C + OFFSET if C, else P C ← P C + 1 P C ← P C + OFFSET if N , else P C ← P C + 1 P C ← P C + OFFSET if V , else P C ← P C + 1 P C ← P C + OFFSET if Z, else P C ← P C + 1 P C ← P C + OFFSET

Note: CST = zf(SB); OFFSET = se(DR||SB)

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