This means that the. EEPROM can be used to store data as long as we don't
exceed this value. The ATmega16 contains 512 bytes of data EEPROM memory.
EEPROM’s EEPROM (electrically erasable programmable read-only memory) is user-modifiable read-only memory (ROM) that can be erased and reprogrammed (written to) repeatedly through the application of higher than normal electrical voltage. Unlike EPROM chips, EEPROMs do not need to be removed from the computer to be modified. However, an EEPROM chip has to be erased and reprogrammed in its entirety, not selectively. It also has a limited life - that is, the number of times it can be reprogrammed In the AVR family of microcontrollers this is about 100,000 read/write cycles. This means that the EEPROM can be used to store data as long as we don’t exceed this value. The ATmega16 contains 512 bytes of data EEPROM memory. It is organised as a separate data space, in which single bytes can be read and written. The EEPROM has an endurance of at least 100,000 write/erase cycles. To program the EEPROM the following registers need to be programmed: • • • •
EECR EEDR EEARH EEARL
– EEPROM Control register – EEPROM Data register - EEPROM Address register high - EEPROM Address register low
In AVR devices the ‘write’ operation is actually a combined erase and program operation. The memory byte to be written is always erased before programming the new value, even if no bits need to be erased. There are two types of Read/Write access: • Random Read/Write. The user must set up both data and address before calling in the Read or Write routine. • Sequential Read/Write. The user needs only to set up the data to be Read/Written. The current EEPROM address is automatically incremented prior to access. The address has to be set prior to writing the first byte in the sequence. Random Write This waits until the EEPROM is ready to be programmed by polling the EEPROM Write Enable – EEWE bit in EECR. When EEWE is zero. The contents of source register is transferred to the EEPROM data register – EEDR, and the contents transferred to the EEPROM address register EEARL:EEARH. First the EEPROM Master Write Enable – EEMWE is set, followed by the EEPROM write strobe EEWE in EECR. See Figure 1
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Figure 1 EEWrite Flow Chart Random Read Prior to calling this routine, two register variables must be set up: EEARH and EEARL with the Addresses of the low and high bytes to read from. This routine waits until the EEPROM is ready to be accessed by polling the EEWE bit in the EEPROM control register – EECR. When the EEWE bit is Zero, the routine transfers the contents of EEDR to EEARL and EEARH. It then sets the EEPROM read strobe – EERE. In the next instruction the contents of the EEDR register are transferred to the destination register.
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Figure 2 EERead Flow Chart
The EECR register 7
6
5
4
3 EERIE
2 1 EEMWE EEWE
0 EERE
Bit 3 – EERIE: EEPROM Ready Interrupt Enable Writing a one to EERIE enables the EEPROM Ready Interrupt if the I bit in SREG is set. Writing a zero to EERIE disables the interrupt. The EEPROM Ready interrupt generates a constant interrupt when EEWE is cleared. Bit 2 – EEMWE: EEPROM Master Write Enable The EEMWE bit determines whether setting EEWE to one causes the EEPROM to be written. When EEMWE is set, setting EEWE within four clock cycles will write data to the EEPROM at the selected address If EEMWE is zero, setting EEWE will have no effect. When EEMWE has been written to one by software, hardware clears the bit to zero after 3
four clock cycles. Bit 1 – EEWE: EEPROM Write Enable The EEPROM Write Enable Signal EEWE is the write strobe to the EEPROM. When address and data are correctly set up, the EEWE bit must be have a one written to it before it copies the contents of EEDR into the EEPROM. 1. Wait until EEWE becomes zero. 2. Write new EEPROM address to EEARH and EEARL(optional). 3. Write new EEPROM data to EEDR (optional). 4. Write a logical one to the EEMWE bit while writing a zero to EEWE in EECR. 5. Within four clock cycles after setting EEMWE, write a logical one to EEWE. Bit 0 – EERE: EEPROM Read Enable The EEPROM Read Enable Signal – EERE – is the read strobe to the EEPROM. When the correct address is set up in the EEAR Register, the EERE bit must be written to a logic one to trigger the EEPROM read. The EEPROM read access takes one instruction, and the requested data is available immediately. When the EEPROM is read, the CPU is halted for four cycles before the next instruction is executed. The user should poll the EEWE bit before starting the read operation. If a write operation is in progress, it is neither possible to read the EEPROM, nor to change the EEAR Register. The EEARH register 7
6
5
4
3
5 EEAR5
4 EEAR4
3 EEAR3
2
1
0 EEAR8
1 EEAR1
0 EEAR0
The EEARL register 7 EEAR7
6 EEAR6
2 EEAR2
The EEARH and EEARL registers specify the EEPROM address in the 512 bytes EEPROM space.There are just 9 bits available for addressing giving 29 = 512 locations. The EEDR register 7 MSB
6
5
4
3
2
1
0 LSB
The EEDR register contains the data to be written to the EEPROM in the address given by the EEAR(H & L) registers.
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Question Write a program to store the numbers 1 to 10 in EEPROM starting at address 0x0000, then read the contents from EEPROM and display on the LCD display.
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