Efficient Mid-Frequency Plane Inductance Computation Fan Zhou #1, Albert E. Ruehli #2, Jun Fan#3 #
EMC Lab, Missouri University of Science and Technology 4000 Enterprise Dr. Rolla, MO, 65401, USA 1.
[email protected] 2.
[email protected] 3.
[email protected]
Abstract—In power distribution networks (PDN), the modelling of the mid-frequency inductance for Zpp type plane pairs is very important. It is a key step for the placement of the decoupling capacitors. This paper gives an efficient approach for the calculation of the inductance for different capacitor placements. The PEEC based formulations takes advantage of the opposite currents in the planes. This leads to compute time reductions and memory savings for both the element calculation and the matrix solve step. We also use a formulation where placement of capacitors leads to only small changes in the circuit matrix. Comparisons with other models are made to validate our results.
I. INTRODUCTION Today, integrated circuits (ICs) and processors operate with internal clock frequencies of several gigahertzes. Further, they demand power supply current from hundreds of milli-amperes to tens of amps. The IC’s demand for high speed switching current from the power delivery network (PDN) can lead to significant drops and ripples in the supply voltage. These voltage drops are also an important issue for on chip voltage distribution networks [1]. Local, PC board (PCB) discrete decoupling capacitors are widely used to stabilize the power supply voltage levels by providing a low power supply impedance to meet the demand of the IC. However, PCB inductance in the connections to decoupling capacitors limits the capacitor’s ability to rapidly provide charge. Hence, the minimization of the inductance of these connections through the power plane is very important. It is well known that the decoupling capacitors are most effective for the mid-frequency ranges. At high frequencies their effectiveness is limited due to the series inductance. Several techniques are available today to calculate via inductance [2,3]. Full-wave electromagnetic modelling methods, transmission line methods, and analytical methods based on the cavity-model theory have been used to model the power/ground layer pair problem. However, the accurate computation of the inductances for multiple capacitor placements can be very time consuming. In this paper, we present an efficient approach for the plane pair inductance for multiple capacitor placements. A new twodimensional Partial Equivalent Circuit (PEEC) formulation equivalent to the 1D formulation [4] is used to calculate the partial inductance between the plane pair. We take advantage of the opposite currents to reduce the inductance matrix in the system in order to save time and memory use. The decoupling
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capacitors are modelled as shorts since we assume that at these mid-frequencies, they provide very low impedance connection. However, an inductance macromodel for the inductance of the capacitors can be included in our model. The formulation is designed so that it is easy to change the location of the capacitors by choosing the appropriate connection node. Hence, it can be used for the design of the decoupling layout and BGA power/ground pin map designs. II. PLANE SUBDIVISION Our new reduced PEEC based model can be applied to complex plane structures with multiple shorts at the locations of the decoupling capacitors and with multiple current excitations. In this paper, we only consider the inductance part without the dc resistance. However, this is not a fundamental limitation of the technique. We assume that the conductors have zero thickness and that the skin-effect is not included. This is very acceptable for the type of inductance estimation which we want to perform in this paper since the skin-effect represents a small fraction of the inductance with the exception of very close spaced planes. We want to keep the formulation as simple as possible so that the compute time is minimal. This way, the computation of different decoupling capacitors arrangement can be computed without excessive compute time. For the plane pairs, the planes are subdivided into commensurate cells for which the partial inductances are evaluated. Fig. 1 shows the subdivision of the planes. Importantly, the same divisions must be used for both planes. The width of the cells on the edge is just half of the cells in the middle such that a uniform edge-connected node meshes results as the case for the conventional PEEC meshing. This allows the joining of different plane sections to be connected together in a systematic way.
831
III. MODEL FOR PLANES The above analysis can be directly applied to this example. The matrix is assembled by stamping in the appropriate contribution circuit element by element in a conventional Modified Nodal Analysis (MNA) way to form the circuit matrix. We use MNA matrix stamps to set up the circuit matrix. Table I is a matrix stamp for two coupled partial inductances. For the shorts, the voltage source stamp is used as shown in Table II as is conventionally done. RHS is the right-hand side of KVL and KCL equations, m1 and m2 are the m1-th and m2-th node. Aux1 means the current in the Aux1’s branch and Aux2 means the current in the Aux2’s branch.
Fig. 1. Subdivision of planes
Table I MNA MATRIX STAMP FOR TWO COUPLED PARTIAL INDUCTANCES
The partial inductances between the cells can be computed analytically. We have a closed form expression for zero thickness planes give as Eq. (1) [5], which is shown in Fig. 2 Lpij
P 1 4S WW i j
4
4
¦¦ (1)
mk
[
k 1m 1
bm2 C 2 a2 C 2 ak log(ak U ) k bm log(bm U ) 2 2
ab 1 (bm2 2C 2 ak2 ) U bmCak tan 1 k m ] 6 UC
(1) where
U
ak2 bm2 C 2
and
a1
a3 b1 b3
Table II MNA MATRIX STAMP FOR VOLTAGE SOURCE
f a sa f s , a2 aij a a , 2 2 2 2 f s f s aij a a , a4 aij a a 2 2 2 2 fb sb f b sb bij , b2 bij 2 2 2 2 f s f s bij b b , b4 bij b b 2 2 2 2 aij
c
b
j
sb
C
fb
Fig. 3 represents the smallest possible illustrative example for the two plane representations. Each of the connection includes a partial inductance. As shown in Fig. 3, we assume that node N1 is shorted and we inject a current into node N4. If we look
sa
aij
at node N4, the self inductance is given by L44=
circuit equations for our small example are given in Eq. (2). By solving this system, we can get all the voltages at each node and the currents in each branch. Then all other desired inductances like L42 and L43 can be calculated.
bij
i fa
V4 . The sI
a
Fig. 2. Two zero thickness planes
832
Va Vb sI m
Lskm
2( Lpkm Lpkmc )
(4)
Fig. 3. Smallest possible example problem for two planes Fig. 4. Cell pair to cell pair coupling
ª0 «0 « «0 « «0 «1 « «0 «1 « «0 «1 ¬
0 0 0 0 -1 0 0 1 0
0 0 0 0 0 1 -1 0 0
0 1 0 1 0 1 0 0 0 1 1 0 0 1 0 1 1 0 0 0 0 - Lx11 - Lx12 0 0 -1 - Lx12 - Lx22 0 0 0 0 0 - Ly11 - Ly12 -1 0 0 - Ly12 - Ly22 0 0 0 0 0
1 º ª VN 1 º 0 »» «« VN 2 »» 0 » « VN 3 » » »« 0 » « VN 4 » 0 » « sI x1 » » »« 0 » « sI x 2 » 0 » « sI y1 » » »« 0 » « sI y 2 » 0 »¼ «¬ sI sh »¼
ª0º «0» « » «0» « » «Is » «0» « » «0» «0» « » «0» «0» ¬ ¼
(2)
Importantly, the structure of the matrix is the same for a larger, more realistic example with N > 4. We can inject the current at any Node(s) we want to compute the inductance at. Also, we can place the appropriate shorts at nodes where the capacitances are placed. Note that we place the shorts and excitations at the last row and column of the matrix such that the rest of the matrix is not touched by different placements. Again, the last columns and rows of the symmetric matrix are used for the voltage source (shorts) stamp in Table II. It is obvious that we can add several capacitors by adding more rows and columns without re-computing the time-expensive remainder of the matrix. IV. SPARSE INDUCTANCE MODEL As the case for the Zpp model, we have two planes with opposing currents. Hence, we want to work with the units of cell pairs consisting of two cells located in the same x,y position. A key advantage is the fact that the inductive coupling between the distant cells drops off fast due to the cancelling dipole effect of the opposing currents on the cell pairs. This leads to sparsity in the coupling in the inductive coupling matrices. This has been shown to be the case for transmission lines [4]. As a result, the positive definiteness of the matrix is much easier to guarantee. The mutual coupled voltage between the cells is given in from Fig. 4 with the equivalent circuit shown in the Fig. 5 as Eq. (3) Va Vb ( Lpkmc Lpk cm Lpkm Lpk cmc )sI m (3) Since the cells are in the same plane, we can apply symmetry to simplify the equation to Eq. (4). This saves a factor two in the number of partial inductance evaluations.
Fig. 5. Equivalent circuit for cell pair coupling
The magnetic vector potential due to a current element of length l at a distance r from it is parallel to the filament and if l r is approximated by:
A
P0 Il 4S r
(5)
Therefore the partial mutual inductance between two filaments of lengths li and l j which are separated by a distance r with r >> li , l j and have acute angle T between them is approximated by:
Lpij
³
cj
A dl j Ii
P0 li l j cos(T ) 4S r
(6)
Next, we want to show that the section-to-section coupling Lskm in Eq. (4) decreases rapidly with the section-to-section distance for the plane pair. The mutual inductance between two different sections I xk and I xm is calculated as an example as shown in Fig. 1. According to Eq. (6):
Lpkm
0.1
Lpkmc
0.1
'x'y (i'x) 2 ( j 'y ) 2 'x'y (i'x) 2 ( j 'y ) 2 1 q 2
Respectively, with
833
(7)
(8)
h
q
(i'x) ( j 'y ) 2
(9)
2
h is the plane to plane spacing and 'x is the section length. The square root can be expanded in a Taylor series as
(1 q 2 )
1 2
1
(10)
i 2 j 2 t 1 and again q h . 2
is less than 0.03 if the distance is
Hence, the decay in the mutual cell-pair to cell-pair coupling decays fast. For example, when the distance is larger than 10 mm, the mutual section inductance is smaller than 0.004 pH.
Here, we take the cell size as 1 mm x 1 mm and the spacing between the two planes as 0.2 mm for our example. The distance between two sections is defined as 2
Lskm Lskm ( App )
Err
0.1'x'yq 2 / (i'x) 2 ( j 'y ) 2
where
Lskm
larger than 5 mm and smaller than 50 mm. If we normalize to the self inductance, the error
q2 q4 2 8
for q
