Embedded system for mobile robotic in FPGAs Marco A. Pérez López1, Nicolás Quiroz Hernández1,2, Gustavo T. Rubín Linares1,2, Mariano Larios Gómez1, Gerardo Mino Aguilar2
[email protected] Facultad de Ciencias de la Computación1 Facultad de Ciencias de la Electrónica2 Benemérita Universidad Autónoma de Puebla
Abstract These embedded systems can use in FPGAs for mobile robotics applications. Where the designer of mobile robots only has to add code in language of high-level programming (C/C++) or hardware modules in VHDL, to build compact systems that can be implemented on a mobile, but with flexibility in its design. For developing the platform of mobile robotic, it was embedded a microprocessor and an operating system; it was used a softcore processor (Microblaze) 32-bits and operating system (Petalogix) based on Linux. In the part of hardware were designed drivers in VHDL for the sensors (ultrasonic) and actuators (servomotors). The system is scalable; it allows integrating more modules hardware (sensors and actuators) and software (programs in C) depending on the application. The Linux operating system is of opensource, it allows adapting to the requirements of the system. Also there is a stage of power for testing motors.
1. Introduction Nowadays, the mobile robotic systems require complex control procedures that occupy less space and less energy. For that reason, the necessity of build computerized systems with these characteristics. For developing hardware and software in embedded systems are used reconfigurable circuits such as FPGAs, that reach the required characteristics. Currently on the Faculty of Computer Science at the BUAP, some students are graduated with thesis related to implementation of new algorithms for mobile robotic; most of them are only to simulation level because they do not have a platform of real testing. For that reason, it was implemented the embedded system in FPGA for applications of mobile robots with the possibility of test these algorithms. The system stablishes that any mobile robotics project required only 30% of changes in software or hardware components, on this way the system can be adapted in a very short time. The contribution of this work is to validate the utility of FPGAs to create embedded systems for mobile robotics applications. 2. Description of the System in Blocks The system consists of a development board Spartan-3E of the Xilinx Company [1]. Where all parts of the system are developed. Figure 1 shows the complete system. The EEPROM memory stores the software of configuration of the FPGA and operating system (OS). In DDR SDRAM memory is stored the operating system (OS) and application program in the FPGA is configured the microprocessor (Microblaze), the IPCore of the servomotor, DC motor, and the sensors; FLASH memory controllers ( EEPROM), DDR memory (MMU) and controllers of the buses (Master Bus) that connect all the blocks within the FPGA. The system presents a Princeton architecture, where the DDR memory is use for storing data and instructions [2]. 1
In the block of external components is the servomotor, ultrasonic sensors, and power stage (L298) to power supply the DC motor. The O.S. and Applications block, represents the part of the software, where is the operating system and test application. Initially, it is stored in flash memory and loaded into DDR memory when it is running.
Figure 1. Diagram in block of embedded system 3. Features of the development system (Spartan3E) For development embedded system, it was used a Spartan-3E Starter Kit Board (Figure 2) it has the following characteristics [1]: • • • • • • • • • • •
Xilinx XC3S500E Spartan-3E FPGA Up to 232 user-I/O pins Xilinx 4 Mbit Platform Flash configuration PROM Xilinx 64-macrocell XC2C64A CoolRunner CPLD 64 MByte (512 Mbit) of DDR SDRAM, x16 data interface, 100+ MHz 16 MByte (128 Mbit) of parallel NOR Flash (Intel StrataFlash) 2-line, 16-character LCD screen PS/2 mouse or keyboard port VGA display port 10/100 Ethernet PHY (requires Ethernet MAC in FPGA) Two 9-pin RS-232 ports (DTE- and DCE-style)
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Figure 2. Spartan-3E Starter Kit Board The FPGA has an equivalent of 500 thousand logic gates, where will be implemented the microprocessor and the IPCores of the sensors and actuators. A memory DDR of 64MB where the operating system and application will be stored. A flash memory of 16 MB where stores the configuration code of whole the system. The DTE and DCE serial connectors are used as standard input/output to communicate with the embedded system. Through a hyper terminal interacts with the embedded system to give orders and see the results of an operation of the system. 4. Embedded System Development The development of embedded system was designed in two parts, software and hardware. The part of software corresponds to the operating system design and the applications of testing. And the part of hardware corresponds to the design of microprocessor and the controllers for sensors and actuators. 4.1 Design and Implementation of Software The operating system developed is based on a Linux system, and it used Petalogix version that provides some tools for customizing the kernel for embedded systems [2]. The operating system is adapted to the needs of the project, customizing the kernel with basic options were added headers created by the development tool XPS (Xilinx Platform Studio). It was recompiled the kernel with GCC (GNU Compiler Collection). Getting an operating system for the platform designed, figure 3.
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It was added a test program developed in C, to test the complete system, it will be described after.
Figure 3. Microprocessor design in the EDK.
It includes a pair of boots the operating system the FS-BOOT (First Stage Bootloader) [11] and the U-boot (Universal Bootloader) for configuring the hardware and operating system stored in RAM. 4.2 Design and Implementation of Hardware The Hardware development stage was performed with the Development Kit Xilinx EDK, according to the model development board is selected the type of softcore processor (Microblaze), the IPCores necessaries. The DCE (terminal input/output) the templates for the building of IPCores of the servomotor, ultrasonic sensors and the DC motor [3]. These templates are modified with the ISE WebPACK software to adapt them into the sensors and actuators. The templates have the necessary code to connect to IPCores to microprocessor buses. In Figure 4a shows the design blocks IPCore sensors. The output signal Pulss generates a pulse to activate the sensors and return echo signals in digital form, with a signal that varies its pulse width, are the three entries of the Figure 4a with labels eco1, eco2, and eco3.
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a) b) Figure 4a) IPCore of the ultrasonic sensors, b) IPCore of the servomotor
The IPCore of the servomotor is shown in Figure 4b, where the output terminal, generates a digital signal of pulse width of 600 us to 2.4 ms to control the servomotor. This is a similar process to the controllers of the DC motor. With the VHDL code is generated the control signals and drive of signals recived for the IPCores, using the ISE software of Xilinx. The flexibility that the system has to allow adding news sensors and actuators, it only needs to create a new IPCore, defining inputs and outputs with the template which generates the EDK. Using the ISE program is added the VHDL code which describes its behavior. This is only the part of hardware and for the software part is modified the program developed in C. 5. Implementation and Testing For testing the system is built a mobile, which in this case was a radio control vehicle, where mounted the system (Spartan-3E board), a battery powered. To power the DC motor is implemented a power stage using the integrated circuit L298, which is a H-bridge power. This driving two amperes of continued current. Three ultrasonic sensors were mounted (SRF-05, Figure 6) to detect obstacles and decide the movement of the motor and servo motor (HS-311). The DC motor is used to advance or come back the vehicle and the servomotor to turn around to right or left. The sensors allow determining whether there are obstacles to the front, right or left. The complete system is shown in Figure 7a, where observe the ultrasonic sensors, the servo motor, battery and the development board.
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a)
b)
Figure 6. a) Ultrasonic Sensor (SRF-05), b) HS-311 servo
a) b) Figure 7. a) A vehicle testing, b) Moving basic algorithm of the mobile.
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The dimensions of the test vehicle are 30 cm wide and 56 cm long, and relatively big for the tests, requiring a scenario of 1.5 m by 1.7 m for realize the tests. Algorithm was implemented in C language (Figure 7b) to test the complete system; the algorithm detects obstacles in front and turns right or left. If there are obstacles in the three directions the algorithm terminates and the vehicle does not move.
The standard input/output of the system is through the serial port. The serial port was connected (RS-232) from the PC to the serial port development board (DTE). Through the hyper terminal of the computer is realized the communication with the developed system. This allows running the program and interact with the system. The program not only detects the obstacle, but the distance of it. 6. Results In the results is presented the tests of mobile and the results of integrated devices to FPGA. This work showed the facility to integrate different controllers for sensors and actuators, making the implementation in VHDL. The modification of the program is in C language, it must integrate the FPGA configuration file. Therefore the only changes are in C and VHDL language. Facilitating the implementation and tests of artificial intelligence algorithms. The recourse used in the FPGA and of IPCore of sensors are shown in Figure 8, the resources used by the servomotor figure 9 and those used by the dc motor in Figure 10. Device utilization summary sensores: --------------------------Selected Device : 3s500efg320-4 Number Number Number Number Number
of of of of of
Slices: Slice Flip Flops: 4 input LUTs: IOs: bonded IOBs:
274 318 372 205 0
out of out of out of
4656 9312 9312
5% 3% 3%
out of
232
0%
Figure 8. Recourses used by the IPCore of the sensors. Device utilization summary servomotor: --------------------------Selected Device : 3s500efg320-4 Number Number Number Number Number
of of of of of
Slices: Slice Flip Flops: 4 input LUTs: IOs: bonded IOBs:
132 187 148 202 0
out of out of out of
4656 9312 9312
2% 2% 1%
out of
232
0%
Figure 9. Recourses used by the IPCore of the servomotor.
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Device utilization summary Motor de dc: --------------------------Selected Device: 3s500efg320-4 Number Number Number Number Number
of of of of of
Slices: 100 out of 4656 Slice Flip Flops: 158 out of 9312 4 input LUTs: 84 out of 9312 IOs: 203 bonded IOBs: 0 out of 232 Figure 10. Recourses used by the IPCore of the DC motor.
2% 1% 0% 0%
Device utilization summary: --------------------------Selected Device : 3s500efg320-4 Number of Slices: Number of Slice Flip Flops: Number of 4 input LUTs: Number used as logic: Number used as Shift registers: Number used as RAMs: Number of IOs: Number of bonded IOBs: IOB Flip Flops: Number of BRAMs: Number of MULT18X18SIOs: Number of GCLKs: Number of DCMs:
4654 5848 6684 5942 262 480 123 75 66 16 3 6 2
out of out of out of
4656 9312 9312
99% 62% 71%
out of
232
32%
20 20 24 4
80% 15% 25% 50%
out out out out
of of of of
Figure 11. Total Summary of the recourses used of the FPGA by the entire system.
Figure 11 shows of the recourses used of the FPGA by the entire system, where it notes that occupied 99% of the FPGA Slices, 62% of the FLIP-FLOPS, 71% of LUTs, in the figures 8, 9 and 10 are shown that the sensors and actuators occupy between 2% and 5% each, therefore adding another sensor would be raising in this percentage the recourses used. If it need to implement a more powerful algorithm, with more sensors and actuators, it can use a great capacity board, such as the Spartan 3AN of 700 000 gates.
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a) b) Figure 12. a) Scenario of tests, starting of the test, b) middle part of the test.
Figure 13. Scheme of the test scenario and route followed by the vehicle Figure 13 shows a scenery scheme and the path performance the vehicle test. After testing it can say that the project results successfully.
The testing algorithm (Figure 7b) was tested in the scenario of Figure 12, Figure 12a shows the start of the test, Figure 12b is an intermediate part of the system test. Tests were realized with different distances of obstacles of 10, 20, 30 and 40 cm.
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7. Conclusions It was shown that to test algorithms in a real system as developed only have to do programs in high-level language like C. To implement controllers of sensors and actuators only have to describe their behavior in VHDL. It created a versatile system for mobile robotics developers can test their algorithms in a microprocessor based system. When a board changes to one with more features the changes are minimal. The peripheral controllers works concurrently. The limits are only for the recourses of the development boards. 8. References 1. Spartan-3E Starter Kit Board User Guide, Xilinx 2. Andrew S. Tanenbaum, “Organización de computadoras un enfoque estructurado. “ Prentice Hall. 3. http://www.petalogix.com/resources/documentation/petalinux/userguide/Bootloaders 3. MicroSystems Engineering , “Hoja técnica: medidor ultrasónico SRF05”. 4. Arnold S. Berger “Embended System Design.” Lawrence, Kansas CMP Books. 5. Frank Vahid / Tony Givargis “Embedded system design Aunified Hardware / Software Introduction” U.S.A. Jonhn Wiley& Sons, Inc. 6. Morris Mano “Arquitectura de computadoras.” 7. Pong P. Chu. “ FPGA Prototyping by VHDL examples Xilinx Spartan 3 version.” New Jersey. Jonhn Wiley& Sons, Inc. 8. Berge V., “SEPIA, System evolutif de perception pour un robot mobile “ , Francia 1992. Tesis de Doctorado de la Universidad de Tecnología de Compiegne. 9. Raul Cobo “El abc de la automatizacion”. 10 Silberchatz Galvin “sistemas operativos quinta edición.” Mexico 1999 Addison Wesley Longman.
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