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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 63, NO. 1, JANUARY 2016

Fast Nonlinear Model Predictive Control on FPGA Using Particle Swarm Optimization Fang Xu, Hong Chen, Senior Member, IEEE, Xun Gong, Student Member, IEEE, and Qin Mei

Abstract—Nonlinear model predictive control (NMPC) requires a repeated online solution of a nonlinear optimal control problem. The computation load remains the main challenge for the real-time practical application of the NMPC technique, particularly for fast systems. This paper presents a fast NMPC algorithm implemented on a field-programmable gate array (FPGA) that employs a particle swarm optimization (PSO) algorithm to handle nonlinear optimization. The FPGA is used to explore the possibilities of parallel architecture for the substantial acceleration of NMPC. PSO is employed to achieve real-time operation due to its naturally parallel capabilities. The proposed FPGA-based NMPC-PSO controller consists of a random-number generator, a fixed-point arithmetic, a PSO solver, and a universal asynchronous receiver/transmitter communication interface. Then, this controller is applied to an engine idle speed control problem and demonstrated with an FPGA-in-the-loop testbench. The experimental results indicate that the NMPC-on-FPGA-chip strategy has good computational performance and achieves satisfactory control performance. Index Terms—Engine idle speed control (ISC), fieldprogrammable gate array (FPGA), nonlinear model predictive control (NMPC), particle swarm optimization (PSO).

I. I NTRODUCTION

M

ODEL predictive control (MPC) is an advanced optimal control technology that has been proven to be very successful due to its ability to handle multivariable/multiobjective problems and deal with hard constraints explicitly [1], [2]. Linear model predictive control (LMPC) has been widely used in the process industry, and many efforts have been made to extend LMPC from slow dynamic systems to fast dynamic systems, such as aerospace, robotics, network, automotive, and drive systems [3]–[8]. However, for many nonlinear systems, linear models are insufficient to describe the process dynamics over Manuscript received October 27, 2014; revised March 5, 2015; accepted July 3, 2015. Date of publication August 3, 2015; date of current version December 9, 2015. This work was supported in part by the 973 Program under Grant 2012CB821202 and in part by the National Natural Science Foundation of China under Grant 61374046, Grant 61403159, and Grant 61520106008. (Corresponding author: Hong Chen.) F. Xu and H. Chen are with the State Key Laboratory of Automotive Simulation and Control, Changchun 130022, China, and also with the Department of Control Science and Engineering, Jilin University, Changchun 130025, China (e-mail: [email protected]). X. Gong and Q. Mei are with the Department of Control Science and Engineering, Jilin University, Changchun 130025, China. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TIE.2015.2464171

the required range of operating points, which motivates the increasing interest in nonlinear model predictive control (NMPC) [9]–[12]. NMPC is the extension of well-established LMPC to the nonlinear world. With the introduction of a dynamic nonlinear model within the NMPC algorithm, NMPC needs to solve a nonlinear optimization problem. Because NMPC requires the online solution of a receding-horizon optimization problem at every sampling instant, the increasing online computational burden has limited the application of NMPC in many fields. Moreover, some fast dynamic systems require a highly integrated and low-cost controller on a single chip. Therefore, the computational efficiency has always been a critical issue in the practical application of NMPC, particularly those that run on resource-constrained embedded computing platforms. Recently, there has been significant interest in using fieldprogrammable gate arrays (FPGAs) to speed up the online computation of MPC. With the development of integrated circuit technology, FPGA is gaining popularity in accelerating scientific computations due to its configurable hardware technology [13]–[16]. By nicely designed architecture, such as pipelining and parallel computing, FPGA can achieve very high processing speed, which is much faster than traditional software implementations. This enables MPC to be implemented in parallel approaches, which can lead to the reduction of computation time. Early explorations of MPC implementation on FPGA chips are presented in [17]–[19]. A Handel-C model of the MPC algorithm is created, and it is then synthesized and implemented as an FPGA module. A system-on-a-programmablechip (SOPC) technique based on FPGA is proposed for MPC implementation in [20]–[22]. SOPC is an integrated hardware and software design method that results in architecture consisting of a general-purpose microprocessor and a coprocessor. The general-purpose microprocessor acts as the master in the system, and the coprocessor is tailored to accelerate computationally demanding MPC operations, such as floatpoint operations, matrix operations, and a quadratic programming (QP) solver. The research in [23] and [24] investigates a custom architecture design based on hardware description language (HDL) specification for FPGA implementation. The detailed implementations of various arithmetic operations are introduced. A survey of existing FPGA-based MPC implementations is presented in [3]. These aforementioned studies are presented as encouraging evidence that there is clear potential for the benefits of MPC to be more widely applied by taking the advantages of FPGA, such as flexible and high-performance computing hardware. However, the aforementioned research papers mainly focus on the implementation of LMPC based on

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XU et al.: FAST NONLINEAR MODEL PREDICTIVE CONTROL ON FPGA USING PARTICLE SWARM OPTIMIZATION

the FPGA method. LMPC can be solved by the solution of a QP problem. NMPC involves the solution of a nonlinear program, which is computationally expensive. A few research papers attempting at NMPC on FPGA can be found in [25] and [26]. Hence, further investigations on efficient and implementable NMPC are necessary. The main challenge of implementing NMPC on an FPGA chip is solving the nonlinear optimization problem associated with NMPC online at each sampling step. This pertains to the availability of embedded optimization algorithms that 1) can solve quickly and provide a solution within the available sampling interval, 2) should be simple enough and easy to program within the limitations of on-board chip architectures, and 3) has the parallel nature to fit with the architecture of FPGA. To date, many efficient optimization algorithms and packages have been investigated to solve NMPC problems [27]–[30]. Direct methods based on the sequential QP (SQP) algorithm are used to solve the nonlinear optimization problem posed by NMPC [27]. The SQP method attempts to compute an optimal control sequence by splitting a nonlinear optimization problem into a sequence of convex QP problems, which can be solved to generate a sequence of iterates converging to an optimal solution. Due to a gradient-based strategy, SQP is a locally optimal solution [31]. A fast numerical algorithm based on the continuation method and the generalized minimum residual (GMRES) method is proposed for nonlinear receding-horizon control in [28]. It is a Krylov subspace method. Simulation results show that C/GMRES is much faster than the conventional algorithms. In [29], a recurrent neural network is used to handle the nonlinear optimization of NMPC, and then, it is applied to the autonomous vertical autorotation problem of unmanned helicopters and three specific examples, respectively. These aforementioned methods are gradient-based strategies, and they are too complex to be implemented on a chip. To solve the problems, stochastic optimization algorithms, such as the genetic algorithm, the nested-partition algorithm, and particle swarm optimization (PSO), have been also proposed to solve the nonlinear optimization problem (see [31]–[33]). The PSO algorithm is a stochastic population-based technique and can provide several desired attributes, such as global search, parallel capabilities, easy to implement, and reduced memory requirement with respect to embedded application, and without calculations of the gradient [34], [35]. The work in [35] illustrates that the hardware parallel PSO is a feasible solution for embedded application and is suitable for accelerating the execution time of the optimization problem. Additionally, the FPGA implementation allows the PSO algorithm to exploit its parallel search capabilities. Therefore, the idea of using PSO to solve the nonlinear optimization problem in NMPC is promising. The main objective of this paper is to lower the practical burden of applying the NMPC algorithm in the fast dynamic systems. To this aim, the main contributions of our paper cover the following points: 1) the successful implementation of an FPGA-based NMPC controller, since, to our best knowledge, all prior examples of FPGA-based MPC have used linear (or, at best, linear time-varying) system models; 2) the successful utilization of PSO cooperating with the penalty function approach

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as the embedded optimization algorithm to solve the constrained nonlinear optimization problem of NMPC; and 3) the successful application of the FPGA-based NMPC controller to the automotive engine system with millisecond timescales. This paper extends the conference publication [36]. The rest of this paper is organized as follows. Section II gives a brief review of the NMPC problem. The PSO algorithm used to solve the NMPC optimization problem is introduced in Section III. The proposed NMPC-PSO controller is used to deal with the engine idle speed control (ISC) problem in Section IV. Section V presents the implementation details of the NMPC-PSO controller on FPGA. The real-time experiment results are given in Section VI, and conclusions are presented in Section VII. II. P ROBLEM F ORMULATION FOR NMPC In general, MPC repeatedly calculates control actions that optimize the forecasted system behavior. A dynamic model of the controlled system is used to predict the future system behavior. Based on this prediction, an optimal control problem, which minimizes the difference between a given reference and the predicted output while satisfying constraints, needs to be solved online at each sampling instant. Afterward, the first part of the optimized control actions is applied to the system until the next sampling instant. When the new system states are obtained, an updated optimal control problem is solved. Assuming that the system to be controlled can be described by the following discrete-time, nonlinear, and state-space model [9], [37]: x(k + 1) = f (x(k), u(k)) , k ≥ 0

(1a)

yc (k) = gc (x(k), u(k))

(1b)

yb (k) = gb (x(k), u(k))

(1c)

subject to system input and output constraints in the form of u(k) ∈ U,

∀k ≥ 0

(2a)

yb (k) ∈ Y,

∀k ≥ 0

(2b)

where x(k) ∈ Rnx is the system state vector, u(k) ∈ Rnu is the system input vector, and yc (k) ∈ Rnc and yb (k) ∈ Rnb denote the controlled output and the constrained output, respectively. f, gc , gb are system functions of the process model. Furthermore, the input constraint set U and output constraint set Y are often given by box constraints of the following form: U =: {u ∈ Rnu |umin ≤ u(k) ≤ umax }

(3a)

Y =: {yb ∈ Rnb |ymin ≤ yb (k) ≤ ymax } .

(3b)

Here, umin , umax and ymin , ymax are constant vectors. Based on dynamic models of form (1)–(3), the optimization problem of NMPC can be detailed as follows: min J (x(k), Uk ) Uk

(4)

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subject to

and the first step of the optimal control sequence is applied to the system, i.e.,

x¯(k + i + 1) = f (¯ x(k + i), u ¯(k + i)) , 0 ≤ i ≤ Np

(5a)

x¯(k) = x(k)

(5b)

y¯c (k + i) = gc (¯ x(k + i), u ¯(k + i))

(5c)

y¯b (k + i) = gb (¯ x(k + i), u ¯(k + i))

(5d)

¯(k + i) ≤ umax , 0 ≤ i ≤ Nc umin ≤ u

(5e)

ymin ≤ y¯b (k + i) ≤ ymax , 0 ≤ i ≤ Np

(5f)

u¯(k + i) = u ¯(k + Nc − 1), Nc ≤ i ≤ Np

(5g)

Np 

III. PSO The constrained optimization problem (4)–(6) can be represented as the following NLP problem with constraints: u

¯ yc (k+i)−r(k+i)2Q +

i=1

s. t.

N c −1 

Δ¯ u(k+i)2S

i=0

(6) where Np , Nc are the prediction horizon and the control horizon with satisfying Nc ≤ Np . To clearly distinguish between the real system and the predicted system, the internal controller variables of the predicted system are denoted by a bar “-.” The system model (5a)–(5d) is used to predict the future system behavior, and it is initialized by the actual measured system state x(k). Constraint (5g) fixes the input beyond the control ¯(·) is the predicted control input, horizon to u ¯(k + Nc − 1). u which is defined as u ¯(k + i) = u ¯i , i = 0, 1, . . . , Nc − 1

(7)

where u ¯0 , . . . , u¯Nc −1 constitute the independent variables of the optimization problem, which is denoted as Uk , i.e., ⎤ ⎡ u ¯0 ⎥ ⎢ u ⎢ ¯1 ⎥ (8) Uk = ⎢ . ⎥ . ⎣ .. ⎦ u ¯Nc −1 In the cost function (6), Δ¯ u(k+i) = u ¯(k+i) − u ¯(k + i − 1). y¯c (·) is the predicted output, and r(·) is the given reference. Q and S are positive definite and symmetric weighting matrices on outputs and control moves, respectively. They are tuning parameters to achieve the desired performance and can be chosen freely. Due to y¯c (·) and y¯b (·) being nonlinear functions of the input sequence, the minimization problem with respect to Uk is a nonlinear programming (NLP) problem. For the purpose of real-time control, this paper utilizes PSO to solve the nonlinear optimization problem (4) subject to (5). The sequence of optimal solutions of problem (4)–(6) is defined as ⎡ ∗ ⎤ u ¯0 ∗ ⎥ ⎢ u ¯ ⎢ 1 ⎥ Uk∗ = ⎢ . ⎥ (9) ⎣ .. ⎦ u¯∗Nc −1

(10)

Then, the predictive horizon is moved forward by one interval, and the optimization problem is resolved using new process measurements.

min J(u),

with the cost function, i.e., J(x(k), Uk ) =

u(k) = u ¯∗0 .

hi (u) ≤ 0, i = 1, . . . , m

(11a) (11b)

where J is the objective function, and u is the decision vector with nu decision variables. The formulation of the constraints in (11b) is not restrictive, since an inequality constraint of the form hi (u) ≥ 0 can be also represented as −hi (u) ≤ 0. In the following, the PSO algorithm with the penalty function approach is introduced to solve the constrained optimization problem (11). PSO is a stochastic global optimization method inspired by the social behavior of animals, such as bird flocking, fish schooling, and swarm theory. PSO exploits a population of potential solutions to probe the search space and relies on the exchange of information between individuals (particles) of the population (swarm) [38]. In effect, each particle adjusts its trajectory toward its own previous best position and toward the best previous position attained by the entire swarm. When improved positions are discovered, these better positions will then come to guide the movements of the swarm. The process is repeated, and by doing so, a satisfactory solution will eventually be discovered. The particles move in the search space according to the following transition rule:



Vit+1 = ωVit + c1 r1 Pit − Xit + c2 r2 Pgt − Xit

(12a)

Xit+1 = Xit + Vit+1

(12b)

where Xi = (xi1 , xi2 , . . . , xiD ) represents the position of particle i, i = 1, 2, . . . , nN , nN is the size of the population, Vi = (vi1 , vi2 , . . . , viD ) is the position change (velocity) of particle i, D is the dimension of the search space, Pi = (pi1 , pi2 , . . . , piD ) denotes the best previous position of particle i found so far, and Pg = (pg1 , pg2 , . . . , pgD ) represents the best position of the entire swarm found so far. Superscript t denotes the iteration. All particles start with randomly initialized velocities and positions. ω is the inertia weight; c1 and c2 are called the cognitive and social parameters, respectively; r1 and r2 are random numbers uniformly distributed within the range [0, 1]. The choice of parameters for PSO is very important to ensure satisfying the convergence and the computational performance of the algorithm. In this paper, these parameters are empirically selected.

XU et al.: FAST NONLINEAR MODEL PREDICTIVE CONTROL ON FPGA USING PARTICLE SWARM OPTIMIZATION

Due to PSO being an unconstrained optimization algorithm, the constraints are tackled by the penalty function approach in this paper. The penalty function is a common approach for solving the constrained optimization problem [39]. By penalizing the constraints and building a single objective function, the constrained problem can be transformed into an unconstrained problem, which, in turn, is solved using an unconstrained optimization algorithm PSO. The penalty function is generally defined as m  [max {0, hi (u)}]β (13) F (u, σ) = J(u) + σ i=1

where σ is a positive penalty value, and β is a given constant and is usually chosen as β ≥ 1. If u is a feasible point, max{0, hi (u)} = 0; else, if u is an unfeasible point, max{0, hi (u)} = hi (u). Therefore, the constrained problem (11) can be transformed into the following unconstrained problem: min F (u, σ). u

(14)

The approximate solution of problem (11) can be obtained by solving unconstrained problem (14). Summarizing, the PSO-based NMPC scheme works as follows. NMPC algorithm: Step 1 Initialization and give the reference trajectory r(·). Step 2 Obtain the measurements of the system states x(k). Step 3 Solve the nonlinear optimization problem of NMPC by using PSO method. PSO algorithm: Step 3.1 Create and initialize a D-dimensional swarm. 1) Let t = 0. Initialize Xi0 and Vi0 randomly for each particle i in the population. 2) Initialize Pi0 with a copy of Xi0 . 3) Evaluate fitness function Fi (Xi0 ) by solving the difference equations (5a)–(5d) initialized by the measured system state x(k). 4) Initialize Pg0 with the index of the particle with the best function value among the population. Step 3.2 Repeat until a stopping criterion is satisfied. 1) For each particle i, update Vit and Xit according to equation (12) and obtain Vit+1 and Xit+1. 2) Evaluate fitness function Fi (Xit+1 ) for all particles by solving the difference equations (5a)–(5d) initialized by the measured system state x(k). 3) For each particle i, update Pit according to Pit+1 = Xit+1 , if Fi (Xit+1 ) < Fi (Pit ). 4) Update Pg according to Pgt+1 = Pit+1 , if Fi (Pit+1 ) < Fi (Pgt ). Step 3.3 If a stopping criterion is satisfied, output the solution Uk∗ = Pgt+1 found best so far. Step 3.4 Let t = t + 1 and go back to Step 3.2. Step 4 Implement the first part of the optimal input u ¯∗0 to the plant until the next sampling instant. Step 5 Let k = k + 1, continue with Step 2.

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IV. A PPLICATION TO E NGINE ISC This PSO-based NMPC scheme and its FPGA hardware implementation can be applied to many systems. In this section, we apply it to an engine ISC system to demonstrate its high performance and efficacy. The engine control system is chosen because it has high requirements on online computing efficiency. One category of the ISC system with a direct throttle actuator is used in general. The throttle control actuator is a dc motor or a stepper motor without bypass valve. The air volume in the idling process comes through a slight throttle opening. The main objective of ISC is to make the engine speed stable around idle set speed. Normally, the low target idle speed will help improve fuel consumption and emission, but it will greatly increase the possibility of engine stalling. Therefore, the idle speed set point is usually prescribed at the maximum value that yields the acceptable quality of combustion and emissions. In summary, the target of ISC is to maintain the engine idle speed at a prescribed set point, avoid large engine speed deviation to prevent engine stalling even with sudden load disturbance emerged, and require the throttle position within a slight opening [40]. Hence, it can be seen that ISC is a multiobjective and multivariable control issue. This motivates the utilization of an NMPC strategy to deal with the engine ISC problem. A. System Modeling A nonlinear mean value model of spark ignition (SI) engine in the idling process is established for controller design and validation. It is assumed that over every combustion, all effects and processes are spread out, and differences from cylinder to cylinder are neglected. Then, the engine can be modeled by using a continuous-time method. According to [33], the mathematical description for engine ISC can be derived by the following process. The relevant engine dynamics for the ISC problem are the crankshaft rotational and torque production. According to Newton’s second law, the engine crankshaft rotational dynamic can be obtained by 1 30 (Te − TL ) N˙ = J π

(15)

where N is the engine speed, and J is the engine moment of inertia. The load torque on the crankshaft TL is considered as a system disturbance input. The engine brake torque Te can be considered as Te = Tind − Tfric − Tpump.

(16)

In the model, friction torque loss Tfric and pumping torque loss Tpump are obtained from engine mapping. The indicated torque Tind is generated by combustion and can be represented by Tind =

9550Hl m ˙ cly ηind (N ) λN

(17)

where Hl is the fuel energy constant, and λ is the air fuel ratio. In this paper, it is supposed that the air fuel ratio has been successfully controlled and that the spark advance angle has been optimally tuned. ηind (N ) represents the thermal indicated

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efficiency and obtained as a data map from experimental calibration. With considering the engine as a volumetric pump, the mass flow rate out of the manifold into the cylinders m ˙ cyl can be obtained by m ˙ cyl =

Vd N ηintake Pm 120RTm

(18)

where Vd is the engine cylinder volume, R is the ideal gas constant, Tm represents the intake manifold temperature, and Pm is the manifold pressure. Volumetric efficiency ηintake (N, Pm ) is described by a map obtained through experimental calibration. Additional dynamic for ISC is associated with manifold filling. Under constant manifold gas temperature, the intake manifold pressure dynamic is obtained by mass conservation law and ideal gas equation, i.e., RTm (m ˙ air − m ˙ cyl ) P˙ m = Vm

(19)

where Vm is the volume of intake manifold. The mass airflow rate into the intake manifold m ˙ air can be obtained by

Pm Tref Pa f1 (20) f2 (α). m ˙ air = Pref Ta Pa Pref , Tref are the reference pressure and the reference temperature, respectively, Pa , Ta are the atmospheric pressure and the atmospheric temperature separately, α is the throttle angle, and f1 (Pm /Pa ), f2 (α) functions are calculated by ⎧ Pm 1, ⎪ Pa ≤ k

⎪ ⎨  Pm γ+1 2 Pm γ Pm γ =  f1  ( Pa ) −( Pa ) γ+1 , Pm > k (21a) ⎪ Pa ⎪ 2 Pa ⎩ ( 2 ) γ−1 −( 2 ) γ−1 γ+1

γ+1

m ˙ air max [1 − cos(2α) + Aleak ] f2 (α) = 2

(21b)

where γ = 1.402 is the air coefficient, k = (2/(γ +1))γ/(γ−1) = 0.5261, and Aleak is the proportion of the default throttle opening angle. Finally, the complete engine model near idle can be obtained as follows: 1 30 (Tind − Tfric − Tpump − TL ) N˙ = J π RTm P˙m = (m ˙ air − m ˙ cyl ) Vm 9550Hl m ˙ cly ηind (N ) λN

Pm Tref Pa = f1 f2 (α) Pref Ta Pa

where Tind = m ˙ air

m ˙ cyl =

Vd N ηintake Pm . 120RTm

TABLE I PARAMETERS OF E NGINE AT I DLE S PEED

(22a) (22b)

some limits on the engine speed (r/min) and throttle angle (deg), which are selected as N ≥ 700 r/min and 0◦ ≤ α ≤ 15◦ . To obtain a simplified control-oriented model for NMPC controller design, we use curve fitting functions instead of data maps because these data maps in model (22) will affect the complexity of the NMPC controller. The control-oriented model in the form of state space can be derived as follows: x˙ 1 = f11 (x1 , x2 )x2 + f12 (x1 , x2 ) + w1 x˙ 2 = f21 (x1 , x2 )x1 x2 + f22 (x2 )f2 (u) y = x1

(23a) (23b) (23c)

where x1 = N and x2 = Pm are state variables, u = α is the control input, y = N is the output variable, additive disturbance input w1 summarizes the external load torque disturbance and model uncertainties, and f11 (x1 , x2 ), f12 (x1 , x2 ), f21 (x1 , x2 ), f22 (x2 ), f2 (u) are calculated by 9550HlVd ηintake (x1 , x2 )ηind (x1 ) 4πJRTm λ 30 (Tfric (x1 ) + Tpump(x2 )) f12 (x1 , x2 ) = − πJ Vd ηintake (x1 , x2 ) f21 (x1 , x2 ) = − 120Vm x2 RTm Pa Tref f22 (x1 ) = f1 Vm Pref Ta Pa m ˙ air max [1 + Aleak − cos(2u)] f2 (u) = 2

f11 (x1 , x2 ) =

(24a) (24b) (24c) (24d) (24e)

where f1 (x2 /Pa ) is obtained by (21a). The system model parameters used in the simulation are shown in Table I. These data are obtained from the engine operating at idle speed by using the TESIS enDYNA R4-Cylinder SI-Engine model.

(22c) B. Offline Simulation Results in MATLAB (22d) (22e)

In the above engine model, α is the control input variable, TL is considered as a system disturbance input, N is the system output variable, and Tfric , Tpump , ηind (N ), and ηintake are described by data maps. To avoid excessive engine dips and require the throttle angle within a slight opening, we place

Based on the established engine model, the NMPC-PSO controller can be designed and simulated in MATLAB. A disturbance rejection test is considered. The offline simulation test platform is MATLAB (Version 7.10) on a Windows XP PC (CPU Core2 Duo 2.8 GHz with 2-GB RAM). In this test, the controller has to reject a torque disturbance representing a load change that may be caused by power steering, transmission engagement, or air-conditioning compressor activation. The main performance measure of this test is the maximum deviation of

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The top subfigure illustrates that the designed NMPC-PSO controller can make the engine track the reference speed from initial speed rapidly, i.e., about 0.8 s. When the disturbance load torque 15 Nm comes in at time 5 s, increases to 30 Nm at time 10 s, and decreases to 20 Nm at 15 s, the controller can rapidly maintain the engine speed to 800 r/min, i.e., about 0.3 s. From the zoomed-in screenshot figure, the maximum deviation of the engine speed is less than 20 r/min. The second subfigure is the trajectory deviation of the engine speed between the NMPC-fmincon controller and the NMPC-PSO controller. The small deviation indicates that both controllers are virtually indistinguishable. The control input is shown in the third subfigure, and it can be seen that the control input constraint is well satisfied. The results demonstrate that the PSO method has good solution performance and that the proposed NMPC-PSO controller can achieve satisfactory control performance for the ISC problem.

V. FPGA H ARDWARE I MPLEMENTATION

Fig. 1. Trajectories of engine speed with external load torque.

the engine speed from idle, because large deviation may lead to engine stalling. An additional performance parameter is the settling time to the engine speed set point. The control performance of the NMPC-PSO controller is specifically related to those tuning parameters of NMPC and PSO algorithm. The simulation parameters are chosen as follows: The sampling instant is 10 ms, the control horizon and prediction horizon are Nc = 2 and Np = 5, the weight matrices are Q = 1 and S = 0.1, the given reference is Nref = 800 r/min, and the initial engine speed is regarded as N0 = 1000 r/min. The constraints are 0 deg ≤ u ≤ 15 deg, y ≥ 700 r/min. Additionally, the search space is D = Nc = 2, the cognitive and social parameters are c1 = c2 = 2, the maximum iteration number is tmax = 30, the size of the population is nN = 30, and the penalty values are σ = 100 and β = 2. To create a benchmark for our NMPC-PSO controller, the controller is first implemented in MATLAB using its optimization toolbox fmincon, which solves the optimization problems using the SQP method. The function options are set as “options = optimset (“LargeScale,” “off,” “Algorithm,” “sqp,” “TolFun,” 1e-8).” Subsequently, the fmincon function is directly replaced by the PSO function coded in MATLAB. Fig. 1 shows the responses of both the NMPC-fmincon controller and the NMPC-PSO controller to a set point of 800 r/min with external load torque. The dashed line denotes the reference engine speed, and the solid line is the controlled engine speed by using the PSO algorithm to solve the NMPC optimization problem. The dotted line represents the trajectory of engine speed by using the fmincon function to solve the NMPC.

This section introduces the implementation details of the NMPC controller on FPGA for engine ISC. In most cases, register transfer level (RTL) HDL is used in FPGA design. This paper utilizes the FPGA hardware implementation method together with the high-level synthesis (HLS) tool. HLS software can convert high-level programming language codes (such as C/C++) to RTL automatically. Therefore, HLS technology enables developers to focus more on technology-intensive aspects, such as algorithm design, rather than those related to laborintensive RTL. The automatically generated circuit may be not as efficient as that in manual design, but it is easy to implement and has a short development cycle. Due to increasing complex algorithms and expanding FPGA application size, HLS is a mainstream tool in the future [41]. In this paper, Altera’s Quartus II and Mentor’s Catapult C Synthesis development kit are used as the software platform, and Altera Stratix III FPGA board is adopted as the hardware platform. The FPGA implementation architecture of the designed NMPC-PSO controller for engine ISC is shown in Fig. 2. The controller implementation architecture contains a phase-locked loop (PLL) module, an NMPC-PSO controller module, and a universal asynchronous receiver/transmitter (UART) RS232 communication interface module. The PLL module is a clock module and is used to generate the stable clock frequencies for the other two modules. The PLL module is implemented by utilizing the ALTPLL Megafunction, which is provided by Altera corporation and uses divide counters and a voltagecontrolled oscillator phase taps to perform frequency synthesis and phase shifts. The detailed implementation process of the NMPC-PSO controller module and the UART RS232 communication interface module is given as follows.

A. NMPC-PSO Controller Module This section describes the main architectural and algorithmic details for the design of the FPGA-based NMPC-PSO controller.

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Fig. 3. Random numbers generated by the designed LCG-based RNG. TABLE II F IXED -P OINT D ATA T YPES OF A LGORITHMIC C

Fig. 2. FPGA implementation architecture of the NMPC-PSO controller for engine ISC.

1) RNG: The PSO algorithm is a stochastic search method in which all particles start with randomly initialized velocities and positions and move randomly on a search space. Therefore, the PSO operation requires implementing a random-number generator (RNG) with a uniform distribution. In the offline simulation test, the MATLAB function rand() is used to generate random numbers. There is no direct substitute for this MATLAB function in the FPGA implementation. In this paper, the RNG function is developed using a linear congruential generator (LCG). The LCG algorithm is initially proposed in 1951 by Lehmer and is one commonly used pseudorandom number generator [42]. The LCG theory is relatively easy to understand, and it is fast and easily implemented. The generator is defined by the linear recurrence, i.e., Rn = (aRn−1 + c) (mod M ) rn =

Rn M

(25a) (25b)

where multiplier a, additive constant c, and modulus M are integers. Equation (25a) defines a sequence of integers modulo M starting with the initial speed R0 . Rn (n = 1, 2, . . .) is a sequence of integers with 0 ≤ Rn < M . The normalized sequence rn (n = 1, 2, . . .) is a random number sequence in [0,1). If the multiplier, additive constant, and modulus are properly chosen, then the period will be of maximal length. To obtain the maximal period and meet the demand of the PSO solver, the parameters of the LCG are chosen as R0 = 9, a = 27, c = 0, and M = 220 . The detailed principle for the selection of LCG parameters can be referred to [42]. The random numbers generated by the designed LCG-based RNG after 2000 iterations are shown in Fig. 3. From the result, it can be seen that the designed LCG-based RNG can generate random numbers with a uniform distribution and can satisfy the demand of the PSO solver.

2) Fixed-Point Arithmetic: While for software running on desktop-oriented platforms, the use of float-point arithmetic is usually unquestioned, for embedded platforms, fixed-point arithmetic is often preferred due to the superlinear relationship between word length and silicon resources [3]. Compared with float-point arithmetic, fixed-point computations can lead to shorter algorithm runtime and reduce the number of hardware resources required, since this reduces the size, cost, and power consumption of the FPGA device needed to realize the design. In this paper, the algorithmic C data types provided by Mentor Graphics Corporation are used for the fixed-point data design. Operators and methods on both the integer and fixedpoint types are clearly and consistently defined. The types are named ac_int and ac_fixed, respectively, and their numerical ranges are given by their template parameters, as shown in Table II. The template parameter W specifies the number of bits for the integer or the fixed-point number. The second parameter I of an ac_fixed is an integer that determines the location of the fixed-point. ture or false is the Boolean value that determines the signed integer or the unsigned integer. Table II indicates that based on the numerical range of each variable of the NMPC-PSO algorithm, we can design the arbitrary-length bitaccurate fixed-point data type for each variable to reduce the hardware resource consumption and improve the computational performance of the NMPC controller. The controller variables can be divided into four groups: constant, state variable, intermediate variable, and interface variable. For constant, the fixed-point bit-width can be easily determined according to the value of the constant. For state variable, the fixed-point bit-width is designed on the base of the numerical range and precision of the state variable that can

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TABLE III D ESIGNED F IXED -P OINT D ATA T YPES FOR M AIN C ONTROLLER VARIABLES

Fig. 5. Calculation process of the PSO algorithm.

Fig. 4. Comparison result between the fixed-point controller and the float-point controller.

be observed conveniently in a MATLAB simulation test. For example, random values r1 , r2 of PSO are in the range [0,1]; hence, the data type for r1 , r2 can be selected as ac_fixed(16, 0, false), which has no signed bit and integer bit. However, for some intermediate variable, it is difficult to obtain the numerical range. We can estimate the numerical range of the intermediate variable and reserve a certain margin. For instance, we can calculate the value of the fitness function F under the optimal solution inputs and obtain its range in [0, 200000]. However, we do not know its real numerical range under other solution inputs. Therefore, a certain margin is added to the obtained range [0, 200000], and the fixed-point data for fitness function F can be set as ac_fixed(42, 22, false). In this paper, the interface transmission data are the 16-bit original code; hence, the fixed-point data type for the interface variable is set as ac_fixed(16, 16, ture). For ease of fixed-point design, the normalized controloriented engine model (23) is considered. The designed fixedpoint data types for the main variables of the NMPC-PSO controller are given in Table III. To verify the solution accuracy of the fixed-point NMPC-PSO controller, we compare the throttle angle solved by the fixed-point NMPC-PSO controller with that solved by the float-point NMPC-PSO controller. The comparison result is presented in Fig. 4. The second subfigure gives the solution error between the two controllers. In the first 0.8 s, the control input is near 0 deg and requires high accuracy,

so the error is slightly larger; after 0.8 s, the error is almost zero. Therefore, the designed fixed-point NMPC-PSO controller has good solution accuracy and satisfies the control requirements. 3) PSO Solver: At every sampling instant, NMPC needs to solve a nonlinear optimization problem online using PSO; hence, the calculation process of PSO is the key point in algorithm acceleration. The following work is to analyze the parallel architecture of PSO. The PSO solver is an iterative method that allows one to trade off accuracy for computational time by varying the number of iterations. Rather than checking a termination criterion, this paper fixes the number of PSO iterations to tmax = 30, which is sufficient to obtain adequate accuracy, as observed in Section IV-B. The PSO algorithm has three loops that account for most of the computation at each solution. The calculation process of PSO is described in Fig. 5. Within Catapult C, using loops is one of the major ways to optimize a design. The computation performance can be enhanced by unrolling the for-loops properly (parallel programming), because the cyclic number of a for-loop determines the time it consumes. Loop unrolling refers to the number of times the loop body is copied. One condition for a loop to be unrolled successfully is that each cycle must be independent. Another condition is that the variable in the loop body should be in a register map instead of a memory map because RAM cannot be accessed by more than one user at a given time. However, the register map consumes much more hardware resources than the memory map consumes. In PSO, the first loop is used to update the particles from generation to generation until the maximum iteration number is reached. Owing to every generation being updated based on its ancestor, this loop cannot be unrolled because it violates the unrolling condition mentioned above. Loop 2 is used to update every particle in one generation, and each cycle is independent. In principle, loop 2 is suitable to be unrolled. However, the population of particles is usually large, and fully unrolling loop 2 will consume a large amount of hardware resources. Therefore, the problem of the tradeoff between time (running speed) and area (resource consumption) should be considered when enhancing the computation performance. Partially unrolling can provide an opportunity to achieve a compromise between time and area [35], [41]. Particles can be divided into certain groups, each owning an update process module, and these groups simultaneously update. The third loop is used to update one dimension of a particle, and every cycle is independent. The cyclic number

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TABLE IV S YNTHESIS R ESULTS OF THE D IFFERENT PSO A RCHITECTURES

Fig. 6. Timing diagram of handshake signals.

of loop 3 is equal to the number of control horizon, and it is usually small; therefore, loop 3 can be fully unrolled. In addition, the fitness function needs to be calculated 2 × tmax × nN times when solving the optimization problem with PSO at each sampling instant, and it is a numerical solution process of differential equations of system dynamics iteratively. Hence, fitness calculation is the bottleneck of the PSO algorithm. Due to each iterative cycle being dependent, these iterative cycles can use pipeline to further improve the computational performance. Within Catapult C, loop pipelining is not the same pipelining that RTL designers use. Loop pipelining is similar to the pipelining done in CPUs, where the second iteration/operation is started before the first one finishes. If loops are nested, internal loops can be pipelined to reduce latency. Based on the analyzed architectures for PSO, we develop the PSO solver in HDL using a Verilog HDL code generator tool Catapult C Synthesis. There are many HDL code generators, such as Mathworks HDL Coder, Altera DSP Builder, Xilinx System Generator, etc. Compared with these specialized tools, Catapult C is an independent and universal electronic design automation tool. Owing to being familiar with Catapult C, it is adopted for the FPGA implementation of the NMPC-PSO controller. It takes ANSI C/C++ inputs and generates RTL code targeted to FPGA. Designers can do iterations with Catapult C to pick their preferred micro architecture for specified performance and area constraints. Catapult C also has a graphic user interface with a visual view of the hardware circuit it is scheduling. In this paper, the analyzed architectures for PSO are validated for a swarm composed of 30 particles. The FPGA chip is selected as Altera Stratix III EP3SL150F1152. The clock frequency is set to 40 MHz. The synthesis results for the FPGA implementation of the different PSO architectures are presented in Table IV. “Cycles” and “Time” are clock cycles and time taken by the NMPC-PSO controller calculating one time. “Slack” is the allowable slack in the clock period. “Area” denotes the total hardware resources [lookup tables (LUTs)] consumed by the controller. In the PSO-V1 and PSO-V2 schemes, the variables Xi , Vi , Pi , Pg of PSO are in the memory maps and register maps, respectively, and there are both no loop unrolling. Compared with PSO-V1, PSO-V2 improves the computational speed at the expense of increased hardware resources. In the PSO-V3 scheme, loop 3 is fully unrolling, in which there is no calculation of the fitness function. By fully unrolling loop 3, the computational time is decreased by 0.123 ms. The PSO-V4 scheme divides the particles into three groups and partially unroll loop 2. Moreover, the initiation interval of pipeline for the fitness function is set to 4. The computational time of PSO-V4 is reduced by 0.247 ms, whereas the resource consumption is increased by 8349 LUTs. These schemes do not give a huge decrease in computational time because the

calculation of the fitness function is the computational bottleneck, which is complex and cannot use parallel computing. However, the solution process of the designed PSO solver is fast enough such that it can be finished within one sampling interval of 10 ms and meet the computational performance. The synthesis results show that the FPGA-based NMPC-PSO controller can achieve better processing speed by nicely designed architecture when hardware resources are available. In the consideration of both time and area, the PSO-V2 scheme is utilized for the final implementation. B. UART Interface Module From the FPGA implementation architecture of the controller in Fig. 2, it can be seen that the UART interface module includes a receiver block and a transmitter block. TXD is the transmit side, the output of UART; RXD is the receiver, the input of UART. The receiver block is used to receive the serial signals Pm , N, TL of the engine plant at RXD. The transmitter block is in charge of transmitting the control input α to the engine plant through TXD. The UART interface module is implemented by coding in pure Verilog HDL language. To obtain the correct data transmission between the controller and plant, the sender and the receiver should be identically configured. The detailed communication protocol is set as follows. • The baud rate is set to 115 200 b/s. • The UART frame format has one start bit, 8 data bits, one stop bit, and no parity bit. • One entire data have 16 bits with the high-order 8 bits being sent first. According to the communication protocol, the extra latency introduced by the UART RS232 link can be calculated by (3 + 1) × 2 × (1 + 8 + 1) bits = 0.694 ms. 115 200 b/s

(26)

The solution time of the PSO-V2 scheme in Table IV is 2.561 ms; hence, the total NMPC controller latency is 2.561 + 0.694 = 3.255 ms. When the design of the UART interface is finished, it is integrated with the NMPC controller module in the top file by coding in Verilog HDL. We connect these two modules by using handshake signals. The timing diagram of handshake signals is given in Fig. 6. There are two states in the signal line, using logic 1 (high) and logic 0 (low) to distinguish, respectively. When the start signal turns from 0 to 1, the NMPC controller starts to read the received data and perform the calculation process. Meanwhile, the done signal is maintained at 0. When the controller obtains the solution, the done signal turns from 0 to 1 and informs the transmitter to send the data.

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TABLE V H ARDWARE R ESOURCE U TILIZATION

Fig. 7. Test platform based on the FPGA board and the xPC-Target system.

Finally, the top HDL model is synthesized, mapped, and routed in Quartus II; then, a hardware configuration file is generated and downloaded into the FPGA board through a JTAG cable for performing board-level verification. Table V shows the detailed logic resource utilization of the designed NMPC controller implemented on a Stratix III (EP3SL150F1152) FPGA chip. It can be seen that this FPGA chip could be used to implement a reasonably sized NMPC controller comfortably. VI. E XPERIMENTAL R ESULTS For validating the FPGA-based NMPC controller, a prototyping platform based on an FPGA board and an xPC-Target real-time system is built and shown in Fig. 7. xPC Target is a solution for prototyping, testing, and deploying a real-time system using standard personal computer (PC) hardware. It provides an environment that uses a target PC, which is separated from a host PC for running real-time applications. The FPGA board is the hardware implementation of the NMPC-PSO controller. The engine model is established in the host PC and then is downloaded to the target PC after compiling. PC1 runs the FPGA design tools (Quartus II and Catapult C) and is used to design the NMPC-PSO controller. The result data exchanged between the FPGA-based controller and the engine plant on the target PC are transferred through the UART RS232 serial link. The following real-time experimental tests are performed by using not only the established nonlinear mean value engine model but also the high-precision enDYNA engine model as the plant. A. Experimental Results of Controlling Constructed Engine Model In this section, the designed FPGA-based NMPC-PSO controller is evaluated by the experiment on the constructed engine

Fig. 8. Tracking performance of controlling the constructed engine model.

model. As in the offline simulation, the disturbance rejection test is considered in the hardware-in-the-loop test. The real-time tracking performance of controlling the constructed engine model is depicted in Fig. 8. The experiment results are just the same as the offline simulation results in Fig. 1. From the results, it can be seen that the designed controller can make the engine track the reference speed from an initial speed within 0.8 s. When the disturbance torque emerges and changes at 5, 10, and 15 s, the controller can maintain the engine speed at 800 r/min rapidly, and the speed will not change to more than 20 r/min. Moreover, the system constraints are well satisfied. The results indicate that the FPGA-based NMPC controller can achieve satisfactory performance and deal with the ISC problem well. B. Experimental Results of Controlling enDYNA Engine Model Owning to the established engine model in Section IV-A mainly focusing on the air path and assuming the ideal air ratio control with neglecting the influence of the spark advance variation, the actual control performance of the air fuel ratio and the variation of spark advance may cause performance deviation in ISC. Therefore, the high-precision enDYNA engine model supplied by TESIS DYNAware is used to further verify the efficiency of the FPGA-based controller. The enDYNA model used for closed-loop functional validation is a four-cylinder 2-L

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VII. C ONCLUSION

Fig. 9. Tracking performance of controlling enDYNA engine model.

gasoline engine. It is a powerful, modular, and flexible model of engine built in MATLAB/Simulink. The enDYNA engine model consists of five components: engine system, drive train, cooling system, powernet system, and ECU emulator. These components are absolutely indispensable in the real vehicle. Therefore, enDYNA has the ability to simulate almost every dynamic behavior of the real engine with high precision. In this experiment, the throttle angle is obtained by the NMPC controller instead of the throttle ECU in enDYNA. In this section, a scenario for an engine from startup to idle mode is simulated. The experimental result of controlling the enDYNA engine model is given in Fig. 9. At the first part (0–6 s), it simulates that the engine is started by a starter from cooling to warming, and a small step of gas pedal is given to keep the engine running in a stable speed (about 950 r/min) for a while. At the second part (6–20 s), the designed idle speed controller is connected to do speed tracking. In the engine management system of the vehicle productions, the idle speed controller works only when there is no gas pedal signal or no gear signal. The disturbance load torque is generated from the inherent “external load torque” interface of the model to simulate the unknown load in practice. One complete cycle of an engine contains four piston strokes: intake, compression power, and exhaust. The engine speed is fluctuant in practice; hence, the throttle angle is also fluctuant. However, in practice implementation, due to the actuator dynamics, the throttle angle will not fluctuate. From the results, it can be seen that the controller can make the engine track the reference speed rapidly. When the disturbance comes in at 10 s and disappears at 15 s, the controller can rapidly maintain the engine speed to 800 r/min. From the zoomed-in screenshot figure of the top subfigure, the maximum deviation of engine speed is less than 50 r/min. Therefore, the designed controller also does well in the enDYNA, and the tracking performance is satisfactory.

This paper has demonstrated the successful implementation of an FPGA-based NMPC controller. To better fit with the parallel architecture of FPGA, the PSO with the penalty function approach is used as the embedded optimization algorithm. This designed NMPC controller is applied to the engine ISC system to fulfill its high requirements on online computing efficiency. The detailed implementation architecture of the FPGA-based NMPC-PSO controller is given, including RNG, fixed-point arithmetic, PSO solver, and UART RS232 communication interface. With the help of parallel architecture of FPGA and the parallel search nature of PSO, the NMPC controller solves quickly and provides the solutions within the available sampling interval. The nonlinear engine model for controller design is established, and a prototyping platform based on the FPGA board and the real-time simulation system is built for the closed-loop test application. Finally, the constructed engine model and the high-precision enDYNA engine model are used as the plant, respectively, to evaluate the proposed controller. Experimental results illustrate that the FPGA-based NMPC controller has good computational performance, achieves satisfactory control performance for the engine ISC, and is successfully applied to the automotive system with millisecond timescales.

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Fang Xu received the B.S. degree in automation and the Ph.D. degree in control theory and control engineering from Jilin University, Changchun, China, in 2009 and 2014, respectively. She is currently a Lecturer with the Department of Control Science and Engineering, Jilin University. Her current research interests include model predictive control, optimization methods, and field-programmable gate arrays.

Hong Chen (M’02–SM’12) received the B.S. and M.S. degrees in process control from Zhejiang University, Zhejiang, China, in 1983 and 1986, respectively, and the Ph.D. degree in system dynamics and control engineering from the University of Stuttgart, Stuttgart, Germany, in 1997. Since 1999, she has been a Professor at Jilin University, Changchun, China, where she currently serves as Tang Aoqing Professor and as the Director of the State Key Laboratory of Automotive Simulation and Control. Her current research interests include model predictive control, optimal and robust control, nonlinear control and applications in mechatronic systems focusing on automotive systems.

Xun Gong (S’13) received the B.S. degree from Northeast Dianli University, Jilin, China, in 2010. He is currently working toward the Ph.D. degree in control theory and engineering at Jilin University, Changchun, China. His research interests include advanced engine control and optimization.

Qin Mei received the B.S. degree in automation from Jilin University, Changchun, China, in 2014, where he is currently working toward the M.S. degree in control theory and control engineering. His current research interests include model predictive control and field-programmable gate arrays.