International Conference on Computer Systems and Technologies - CompSysTech’08
FPGA Platform Based Digital Design Education Dmitri Mihhailov, Margus Kruus and Alexander Sudnitson Abstract: This paper gives an overview of how the FPGA (field-programmable gate array) technology is integrated into digital design educational process at Tallinn University of Technology (TUT). Paper focuses on the set of laboratory exercises introduced for “Advanced Digital Design” (IAY0080) course taught to postgraduate students, covering equipment, software and methodology, as well as plans for future improvements. Key words: FPGA (field-programmable gate array), FPGA-based development boards, digital design education.
INTRODUCTION With the constant growth of integration level, todays circuits contain way over million of gates. However, this also makes circuit validation more sophisticated. Digital system development usually requires fabrication of a test prototype. While prototype itself turns out to be quite expensive, the significant delays required for its fabrication are also introduced. Furthermore, the prototype is made fairly late in the development cycle, as the entire design must be specified first. Debugging also becomes more complicated and takes longer to execute. FPGA technology promises to help in overcoming these problems. FPGA-based development boards are both low-cost and portable. Reprogrammability of FPGAs makes it possible not only to implement and verify the full design itself, but also to build early prototypes of the subcircuits using the same development board. This flexibility is particularly valuable if the system is likely to be modified either to improve performance, or to add new features or due to the change of standards. Rapid prototyping is a fairly recent concept that allows to build complex circuits in a relatively short time. It has been adopted in a wide spectrum of industries as a way to reduce costs and cut down the time to market. The use of FPGA technology to implement and evaluate prototype designs is the key point of rapid prototyping methodology. FPGA device configuration can be done almost instantly compared to the fabrication time of the test board. That is what the term “rapid” stands for. Some may argue that developing a prototype for FPGA is also time-consuming and require additional time and resources, thus delaying the project as well. However, this disadvantage is negligible compared to the amount of time and effort required for manufacturing of a custom VLSI device. In recent years, the approach for teaching practical part of digital design was mostly simulation-based. Building a custom VLSI device to test the design does not seem as a viable solution. High costs and fabrication delays prevent this approach from being used by most of todays universities. The appearance of FPGA technology introduced an attractive alternative. Low-cost FPGA-based development boards provide fast design cycles and minimize costs due to hardware reusability. The rest of the paper is divided into five sections. The following section gives a brief overview of how FPGAs are used for educational purposes throughout the world. Third section focuses on equipment and software used at TUT for practical classes of the “Advanced Digital Design” (IAY0080) course. Fourth section gives an overview of the basic grade tasks for the above mentioned course. Fifth section gives an overview of the advanced grade tasks for the above mentioned course. Sixth section presents results and gained experience, as well as plans for future improvements. FPGA TECHNOLOGY IN DIGITAL DESIGN EDUCATION Digital Design courses are offered at technical universities throughout the world. However, there is still an extensive search over the best way to organize them. As a rule, - IV.4-1 -
International Conference on Computer Systems and Technologies - CompSysTech’08
instructors employ laboratory exercises to introduce the practical side of the course, but most of them are taking a simulation-only approach. Some universities offer the possibility of building an actual VLSI prototype. However, it remains a rare practice due to the costs involved. And that is where FPGA technology may come into play. The use of FPGA technology in digital design education can add a certain level of realism to the learning experience. Apart from extensive simulation and synthesis, it would be possible to perform a final verification on a hardware prototype. And it may simply help to boost students' motivation, as they see their ideas actually implemented and working. Digital Design involves making trade-offs such as area vs cycle time vs power [1]. When making an actual hardware implementation of the project, these trade-offs become more clear and real. Implementation of the design completes with the generation of a report, which presents area and resource usage, timing and power estimations. This data can be used to evaluate the quality of the design. Of course, FPGA implementation is not directly connected with custom silicon implementation. But the process of evaluating the design, finding the bottlenecks and balancing trade-offs remains. FPGA-based development boards find more or less similar application in digital design education. As a rule, a set of laboratory exercises starts out with a simple tutorial and implementation of some basic circuits, and completes with processor assembly [4]. Most often, tasks in the middle are concentrated on individual parts of the future processor, while during the final assignment these modules are put together and the whole processor functionality is verified. Apart from using FPGAs simply as a prototyping vehicles, some courses are devoted to FPGAs themselves [6]. This includes studying programmable logic devices' history, architecture, tools, design flow, learning to efficiently use FPGA resources. Moreover, the functionality of other components featured on the board plus communication with external devices attached through extension headers is explored as well. This includes interfacing the VGA monitor, LCD display module, a touchscreen, memory modules, communicating with keyboard or mouse, or even carrying out wireless configuration of FPGA device. Hardware/Software co-design can also be practised using FPGA-based boards. Using a set of intellectual property (IP) cores, which include soft-processors, various controllers for memory and standard interfaces, along with custom hardware, a fully working computer can be implemented. This approach has been termed System on a Programmable Chip (SoPC) [2]. The application programs for the processor can be typically written in C or C++ and compiled with GNU compiler provided with manufacturer's processor core tools. Along with the virtual part of FPGA design process, a number of universities offer a piece of real action [5]. Students purchase a lab kit, which contain printed circuit board and components. At the beginning of the course, students learn to solder, then assemble and debug their board. A special attention is also paid to fault-tolerance and troubleshooting issues. This custom board is then used to undertake a series of laboratory assignments. Besides the laboratory exercises, a project assignments are often employed. They puts the acquired knowledge and skills for the final test. Usually, students are free to choose the task and are allowed to work in teams. When finished, students give a presentation of the end-product and may even be asked to write an article-like paper, depicting the methodology used, results and conclusions. Apart from technical issues this kind of exercise is also intended to improve such skills as teamwork, communication, time planning. LABORATORY EQUIPMENT AND SOFTWARE The use of FPGA-based development boards was a rare practice at TUT until recently. Thus, when it came to integration of such devices into digital design educational process, there was not much experience to relay on. It is noted, that students usually fulfill - IV.4-2 -
International Conference on Computer Systems and Technologies - CompSysTech’08
assignments in an iterative way. They first develop a part of the future design and test (simulate) it. Then new features are added to the prototype and it is tested again. This process goes on and on until the full design is specified. This feels like a natural way to design a digital system. However, this is actually a rapid prototyping technique introduced earlier. Insertion of a FPGA-based development board into this process seems natural and does not harm the way of things students are used to. This set of laboratory exercises was prepared to support the practical part of the “Advanced Digital Design” (IAY0080) course taught to postgraduate students. Tasks imply the knowledge of C/C++ and a hardware description languages (preferably VHDL). Previous acquaintance with development software is a plus (as the learning curve may take awhile), but not obligatory. This problem is likely to be solved in the near future, as introduction to the basics of FPGA design flow and tools is being given to undergraduates as well. Students are provided with three models of development boards: Digilent's [8] Spartan-3 Starter Kit board and Spartan-3E Starter Kit board (Figure 1.a), and SLS's [9] UP3 Education Kit board (Figure 2.b). These are low-cost and powerful educational tools for prototyping and development of digital systems. Boards feature FPGAs from Xilinx [10] and Altera [7], two of the leading programmable logic devices manufacturers. Boards also carry a wide range of industry standard interconnections, memory subsystems and expansion headers.
a) b) Figure 1: a) Spartan-3E Starter Kit board; b) UP3 Education Kit board Manufacturers provide all the necessary software for FPGA design flow (Integrated Software Environment (ISE) WebPack [10] for Xilinx devices, Quartus-II Web Edition [7] for Altera devices). The design suites support all steps of the FPGA design flow (design entry, simulation, synthesis, translation and device configuration). Both may be freely downloaded (after registration) by students, which permits to continue working on projects outside university. For SoPC design an additional tool from Altera is needed for software development - Nios-II Integrated Development Environment (IDE) [7]. It may also be freely downloaded along with a set of IP cores. However, in order for IP cores to work, the board must be attached to the host computer. As a rule, laboratory exercises are organized in either of two different ways. The assignment can be carefully prepared and include examples of good design practices. This way students would simply have to follow the predefined steps to complete the task. On the other hand, students may be allowed to take the full ownership of the design. Only the task is issued and no particular demands concerning implementation are given. Both - IV.4-3 -
International Conference on Computer Systems and Technologies - CompSysTech’08
approaches (or their combination) are employed in the following laboratory course. Exercises are divided into two parts: basic grade and advanced grade. Basic tasks consist of relatively easy individual assignments, while advanced tasks features more complex assignments and are team-oriented. BASIC GRADE For basic grade tasks Spartan-3 Starter Kit board and Spartan-3E Starter Kit board are used as implementation platforms. Basic grade consists of five exercises: one tutorial and four practical tasks. One class (consisting of two academic hours) is spent for every task of the basic grade. The tutorial exercise provides an introduction to the process of creating and implementing designs using Xilinx ISE WebPack software. This exercise explores the basics of creating a project using Schematic Editor and HDL language, pin assignment, creation of the BIT-file and configuration of the FPGA device, which are common for every project. The first practical exercise concentrates on the synthesis of a simple finite-state machine. Each student is given an individual algorithm, which is then implemented twice: using schematic design entry and using a Hardware Description Language (HDL) design entry (in VHDL). At the early stages of computer engineering education schematic capture is used as a primary method for design entry. Before transitioning to HDL, it is important to establish a link between hardware and the HDL, which is to be used for describing it later. Each design is then simulated with in-built Xilinx ISE Simulator software. The rest of the practical exercises may be viewed as a set of individual mini project assignments. Only the functional description of the board's components is provided. The tasks do not feature any constraints or certain requirements concerning implementation. Students are free to choose any methodology they like, thus showing their knowledge and creativity. For the second practical exercise students output a short message, running on four seven-segment displays (creeping line). Students learn to handle time-multiplexed data output, to generate required clock frequencies from the reference clock source. The circuit may be later used for debugging of future projects. The third exercise requires to drive a computer monitor and output either some text or a simple picture on the screen. Timing information for different display modes is provided in the task description, as well as some video generation techniques, although their use is not obligatory. In the fourth exercise a digital locking mechanism is to be implemented. The code sequence is entered from the keyboard. Students learn to handle a serial data transmission using a simple PS/2 protocol. ADVANCED GRADE For advanced grade tasks UP3 Education Kit board is used as implementation platform. Advanced laboratory exercises are more team-oriented due to increase in the complexity. Task are also project-like and have no restrictions for implementation. There is some overlapping with the basic grade, so it may be possible to reuse some of the previous designs. Advanced grade consists of five exercises: two tutorial and three practical tasks. One class (consisting of two academic hours) is spent for every tutorial task of the advanced grade. Tasks two and three take two classes. Three classes are given for preparation of the fifth task and the last two classes are reserved for final presentations. The tutorial exercise introduces the design flow for Quartus II Web Edition software, including project creation, design entry (schematic and HDL), simulation, project compilation and FPGA device configuration. - IV.4-4 -
International Conference on Computer Systems and Technologies - CompSysTech’08
For the first practical exercise students implement a mouse cursor on computer monitor screen. Task partly overlaps with basic grade exercises (video signal generation, PS/2 protocol), so it is possible to reuse some design elements. However, now the task is not only to provide interface to each individual device, but to make them work together. This concept is further employed in the next task as well. The second practical exercise involves implementation of a stop-watch timer. The on-board real-time clock (RTC) is used to measure the time interval. Data transfer goes over the I2C bus. The decoded time value is shown on LCD display module. Students learn the basics of I2C protocol and arrange a bidirectional flow of data over the bus. They also get acquainted with programming of a LCD display module, which may be used for debugging in later projects. The second tutorial exercise provides an overview of SoPC design flow. It is based on tutorials from Chapter 16 and Chapter 17 of [3] with some adjustments and modifications. The term System on a Programmable Chip refers to the combination of processor core with custom hardware, which is implemented using FPGA logic elements and memory blocks. SoPC development consists of hardware and software design. The software is written in C or C++ and compiled using a stand-alone tool (Altera's Integrated Development Environment for Nios II). The hardware part is implemented using SoPC Builder tool provided with Altera's Quartus II Web Edition software. Students are guided through all the basic steps of hardware design (instantiation and configuration of Nios-II processor and peripherals) and software development (writing of a simple test program). For the final practical exercise students are asked to implement an advanced (compare to the one in the second tutorial) SoPC and give a brief presentation of their product during the last class. By giving the students a complete freedom in task choice and implementation methodology, it would be possible to evaluate the level of training received during the course, based on the outcome. To raise the interest and to increase students' involvement, final project is conducted in the competitive manner. Special bonuses are given to the team, which finished the project first, proposed and accomplished the most interesting assignment, gave the most inspiring presentation. Students also participate in the evaluation by making comments and expressing their opinion on the presentations of colleagues. CONCLUSIONS AND FUTURE WORK This set of laboratory exercises has now been used for two years at TUT. The main goal was to find a compromise of what students would like to do and what they are actually able to fulfill. Judging by the results, the course proved to be successful in this aspect. The majority of students managed to finish both grades in time. Students' feedback on the course was also collected in order to further improve the quality and to find new ways, means and tools, that would help to boost students' interest and motivation. Students enjoyed project-like nature of the assignments and were very active in proposing their own tasks and ideas. Future plans include projects involving implementation of a network of FPGA-based development boards, introduction of reconfigurable computing basics, employing elements of robotics (however, this would require additional hardware). REFERENCES [1] Jan Gray, Hands-on Computer Architecture – Teaching Processor and Integrated Systems with FPGAs, Workshop on Computer Architecture Education, Vancouver, BC, 2000. [2] Tyson S. Hall, James O. Hamblen, System-on-a-Programmable-Chip Development Platforms in the Classroom, IEEE Transactions on Education, pp. 502-507, vol. 47, no. 4, November 2004. - IV.4-5 -
International Conference on Computer Systems and Technologies - CompSysTech’08
[3] J. O. Hamblen, T. S. Hall, and M. D. Furman, Rapid Prototyping of Digital Systems Quartus II Edition, Springer Science+Business Media, Inc., 2006. [4] David Harris, The Microprocessor as a Microcosm: A Hands-on Approach to VLSI Design Education, 32nd ASEE/IEEE Frontiers in Education Conference, 2002. [5] Sarah Harris, David Harris, Inexpensive Student-Assembled FPGA / Microcontroller Board, Microelectronics Systems Education Conf., pp. 101-102, June 2005. [6] V. Sklyarov, I. Skliarova, "Teaching Reconfigurable Systems: Methods, Tools, Tutorials and Projects", IEEE Transactions on Education, vol. 48, no. 2, May 2005, pp. 290-300. [7] Altera Corporation. http://www.altera.com/ [8] Digilent, Inc. http://www.digilentinc.com/ [9] SLS Corporation. http://www.slscorp.com/ [10] Xilinx, Inc. http://www.xilinx.com/ ABOUT THE AUTHOR Ph.D. Student Dmitri Mihhailov, Ph. D. Assoc. Prof. Margus Kruus, Ph.D. Assoc. Prof. Alexander Sudnitson, Department of Computer Engineering, Tallinn University of Technology, Raja 15, 12618 Tallinn, Estonia, Phone: +372 620 2251, E-mail:
[email protected]
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