2012 Third International Conference on Intelligent Systems Modelling and Simulation
GA-based Optimization for Circuit Design Assistance
Lim Wei Jer, Gerald Lee Jun Xiong, Siew Chin Neoh*
Arjuna Marzuki School of Electrical and Electronic Engineering Universiti Sains Malaysia Penang, Malaysia e-mail:
[email protected]
School of Microelectronic Engineering, Universiti Malaysia Perlis (UniMAP) Perlis, Malaysia e-mail:
[email protected]
optimize the design parameters for a 5-GHz MMIC LNA and a 15.12-GHz SPDT switch respectively.
Abstract— This paper presents a Genetic Algorithm (GA) based optimization approach for assisting circuit design. The GA is developed to optimize the parameter setting for circuit design in order to achieve the required specifications in terms of noise figure, power gain, power loss, current, and circuit stability factors. Two case studies are presented in this paper: 15.12 GHz single pole double throw (SPDT) switch design and 5 GHz MMIC monolithic microwave integrated circuit (MMIC) Low Noise Amplifier (LNA) design. The Agilent Advance Design System (ADS) is adopted to simulate the circuit performance of SPDT switch and MMIC LNA. The developed GA is compared to a number of built-in optimizer of ADS. Based on the results obtained, GA is shown to be capable in assisting circuit designs, solving the crucial circuit parameters for achieving the required specifications, preference and constraints.
II.
According to [7], many LNA designs [8-9] concentrated on high power supply which focuses in increasing the gain instead of noise figure. Noise figure is a vital to be considered in the LNA design. In this research, the design of MMIC LNA involves several constraints and objectives. These include achieving the circuit stability factor, reducing the noise figure, increasing the power gain and minimizing the drain current. The MMIC LNA schematic is obtained from [10]. However, the target frequency for this case study is 5-GHz instead of 3GHz. The schematic diagram of MMIC amplifier circuit is depicted in Figure 1. A two-stage RC feedback amplifier is used with M1 and M2 refer to the transistors with unit gate width of 50μm. Ccc is a coupling capacitor between stage 1 and stage 2. The design variables to be tuned for achieving the required constraints and objectives are listed in Table 1. The design variables in Table I are manipulated to achieve the required specifications and objectives shown in Table II. In this study, the optimization mode involves minimization as well as maximization. For instance, noise figure (NFmin_out) and drain current (ID) are to be minimized whereas power gain (dB(S(2,1))) is to be maximized. As for the stability factors (mu_load and mu_source), the aim is to achieve the constraints limitation so as to stabilize the LNA.
Keywords- Genetic algorithm, MMIC low noise amplifier, SPDT switch
I.
INTRODUCTION
Genetic algorithms (GAs) have been widely known for its robustness in solving tough and miscellaneous problems based on function optimization through evolutionary computation [1-3]. In circuit design, power gain, power loss, noise figure, current, and circuit stability are the crucial specifications to be achieved. Conventionally, with the availability of circuit simulation system, many circuit design parameter tuning is carried out in a trial-and-error manner. Although this is the most straight forward and simple approach, it is time consuming and not much convincing. This paper proposed the use of GA as a systematic approach to assist circuit simulation system for searching the best parameter setting in order to fulfill the circuit design specifications or objectives. GA is a stochastic optimization approach that mimics the biological evolution of human genetics. The GA search is guided by the probability of the survival of the chromosomes with better fitness. The robustness of GA in circuit design has been shown by a number of researchers. For instance, [4] applied GA for the structural cell-based VLSI circuit design and claimed the satisfaction in multiple output circuit criteria. Besides that, it is also commented in [5] that GA is usable for designing RF circuits. In addition, [6] which employed GA in LNA further convince the capability of GA in synthesizing the analogue circuit. In this research, the Agilent Advanced Design System (ADS) in combination with the GA optimizer is used to simulate the circuit performance and 978-0-7695-4668-1/12 $26.00 © 2012 IEEE DOI 10.1109/ISMS.2012.46
MMIC LOW NOISE AMPLIFIER CIRCUIT
Figure 1. MMIC low noise amplifier circuit [10]
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DESIGN VARIABLES FOR MMIC LNA
TABLE I.
Design Variables
Symbol
From
To
Feedback Resistor (Ohm) Finger Value
RFB
10
550
Finger
2
10
CFB
4
7
ROUT
100
300
COUT
2
20
RIN
500
1000
CIN
2
20
LFB
1
10
CCC
1
20
RS
5
50
CS
1
100
RS2
5
50
Feedback Capacitor (pF) Output Resistor (Ohm) Output Capacitor (pF) Input Resistor (Ohm) Input Capacitor (pF)
Feedback Inductor (nH) Coupling Capacitor (pF) Source Resistor (Ohm) Source Capacitor (pF) Second Stage Source Resistor (Ohm)
TABLE II.
Figure 2. Schematic diagram for 15.12-GHz Switch
In this circuit, the main parts to be concerned are transistors CPW5, CPW6 and resistors RFB2, RFB3, RFB4 and RFB5. These six variables are later to be optimized and tuned. The target design of the SPDT switch is to achieve low insertion loss and high isolation between the inputs and outputs of the switch. Table III and Table IV show the design variables and the required specifications for the designed SPDT switch respectively. The aims for the design are to maximize isolation (dB(S(2,1)) and minimize the insertion loss (dB(S(3,2)).
THE REQUIRED SPECIFICATIONS FOR AMPLIFIER OPTIMIZATION
Specifications
Value Range
Optimization
Weight
minimum
maximum
NFmin_out(dB)
-----
2.5
Minimize
5
dB(S(2,1))
17
20
Maximize
1
mu_load
1.05
-----
-----
1
TABLE III.
DESIGN VARIABLES FOR SPDT SWITCH
mu_source
1.05
-----
-----
1
Design Variables
ID(A)
0.04
0.05
Minimize
10
RFB2 (Ohm) RFB3 (Ohm)
III.
To
1469.5 97.12
4408.5 291.36
RFB4 (Ohm)
800
3000
RFB5 (Ohm)
97.12
291.36
CPW5 (NOF)
2
10
CPW6 (NOF)
2
10
SPDT SWITCH DESIGN
The ideal switch is often used in circuit analysis; however, practical switches have losses and limitations [11-13]. The key merit indicators for the design of SPDT switch are insertion loss, isolation and power dissipation [14-16]. This paper demonstrates GA capability in optimizing the design of a SPDT switch. Figure 2 shows the schematic of the 15.12-GHz SPDT switch in ADS. It consists of four transistors which are CPW1 and CPW3 with unit gain width of 80um and CPW5, CPW6 consists of 150um and 80um individually. Transistor CPW5 and CPW6 perform the main on and off switching function, while the shunt transistor CPW1 and CPW3 are cascaded to CPW5 and CPW6 respectively. On the other hand, the gate resistance, RFB2, RFB3, RFB4 and RFB5 are implemented to improve DC isolation.
From
TABLE IV.
THE REQUIRED SPECIFICATIONS FOR SPDT SWITCH OPTIMIZATION
Specifications
Optimization Value Range minimum
Isolation dB(S(2,1)) Insertion dB(S(3,2))
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-------5
Weight
maximum -20
maximize
4
0
minimize
1
IV.
The results obtained will be compiled for fitness assignment of chromosome.
GA-ADS OPTIMIZER
In this paper, a GA-ADS optimizer is developed. First, a population of N chromosomes which represent the design variables are randomly initialized. The performance of each chromosome is simulated through the ADS. Based on the performance, the fitness of the chromosome is evaluated using the normalized weightedsum approach. The optimization mode for each specification is considered in the termination criteria. When the required specifications are satisfactory, the GA operation will be terminated. Otherwise, the model will proceed with the GA operations of crossover and mutation. The loop of ADS simulation and fitness evaluation will be repeated until the termination criteria are achieved. Figure 3 depicts the flow of GA-ADS model.
C. Fitness Assignment It is important to assign fitness to each individual specification because the respective constraints are different and the optimization modes are also different. However, the overall GA model used in this paper is based on the minimization of overall fitness. For specifications that do not comply with the constraints given, a penalty value of α will be given to the individual specification fitness. For instance, in the case of MMIC LNA, there are a total of five specifications: noise figure, gain, stability factors (mu_load & mu_source), and drain current. Equations (2-6) show the fitness function evaluation for each individual specification: α + (NFmin_out - 2.5), if NFmin_out > 2.5 ° F1 = ®α + (0.1 − NFmin_out), if NFmin_out < 0.1 °NFmin_out - 0.1, if 0.1 < NFmin_out < 2.5 ¯
(2)
α + (dB(S(2,1)) − 20), if dB(S(2,1)) > 20 ° F2 = ®α + (17 − dB(S(2,1))), if dB(S(2,1)) < 17 °20 − dB(S(2,1)), if 17 < dB(S(2,1)) < 20 ¯
(3)
α , if mu_load < 1.05 F3 = ® ¯0, if mu_load > 1.05
(4)
α , if mu_source < 1.05 F4 = ® ¯0, if mu_source > 1.05
(5)
α + (0.04 − ID), if ID < 0.04 ° F5 = ®α + (ID − 0.05), if ID > 0.05 °ID - 0.04, if 0.04 < ID < 0.05 ¯
(6)
As different specifications with different unit are involved, this research used a normalized function to reduce the possible bias that could arise. The normalized function as shown in (7) is adopted from [17] in which the total fitness assigned to each chromosome, Fjtot, is equal to the sum of the specification’s fitness divided by the average fitness of the respective specification.
Figure 3. Flow chart of GA-ADS model
A. Initialization N numbers of string-based chromosomes with a length of d-dimensions are randomly generated based on the allowable range of design variables. Infeasible solutions which do not fulfill the design range will be repaired to ensure that N numbers of feasible chromosomes are generated. If Ci refers to the jth chromosome in the population, Cj, can be mathematically represented as Cj= [Cj1, Cj2, Cj3,…,Cjd] , where j=1,2,....,N (1)
m
F jtot =
¦W
i
i =1
Fi Fi average
(7)
where i=1,2,3...m refers to the specification i, Wi represents the preference weight given to specification i, and Fi indicates the fitness of specification i. .
D. Selection and Reproduction A generation gap of 0.9 is used to allow 90% insertion of better fitness offspring into the following generation. In other words, 10% chromosomes from the previous generation will be kept to retain certain features of the
B. ADS Simulation Each chromosome will undergo the ADS circuit simulation for assessing the specification performance.
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optimizers satisfied the circuit stability factors, the GAADS model gives lowest noise figure and highest power gain. As for Least-Pth, the gain obtained exceeds the maximum allowable range in Table II. In terms of drain currents, GA-ADS is slightly higher than the Minimax approach. However, it should be noted that the slight increase of drain current in GA-ADS is very much compensated by the noise figure and power gain. Overall, GA-ADS gives a better performance in the 5-GHz MMIC LNA design.
design variables based on the fitness assigned. Chromosomes with better fitness will stand for a higher chance to be selected for undergoing the genetic operations of crossover and mutation. In the crossover process, the randomly selected design variables between two chromosomes are inter-exchanged. As for mutation, the randomly selected design variable from the selected chromosome will be altered.
E. Termination Criteria In this research, the aim is to generate a desired circuit design that complies with the specification requirements. Thus, the GA-ADS mechanism loop will be terminated once the specifications reached the satisfactory.
V.
B. 15.12-GHz SPDT Switch Based on Table IV, the weight preference given to isolation loss is 4 whereas the weight preference given to insertion loss is 1. The idea is to maximize the isolation and minimize the insertion loss. From the results shown in Table VII, the designed SPDT switch shows good insertion loss and isolation at the optimum value. Table VIII shows the optimized variables suggested by GAADS whereas Figure 4 and 5 shows the isolation loss and insertion loss with respect to the frequency variation.
RESULT AND DISCUSSION
A. 5-GHz MMIC LNA Based on the proposed model, the results obtained are compared with a number of built-in optimizers in ADS. Table V shows the optimized design variables for the MMIC design whereas Table VI depicts the specification performance. The GA-ADS model is compared to Least Pth, Random, and Minimax built-in approaches in ADS. TABLE V.
OPTIMIZED DESIGN VARIABLES FOR MMIC AMPLIFIER USING GA-ADS
TABLE VI.
Optimizer Least Pth Random Minimax GA-ADS
TABLE VII.
Design Variable
Value
RFB (Ohm)
149
Finger
10
CFB (pF)
4
ROUT (Ohm)
123
COUT (pF)
19
RIN (Ohm)
834
CIN (pF) LFB (nH)
SPDT SPECIFICATION PERFORMANCE OF DIFFERENT OPTIMIZER Optimizer
dB(S(2,1))
dB(S(3,2))
GA-ADS
-24.183
-3.74
Least Pth
-31.539
-3.565
Random
-31.559
-3.582
Minimax
-31.54
-3.566
TABLE VIII.
OPTIMIZED DESIGN VARIABLES FOR SPDT SWITCH USING GA-ADS Design Variables
Value
18
RFB2 (Ohm) RFB3 (Ohm)
1100 226
6
RFB4 (Ohm)
266
CCC (pF)
10
RFB5 (Ohm)
1498
RS (Ohm)
47
CPW5 (NOF)
3
CS (pF)
88
CPW6 (NOF)
9
RS2 (Ohm)
32
MMIC LNA SPECIFICATION PERFORMANCE OF DIFFERENT OPTIMIZER
Nfmin _out 2.0940
dB(S(2,1))
mu_load
mu_source
ID
20.0360
4.9590
2.3560
0.0496
2.0870
19.3180
5.2720
2.4350
0.0498
2.1330
19.3270
4.9380
2.1090
0.0450
1.4911
19.7813
1.7985
2.1810
0.0468
From results in Table VI, it is observed that GA-ADS fulfills all the specification constraints. Although all
Figure 4. Isolation Loss dB(S(2,1))
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[4]
[5]
[6]
[7]
Figure 5. Insertion Loss dB(S(3,2))
[8]
From the comparisons with other optimizer, the GAADS model has a -24.183 dB isolation loss and -3.74 dB insertion loss. With the preference given, GA-ADS outperforms the other optimizer with the highest isolation value and lowest insertion loss.
[9]
[10]
VI.
CONCLUSIONS [11]
GA-ADS model has been shown to be a potential alternative approach, capable to assist circuit designs. Based on the study, the optimized design variables for the better achievement in specifications and constraints are obtained for the case study on a 5-GHz MMIC LNA and 15.12-GHz SPDT switch. In MMIC LNA, the GA-ADS model outperforms especially in terms of gain and noise figure. As for SPDT switch, a low insertion loss and high isolation is generated at the 15.12-GHz operating frequency. Future research can be focused on a more complicated circuit design with a larger range of operating frequency.
[12]
[13]
[14]
[15]
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