High Performance Of Parallel Concatenated Code - Semantic Scholar

High Performance Of Parallel Concatenated Code

Qian Zhao, Liang Zhou, Hong Wen, Fen Xu, Chen Huang Communication Nation Key Laboratory University of Electronic Science and Technology of China, Cheng Du, China Email: [email protected], [email protected], [email protected], [email protected], [email protected] Abstract—In this paper, we introduce a kind of high performance of concatenated code that is called parallel concatenated code. Comparing to conventional serial concatenated code, it has more matching room and higher adaptability. Moreover, burst of errors which are aroused by noise are beautiful restrained. For certifying the superiority and practicability, we research a parallel concatenated code by combining the outer algebraic code with the inner Low density Parity Check (LDPC) code. The bit error rate (BER) may be as low as 10-22 when Signal Noise Ratio (SNR) is 3.9dB. In the high speed 100Gp/s optical communication system, it will play a significant role.

Figure 1. A classic serial concatenated code system model

Serial concatenated code as a kind of important errorcontrolling coding mode, has the very good correction ability, that is, in a certain SNR conditions can achieve many communication system BER index. The latest research shows that the RS/CC concatenated code applied to Very High Frequency (VHF) communication system. In low SNR conditions, it can put BER below 10-5 [2]; In IEEE802.16 Orthogonal Frequency Division Multiplexing (OFDM) system, RS/CC concatenated code must carry out. Research shows that Worldwide Interoperability for Microwave Access (WiMax) using RS/CC concatenated code adopting soft decision decoding algorithm can achieve good performance [3]; Due to the serial concatenated code has strong ability, as well as various error decoding algorithm realization of hardware matures, makes it widely applied in all kinds of communication system, especially in deep Space communications, satellite communications, such as National Aeronautics and Space Administration (NASA) of Consultative Committee for Space Data Systems (CCSDS) adopted the channel coding scheme is RS code and convolution code of concatenated code scheme [4]. In this work, we propose a new kind of parallel concatenated code mode. Through more outer codes and inner codes concatenate and interlace, residual error after inner codes decoding can be evenly distributed to outer codes so that it further plays the ability to realize the correction and the code of lower BER performance. Moreover, before codes enter AWGN channel, parallel concatenated code mode increases channel interleaver. The channel interleaver can effectively resist the performance deterioration caused by burst of errors. In parallel concatenated code mode, the adaptability of outer code and inner code is very strong so that it can achieve more global bit rate maximization and improve the simulation gains. The

Keywords-parallel concatenated code, LDPC code, algebraic code, lower BERs

I.

INTRODUCTION

Shannon’s noisy channel coding theorem proves that BER may be arbitrary small going with code length increasing. But at the same time, the complexity of the decoder and calculated amount correspondingly augment so that practicality doesn’t come true. For resolving the contradiction of performance and the complexity of the decoder, Forney brought forward the idea about concatenated code in 1966 [1]. He thought that encoder, channel and decoder in together were a generalized channel in communication systems, and it could be further reduced by BER. In this thought, when two short codes constitute a long code in series, the long code will reduce the complexity of the decoder, and can get very good correction performance. In the same code length conditions, comparing to one-stage encoded mode, concatenated code can get high encoding gain with moderate complexity of decoding. In classic serial concatenated code system, two-stage encoded mode was used in general. Fig. 1 shows classic serial concatenated code system model. Three-stage or above encoded mode is seldom use, is mainly because of the "threshold effect". The so-called "threshold effect" means when SNR below the threshold, the performance without coding outweighs the coding. When SNR is high, two-stage encoded mode has to meet the quality indexes. And when channel quality is bad, increasing one-stage encoding not only augments the complexity of decoding but also induces more mistakes. Therefore, serial concatenated code system adopts two-stage encoded mode in general.

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paper researches a parallel concatenated code by combining the outer algebraic code with the inner LDPC code. In the concatenated process of algebraic code and LDPC code, the structure of short algebraic code and long LDPC code is usually used. Many LDPC codes exhibit an error floor, which corresponds to a decrease in the slope in the plot of BER versus SNR. The error floor is commonly attributed to the suboptimality of the iterative decoding algorithms on graphs with cycles, and past work has studied concepts such as near-codewords [5], trapping sets [6], pseudocodewords [7], and elementary trapping sets [8]. The reasonable choice outer code can effectively eliminate error floor to achieve extremely low BER and higher simulation gains. The remainder of this paper is organized as follows. Section II describes the basic principle of parallel concatenated code. We then research a parallel concatenated code by combining the outer algebraic code with the inner LDPC code in Section III. Then, the proposed parallel concatenated code mode is applied (3860, 3824) BCH code and (13299, 11295) EG-LDPC code. And BER performances are illustrated in Section IV. Finally, Section V concludes the paper. II.

In the parallel concatenated code system model, the main function of the code interleaver is to evenly distribute the residual error of the inner codes to the outer codes. And the channel interleaver is to evenly distribute the burst of errors which noise causes to the inner codes. According to the different choices of the inner code and outer code, we may optimize the parameters S1 and S2 so as to realize maximum system bit rate, lower BER performance and higher simulation gains. Moreover, we can also target different error types to design system parameters, until meet the practical requirements. III.

The choice of outer code and inner code of parallel concatenated code has the following principles: 1) the inner code should have the capable of correcting scattered random errors; 2) Residual errors which inner code brings in are beautifully eliminated by outer code; 3) outer code decoding dose not introduce more errors into communication system. LDPC codes are a class of approaching the Shannon limit (channel capacity) encoding. In many communication and digital storage systems which require high reliability, error control capability of LDPC code has strong competition. Compared with other codes, LDPC code has the following advantages: 1) it dose not need depth interlacement but obtaining the good BER performance; 2) it has better grouping BER performance; 3) the error floor has greatly lower BER; 4) decoding don’t based on network. Thus, we choose LDPC code as the inner code of parallel concatenated code. Performance curves of iterative coding schemes such as LDPC codes are well-known as “waterfall” curves. Sometimes, one observes the bottom of the waterfall, often referred to as the error floor. The appearance of the error floor seriously impacts on the realization of terribly low BER. And as a result, we consider using algebraic code as the outer code of parallel concatenated code to eliminate the error floor of the inner LDPC code. For eliminating the error floor, firstly we must undertake LDPC code performance simulation analysis, and find the key error floor which led to the bottom of the waterfall. By finding out the characteristics about the error floor, we can make a reasonable choice for the algebraic code, as well as the number of the inner code and outer code. As long as the system parameters of parallel concatenated code are optimum, it can realize at least influence simulation gains to tremendously improve BER performance. The scheme adopts a parallel concatenated code by combining the outer q-ary (N1, K1) algebraic code with the inner (N2, K2) LDPC code, where q = 2M and the number of inner code and outer code are S1 and S2. In order to introduce this scheme, summarizes the steps of the encoding phase below. 1. A number of S1K1M bits information u are segmented into sub-vectors of length M bits and interpreted as a q-ary sequence, where q = 2M. Then the q-ary sequence u is put into the algebraic encoder, resulting in a q-ary (N1, K1) algebraic code sequence xi for all i = 1, 2, …, S1;

PRINCIPLE OF PARALLEL CONCATENATED CODE

As shown in Fig.2, a parallel concatenated code consists of S1 outer codes, S2 inner codes, a code interleaver and a channel interleaver. A binary information sequence u is put into the outer encoder, resulting in S1 coded sequences xi for all i = 1, 2, …, S1. The interleaved version w of xi is interpreted as a binary sequence and encoded by the inner encoder. The inner code sequences vi generate transmission sequence z through channel interleaver for all i = 1, 2, …, S2. The transmission sequence z is modulated using binary phase-shift keying (BPSK) signaling and transmitted over an AWGN channel. Denote by z* the noisy coded sequence observed at the receiver. The sequence z* is then fed into the channel de-interleaver. The inner code decoder take v*i as input and deliver w* as output for all i = 1, 2, …, S2. The sequence w* is then fed into the code de-interleaver. The outer decoder takes as input the output x*i from the code deinterleaver and delivers as output the estimated data sequence u for all i = 1, 2, …, S1. u

x1 x2

w

#

x S1

x1 * x2 *

u

#*

x S1

v1 v2

#

z

v S2

v1 * v2

z

*

w

*

#

v S2

CHOICE OF OUTER CODE AND INNER CODE

*

*

Figure 2. A system model using parallel concatenated code

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2.

Transforming the q-ary (N1, K1) algebraic code sequence xi into binary (N1*, K1*) algebraic code sequence xxi, where N1* = MN1, K1* = MK1 and all i = 1, 2, …, S1;

3.

The sequence xxi is then fed into the code interleaver, generating a sequence w for all i = 1, 2, …, S1.

4.

The LDPC encoder takes as input the output w from the interleaver and delivers as output the inner code sequences vi for all i = 1, 2, …, S2.

5.

The output sequences vi then fed into the channel interleaver for all i = 1, 2, …, S2.

Here, Vi is the location of the variable node.

After the step 2, if the equation S1N1* = S2K2 was not established, we may expand (N1*, K1*) algebraic code to (N1**, K1**) algebraic code which code length satisfies the equation S1N1** = S2K2. Similarly, we also can fill Y bits “0” to encode so as to the equation S1N1* = S2K2* set. Here, K2* is truncate LDPC information length and S2K2 = S2K2* + Y. Fig. 3 depicts the encoder of the proposed concatenated code. Dotted line portion of the diagram is non-essential steps and solid line is the necessary steps. u

x1

xx1

x2

xx 2

#

#

x S1

xx S1

Figure 4. Performance of (13299, 11285) EG-LDPC code

Based on the above characteristics of (4, 4) trapping sets found that a parallel concatenated code which chooses outer (3860, 3824) BCH code can effectively correct the (4, 4) trapping set in the wrong frame. Here, the number of inner code and outer code is 11 and 32. Error correction performance of (3860, 3824) BCH code can be calculated by the following formula: 3860

¦C

v1 v2

p k (1 − p ) ( 3860 − k )

(1)

k =4

Here, p is the BER of LDPC code decoding.

w

#

In order to match the information bits, before the inner LDPC code encoding we fill 615 bits "0". The role of code interleaver is to evenly spread the error inside the outer BCH code and prevent that three or more errors occur in a BCH code. The role of the channel interleaver is to evenly dispersed the unexpected errors in the channel transmission process and reduce the impact caused by channel degradation. Fig. 5 presents the BER performance of the parallel concatenated code by combining the outer (3860, 3824) BCH code with the inner (13299, 11285) LDPC code. As it is observed from Fig. 5, parallel concatenated code is good at eliminate the error floor to achieve extremely low BER. The BER may reach 10-12 when Eb/N0 is 3.84dB. Moreover, by equation (1) we prove that when the Eb/N0 increases to 3.9dB, the BER is close to10-22. The red dotted line represents the expected simulation performance. In order to test the ability that parallel concatenated code resists burst of errors, we assume that continuous 512 bits errors occur in every 11-frame transmission. Simulation results show in Fig.6. In contrast to the situation that not adding burst of errors, the performance loss of 0.3dB. However, the actual deterioration of the channel is not so bad. The red dotted line represents the expected simulation performance.

v S2 Figure 3. The encoder of the proposed concatenated code

IV.

k 3860

SIMULATION RESULT

In the section, we present the performance of a parallel concatenated code by combining the outer (3860, 3824) BCH code with the inner (13299, 11285) EG-LDPC code as an example. The codeword is modulated using BPSK signaling and transmitted over an AWGN channel. Moreover, we verify the parallel concatenated code having the capacity of resisting burst of errors. Fig. 4 shows the BER performance of a (13299, 11285) LDPC code with a standard MC simulation using normalized min-sum decoding algorithm. And input 4-bit quantization, decoding 8-bit quantization. Simulation performance results show that the (13299, 11285) LDPC code in the BER of 10-10 occurs the error floor, which is because the (4, 4) trapping sets cause. These (4, 4) trapping sets errors in the variable locations of the following characteristics: (Vi, Vi+2191, Vi+4237, Vi+11253) for all 0  i  877 or (Vi, Vi+1168, Vi+3214, Vi+11253) for all 878  i  1022

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V.

CONCLUSIOn

In this work we have presented a high performance of parallel concatenated code mode and provided simulation results for a parallel concatenated code which is composed of the outer (3860, 3824) BCH code and the inner (13299, 11285) LDPC code. In contrast to single (13299, 11285) LDPC code with a standard MC simulation, the error floor caused by (4, 4) trapping set is eliminated. Remarkable simulation gains at BER of 10-22 are achieved. Moreover, the ability of resisting burst of errors is very strong. In the optical communication system, 100Gp/s data rate is the modern data transmission trend of large capacity and long distance. Forward error correction (FEC) system which has high performance will become a key transmission technology. And high performance of parallel concatenated code will play a significant role. ACKNOWLEDGMENT This work is supported by communication nation key laboratory and the company of Huawei. And we would like to thank fan yu for helpful discussions and comments.

Figure 5. Performance of the proposed concatenated code

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[6] [7] Figure 6. Performance of the proposed concatenated code which adds 512 bits errors in every 11-frame transmission

[8]

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