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Effective Crosstalk Isolation Through p+ Si Substrates With Semi-Insulating Porous Si Han-Su Kim, Keith A. Jenkins, Senior Member, IEEE, and Ya-Hong Xie
Abstract—Through-the-wafer porous Si (PS) trenches have been used to provide radio frequency (RF) isolation in Si because of their semi-insulating property. Reduction of crosstalk by 70 dB at 2 GHz and 45 dB at 8 GHz is demonstrated between Al pads with 800 m separation on p+ Si. Crosstalk suppression increases linearly with increasing PS width to beyond 320 m. This suppression is degraded by one order of magnitude when the Si underneath the PS trenches remains and serves as a residual path for crosstalk. These results show that PS is an excellent candidate for RF isolation in modern VLSI technology. Index Terms—Crosstalk, mixed-signal ICs, porous Si, radio frequency (RF) isolation.
than other common dielectric materials such as SiO and Si N [6]–[8]. Area occupation of PS for mixed signal ICs is approximately 2% or less in 1 cm chip when we assume 2 mm long and 500 m wide trench. This PS region can serve as the isolation infrastructure in mixed signal ICs for high passive components as well as crosstalk suppression. Crosstalk suppression by about 70 dB at 2 GHz and 45 dB at 8 GHz has been demonstrated. This report shows that PS trench can provide high performance mixed signal ICs integrated on heavily doped p -type Si substrates for the current as well as the future RF applications. II. EXPERIMENTAL
I. INTRODUCTION
T
HE RAPIDLY growing mobile communication market presents an urgent need for high-performance mixed signal integrated circuit technology (RFIC). Single chip RFICs have the anticipated advantages of higher packing density, lower cost, and smaller form factor. One of major obstacles for single chip RFIC is RF crosstalk through the substrate. In other words, noise from switching transient in digital circuits can travel through the Si substrate to degrade the performance of noise sensitive circuit elements such as low noise amplifier (LNAs) and phase-lock loop (PLLs). Guard rings [1], junction isolated wells [1], micromachined structures [2], SOI substrates [3], and Faraday cage isolation structures [11] have been used to suppress this crosstalk through the p substrate with the best reported result of 40 dB at 1 GHz. In this letter, we show that porous Si (PS) is an excellent candidate as an isolation material in Si for mixed signal IC applications. The superiority of PS films for RF isolation was already demonstrated in our previous study of on-chip inducat 7 GHz and resonant frequency 20 tors with GHz [4]. This isolation property of PS stems from its semi-insulating state with resistivity higher than 10 Ohm-cm [5]. Very thick PS films with structural integrity and mechanical stability can be locally incorporated into Si substrates, thereby a significant advantage over the SOI substrates for RF isolation. This stems from the more than one order of magnitude lower stress Manuscript received November 26, 2001. This work was supported in part by the Semiconductor Research Corporation under Contracts 1999-NJ-742 and 2001-NJ-936, and by National Science Foundation under Contract ECS-0120368. The review of this letter was arranged by Editor K. De Meyer. H.-S. Kim and Y.-H. Xie are with the Department of Materials Science and Engineering, University of California, Los Angeles, CA 90095 USA (e-mail:
[email protected]). K. A. Jenkins is with the IBM T. J. Watson Research Center, Yorktown Heights, NY 10598 USA. Publisher Item Identifier S 0741-3106(02)02137-7.
The isolation technique consists of forming a PS trench between the noise-generating and the noise-sensing circuits. The fabrication steps of this trench in a test structure are following. Heavily doped p-type Si substrates with resistivity less than 0.01 Ohm-cm were used because of their similar RF response to the p/p epiwafers commonly used by CMOS industry. Localized PS formation with LPCVD silicon nitride mask was carried out through anodization in an electrochemical cell. The detailed description for apparatus and the process of PS film fabrication can be found elsewhere [9]. 2000 Å thick PECVD oxide films were deposited following anodization to encapsulate the porous region. 160 Å thick Ni (80%)–Cr (20%) lines were selectively fabricated using e-beam evaporation and liftoff techniques for input impedance matching. 4000 Å thick Al films were deposited to form the noise injection and sensing pads as well as the ground lines. Wafer lapping by mechanical polishing was performed to remove the conductive Si below the PS trench, enabling PS trench through the wafer. This lapping is the standard step used in Si VLSI technology before chip package. The standard thickness of Si chip before attaching to lead frames is approximately 250 m, although the starting wafer thickness could be as high as 800 m. As a result, it is sufficient for the PS region thickness to be higher than 250 m. This thickness is easily achievable by the fast formation rate ( 1.5 m/min) of PS. RF measurements were carried out using Hewlett-Packard 8510C network analyzer with shielded Cascade microwave probes to minimize crosstalk through air. Cross-section views of test structures used in this study are shown in Fig. 1. III. RESULTS Dependence of the magnitude of S21 on the Al pad separation and on the frequency of a reference sample (without PS trench) and a sample with the PS trench are shown in Fig. 2. Fig. 2(a) shows one of the test structures with crosstalk suppression of
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KIM et al.: EFFECTIVE CROSSTALK ISOLATION
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Fig. 1. Cross section views of test structures for (a) reference samples and (b) samples with porous Si trench.
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Fig. 3. (a) jS j versus porous Si width for 90 m-thick porous Si trench with 400 m pad separation. jS j represents the crosstalk reduction, in other words, the difference between the reference (without porous Si trench) and the PS trench inserted sample. (b) Effect of porous Si width on jS j for 60 m thick porous Si trench without Si wafer lapping with 400 m pad separation.
Fig. 2. (a) Typical behavior of 180 m wide and 90 m thick porous Si trench inserted samples with 800 m pad separation. (b) Dependence of S magnitude on the spacing between Al pads of reference samples and samples with 180 m wide and 90 m-thick porous Si trench.
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about 70 dB at 2 GHz and 45 dB at 8 GHz. The crosstalk in this case is reduced to the level limited by the crosstalk through air, demonstrating superior isolation achievable with PS trench between noise generating and noise sensing circuits. The difference in S21 between a reference sample and a sample with the PS trench increases monotonically from 14 dB at 100 m separation to 45 dB at 800 m separation [Fig. 2(b)]. This behavior is discussed below in comparison with the dependence of the crosstalk isolation on the PS trench width.
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The effectiveness of the PS trench for RF isolation is studied as a function of its width. Fig. 3(a) shows the effect of the PS width on the crosstalk reduction. Crosstalk reduction increases by 8 dB in an almost linear fashion with increasing PS width from 180 m to 320 m. The linearity with PS width can be associated with the linear increase in the capacitive impedance across the PS trench. This demonstrates that overall crosstalk impedance is due mainly to the PS trench. Furthermore, there is a strong dependence of the overall crosstalk on the Al pad separation, as shown in Fig. 2(b). This can be understood by considering the noise propagation in an impedance network composed of resistive and capacitive elements. While the link with the highest impedance is the PS trench, the intensity of the noise signal that can reach the noisy side of the PS trench is strongly dependent on the distance between the noise injection Al pad and the PS trench relative to that between the pad and the ground lines. Similar effect can be expected for the noise sensing Al pad placement. This observation clearly demonstrates the inevitable dependence of crosstalk on specific chip layout. on the PS trench width from a The dependence of similar sample with residual Si underneath the PS trench is shown in Fig. 3(b). The effectiveness of isolation is decreased dB to dB at by one order of magnitude from
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8 GHz. Comparison with reference samples shows that the effect of the PS trench in this case is simply an increase in pad separation, in other words, the increase in the path length of noise due to the fact that the noise will have to travel downward as well as sideward. The observation demonstrates the importance of wafer lapping to completely remove residual parallel paths for crosstalk provided by the remaining Si underneath the PS trench. Isolation properties of PS trench can be further improved by the introduction of PS films with higher porosity, i.e., lower relative dielectric constant through the change of PS anodization conditions [10] at the expense of slightly weakening mechanical integrity. IV. CONCLUSION We have shown that the PS trench is an excellent candidate for effective RF isolation in modern VLSI technology. It allows the very thick (through-the-wafer) semi-insulating region to be selectively incorporated into Si substrates, thereby enabling a large array of RF elements that were previously possible only in compound semiconductors to be integrated with Si VLSI. It provides the infrastructure for large- scale mixed-signal ICs to be fabricated in Si. PS trenches with crosstalk suppression by about 70 dB at 2 GHz and 45 dB at 8 GHz are demonstrated. This PS technology will offer greatly improved mixed signal ICs and passive components based on Si for the current as well as the next generation mobile communication.
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