Modified CMFB Circuit with Enhanced Accuracy for

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as to make the outputs of differential amplifier circuit swing at a nearly constant ... technology; implementing CMFB circuit with built in Differential-Difference.
Applied Mechanics and Materials Vols. 446-447 (2014) pp 992-996 © (2014) Trans Tech Publications, Switzerland doi:10.4028/www.scientific.net/AMM.446-447.992

Modified CMFB Circuit with Enhanced Accuracy for Data Converter Application AHMAD Mohd Fairusa, MURAD Sohiful Anuar Zainol, SHAHIMIN Mukhzeer Mohamad, RAIS Shamsul Amir Abdul and HASAN Ahmad Fariz School of Microelectronic Engineering, Universiti Malaysia Perlis, Pauh Putra Campus, 02600 Arau, Perlis Malaysia. a

[email protected]

Keywords: Common mode feedback circuit, signal sampling, differential operational amplifier, high frequency circuit, sample and hold circuit.

Abstract. Enhanced feedback voltage of common mode feedback (CMFB) circuit is designed in this work for CMOS data sampling application using 0.18-µm Silterra process technology. The double error detecting point circuit is employed to associate with the feedback point in order to prevent the undesired voltage common mode at the output of operational transconductance amplifier (OTA). The PMOS input transistor for injecting the common mode voltage is used to fit in the limitation of voltage division in low power design. The feedback voltage is strongly pushed to have a stable value as to make the outputs of differential amplifier circuit swing at a nearly constant voltage at 1.2 V for enhancing accuracy of data converter. Introduction Data converters are important due to the needs of various digital-analog applications. This work is focusing the design of CMFB circuit for data converter with the 1.5-bit pipelined architecture [1]. One of main circuit inside the pipelined data converter is the sampling circuit or sample-and-hold (S/H) circuit. CMFB circuit is used inside the S/H circuit during circuit pre-evaluation and data sampling. The study of CMFB circuit has been carried out by previous literature [2, 3, 4, 5]. The accuracy of CMFB circuit has been demonstrated to increase the CMRR performance of the differential amplifier [6]. In this context, PMOS input type of CMFB circuit is preferable due to the limitation of input range. Linearity characteristic between the feedback voltages against the output of OTA common mode is found to be critical when OTA and CMFB circuit are integrated [7, 8, 9]. The designed CMFB circuit managed to get the desired feedback voltage. The linearity between the output of OTA and the feedback of the CMFB circuit becomes the main concern of this work. The outputs of OTA depend on the accurate feedback value to be stable at certain desired voltage value. Throughout this work, the new technique of CMFB circuit for error detection is and discussed. Circuit Design Technique CMFB Circuit Modification. Double detection technique is proposed in this paper using the 0.18µm Silterra process technology; implementing CMFB circuit with built in Differential-Difference Amplifier as illustrated in Fig. 1. In this study, Mxxa and Mxxb, represents transistor, with xx denoting transistor number, a referring to transistors in Fig. 1(a) and b is for transistors in Fig. 1(b). Conventionally in CMFB circuit implementation, M12a has its pair, M13a to form error detection mechanism from the output of differential amplifier circuit in the drain of M1a and M2a. The correction at the sensing point of M10a drain is made by the aid of the reference, Vcm,out,a. I10a has the amount of current which is theoretically three times the amount of current flows from M13a and M11a. A strong biasing voltage occurred at M11a and M10a; consequently, this will pull the constant DC current of 3I11a to be zeroed at transistor M10a. Due to the biasing voltages, M13a, M11a and M10a transistors would All rights reserved. No part of contents of this paper may be reproduced or transmitted in any form or by any means without the written permission of TTP, www.ttp.net. (ID: 1.9.65.122-25/10/13,10:54:44)

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have the same minimum resistive value, as the stacking of these transistors would not limit the flows of current on themselves when changes happen at the gate of M12a and its pair. In order to design the mechanism of double detection circuit for the pair of transistor M12a and M13a, the outputs from the operational transconductance amplifier (OTA) must be considered. The output might be slightly different from the reference voltage, Vcm,out,a. Albeit its small value, this small difference controls the gate-source voltage of the transistor and thus affecting the allowed current to be zeroed through M10a. In this context, transistor M12a must be designed in such way to allow the limited current of 3I11a flows through M10a. During the pre-detection phase, the error is sensed at the drain of M10a. If the common mode output of OTA, Vcm, has the amount of different values comparable to the biasing voltage intended to M12a design, then the drain-source current of transistor M11a changes accordingly. The Vcm may have voltage transition even though the feedback voltage has small changes (almost 0.1%). Thus the proposed technique of double detection can be used for sensing Vcm at the drain of M10b and M13b. The M13b is designed to have three times the original width of M13b in order to support the current demand of the feedback circuit.

(a)

(b) Fig. 1 (a) Single detection CMFB circuit and (b) Double detection CMFB circuit

Circuit Testing. Testing on OTA of folded cascode differential amplifier (PMOS input type) with both of CMFB types (Fig. 1 (a) and (b)) are set up. The testing scheme is illustrated in the Fig. 2. This folded cascode has common mode output voltage at 1.2 V (set to CM test voltage) which need to be fixed by CMFB circuit. The feedback voltage should be plugged into the transistor at the upper stack on the OTAs input side and must have 2.2 V (set to feedback test voltage) value. The switch is closed at time T = 10 ns. After the switch is closed, the circuit will be in the closed loop operation. The VCM is measured at the OTAs outputs and the feedback voltage is measured at the CMFBs output. During open loop (T < 10ns) circuit, the PMOS upper stack of OTA has the feedback test voltage of 2.2 V

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while the input of CMFB has the CM test voltage of 1.2 V. These two test voltage is the aim of the design for the expected output of the OTA during the feedback from CMFB circuit.

Fig.2 Circuit testing setup Result and Discussion As shown in Fig. 3 (a) and (b), the output of OTA has the targeted value of 1.2 V as the feedback of the CMFB before the switch is closed. During closed switch (T  10ns), for the DDA scheme, the VCM of OTA becomes 317 mV, the CMFBs feedback continuously supply the 2.248 V while the double detection technique applied to the circuit managed to fix the targeted feedback value and the VCM. This issue has been studied through the effect of feedback value variation from the range of test voltages. As shown on the Fig. 4 (a), the slight change of the feedback voltage (2.2 V) into the folded cascode will effect massive change (approximately 1.0 V to 2.0 V) at the common mode OTAs output voltage; resulting the negative slopes. These outputs will be fed into the CMFB circuit as the corrected input. The linear characteristic on the double detection method as shown on Fig. 4(b) has a positive slope that will provide a negative feedback correction (accurate error correction) and thus obtaining the desired OTAs output common mode voltage. Conclusion Accurate feedback voltage of CMFB circuit via implementation of double error detection point has been successfully implemented. The double error detecting point circuit has been demonstrated to prevent undesired voltage across the drain-source of the transistor in OTA. Voltage division limitation in low power design is rectified via the usage of PMOS input transistor in injecting the common mode voltage. Stability is obtained from a strongly pushed feedback voltage with the output of the differential amplifier circuit to swing at a nearly constant voltage at 1.2 V. This design can provide alternative configurations of feedback for error detection and error correction in attaining the desired OTAs common mode output voltage.

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Fig. 3 Experimental result when the switch is closed at time, T=10ns. (a) VCM of OTA (Fully differential folded cascode amplifier) (b) Feedback voltage of CMFB

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(b) Figure 4 (a) OTA’s output for responsive input feedback voltage (b) Feedback effect between detection techniques on CMFB

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Acknowledgement This work has been conducted with the aid of research grant from Ministry of Higher Education, Malaysia (No.: FRGS 9003 - 00301). References [1] C.C. Lu and T.S. Lee , A 10 - bit 60 - MS/s low-power CMOS pipelined analog-to-digital converter, IEEE Trans. on Circuits and Syst, 54 (2007) 658-662. [2] S.I. Ahmed, Pipelined ADC design and enhancement techniques, Springer, 2010 [3] L. Lah, J.Jr. Choma, J.T., A continuous-time common-mode feedback circuit (CMFB) for high-impedance current- mode applications, IEEE Trans. on Circuits and Syst, 47 (2000) 363-369. [4] T. Uttarwar, S. Jain and A. Gupta, Design of a high performance, low power, fully differential telescopic cascode amplifier using common-mode feedback circuit, Technological Developments in Education and Automation, Springer, 2010. [5] M.M. Zhang and P.J. Hurst, Effect of nonlinearity in the CMFB Circuit that uses the differential-difference amplifier, Proceedings of IEEE International Symposium on Circuits and systems, (2006) 1393-1396. [6] J. Ramirez-Angulo andM. Holmes, Simple technique using local CMFB to enhance slew rate and bandwidth of one-stage CMOS op-amps, Electron. Lett., 38 (2002) 1409-1411. [7] H.Y. Lin and Y.T. Lai, A simple scheme to extend the linearity of the continuous-time CMFB circuit for fully-differential amplifier, IEEE Region 10 Conference, (2008) 1-4. [8] Liang Wang ; Yong-sheng Yin ; Xian-zhong Guan, Design of a gain-boosted telescopic fully differential amplifier with CMFB circuit, 2nd International Conference on Consumer Electronics, Communications and Networks (CECNet), (2012) 252-255. [9] Carrillo, J.M. ; Torelli, G. ; Dominguez, M.A. ; Perez-Aloe, R. ; Valverde, J.M. ; Duque-Carrillo, J.F. A Family of Low-Voltage Bulk-Driven CMOS Continuous-Time CMFB Circuits, IEEE Transactions on Circuits and Systems II: Express Briefs, 57(2010) 863 - 867.

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