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Transactions Briefs__________________________________________________________________ Nonlinear Effects in Pseudo Differential OTAs With CMFB Ahmed Nader Mohieldin, Edgar Sánchez-Sinencio, and José Silva-Martínez Abstract—A general description of nonlinearities in pseudo differential operational transconductance amplifiers (OTA) with common-mode feedback (CMFB) is introduced. The effects of CMFB nonlinearities on the differential signals are evaluated and design tradeoffs including nonidealities are determined. A practical pseudo differential fully balanced fully symmetric OTA architecture with common-mode feedforward (CMFF) is used as a case study to probe the theory. The OTA has an inherent common-mode detector; hence, the CMFB circuit is efficiently implemented. The OTA is used to implement a 100-MHz fourth-order linear-phase OTA-C filter. Index Terms—Common-mode feedback (CMFB), common-mode feedforward (CMFF), high frequency, nonlinearity, operational transconductance amplifiers (OTA), OTA-C filters, pseudo differential.
I. INTRODUCTION Fully differential (FD) structures are often used in industrial products because of the improved dynamic range over their single-ended counterparts. Furthermore, FD structures have better common-mode noise rejection, reduced harmonic distortion, and increased output voltage swing. However, an extra common-mode feedback (CMFB) circuit is required in a FD structure to fix the common-mode voltage (VCM ) at different high impedance nodes that are not stabilized by the negative differential feedback. The CMFB circuit is also used to suppress the common-mode signal components on the whole band of differential operation that tend to saturate different stages. A CMFB circuit is classically performed by means of an additional loop. The output common-mode level (VCM ) is sensed using a + + v0 )=2. It is then common-mode detector, i.e., VCM = (vOUT OUT compared with the reference voltage VREF , and an error-correcting signal is injected to the biasing circuitry of the OTA. The CMFB loop has to be designed carefully to avoid potential common-mode stability problems. The frequency response of the differential path is often affected due to the added parasitic components involved in conventional CMFB schemes. In addition, since the common-mode signal detector is nonlinear, it will degrade the distortion performance of the differential path. The impact of this nonlinear interaction between the common-mode and differential-mode loops needs also to be considered. The primary function of the CMFB is to set the common-mode voltage and it should not consume much power. For good power supply rejection, a wide bandwidth CMFB is needed. In other cases, when the OTA outputs are loaded by low impedances, the dc output voltages are well defined; there may be no need for the CMFB circuitry as would be the case of filters built using lossy integrators [1]. In this paper, a general description of nonlinearities in pseudo differential CMOS OTAs is presented. This includes transistor mismatches, cross product of differential and common-mode signals, short channel Manuscript received April 3, 2003; revised June 20, 2003. This paper was recommended by Associate Editor G. Temes. The authors are with the Analog & Mixed Signal Center, Department of Electrical Engineering, Texas A&M University, College Station, TX 77843 USA (e-mail:
[email protected]). Digital Object Identifier 10.1109/TCSII.2003.818395
Fig. 1. Conventional pseudo differential OTA.
effects, and nonlinear interaction between the common-mode detector used in the CMFB circuit and the differential signal. To demonstrate the theory a practical pseudo differential OTA architecture with common-mode feedforward (CMFF) [2] is used as an example. II. PSEUDO-DIFFERENTIAL STRUCTURES FD is typically based on a differential pair with tail current source, and pseudo differential (PD) is based on two independent inverters without tail current source as shown in Fig. 1. Avoiding the voltage drop across the tail current source, in a PD structure, allows achieving wider input range and makes the architecture attractive for low voltage applications. Removing the tail current source, however, results in larger common-mode gain (ACM ). In a FD structure, the common-mode gain can be reduced by increasing the output resistance of the bias current source. However, for the PD OTA shown in Fig. 1, ACM is equal to the differential mode gain ADM (= gm 1 r0 ), i.e., CMRR = ADM =ACM = 1. This large ACM , in PD structures, can lead to huge common-mode variations at the OTA outputs unless a fast and strong CMFB is used. Using a balanced configuration with two single-ended transconductances [3] reduces ACM at low frequency to the order of unity. This approach adds more load to the driving stage due to the connection of two input transistors, thus doubling the input capacitance. The same also applies to the case of the common-mode feedforward (CMFF) technique. A pseudo differential OTA with CMFF reported in [4] uses a separate BiCMOS transconductance for common-mode detection. A CMOS pseudo differential version [5] is shown in Fig. 2 with a common-mode gain, at low frequency, given by g 1g gm1 0 vocm g +g +g ACM j = !=0 = vicm g01 + g02 !=0 gm1 gm1 = : (1) = (gm2 + g01 + g02 ) gm2 Observe in the first part of (1) that due to the finite output conductance of the OTA, ACM is finite (nonzero) [6].
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first-order approximation, the PD OTA is linear in contrast with a FD OTA. A. Transistor Mismatches Due to transistor mismatches, the nonlinearity cancellation is not perfect and second-order harmonic distortion components will result at the differential output signal. Assuming a mismatch factor " in the dimensions of the input driver transistors M1 results in a second harmonic distortion (HD2 ) in the output current io , obtained by replacing by (1 + ") in (2), given by (for vd = VPeak cos !t)
HD2 =
"
8(2 + ")
Vpeak : Vov
(4)
Fig. 4(a) shows the effect of mismatch of the input driver transistors on HD2 of the OTA shown in Fig. 2(b). The differential input signal is fixed to 1 Vpp . The third-harmonic distortion HD3 (due to short channel effects as discussed in Section III-C) is fairly constant and it is the dominant source of distortion up to about 4% of mismatch; this is mainly due to inherent even-order harmonic distortion cancellation of the CMFF technique. HD2 contributes to the THD almost the same as HD3 at 4.5% of mismatch. Fig. 4(b) shows the simulated HD2 , HD3 , and THD results of the OTA using BSIM models available through MOSIS while introducing 2% transistor mismatch. The THD is less than 040 dB for differential input signals of amplitudes up to 1.2 Vpp , while operating from 61.65 V power supplies. M1
(a)
B. Cross Product of Differential and Common-Mode Input Signals Additional harmonic distortion components can also appear, even neglecting all mismatches, due to the cross product of differential and common-mode input signals; hence the common-mode signals have to be suppressed as much as possible as well [4]. Let us assume a common-mode input interferer vcm in addition to the differential-mode input signal vd , then we can write (b) Fig. 2. Pseudo differential OTA with CMFF. (a) Conceptual structure. (b) Circuit implementation.
Although CMFF improves the rejection to common-mode signals, it is incapable to fix properly the dc common-mode output voltage. Without loss of generality, the CMFB for a pseudo differential OTA can be implemented as shown in Fig. 3.
The linearization of the output current in a pseudo differential OTA relies on the cancellation of the quadratic components of the individual currents (i1 and i2 in Fig. 1)
W 2 v+ 0 VSS 0 VTN L 1 I 2 + vd Vov + vd2 = Vov KN 2
2
4
W 2 v0 0 VSS 0 VTN L 1 I 2 0 vd Vov + vd2 = Vov
i2 =
(2a)
KN
io =i1 0 i2 = Vov vd
4
= gm vd
W 2 v0 0 VSS 0 VTN L 1 I 2 0 vd Vov + vd2 +2Vov vcm + v2 0 vd vcm = Vov cm
(6)
2
2
i2 =
4
KN 2
2
4
(2b) (3)
where vI+ = VICM + vd =2, vI0 = VICM 0 vd =2, = KN (W=L)1 , and Vov = VICM 0 VSS 0 VTN is the overdrive voltage. Note that to a
(7)
where vI+ = VICM + vd =2 + vcm , vI0 = VICM 0 vd =2 + vcm , = KN (W=L)1 , and Vov = VICM 0 VSS 0 VTN is the overdrive voltage. Assuming that the common-mode interferer and the differential signal have the same frequency, the intermodulation term vd 1 vcm is a second-order harmonic component but it is differential and thus is not suppressed when taking the difference of the two currents. For vcm = Vpc cos !t, the second harmonic distortion can be obtained from (7) as HD2 =
2
2
(5)
KN
io =i1 0 i2 = (vd Vov + vd vcm )
III. NONLINEARITY ANALYSIS
i1 =
W 2 v+ 0 VSS 0 VTN L 1 I 2 + vd Vov + vd2 +2Vov vcm + v2 + vd vcm = Vov cm
i1 =
Vpc
2Vov
:
(8)
Note that this cross product effect might be dominated by the quality of the input signal at the first stage in a complete system; consequently the common-mode signal at the input of the filter must be low. For example for HD2 of 050 dB and Vov = 0:6 V , the corresponding maximum tolerated common-mode signal at the input is 3.8 mVpeak .
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Fig. 3.
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 50, NO. 10, OCTOBER 2003
Pseudo differential OTA with CMFF and CMFB.
C. Short Channel Effects Odd-order harmonics appear due to short channel effects. For short channel devices, the effective carrier mobility is a function of both the longitudinal and transversal electric fields. Considering the degradation of mobility due to these effects and the channel length modulation, the drain current i of a transistor in saturation region can be approximated as
i=
0 VTN )2 [1 + vDS ] 2 1 + (vGS 0 VTN )
(vGS
(9)
where = 0 Cox (W=L), = (1=LEC ) + 0 , and EC = sat =0 . L is the device channel length, Cox is the oxide capacitance per unit channel area, is the output impedance constant, 0 is the low-field mobility, vsat is the saturation carrier drift velocity, and EC is the saturation (critical) longitudinal channel electric field. Note that the value of includes a fitting parameter 0 to model the effect of the transversal electric field [7]. Effective values of and of 0.4 V01 and 0.1 V01 , respectively, have been determined for the used technology (0.5 m CMOS) by a best fit to the simulated device characteristics with minimum length. If a differential signal (vd =2) is applied to the inputs in Fig. 1, then
vGS 0 VTN
=Vov +
vd
(10)
2
v vDS =(VDD 0 VSG2 ) 0 VSS + k d 2 vd =V +k DC
2
(11)
where VDC = VDD 0 VSS 0 VSG2 , and k ( = 0gm1 =gm2 ) is the gain from the input to node Vz . Substituting (10) and (11) in (9), yields
Vov + v2 2 vd 1 + VDC + k 2 1 + Vov + v2 2 2 v 2 1 + VDC Vov + 2 vd = 10 v 2 1 + Vov 1 + ( 2 ) 2
i1 =
(12)
where = = (1 + Vov ), and = 0k= (1 + VDC ). Using Taylor series expansion of (12), with a differential input vd = VPeak cos !t and neglecting the channel length modulation effect (for k = 01, < , and VDC > Vov ), HD3 becomes 2 1 VPeak 16Vov (1 + Vov )2 (2 + Vov ) 2 1 Vin rms : = 8Vov (1 + Vov )2 (2 + Vov )
HD3 =
(13)
Fig. 5 shows the simulated HD3 performance of the short-circuit output current of the OTA shown in Fig. 1 using BSIM models versus the theoretical performance predicted by (13). Note, that the smaller is the wider the linear range for a given HD3 . This can be accomplished by increasing the length of the channel which at the same time increases the parasitic capacitances. Increasing Vov also improves the linearity at the expense of power consumption. D. Nonlinear Interaction of Differential OTA Output Signals and CMFB Another source of nonlinearity is the interaction of the common-mode detector nonlinearity and the output differential
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(a) Fig. 5. Simulated and theoretical HD performance for V [PD OTA in Fig. 1].
0:4 V
= 0:6 V , =
where A(= gCMFB 1 Z 1 ACMD ) is the loop gain of the CMFB, ACMD is the gain of the common-mode detector, Z is the load impedance, and vod = gm 1 Z 1 vd . Note that the single-ended voltages have a common-mode component at the fundamental frequency and a second harmonic component due to the action of the CMFB circuit nonlinearities. The output current i of the next OTA shown in Fig. 3, including the short channel effects, the nonlinear mixing components of the fundamental and second-order harmonics, can be obtained by substituting (15) in (9) with = 0 as follows:
2 2 Vov + vod (0:5 0 ) 0 vod 2) 2 1 + (Vov + vod (0:5 0 ) 0 vod 2 2 Vov + vod (0:5 0 ) 0 vod = 2] 2(1 + Vov ) 1 + [0:5vod (1 0 2 ) 0 vod 2 + a3 v 3 i a0 + a1 vod + a2 vod = od 2(1 + Vov ) 2 1 + b1 vod + b2 vod2 + b3 vod3
i = (b) Fig. 4. (a) Effect of transistor mismatches on HD and THD; v = 1 V . (b) HD , HD , and THD with 2% transistor mismatches. V = V = 1:65 V [PD OTA in Fig. 2(b)].
0
signal [8]. To address this issue, the current written, in general, as
iCMFB
in Fig. 3 can be
2 iCMFB = ICM + ic 0 IREF 0 vod 0 vod (14) + 0 v0 ), ICM + ic = gCMFB (v+ + v0 )=2, where vod = (vOUT OUT OUT OUT
ICM
is the dc component that would be the only output of an ideal common-mode detector and it should be compensated by the dc reference current IREF (= gCMFB VREF ). In this analysis ic is set to zero since its effect has been already discussed in Section III-B. The fourth and fifth terms of (14) are due to mismatches and nonlinearities, respectively, of the common-mode detector. Other higher order terms are neglected since their effect is considered as a third-order effect. 2 ) is fedback to both OTA Since the current component (vod + vod outputs as common-mode component, it will be attenuated by the action of the CMFB loop, and thus the single-ended output voltages in Fig. 3 can be written as
+ = vod vOUT 2 vod =
2 0 1 + A Zvod 0 1 + A Zvod 2 0 vod 0 vod 2 0 = 0 vod 0 vod 0 v2 vOUT od 2
(15) (16)
(17)
(18)
2 , a1 = Vov (1 0 2 ), a2 = (0:5 0 )2 0 2 Vov , where a0 = Vov a3 = 0 (1 0 2 ), b1 = 0(0:5 0 ), b2 = + 2 =4(1 0 2 )2 , b3 = 0 2 (1 0 2 ) 0 3 =8(1 0 2 )3 . Assuming that vod = VPeak cos !t, we get a general expression for HD3
HD3CMFB =
2 Vpeak 4
a2 b1 + a3 : 2 a0 b3 + aa10 bb21 + + a1
(19)
The previous expression is a general expression for HD3 including the nonlinearity due to the short channel effects and the common-mode feedback detector. In Section IV-C, a case study of using this expression is discussed. IV. A PSEUDO-DIFFERENTIAL OTA ARCHITECTURE Fig. 6 shows a practical pseudo differential fully symmetric fully balanced OTA [2]. The OTA can be described as a conventional pseudo differential OTA of Fig. 1, plus the additional branches (bold) that are used for common-mode information extraction (used for CMFF as shown in Fig. 3), and the transistors M 3 , and M 4 used for CMFB.
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Fig. 6.
The proposed pseudo differential OTA [2] with CMFF and CMFB (
M = BM
).
Fig. 8. OTA tuning by changing common-mode voltage (V Fig. 7. Effect of jAj on the linearity deterioration factor CMFB.
F due to the nonideal
A. Inherent Common-Mode Feedforward Transistors M3 and M4 (bold in Fig. 6) provides the information of the common-mode level of the inputs VICM = (vI+ + vI0 )=2; it can be easily shown that if short channel effects are not considered, then
i1 + i2 =2 1 =
KP 2
2+ Vov
W L 1 vd2
(VDD
=
4
2
0 VICM 0 jVTP j)2 + v4d
2 0 2 1 v2 1 Vov d
(20)
where vI+ = VICM + vd =2, vI0 = VICM 0 vd =2, = 0 =8, and Vov = VDD 0 VICM 0 jVTP j is the overdrive voltage. Note that (i1 + i2 )=2 is being mirrored to the differential output yielding the desired common-mode signal cancellation, hence (for M4 = BM2 )
i 0i i01 = 2 1 2
where gm = B
=
B
2 2 Vov .
KP 2
W V 1 v = gm vd L 1 ov d
(21)
).
B. CMFB and CMFF Arrangements The common-mode information obtained at node VX can be used in a CMFB arrangement of two cascaded OTAs as shown in Fig. 6. The signal common-mode components are suppressed by the action of the CMFF. The dc level of the output is sensed by the input of second stage, and the common-mode level is detected at node VX (drain current of M 3 ). It is then compared to the required reference (drain current of M 4 ), fixing the dc output level to the required value (zero in our particular case). This arrangement has the advantage that differential-mode signals and common-mode signals share basically the same loop if grounded capacitors are used. Thus, it becomes easier to achieve similar bandwidth for common-mode and differential-mode loops. Simulation results shows that the open loop gain of the CMFB with a 63.6 and 11 dB of phase margin and gain margin, respectively. C. Nonlinearity Analysis Considering the nonlineraities of the common-mode detection as given by (20) and assuming perfect matching ( = 0), an expression of HD3 for the OTA shown in Fig. 6, as a special case of the OTA shown in Fig. 3, can be obtained by substituting the corresponding values in (19).
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Fig. 9.
Fourth-order linear-phase filter architecture.
First, we calculate the term due to the nonlinear common-mode detection. According to (20), we have
iCMFB = 0:5(i1 + i2 ) 0 IREF = 0:5 1 Vov2 0 IREF 0 1 vd2
=
8 =
8
where 0KP W1 = L1 0gm = Vov . Considering the short channel effects and using Taylor series expansion of (9) with , we get a more accurate value of given by
=0
= 0 KP 8
W L
1
(1 + Vov )3 = 8Vov (1 + Vov ) (1 + 0:5Vov ) : (22) According to (15), for gCMFB = gm and ACMD = (W=L)M =(W=L)M = (W=L)M =(W=L)M = 1, 1
0gm
we have
=
1 + AZ =
A
1+A
HD3CMFB
HD
01
8Vov (1 + Vov ) (1 + 0:5Vov )
Substituting the values of and manipulations, we can write
Fig. 7 shows the value of of Vov .
The differential-mode transconductance can be approximated as (for
M4 = M2 )
gm2 gm (s) = iod = gm1 (25a) g vd = m1 gm2 + sCZ 1 + ! s gm1 gm2 ADM (s) = (25b) (gm2 + sCZ )(g0 + sCL ) Cgs2 + 2Cgs4 ) at node where CZ is the total parasitic capacitance (= VZ , CL is the load capacitance, and g0 is the overall OTA output conductance. The excess phase
:
1 can be expressed as
! 0 ! 1 = 0 tan01 !nd = ! p2C 1 W1 1=2 L3=2 nd1 = 0 ! oxp 2 2 :
1
2 1 VPeak 16Vov (1 + Vov )2 (2 + Vov ) 2 1 + 1 +A A Vov (1 +1 0:5Vov ) =HD3 2 F
=
F as a function of jAj for two different values
D. Frequency Response and Excess Phase
(23) in (19), and after some algebraic
n IDC
(26)
Note that is miminized if the gate area is minimized as well. The nondominant pole in the proposed scheme can be pushed to high frequency by designing the current mirrors accordingly, for instance, choosing minimum length for transistors 2 . There are tradeoffs between dc voltage gain, excess phase and current mirror accuracy.
M
(24)
F
where 3 is described by (13) and the ideal linear value of is one. describes the linearity deterioration factor due to interaction of the common-mode detector nonlinearity and the input differential signal.
F
767
E. Noise Performance The encircled transistors in Fig. 6 contribute to common-mode noise only due to the symmetric configuration, and thus their effect can be
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TABLE I TRANSCONDUCTANCES AND CAPACITORS VALUES
Fig. 11. (
Filter output spectrum for a 350
THD = 0:5%).
Fig. 10.
neglected. Adding the noise contribution of other transistors, the input referred noise density yields (for M 3 = M3 and M 4 = M4 ) Vn2 M2
Vn2 M3 Vn2 M4 2 + 4 Bg 2 + 4 Bg 2 : (27) g g
g g
Consider only the integrated thermal noise power, and using (24) and (27), the following expression for the SNR can be obtained (for F = 1 and B = 1) SNR =10 log
=10 log
2 rms Vin Vn2 rms
2 g +2g +2g 1+ g
3 1 HD3 1 Vov (1 + Vov ) (2 + Vov ) 1 gm1 2 1 BW
1
KT 1
30-MHz input signal
A. Common-Mode Loop and Stability Conditions
X = 350 m, Y = 450 m).
Chip micrograph (
Vn2 rms = 2 1 Vn2 M1 + 2
mV
:
(28) For a given HD3 , the maximum input voltage, and consequently the SNR, can be increased by increasing Vov . The transconductance gm1 needs also to be maximized to reduce the noise contribution of subsequent transistors. The OTA in Fig. 6 can be tuned by changing the common-mode voltage VICM . The main disadvantage, as in the case of conventional OTA based on a differential pair with a tail current source, is the variation of the linearity performance with changing the bias conditions. The tunability of 635 % of the OTA, by varying the CM voltage, is shown in Fig. 8. The same plot shows the corresponding 10 dB variation HD3 performance for a 500 mVpp differential input signal. These results are in good agreement with (13). In practice, the CM voltage of the OTAs is forced by the action of the CMFB circuit to be equal to the reference voltage VREF [see Fig. 6]. Notice that the common-mode dc level tracks any supply voltage variation and this will not translate into transconductance variation. V. CMFB LOOP DESIGN CONSIDERATIONS In this section various design considerations for the CMFB loop are discussed.
The CMFB loop is compensated for stability purposes by the load capacitance CL , which is also used for differential-mode operation. To ensure sufficient phase margin in the CMFB loop it is required that the following constraints are satisfied !nd1 =
gm2 gm3 gm1 ; !nd2 = > 2ACMD 1 CZ CX CL
(29)
where ACMD = (W=L)3 =(W=L)3 = (W=L)4 =(W=L)4 . Note that for differential-mode gain we have to consider only one parasitic pole !nd1 , see Fig. 9. For the differential mode gain, it has to be guaranteed that (gm1 =CL !nd1 ) otherwise the integrator excess phase error is huge [see (26)], therefore the stability of the CMFB loop is also guaranteed. B. Common-Mode Gain The CMFB is idealy transparent to differential signals and acts at low frequencies as a resistor of value 1=gCMFB (gCMFB = ACMD 1 gm1 is the small signal common-mode feedback transconductance) for common-mode signals. Thus, the common-mode gain, including the CMFB circuit, is given by
g 1g g g 1g g +sC 0 g +sC g +g +sC gCMFB (s) + g0 + sCL gm1 1 gm2 (g0 + sCX ) = (gm2 + sCZ )(gm3 + sCX ) [gCMFB (s) + g0 + sCL ]
ACM (s) =
(30)
CX is the total parasitic capacitance at node VX . Note that at low frequency is much less than unity because gCMFB is large; this is a result of the action of both CMFB and CMFF circuits. At high frequency, the low-frequency zero degrades the rejection to common-mode signals. Conventional circuit analysis techniques show that the CMRR can be written as
where
ACM
ADM (s) ACM (s) (gm3 + sCX ) [gCMFB (s)+ g0 + sCL ] = (g0 + sCX ) (g0 + sCL )
CMRR(s) =
(31)
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Fig. 12. Filter group delay (vertical axis 10 nS/div & 500 pS/div).
TABLE II FILTER PERFORMANCE PARAMETERS
rejection ratio (CMRR) and the power supply rejection ratio (PSRR) could be deteriorated if the CMFF is not employed. VII. MEASUREMENT RESULTS
*The maximum differential input signal is 500mV
0 p for 1% THD.
VI. FILTER ARCHITECTURE To illustrate the use of the OTA and the CMFB arrangement, a linearphase Bessel-Thomson OTA-C filter with a group delay ripple less than 3% up has been implemented. A fourth-order filter is needed to satisfy the required specifications. The block diagram of the filter with the required CMFB arrangement is shown in Fig. 9. The values of the transconductances and capacitors used are given in Table I. The output common-mode level needs to be fixed only once for any number of OTAs sharing the same output. Thus, some of the fully fledged OTAs (with CMFB and CMFF) may be replaced by ones with only CMFF. For instance the last OTA, in Fig. 9, do not have CMFB since its output is shared with other OTAs (with CMFB) which will fix the dc level of the output. The same OTA may not need a CMFF either since the output of the previous transconductance can be sensed somewhere else (by another OTA). Note that both the common-mode
The fourth-order linear-phase filter has been fabricated in the AMI 0.5-m CMOS process available through MOSIS. The chip micrograph is shown in Fig. 10. Fig. 11 shows the filter output spectrum for a differential input signal of amplitude 350 mVpp and frequency 30-MHz (approximately f03 dB =3); HD3 is measured around 049 dB for these settings. The measured total output noise generated in the bandwith of 100 MHz is about 700 Vrms . This corresponds to 45 dB of dynamic range for 0.5% THD. The measured group delay is shown in Fig. 12; about 3% for frequencies up to 100 MHz and less than 10% for frequencies up to 120 MHz. The measured CMRR, PSRR+ , and PSRR0 at 10 MHz (50 MHz) is 45 dB (32 dB), 26 dB (21 dB), and 35 dB (28 dB), respectively. The filter consumes 26 mA while operating from a 61:65V power supply. Table II contains a summary of different filter performance parameters compared with previously reported works in [9] and [10]. VIII. CONCLUSION General nonlinear effects in pseudo differential OTAs with CMFB have been described. The nonlinearity effects due to the interaction of the nonlinear common-mode signal of the CMFB circuit and the differential-signal have been determined. Other nonlinearity sources such as transistor mismatches, cross product of differential and common-mode signals, short channel effects have been also theoretically derived. To invoke the theory, a practical pseudo differential fully symmetric fully balanced OTA architecture has been taken as an example. It has been shown that an OTA with inherent CMFF structure made it easier to incorporate the CMFB arrangement. The same principle can be applied to any OTA with CMFF to incorporate the detection of the common-mode information of the previous stage for CMFB stabilization. A fourth-
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order 100–MHz linear phase filter using the pseudo differential OTA 2 in 0.5-m has been designed. The filter’s active area is 0.16 CMOS process and it achieves 45 dB of dynamic range.
mm
m
REFERENCES [1] A. Wyszynski and R. Schaumann, “Avoiding common-mode feedback in continuous-time Gm-C filters by use of lossy integrators,” in Proc. IEEE Int. Symp. Circuits and Systems, vol. 5, 1994, pp. 281–284. [2] A. N. Mohieldin, E. Sánchez-Sinencio, and J. Silva-Martínez, “A fully balanced pseudo-differential OTA with common-mode feedforward and inherent common-mode feedback detector,” IEEE J. Solid-State Circuits, vol. 38, pp. 663–668, Apr. 2003. linear input [3] T. Itakura, T. Ueno, H. Tanimoto, and T. Arai, “A 2 range fully balanced CMOS transconductor and its application to a 2.5 V -C LPF,” in Proc. IEEE Custom Integrated Circuits, 1999, 2.5 MHz pp. 509–512.
V
G
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