Multilevel Multiphase Space Vector PWM Algorithm

Multilevel Multiphase SVPWM Algorithm

Application to Three-Phase Converters

Comparison

Experimental

Multilevel Multiphase Space Vector PWM Algorithm With Switching State Redundancy Applied to Three-Phase Converters ´ ´ Oscar López, Jacobo Alvarez, Francisco D. Freijedo, Alejandro G. Yepes, Pablo Fernández-Comesa˜ na, Jano Malvar, Jes´ us Doval-Gandoy, Andrés Nogueiras, Alfonso Lago and Carlos M. Pe˜ nalver Electronics Technology Department, Vigo University, Spain

IECON’09, 3–5 November Porto, Portugal IECON’09 - Multilevel Multiphase SVPWM Algorithm With Switching State Redundancy Applied to Three-Phase Converters

1



Comparison

Experimental

Introduction

New multilevel multiphase SVPWM algorithm in [Lopez, 2009] 792

IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 56, NO. 3, MARCH 2009

Multilevel Multiphase Space Vector PWM Algorithm With Switching State Redundancy Óscar López, Member, IEEE, Jacobo Álvarez, Jesús Doval-Gandoy, Member, IEEE, and Francisco D. Freijedo, Member, IEEE

Abstract—Multilevel multiphase technology combines the benefits of multilevel converters and multiphase machines. Nevertheless, new modulation techniques must be developed to take advantage of multilevel multiphase converters. In this paper, a new space vector pulsewidth modulation algorithm for multilevel multiphase voltage source converters with switching state redundancy is introduced. As in three-phase converters, the switching state redundancy permits to achieve different goals like extending the modulation index and reducing the number of switchings. This new algorithm can be applied to the most usual multilevel topologies; it has low computational complexity, and it is suitable for hardware implementations. Finally, the algorithm was implemented in a field-programmable gate array, and it was tested by using a five-level five-phase inverter feeding a motor.

Vectors and matrices have been named with bold letters and scalars with normal letters. Lowercase letters have been used for normalized variables (except for matrices P , Nmin k , and Nmax k ). Variables related with vector space have been written by using Greek letters. Phases have been denoted by using superscripts (k). The position of vectors within sequences has been denoted by means of numeric subscripts (j or m).

Any number of phases ⇒ Three phase systems

IECON’09 -

I. I NTRODUCTION

M

OST OF the variable-speed electric drives use threephase machines. Nevertheless, since variable-speed ac drives include a power electronic converter, the number of machine phases can be higher than three. The major advantages

Index Terms—Field-programmable gate array (FPGA), multilevel converter, multiphase machine, space vector pulsewidth Multilevel Multiphase SVPWM Algorithm modulation (SVPWM), switching state redundancy.With Switching

State Redundancy Applied to Three-Phase Converters

2



Comparison

Experimental

Outline

1


2


3

Comparison With Existing Algorithm

4

Experimental Results

5

Conclusions

IECON’09 - Multilevel Multiphase SVPWM Algorithm With Switching State Redundancy Applied to Three-Phase Converters

3



Comparison

Experimental

P -Phase SVPWM Formulation Multilevel multiphase converter Phase 1 +2 +1 0 –1 –2

Phase k

Phase 2 +2 +1 0 –1 –2

+2 +1 0 –1 –2

Phase P +2 +1 0 –1 –2

Formulation in a P -dimensional space: vr = [vr 1 , vr 2 , . . . , vr P ]T ∈ RP , Floating neutral

⇒

v ˜r =

vsj = [vs 1j , vs 2j , . . . , vs Pj ]T ∈ ZP P +1 X j=1

v ˜sj tj ,

where

P +1 X

tj = 1

j=1


4



Comparison

Experimental

Block Diagram of the general SVPWM Algorithm Modulation strategy

SVPWM N levels P phases

Transformation

integ Inverse transformation

SVPWM (2 levels, P-1 phases)

Selection

Redundant switching states: Switching states that provide the same phase-to-phase voltage.


5



Comparison

Experimental

Algorithm Features Valid for the standard multilevel topologies. Any number of levels. Any number of phases. Sorted switching vector sequence . Minimizes number of switchings. Low computational complexity . Real-time implementation. Modulation index range: 0≤

Vfund N −1 ≤ π , Vdc 2 cos 2P

if P is odd.

Takes advantage of switching state redundancy. For converters with floating neutral. IECON’09 - Multilevel Multiphase SVPWM Algorithm With Switching State Redundancy Applied to Three-Phase Converters

6



Comparison

Experimental

Outline

1


2


3


4


5

Conclusions


7



Comparison

Experimental

Formulation If P = 3 ⇒ Particularized algorithm: Reference vector:

vr = [vr a , vr b , vr c ]T ∈ R3

Switching vectors:

vsj = [vs aj , vs bj , vs cj ]T ∈ Z3

Switching vectors in a 3D space: c

b

a

Example vr = [vr a , vr b , vr c ]T = [0.59, −1.86, 1.27]T IECON’09 - Multilevel Multiphase SVPWM Algorithm With Switching State Redundancy Applied to Three-Phase Converters

8



Comparison

Experimental

Transformation ( ωr a = vr a − vr c ω r = [ωr a , ωr b ]T ωr b = vr b − vr c Transformation b

c

b

⇒

a

a

v r ∈ R3

ω r ∈ R2

Example vr = [0.59, −1.86, 1.27]T

⇒

ω r = [−0.68, −3.13]T


9



Comparison

Experimental

Reference Space Vector Decomposition Integer part of ω r : ω i = integ(ω r ) = [ωi a , ωi b ]T ∈ Z2 integ

Fractional part of ω r : ω f = ω r − ω i = [ωf a , ωf b ]T ∈ R2

Example ( T

ω r = [−0, 68, −3, 13]

⇒

ω i = [−1, −4]T ω f = [0.32, 0.87]T


10



Comparison

Experimental

Two-Level Multiphase SVPWM Algorithm ωf a ≥ ωf b Sequence ω dj ω d1 = [0, 0]T no ω d2 = [0, 1]T ω d3 = [1, 1]T ω d1 = [0, 0]T yes ω d2 = [1, 0]T ω d3 = [1, 1]T


τ1 τ2 τ3 τ1 τ2 τ3

Times τj = 1 − ωf b = ωf b − ωf a = ωf a = 1 − ωf a = ωf a − ωf b = ωf b

Example a

ωf = 0.32 ωf b = 0.87

⇒

  ω d1 ω d2   ω d3

= [0, 0]T = [0, 1]T = [1, 1]T

→ → →

τ1 = 0.13 τ2 = 0.55 τ3 = 0.32


11



Comparison

Experimental

Redundant Switching Vector Selection Boundary Indices qmin and qmax Modulation strategy

qmin = fmin (Nmin , ω i , ω d1 , ω d2 , ω d3 ) qmax = fmax (Nmax , ω i , ω d1 , ω d2 , ω d3 ) Example ( 5-level inverter

Nmin = −2 Nmax = 2

⇒ ⇒

qmin = −1 qmax = 3


12



Comparison

Experimental

Redundant Switching Vector Selection qm Indices Selection Modulation strategy

Choose three consecutive integer numbers {q1 , q2 , q3 } within the interval [qmin , qmax ].

Example [qmin , qmax ] = [−1, 3]

⇒

{q1 , q2 , q3 } = {−1, 0, 1}


13



Comparison

Experimental

Redundant Switching Vector Selection Calculate nm and jm indices Modulation strategy

q1

⇒

q2

⇒

q3

⇒

n1 = integ (q1 − qi )/3 , n2 = integ (q2 − qi )/3 , n3 = integ (q3 − qi )/3 ,

j1 = q1 − qi − 3n1 + 1 j2 = q2 − qi − 3n2 + 1 j3 = q3 − qi − 3n3 + 1

Example q1 = −1 q2 = 0 q3 = 1

⇒ ⇒ ⇒

n1 = 1, n2 = 1, n3 = 2,

j1 = 2 j2 = 3 j3 = 1


14



Comparison

Experimental

Switching Vector Sequence

vs1 = [ωi a + ωd aj1 + n1 , ωi b + ωd bj1 + n1 , n1 ]T vs2 = [ωi a + ωd aj2 + n2 , ωi b + ωd bj2 + n2 , n2 ]T Inverse transformation

vs3 = [ωi a + ωd aj3 + n3 , ωi b + ωd bj3 + n3 , n3 ]T

Example n1 = 1, j1 = 2 ⇒

vs1 = vs (n1 , j1 ) = [0, −2, 1]T

n2 = 1, j2 = 3 ⇒

vs2 = vs (n2 , j2 ) = [1, −2, 1]T

n3 = 2, j3 = 1 ⇒

vs3 = vs (n3 , j3 ) = [1, −2, 2]T


15



Comparison

Experimental

Dwell Times

t1 = τj1 t2 = τj2 t3 = τj3 Selection

Example j1 = 2 ⇒

t1 = τ2 = 0.55

j2 = 3 ⇒

t2 = τ3 = 0.32

j3 = 1 ⇒

t3 = τ1 = 0.13


16



Comparison

Experimental

Outline

1


2


3


4


5

Conclusions


17



Comparison

Experimental


New particularized algorithm is similar to [Celanovic, 2001]: IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 37, NO. 2, MARCH/APRIL 2001

637

A Fast Space-Vector Modulation Algorithm for Multilevel Three-Phase Converters Nikola Celanovic, Member, IEEE, and Dushan Boroyevich, Member, IEEE

Abstract—This paper introduces a general space-vector modu-

Uses 3D/2D transformation. Based in a comparison operation and a tiny lookup table.


18



Comparison

Experimental

Similarities Algorithm by [Celanovic, 2001]:

New algorithm: b

h

g

a

( ω r g = vr a − vr b ω r h = vr b − vr c

( ω r a = vr a − vr c ω r b = vr b − vr c

Both algorithms: Comparison operations are equivalent. Lookup tables are equivalent. IECON’09 - Multilevel Multiphase SVPWM Algorithm With Switching State Redundancy Applied to Three-Phase Converters

19



Comparison

Experimental

Space Vector Sequence Comparison

[Celanovic, 2001] T ω s gh 1 = [2, −3] → τ1 = 0.13

ω s gh 2 gh ωs 3

= [3, −4]T → τ2 = 0.32 /

[Celanovic, 2001]: Space vector sequence

vr = [0.59, −1.68, 1.27]T

4 Vh 2 0 –2

Vg

–4

= [3, −3]T → τ3 = 0.55

0

0.5

1

T ω s gh 1 = [2, −3] → τ1 = 0.13 T ω s gh 2 = [3, −3] → τ2 = 0.55 T ω s gh 3 = [3, −4] → τ3 = 0.32 /

Space vector sequence

New algorithm: New algorithm

4 Vh 2 0 –2

Vg

–4 0

0.5


1

20



Comparison

Experimental

Differences

Modulation strategy

SVPWM N levels P phases

Transformation

integ Inverse transformation

Equivalent to [Celanovic01]


Selection


21



Comparison

Experimental

Outline

1


2


3


4


5

Conclusions


22



Comparison

Experimental

Resource Summary XC3S200 FPGA from Xilinx Target Device : xc3s200 Number of Slice Flip Flops: 2,057 out of 3,840 Number of 4 input LUTs: 2,439 out of 3,840 Number of occupied Slices: 1,563 out of 1,920 Total Number 4 input LUTs: 2,231 out of 3,840 Number of bonded IOBs: 63 out of 173 IOB Flip Flops: 39 Number of Block RAMs: 0 out of 12 Number of MULT18X18s: 0 out of 12 Number of GCLKs: 8 out of 8 Number of Startups: 1 out of 1 Total equivalent gate count for design: 31,063

53% 63% 81% 58% 36% 0% 0% 100% 100%

Implementation for a three-level inverter. IECON’09 - Multilevel Multiphase SVPWM Algorithm With Switching State Redundancy Applied to Three-Phase Converters

23



Comparison

Experimental

Trigger Signals Phase a:

1

1

1

1

1

Phase b:

1

2

2

2

1

Phase c:

0

0

1

0

0

Reference voltage: vr = [−0.16, 0.52, −0.77]T Switching frequency: fs = 10 kHz IECON’09 - Multilevel Multiphase SVPWM Algorithm With Switching State Redundancy Applied to Three-Phase Converters

24



Comparison

Experimental

Experimental Setup DSPACE DS1103 PPC Controller Board. XC3S200 FPGA. Three-level neutral-point clamped inverter. 220/380 V, 1.420 r/min, 1.35 kW induction motor. DSPACE

Control

FPGA

SVPWM

Trigger signals

Optical link

Motor 150 V 150 V

NPC inverter


25



Comparison

Experimental

Experimental setup

NPC inverter DSPACE FPGA

Optical link

dc bus Motor


26



Comparison

Experimental

Experimental Measurements Leg voltage

Switching frequency: 10 kHz Fundamental frequency: 50 Hz.

Ch1: Leg voltage Vs a Ch2: Filtered voltage Vs a Ch3: Filtered neutral point voltage Vn

Fundamental amplitude: 1.15 p.u.


27



Comparison

Experimental

Experimental Measurements Phase-to-phase voltage

Switching frequency: 10 kHz Fundamental frequency: 50 Hz.

Ch1: Phase-to-phase voltage Vs b − Vs a Ch2: Filtered voltage Vs b − Vs a

Fundamental amplitude: 1.15 p.u.


28



Comparison

Experimental

Conclusions

General multiphase SVPWM algorithm . Particularized for three phase converters. Valid for standard multilevel topologies. Any number of levels. Easy to select the redundant switching vectors. Low computational complexity . Real-time implementation.

Very similar to the fast SVPWM in [Celanovic, 2001] The three-level version of the algorithm was: Implemented in FPGA. Tested by using a NPC inverter.


29



Comparison

Experimental

References

O. López, J. Alvarez, J. Doval-Gandoy, and F. D. Freijedo, “Multilevel multiphase space vector PWM algorithm with switching state redundancy,” IEEE Trans. Ind. Electron., vol. 56, no. 3, pp. 792–804, Mar. 2009. N. Celanovic and D. Boroyevich, “A fast space-vector modulation algorithm for multilevel three-phase converters,” IEEE Trans. Ind. Appl., vol. 37, no. 2, pp. 637–641, Mar. 2001.


30