Multilevel multiphase space vector PWM algorithm

Multilevel Multiphase SVPWM Algorithm

Application to 3-Phase 4-Leg Converters

Comparison

Experimental

Multilevel Multiphase Space Vector PWM Algorithm With Switching State Redundancy Applied to Three-Phase Four-Leg Converters ´ ´ Oscar López, Jacobo Alvarez, Francisco D. Freijedo, Alejandro G. Yepes, Jano Malvar, Pablo Fernández-Comesa˜ na, Jes´ us Doval-Gandoy, Andrés Nogueiras, Alfonso Lago and Carlos M. Pe˜ nalver Electronics Technology Department, Vigo University, Spain

IECON’10, 7–10 November Phoenix, AZ, USA IECON’10 - Multilevel Multiphase SVPWM Algorithm With Switching State Redundancy Applied to 3-Phase 4-Leg Converters

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Comparison

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Introduction General multilevel multiphase SVPWM algorithm

New multilevel multiphase SVPWM algorithm in [Lopez, 2009] 792

IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 56, NO. 3, MARCH 2009

Multilevel Multiphase Space Vector PWM Algorithm With Switching State Redundancy Óscar López, Member, IEEE, Jacobo Álvarez, Jesús Doval-Gandoy, Member, IEEE, and Francisco D. Freijedo, Member, IEEE

Abstract—Multilevel multiphase technology combines the benefits of multilevel converters and multiphase machines. Nevertheless, new modulation techniques must be developed to take advantage of multilevel multiphase converters. In this paper, a new space vector pulsewidth modulation algorithm for multilevel multiphase voltage source converters with switching state redundancy is introduced. As in three-phase converters, the switching state redundancy permits to achieve different goals like extending the modulation index and reducing the number of switchings. This new algorithm can be applied to the most usual multilevel topologies; it has low computational complexity, and it is suitable for hardware implementations. Finally, the algorithm was implemented in a field-programmable gate array, and it was tested by using a five-level five-phase inverter feeding a motor.

Vectors and matrices have been named with bold letters and scalars with normal letters. Lowercase letters have been used for normalized variables (except for matrices P , Nmin k , and Nmax k ). Variables related with vector space have been written by using Greek letters. Phases have been denoted by using superscripts (k). The position of vectors within sequences has been denoted by means of numeric subscripts (j or m).

Any number of phases ⇒ Three-phase four-leg systems I. I NTRODUCTION

M

OST OF the variable-speed electric drives use threephase machines. Nevertheless, since variable-speed ac drives include a power electronic converter, the number of Index Terms—Field-programmable gate array (FPGA), multilevel converter, multiphase machine, space vector pulsewidth IECON’10 - Multilevel Multiphase SVPWM Algorithm With Switching Statephases Redundancy Applied to 3-Phase Converters machine can be higher than three. The major4-Leg advantages

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Comparison

Experimental

Introduction Previous works

“Multilevel multiphase SVPWM algorithm” (Lopez et. al) Without redundancy

With redundancy

P =3

Equivalent to “A 3-D space vector modulation generalized algorithm for multilevel converters” (M. Prats et. al.)

Extension of “A fast space-vector modulation algorithm for multilevel three-phase converters” (N. Celanovic et. al.)

P =4

New algorithm

Extension of “Threedimensional space vector modulation algorithm for four-leg multilevel converters using abc coordinates” (L. Franquelo et. al.)

IECON’10 - Multilevel Multiphase SVPWM Algorithm With Switching State Redundancy Applied to 3-Phase 4-Leg Converters

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Comparison

Experimental

Outline

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Application to Three-Phase Four-Leg Converters

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Comparison With Existing Algorithm

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Experimental Results

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Conclusions


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Comparison

Experimental

P -Phase SVPWM Formulation Multilevel multiphase converter Phase 1 +2 +1 0 –1 –2

Phase 2 +2 +1 0 –1 –2

Phase k +2 +1 0 –1 –2

Phase P +2 +1 0 –1 –2

Formulation in a P -dimensional space: Reference vector: Switching state vector:

vr = [vr 1 , vr 2 , . . . , vr P ]T ∈ RP vsj = [vs 1j , vs 2j , . . . , vs Pj ]T ∈ ZP


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Comparison

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Block Diagram of the general SVPWM Algorithm Modulation strategy

SVPWM N levels P phases

Transformation

integ Inverse transformation

SVPWM (2 levels, P-1 phases)

Selection

Redundant switching states: Switching states that provide the same leg-to-leg voltage.


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Comparison

Experimental

Algorithm Features

Valid for the standard multilevel topologies. Any number of levels. Any number of phases/legs. Sorted switching vector sequence . Minimizes number of switchings. Low computational complexity . Real-time implementation. Takes advantage of switching state redundancy.


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Comparison

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Outline

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Conclusions


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Formulation Converter Leg a +2 +1 0 –1 –2

Leg b +2 +1 0 –1 –2

Leg c +2 +1 0 –1 –2

Leg n +2 +1 0 –1 –2

If P = 4 ⇒ Particularized algorithm: Reference vector: Switching state vectors:

vr = [vr a , vr b , vr c , vr n ]T ∈ R4 vsj = [vs aj , vs bj , vs cj , vs nj ]T ∈ Z4

Example vr = [vr a , vr b , vr c , vr n ]T = [1.39, 1.15, 0.31, 1.12]T IECON’10 - Multilevel Multiphase SVPWM Algorithm With Switching State Redundancy Applied to 3-Phase 4-Leg Converters

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Comparison

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Transformation

Transformation

Calculate the reference space vector ω r from reference voltage vector  vr : a a n  ωr = vr − vr ω r = [ωr a , ωr b , ωr c ]T ωr b = vr b − vr n   c ωr = vr c − vr n

Example vr = [1.39, 1.15, 0.31, 1.12]T

⇒

ω r = [0.27, −2.16, −1.43]T


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Comparison

Experimental

Reference Space Vector Decomposition Integer part of ω r : ω i = integ(ω r ) = [ωi a , ωi b , ωi c ]T ∈ Z3 integ

Fractional part of ω r : ω f = ω r − ω i = [ωf a , ωf b , ωf c ]T ∈ R3

Example ( T

ω r = [0.27, −2.16, −1.43]

⇒

ω i = [0, −3, −2]T ω f = [0.27, 0.74, 0.57]T


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Comparison

Experimental

Two-Level Multiphase SVPWM Algorithm Calculate the displaced space vectors ω dj & dwell times τj : Cab = [ωf a ≥ ωf b ] Cbc = [ωf b ≥ ωf c ] SVPWM (2 levels, P-1 phases)

Cca = [ωf c ≥ ωf a ]

 ω d1    ω Table d2 ===⇒  ω d3    ω d4

→ → → →

τ1 τ2 τ3 τ3

Example ωf a = 0.27 ωf b = 0.74 c

ωf = 0.57

Cab = 0 ⇒

Cbc = 1 Cca = 1

 ω d1    ω d2 ⇒  ω d3    ω d4

= [0, 0, 0]T = [0, 1, 0]T = [0, 1, 1]T = [1, 1, 1]T

→ → → →

τ1 τ2 τ3 τ3

= 0.26 = 0.17 = 0.30 = 0.27


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Comparison

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Redundant Switching Vector Selection Modulation strategy

Example ( 5-level inverter

Nmin = −2 Nmax = 2

 n 1 Modulation   n strategy 2 ======⇒  n 3    n4

= 1, j1 = 4 = 2, j2 = 1 = 2, j3 = 2 = 2, j4 = 3


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Comparison

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Switching Vector Sequence ω s1 = ω i + ω d1 ω s2 = ω i + ω d2 ω s3 = ω i + ω d3 ω s4 = ω i + ω d4 vs1 = Inverse transformation

vs2 = vs3 = vs4 =

[ωs aj1 [ωs aj2 [ωs aj3 [ωs aj4

+ n1 , ωs bj1 + n1 , ωs cj1 + n1 , n1 ]T + n2 , ωs bj2 + n2 , ωs cj2 + n2 , n2 ]T + n3 , ωs bj3 + n3 , ωs cj3 + n3 , n3 ]T + n4 , ωs bj4 + n4 , ωs cj4 + n4 , n4 ]T

Example n1 = 1, j1 = 4 ⇒

vs1 = [2, −1, 0, 1]T

n2 = 2, j2 = 1 ⇒

vs2 = [2, −1, 0, 2]T

n3 = 2, j3 = 2 ⇒

vs3 = [2, 0, 0, 2]T

n4 = 2, j4 = 3 ⇒

vs4 = [2, 0, 1, 2]T


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Comparison

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Dwell Times t1 = τj1 t2 = τj2 t3 = τj3 Selection

t4 = τj4

Example j1 = 4 ⇒

t1 = τ4 = 0.27

j2 = 1 ⇒

t2 = τ1 = 0.26

j3 = 2 ⇒

t3 = τ2 = 0.17

j3 = 3 ⇒

t4 = τ3 = 0.30


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Comparison

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Outline

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Comparison With Existing Algorithm New particularized algorithm is similar to [Franquelo, 2006]: 458

IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 53, NO. 2, APRIL 2006

Three-Dimensional Space-Vector Modulation Algorithm for Four-Leg Multilevel Converters Using abc Coordinates Leopoldo Garcia Franquelo, Fellow, IEEE, Ma. Ángeles Martín Prats, Member, IEEE, Ramón C. Portillo, Student Member, IEEE, Jose Ignacio León Galvan, Student Member, IEEE, Manuel A. Perales, Juan M. Carrasco, Member, IEEE, Eduardo Galván Díez, and Jose Luis Mora Jiménez

Most of the SVM algorithms found in the literature for voltage converters use a representation of voltage vectors in αβγ coordinates [3], [6], instead of using abc coordinates (referenced from now on this paper as natural coordinates). The αβγ representation offers an interesting information about the zero-sequence component of both currents and voltages (proportional to the γ coordinate), however the change of reference frame have to be carried out, implies complex calculations. In addition, the three-dimensional (3-D) representation of the switching vectors, in αβγ is difficult to understand. In [7], a new 3-D SVM in natural coordinates is applied to conventional four-leg voltage source converters showing the advantages of Index Terms—Multilevel converters, natural coordinates, using these coordinates. Previous works from the authors on generalized 3-D-SVM algorithms multilevel converter switching-vectors sequence, three-dimensional space-vector IECON’10 - Multilevel Multiphase SVPWM Algorithm With Switching State Redundancy Applied for to the 3-Phase 4-Leg Converters Abstract—In this paper, a novel three-dimensional (3-D) space-vector algorithm for four-leg multilevel converters is presented. It can be applied to active power filters or neutral-current compensator applications for mitigating harmonics and zerosequence components using abc coordinates (referred from now on this paper as natural coordinates). This technique greatly simplifies the selection of the 3-D region where a given voltage vector is supposed to be found. Compared to a three-level modulation algorithm for three-leg multilevel converters, this algorithm does not increase its complexity and the calculations of the active vectors with the corresponding switching time that generate the reference voltage vector. In addition, the low-computational cost of the proposed algorithm is always the same and it is independent of the number of levels of the converter.

Both use the same 4D/3D transformation. Both use the same comparison operations. Both use the same lookup table.

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Comparison

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Differences

Modulation strategy

SVPWM

Switching state selection is new

N levels P phases

Transformation

integ Inverse transformation

If P = 4 then it is equivalent to [Franquelo06]

SVPWM (2 levels, P-1 phases)

Selection

Equivalent to [Franquelo06] New


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Comparison

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Space Vector Sequence Comparison

[Franquelo, 2006] 1 1 1 [San , Sbn , Scn ] = [0, −3, −2]T → d1 = 0.26 2 2 2 [San , Sbn , Scn ] = [0, −2, −2]T → d2 = 0.16

= [0, −3, −1]

T

→ d3 = 0.30

= [1, −2, −1]

T

→ d4 = 0.27

b c [ωs a 1 , ω s 1 , ωs 1 ]

4 2

San

Scn

Sbn

0 –2 –4

0

0.5

1

New algorithm:

New algorithm = [0, −3, −2]

T

→ τ1 = 0.26

b c T [ωs a 2 , ωs 2 , ωs 2 ] = [0, −2, −2] → τ2 = 0.16 b c T [ωs a 3 , ωs 3 , ωs 3 ] = [0, −3, −1] → τ3 = 0.30 b c T [ωs a 4 , ωs 4 , ωs 4 ] = [1, −2, −1] → τ4 = 0.27

Space vector sequence

3 3 3 [San , Sbn , Scn ] 4 4 4 [San , Sbn , Scn ]

[Franquelo, 2006]: Space vector sequence

vr = [1.39, 1.15, 0.31, 1.12]T

4 2

Wa

Wc

Wb

0 –2 –4

0

0.5


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Outline

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Experimental Setup

DSPACE DS1103 PPC Controller Board. XC3S200 FPGA. Five-level four-leg cascaded full bridge inverter (Vdc = 30 V). dSPACE

Control

FPGA

SVPWM

dc link

Trigger signals

Optical link

Inverter

Load


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Comparison

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Experimental setup Inverter Optical link

FPGA dSPACE

dc link

Load IECON’10 - Multilevel Multiphase SVPWM Algorithm With Switching State Redundancy Applied to 3-Phase 4-Leg Converters

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Comparison

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Experimental Measurements Leg voltage

Switching frequency: 10 kHz Phase references: 50 Hz, 1.9 p.u.

Ch1: Ch2: Ch3: Ch4:

Leg voltage Vs a Filtered leg voltage Vs a Leg voltage Vs n Filtered leg voltage Vs n

Neutral reference: 150 Hz, 1.5 p.u.


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Comparison

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Experimental Measurements Leg-to-leg voltage

Switching frequency: 10 kHz Phase reference: 50 Hz, 1.9 p.u.

Ch1: Vs b − Vs a Ch2: Filtered Vs b − Vs a

Neutral reference: 150 Hz, 1.5 p.u.


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Comparison

Experimental

Conclusions

General multiphase SVPWM algorithm . Particularized for four-leg converters. Valid for standard multilevel topologies. Any number of levels. Easy to select the redundant switching states. Low computational complexity . Real-time implementation.

Extension of the 3D SVPWM algorithm in [Franquelo, 2006] The five-level version of the algorithm was: Implemented in FPGA. Tested by using a cascaded full-bridge inverter.


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Comparison

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References

O. López, J. Alvarez, J. Doval-Gandoy, and F. D. Freijedo, “Multilevel multiphase space vector PWM algorithm with switching state redundancy,” IEEE Trans. Ind. Electron., vol. 56, no. 3, pp. 792–804, Mar. 2009. L. G. Franquelo, M. M. Prats, R. Portillo, J. I. Leon, M. A. Perales, J. M. Carrasco, E. Galvan, and J. L. Mora, “Three-dimensional space-vector modulation algorithm for four-leg multilevel converters using abc coordinates,” IEEE Trans. Ind. Electron., vol. 53, no. 2, pp. 458–466, Apr. 2006.


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