Advances in Electronic and Electric Engineering. ISSN 2231-1297, Volume 4, Number 1 (2014), pp. 17-30 © GBS Publishers & Distributors (I) http://www.gbspublisher.com
Simulation of a Complete Logic Based Protection Scheme for Line and Bus Faults in Six Phase Transmission Line G. Chandra Sekhar1, P.S. Subramanyam2 and D. Padmavathi3 1
Dept. of EEE, K.L. University, Guntur, Andhra Pradesh, India. Dept. of EEE, Vignana Bharathi Institute of Tech., Hyderbad, A ndhra Pradesh, India. 3 Dept. of EEE, Sridevi Women’s Engineering College, Hyderbad, Andhra Pradesh, India. E-mail:
[email protected],
[email protected], 3
[email protected] 2
Abstract In this paper the authors have developed a completely Logic Based protection scheme including Backup protection for Protection of six phase transmission system against both Line and Bus faults by using Simulink platform of MATLAB. Six Phase system can be considered as two mutually coupled Three Phase Systems having mutual coupling only between Zero Sequence components when Dual Three Phase Transformation is used for analyzing the Six Phase System. Hence this scheme is applicable to Protection of Three Phase Transmission Line also without any change. For Line Faults both fault currents and bus voltages will exist, but for Bus Bar Faults only fault bus currents exist and faulty bus voltages will be zero. This concept along with the fault impedance measured at the bus was used to identify the relays that are to act. For line faults the relays of the faulty section only will give the trip signal and for Bus Bar Faults the relays of Line sections on both sides of the faulty bus will give thetrip signal. A Three Section Transmission line is considered having six relays to illustrate the Back Up Protection Feature. IEEE 9 Bus Three Phase Power System is considered to study the Concept envisaged. The results were found to be up to the expectations for both Symmetrical and Unsymmetrical Faults. This Scheme which works for Three Phase System automatically works for Six Phase System because the Relaying operation is developed on Single Phase operation. The realy have given the trip signal of logic 1 for the fault and logic 0 for healthy
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D. Padmavathi et al condition. The main advantage of the scheme is that no hardware is needed except for the interface required for both input and output to Simulink Package. The main feature of the work is that the faulty current or voltage on fault are compared with the history of the same current or voltage before fault over a few cycles just before the occurrence of the fault. Keywords: Six phase system, Protection, Negative sequence currents, back up protection.
1. Introduction A Single Circuit Six phase Transmission Line with the same Line/Phase voltage is very much promising to transfer considerably more power compared to a Double Circuit Three Phase transmission Line within the existing transmission corridor or even with a much smaller corridor[1]. Conversion of existing Three Phase Double Circuit Lines into Six Phase lines is advocated on economic considerations [2,3]. While designing the protection scheme for six phase transmission system Negative sequence currents [4] play an important role[5]. Phase comparison and amplitude comparison of prefault current and fault current is done by using “Complex phase difference” and “Relational operator” blocks of Simulink [6]. For Line Faults both fault currents and bus voltages will exist, but for Bus Bar Faults only fault bus currents exist and faulty bus voltages will be zero. This concept was incorporated using “If” block available in Matlab/Simulink tool. The fault impedance is measured by dividing the faulty Bus voltage with the fault current using “Divide” Block. The Directional Feature is taken into account by “if” Block. The relays of the faulty section only will give the trip signal for line faults and for Bus Bar Faults relays of the Line sections on both sides of the faulty bus will give the trip signal. The “Switch” Block is used to select the section in which fault is assumed to occur and to simulate. Generally the fault impedance (Zf) is less than the line impedance (ZL), the former one is measured by using “Divide” block available in “Library browser” of Simulink. This condition is incorporated by using “If” block before passing it through Relay. The relay will send the trip signal to the circuit breaker immediately after the fault occurs and in case if it fails to operate, the backup relay will operate within ¼th of the cycle.
2. Any One Phase Protection of Six Phase Transmission Line The protection scheme for any one phase of the six phase transmission system is shown in Fig.1.Any one Phase Representation is shown because a Six Phase System can operate even with four lines out [7] .Also this scheme works even for open circuit faults because it had been verified that the conditions for one line open is equivalent to five line ground fault etc for six phase systems [7].
Simulation of a Complete Logic Based Protection Scheme for Line and Bus
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Fig. 1: Any one phase representation of protection scheme for Symmetrical and Unsymmetrical faults. Fault current wave forms are compared with corresponding healthy wave forms by using Complex phase difference” and “Relational operator” blocks of MATLAB/ Simulink library and is represented in a subsystem “phase & Amplitude comparison” block which is shown in Fig.2 along with its waveforms in Fig.3 for ready reference[6].
Fig. 2: Simulink diagram for subsystem“ Phase&.comparison” A single source has been shown in the system as there will be only one current wave form but with different values namely normal current and faulty current. But only for the purpose of the simulation the gain block is introduced. AND Gate is used because under fault normally there will be amplitude and phase difference and it introduces additional redundancy. Relay Delay Td0 is used to prevent mal operation of relay due to momentary faults.
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Fig. 3: Output wave forms for the subsystem given in Fig.2
3. Sample Problem An IEEE 9 bus Three Phase system is considered to check the proposed protection scheme given in Fig.4
Fig. 4: IEEE 9 bus system. A single line to ground fault is assumed to occur at middle of Transmission line between Bus Nos.7&8 and also at Bus No.7 for IEEE 9 bus system separately. The sample system is simulated for fault analysis by using Power world simulator 8.0[8]. The required result analysis of fault voltages and fault currents are given below.Protection scheme is simulated using SIMULNIK.
Simulation of a Complete Logic Based Protection Scheme for Line and Bus
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The single line representing any one Phase of the three sections consisting of Buses 5, 7, 8 and 9of the IEEE 9 bus problem is give in Fig. 5.
Fig. 5: Three section single line diagram corresponding to a part of IEEE 9 Bus Problem. For understanding the operation of the Protection Scheme the sub section B of the Scheme given in Fig. 1. is given below separately. The subsystems “Section A” and “section B” are same as that of “Section B”.
Fig. 5: Simulnk diagram for subsystem “ ‘ section B”.
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The Fault impedance is measured by using “Divide” block to which both fault current and Bus voltage during fault is fed. As the fault impedance is always less than the line impedance, which is incorporated in subsystem“Section B” which is shown in Fig.5.The “If1” block gives the signal only when Zf is less than ZL and also gives the directional effect for the relay by ‘IF’ logic. If the fault occurs in section B the Relays R3 and R4 only will operate and R2 will not operate. The “If2” block distinguishes the line fault and Bus fault separately. The faulty section is selected by using “Switch case block” which selects the section in which the fault is simulated. The same fault current may flow through the relays in other sections also which are before the faulty section, but the fault impedance measured and the directional effect as provided by the “If’ Block of subsystem “section B” block etc. to prevent tripping of the relays in other sections. To simulate fault in section A, “1” is the input to switch case block, “2” is the input for fault in section B, and “3” is the input for fault in section C. The fault current after getting compared for both phase difference and amplitude difference is fed to AND gate in addition to Negative sequence currents [4]. Negative sequence currents will exists only for unsymmetrical faults. The Negative Sequence Detection is necessary because for certain line to line or LL-G faults involving the same phases of the two opposing Three Phase Sub Systems constituting the Six Phase System Zero Sequence Currents get cancelled [4,7]. For the scheme to work for symmetrical faults an OR gate is used after AND gate. To cross check the scheme for symmetrical faults in the simulation work the “Neg.Seq” block had been removed and the wave forms traced were as per the expectations, i.e. the relay acts even for symmetrical faults. In this simulation work the fault current is assumed to occur at middle of any section and the fault current flowing through either sides of fault point may or may not have same direction. Fault current gets divided into two parts and is fed to Relational operator through Gain blocks, one for each part. To simulate the condition when the currents in both sides of the fault are in the same direction, both gains shall be of same sign and to simulate opposite direction one of the Gain blocks shall have Negative sign. In case fault occurs in any section the respective relays on both ends of faulty section only will give trip signal with a time delay of Td1, (sum of time at which fault occurs and Td0). The delay Td0=0.01sec is used to prevent mal operation of the relay due to momentary faults which get cleared automatically. The relay acts only if the fault impedance measured is less than the line impedance and for the faulty section only, because of the directional effect as provided by the “If1’ Block of subsystem “section B” block etc. An SL-G Fault is assumed to occur at Bus 2 corresponding to bus # 7 of IEEE 9 Bus Problem. The relay gives the trip signal in total time delay Td1=0.04sec and the corresponding wave forms are shown in Fig.6.
Simulation of a Complete Logic Based Protection Scheme for Line and Bus
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Fig. 6: Output wave forms for L-G Fault at Bus#7. DuringBus Bar faults only under voltage of the bus bar is considered because difference in current directions in section A and section B does not have any effect. But for line faults current comparison is only considered for section B and backup protection is only for failure of relays in section B with time delay. So the current in section A or section C does not matter. The SL-G fault and also symmetrical faults are assumed to occur separately at middle of the section B, i.e. in line 8 between Bus # 7 and Bus # 8 of the IEEE 9 Bus Problem. The relay gives the trip signal in total time delay Td1=0.04 sec and the corresponding wave forms are shown in Fig.7. and Fig.8. respectively. Similarly if the faults are assumed to occur on sections A or section C the wave forms will be exactly the same as those of Section B.
Fig. 7: Output wave forms for L-G Fault at the middle of section B.
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Fig. 8: Output wave forms for Symmetrical fault at the middle of section B. For any one Phase of a three sections line the operation of the different Relays for faults in different sections as verified in the Simulation work are given in Table No. I. Table 1: Operation of Different Relays for faults in different sections.
for operation X-- for No operation Case1: With Fault currents on either side of fault point in the same direction Case2: With Fault currents on either side of fault point in the opposite direction
4. Backup Protection of Six Phase Transmission System The scheme of protection presented in Fig.1 is extended to provide the backup protection in case the relay fails to give trip signal by using three more “If” blocks which is shown in Fig.9 for both Bus faults and Line faults. The backup protection scheme is presented for section B only, same thing can be applied to all sections. The sub block “section B” is same as that of Fig.5. An SLG Fault is assumed to occur at t=0.03sec after comparison of the present wave with the previous history of the wave in the middle of section B. The trip signal occurs at Td1=0.04 sec for both Relays R3& R4 which had been shown in Fig.7.The relay R2 will not operate because of the logic
Simulation of a Complete Logic Based Protection Scheme for Line and Bus
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taken care of by ‘If1’ block thus giving the directional effect. If the concern relay fails to act the backup relay is scheduled to act within ¼ cycle i.e. at a time delay of Td2=0.045 (Td1+0.005sec) .If R3 fails to operate, R1 & R2 will operate with a time delay of Td2=0.045sec which is shown in Fig.10.If R4 fails to operate, R5 & R6 will operate with the same time delay of Td2=0.045 sec which is shown in Fig.11.If both R3&R4 fail to operate all the relays R1,R2,R5,R6 & RG2 will operate with the same time delay of Td2=0.045sec which is shown in Fig.12. The operation of the relays when the fault occurs in section B is given in Table No.II for both Line and Bus faults. Bus fault is assumed to occur at Bus No.7, the relays R1,R2,R3,R4& RG2 trips at Td1=0.04 sec which had been shown in Fig.6. If the either of the Relays R1 & R2 or both fail to operate the Relay R0 will trip at time delay Td2=0.045 sec which is shown in Fig.13, similarly if the either of the Relays R3 & R4 or both fail to operate the Relays R5& R6 will trip at time delay Td2=0.045 sec. which is shown in Fig.14. Mal operation of the relay R3 or R4 had been simulated for verification purpose by making the output as Logic 0 and outputs of Relays are shown as 0 when the fault occurs at Td1. Then the backup protection scheme isolated the fault with a greater time delay. All the wave forms are up to the expectation. The simulation time is assumed to be 5 cycles (0.1 Sec), and the fault is assumed to occur at t=0.03sec.
Table 2: Operation of Different Rekays for Fault in Section B for Backup Protection. Type of Fault
Line Fault
Bus #2 Fault
R0
R1
R2
Case I
X
X
X
Case II
X
Td2
Td2
Case III
X
X
X
Case IV
X
Td2
Td2
Case I
X
Td1
Td1
X
X
Td1
Td1
Case II Case III
Td2 X
R3
R4
Td1 Td1 X
Td1
Td1 X
X X
Td1 Td1 Td1 Td1 X
( Td1 =0.04sec) &( Td2 =0.045sec)
X
R5
R6
R7
RG2
RG3
X
X
X
X
X
X
X
X
X
X
Td2
Td2
X
X
X
Td2
Td2
X
X
X
X
X
X
X
X
Td2
Td1
X
X
X
X
Td2 Td1
X X
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Fig. 9: Scheme of back up protection.
Fig. 10: Output wave forms when R3 fails and R4 operating for Line fault.
Simulation of a Complete Logic Based Protection Scheme for Line and Bus
Fig. 11: Output wave forms when R4 fails and R3 operating for Line fault.
Fig. 12: Output wave forms when both R3 & R4 fail to operate for Line fault.
Fig. 13: Output wave forms when both R1& R2 fail to operate for fault at Bus#7.
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Fig. 14: Output wave forms when both R3& R4 fail to operate for fault at Bus#7.
5. Conclusions 1. Negative sequence currents play a major role in the protection of six phase transmission system, because for certain types of faults involving ground ,the zero sequence currents are found to be absent in the case of six phase system. 2. This scheme works satisfactorily for both symmetrical and unsymmetrical faults irrespective of direction of fault current on either side of fault point. 3. The backup protection works as expected. 4. Output of relays is checked for faults in all the three sections simulating faults in each section. 5. This scheme gives complete Protection including directional effect for all types of faults including symmetrical faults in any of the three sections shown. 6. The scheme works for both Line faults and Bus faults. 7. The scheme works for Six Phase System as it has been designed for fault in any one phase. 8. This scheme works for open circuit faults also because the conditions for one line open is equivalent to conditions of remaining five lines short etc. 9. The Scheme requires no hardware except the hardware interfaces to Simulink.
References [1] [2]
H.C. Barnes, L.O. Barthold, “ High phase order power transmission”, Presented by Cigre Sc. Electra No.24, 1973, pp. 39-153. P.S.Subramanyam, “Contributions to the analysis of six phase system” Ph.D. Thesis, IIT, Madras, March 1983.
Simulation of a Complete Logic Based Protection Scheme for Line and Bus [3]
[4]
[5]
[6]
[7]
[8]
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P.S.Subramanyam, A. Chandra Sekharan, S.Elangovan, “Dual three phase transformation for comprehensive fault analysis of as six phase system”, Electric power systems research, 1997, Paper No. EPSR 1113. G.ChandraSekhar, P.S.Subramanyam, B.V.Sanker Ram,“Logic based detection of Negative sequence currents for six phase system”International Journal of Applied Engineering Research, ISSN 0973-4562, Vol 6 ,Number 6(2011) ,pp.1311-1322. G.ChandraSekhar , P.S.Subramanyam and B.V.Sanker Ram, “LogicBased Design Of Protection Scheme For Six Phase System Using Detection Of Negative Sequence Currents”International Journal of Recent Trends in Engineering &Technology,ACEEE,USA, Vol.No.4. Issue 4 Nov,2011. G.ChandraSekhar, P.S.Subramanyam, B.V.Sanker Ram, A Novel Logic Based Directional over Current and Under Voltage Relays for Three Phase System, International Review on Modelling and Simulations (Vol. 4 No. 4) - August 2011 - Papers (Part B) pp1740-1745. K.Ramesh Reddy, P.S.Subramanyam, T.KrishnaParandhama, “ Analysis of simultaneous series and shunt faults on six phase power transmission system”, Proc. Ninth National Power system conference, IIT, Kanpur, Dec 1996,pp.183-193. Power world simulator software version 8.0, IEEE 9 bus system.
Author Biography
G. Chandra Sekhar received his B.E(EEE) in the year 1998 from Andhra University and M Tech in High Voltage Engineering in the year 2001 from JNTU CollegeofEngineering, Kakinada, E.G(Dt), AP,India.Heis Pursuing Ph.Dfrom JNTU,Kukatpally,Hyderabad. He has Five International Journal publications to his credit. His area of interest includes Electrical Power systems, Electrical Machines,Electricl Circuits and Multiphase transmission systems.Mr. Chandra Sekhar is life member of Indian Society for Technical Education(ISTE) and Member of IEEE.
P.S. Subrahmanyam received his Bachelor of Engineering in Electrical Engineering from Andhra University & Masters Degree in Electrical Power Systems from Jawaharlal Nehru Technological University . He received his PhD from IIT Madras. He published a number of papers in National and International Journals
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and several text books. Basically from Electrical Engineering discipline, he cross migrated to the field of Computer Science and Engineering. His areas of interest are Power Systems including Six Phase Systems , Six Phase Induction Motors and Power electronics. Dr. Pisupati Sadasiva Subramanyam is a fellow of The Institution of Engineers (India), Fellow of National Federation of Engineers, Senior Member of IEEE, Member of Computer Society of India, and Member of Indian Society for Technical Education.
D. Padmavathi received her B.E (EEE) from Gulbarga university in the year 1991 and M.E in Electrical power systems from University visvesvaraya college of Engineering ,Bangalore in the year 1995and she received her Ph.D from JNTU,Hyderabad in the year 2011.She has published number of papers in International conferences and Journals and also she has published text book on Electromagnetic fields.Dr.D.Padmavathi is life member of ISTE and fellow of IETE.
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