Towards A Real-time UWB MIMO Testbed for Sensing and Communications Yu Song, Nan Guo, and Robert C. Qiu Department of Electrical and Computer Engineering Center for Manufacturing Research Tennessee Technological University Cookville, Tennessee 38505
[email protected] [email protected] [email protected]
Abstract— This paper reports a research testbed of real-time ultra-wideband (UWB) multiple-input multiple-output (MIMO) radio. In the receiver design, the UWB MIMO receiver supports up to eight channels, where each channel is equipped with an analog-to-digital converter (ADC) with 8-bit resolution and sampling rate up to 3 Giga samples per second (Gsps). The transmitter is able to transmit two independent arbitrary waveforms with bandwidth up to 500 MHz. Multiple high performance Field Programmable Gate Array (FPGA) chips are utilized as realtime processors at both transmitter and receiver to handle huge amount of high speed data. As part of the whole system, the UWB MIMO receiver baseband is developed and tested using pulse based UWB signals. Experiment setup and results are presented and discussed. To the authors’ best knowledge, this radio testbed built at Tennessee Technological University is the first UWB MIMO testbed ever reported.
I. I NTRODUCTION Combing the technology of UWB with MIMO brings a lot of benefits to a radio system. UWB system occupies a wide frequency band providing high data rate capability and fine ranging accuracy. However, UWB system is under a severe emitted isotropic radiated power limitation imposed by Federal Communications Commission (FCC) [1]. From communication point of view, incorporating the MIMO technique into UWB provides one possible solution to improve the UWB link robustness or its range. From sensing and detection point of view, UWB MIMO can exploit the independence between wideband signals at the array elements, and can provide better performance in detecting and tracking a single target when antennas are distributed spatially, which is called spatial diversity, and it even can operate with different waveforms or frequencies, which are called waveform diversity and frequency diversity. The research on UWB MIMO is still in its infant stage, further studies, especially on its implementation, are necessary to bring this technology into the market [2]. However, it is a difficult task to verify the performance of a UWB MIMO system in real situation. In most cases, the performance can only be evaluated via simulation, which means the achieved performance are just based on simplified models instead of realistic system with imperfect channels and implementation uncertainty. Employing a real-time testbed will allows us to better understand the practical challenges of such system in terms of hardware and algorithms. It also
justifies whether an algorithm or approach is suitable for implementation and deployment in practice [3]. Our design philosophy is to develop a cost-effective real-time validation platform using most advanced off-the-shelf devices, aiming at being flexible in changing modules and reconfigurable at both hardware as well as algorithm levels. With increased demands on the hardware implementation, UWB MIMO system introduces more challenges than the narrowband and/or single antenna scenarios. As the IC technology advances, commercially available FPGAs provide more and more processing power and supports faster modern digital interfaces. This trend makes it increasingly feasible to perform wideband multi-channel processing in the digital domain, enabling exploration of various advanced MIMO algorithms on flexible FPGA firmware-based platforms. Although the FPGAs bring many benefits to designers, it is a great deal to integrate multiple ultra wideband channels with a parallel of FPGAs. The focus of this paper is on digital domain investigation of the UWB MIMO receiver with virtually arbitrary transmitted waveforms. Major work reported in the paper includes (1) the implementation of a FPGA based real-time UWB MIMO receiver, and (2) investigating the real-time coherency between multiple high speed sampling channels of the UWB MIMO receiver with pulse based UWB signals. The rest of this paper is organized as follows. Section II describes the system design, including previous work on UWB MIMO transmitter and recently built UWB MIMO receiver. In section III, experiments and results are presented and discussed. Section IV gives the conclusion and future work. II. S YSTEM D ESCRIPTION Fig 1 shows the overall hardware scheme of the implemented UWB MIMO testbed, it consists of two transmit channels and maximum eight receive channels. The system can work standalone or a personal computer (PC) can be used in each side of the link to perform offline processing. Currently, the radio frequency (RF) module is based on off-the-shelf components in both the transmitter and receiver chains, with a selected center frequency from 500 MHz to 4 GHz. The details of RF and up/downconverters of the testbed will be not be described in this paper but will be covered in the near
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future. We will mainly focus on the coherency of the UWB MIMO receiver in digital domain and investigate the receive diversity in pulse based physical layer.
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A. Previous Work on UWB MIMO Transmitter In the authors’ group, multiple-input single-output (MISO) UWB characteristics and performances have been well studied and various results have been demonstrated in [4] [5]. The recent implementation work of the UWB 2×1 MISO testbed has been reported in [6] [7]. In the MISO transmitter design, FPGA based digital arbitrary waveform generator was implemented and can support two transmit channels each with both in-phase and quadrature-phase modulation, and the 10-dB radio bandwidth is from 400 MHz to 800 MHz. Commercially available RF components were used for flexible hardware reconfigurability. The MISO transmitter performance has been evaluated by real-time experiment with measured channel data in an office environment, coherency between multiple transmit antennas has been analyzed and solution has been proposed for the delay and I/Q quantization imbalance problems which are unique to UWB multiple-antenna system. Waveform design and optimization based on the testbed has also been practical studied and we have shown how theoretical waveform design and optimization improve the performance of a real-time MISO UWB system. B. UWB MIMO Receiver The implemented UWB MIMO receiver is based on Sundance’s hardware and software platform. As Figure 1 shows, there are totally eight ADCs each with 3 Gsps sampling and 8-bit resolution, an array of Xilinx high performance FPGA for digital processing and a bunch of 1GByte DDR2 memory banks for data storage and buffering. All these devices are integrated in a national instrument (NI) PXI Express Hybrid 3U Peripheral module. Fig 2 is the real picture of the hardware integration. All the ADCs sampling data will be gathered in one FPGA either to be processed in real-time or to be stored in DDR2 memories and then transfered to host computer via PXI bus for offline processing. This system also has potential
Fig. 2.
A closer Look into the host chassis of UWB MIMO Receiver
To maintain the coherency of the MIMO receiver system, it is essential that all modules receive the same sampling clock. In our case, there will be a single clock source that is distributed to the modules via a power splitter, thus all 8 ADCs receive an identical clock in frequency and phase. Another design requirement of this system is to have all ADCs sampling and outputting data at the same time, so an external trigger is needed to synchronize the converters and be part of the logic to reset the converters [8]. Fig 3 is the digital design architecture of the UWB MIMO receiver. After system was powered on, the ADCs and the clock generators will be configured to ensure they are all locked to a reference signal, the samples from the ADCs will begin to be captured and stored. Inside the FPGAs, one digital clock management (DCM) per ADC clock is used to ensure a good capture of data. After being latched, samples go through multiplexers to be pipelined and latched again, then various digital signal processing tasks can be applied to the sampling data. In most cases, additional filtering functions are necessary to make sure the ’cleanness’ of the multi-channel high sampling data. An alternative way is to stored the samples into the DDR2 memories available on the board. The DDR2 interface uses some Xilinx specific blocks, such as idelays and digital clock manager (DCMs), which have to be ’locked’
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III. E XPERIMENTS AND RESULTS There are two experimental scenarios to verify the functionality of the UWB MIMO receiver in digital domain with pulse based UWB signals excluding complex RF components. In this scenario, the UWB signals are generated by Tektronix arbitrary waveform generator (AWG) AWG7122B, and then applied to sampling modules via a 1:4 power splitter with cable connections. The power splitter ensures all input analog signals are identical and are correctly coherent, so the coherency between multiple sampling channels can be precisely evaluated. In this case, the transmitted short pulses are 8 ns wide and repeat every 1000 ns, the 10 dB single-sided bandwidth is about 80 MHz. Fig 4 shows the setup of experiment scenario 1 and Fig 5 is the corresponding UWB MIMO receiver combing result of sampled A/D data from four channels. The width of the received pulses is about 8 ns, which is the same as the transmitted pulses. The waveform are probed with JTAG chain and observed with Xilinx ChipScope Pro Analyzer. 3&
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C. Challenges Besides the multi-channel wideband RF frontend, multichannel GHz sampling poses a lot of challenges to both mixed signal part and digital signal processing part. For the mixed signal part, one potential challenge might be insufficient dynamic range due to limited quantization, additional means such as noise dithering or subband approaches should be considered to enhance the dynamic [9]. Another challenge is the strict coherency between multiple ADCs which are working at GHz sampling level, even though they all receive the identical clock and trigger signal for a single source via power splitters, the coherency is still hard to be guaranteed due to the uncertainty of transmission paths between different ADC data routers and center processing unit. The DCM phase shift function embedded in Sundance platform provides a way to adjust the delay imbalances, however, the delay value for each channel is not easy to determine. For the digital processing part, the challenge comes from the real-time processing of huge sampling data. If the system works at full sampling speed of 3 Gsps, then the total sampling data rate reaches 24 GBytes/s, which is a extremely aggressive data rate for a real-time system and cannot be managed easily by any technology yet. So some kind of trade-off is necessary to relax such pressure. In our case, a 1/4 decimation is made at the standard software design, so the effective sampling frequency is 750MHz. But for the following experiments and system test, the effective sampling rate is 1.5 GHz wit a 1/2 the decimation.
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ChipScope technology provided by Xilinx was introduced to observe the UWB MIMO receiver combing results in FPGA blocks. The ChipScope allows us to probe the internal signals of the design inside FPGA and it plays an important role in the implementation processes. Its program consists of two basic debugging tools, these are Core Generator and Core Inserter. The main two cores used for debugging different parts of the digital design are integrated logic analyzer (ILA) and integrated control (ICON) core. Fig 6 illustrates the interaction of these two cores with the FPGA design. In the second experiment, the pulse based UWB signals are generated by the UWB transmitter and modulated at a center frequency of 500 MHz. For simplicity, there is only one transmit channel being used, where the other setting are the same as the first scenario. In this case, the modulated UWB signal has a bandwidth of 200MHz at the center frequency of 500 MHz as Fig 9 shows, where the fractional bandwidth is about 40% which falls into the category of UWB radio system.
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UWB MIMO receiver experiment 1 setup
UWB MIMO receiver experiment 1 result: sampled A/D data from 4 channels are coherently combined
Fig 7 shows the setup of experiment scenario 2 and Fig 8 is the corresponding uwb MIMO receiver combing result of sampled A/D data from four channels. In this case, the received pulses are modulated signal, the receiver combing result is reflected in the waveform envelop.
Fig. 9. Spectrum of transmitted UWB signal in Experiment 2, captured by spectrum analyzer Rohde&Schwarz FSEM20
IV. C ONCLUSIONS AND FUTURE WORK
This paper reports our recent research and development work in UWB MIMO radio testbed. The UWB MIMO receiver has been implemented and verified in digital domain with cable connection. The design and implementation issues and challenges have been reported in detail, and the first-hand experimental results have been shown. Experiences and knowledge have been gained with this project. In the near future, this current version of the testbed will be further improved in many aspects. A multi-channel wideband RF fronted is being built in the authors’ group. Several important parameters of the RF frontend includes 500 MHz bandwidth, 70 dB digital controlled gain range and ultra low noise figure. RF up/downconverters will be considered in the near future. With such a frontend, over-the-air experiments will be conducted and various UWB MIMO algorithms can be tested in real time on this testbed. It is expected that the real-time UWB MIMO testbed will be used to enhance our research in the areas such as cognitive radio, cognitive radar and super highspeed wireless communications.
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UWB MIMO receiver experiment 2 setup
UWB MIMO receiver experiment 2 result: sampled A/D data from 4 channels are coherently combined
V. ACKNOWLEDGMENT This work is supported by the National Science Foundation through grants (ECCS-0901420), (ECCS-0821658), and (ECCS-0622125), Office of Naval Research through a grant (N00014-07-1-0529), 2010 DURIP grant, and 2010 Defensive Earmark Project. The director of Center for Manufacturing Research (CMR) at TTU (Kenneth Currie) has provided the authors with good support for carrying out this research. R EFERENCES [1] G. Breed, “A summary of FCC rules for ultra wideband communications,” High Frequency Electronics, vol. 4, no. 1, pp. 42–44, 2005. [2] T. Kaiser and F. Zheng, Ultra Wideband Systems with MIMO. Wiley, 2010. [3] A. Wilzeck, M. Amelingmeyer, and T. Kaiser, “MIMO Prototyping Using Sundance’s Hardware and Software Products,” Sundance Multiprocessor Technology Ltd., Tech. Rep., 2005. [4] R. Qiu, C. Zhou, N. Guo, and J. Zhang, “Time reversal with miso for ultrawideband communications: experimental results,” in Proc. IEEE Radio and Wireless Symposium, 2006, pp. 499–502. [5] R. Q. N. Guo, J. Zhang and S. Mo., “Uwb miso time reversal with energy detector receiver over ise channels,” in 4th Annual IEEE Consumer Communications and Networking Conference, Las Vegas, Nevada, USA, 2007.
[6] Y. Song, Z. Hu, N. Guo, and R. Qiu, “Real-time MISO UWB Radio Testbed and Waveform Design,” in IEEE SoutheastCon 2010, CharlotteConcord, NC, March 18, 2010. [7] Y. Song, N. Guo, Z. Hu, and R. Qiu, “FPGA Based UWB MISO TimeReversal System Design and Implementation,” in IEEE ICUWB 2010, Nanjing, China, September 20-23, 2010. [8] SMT702 User Manual, Sundance Multiprocessor Technology, http://www.sundance.com/docs/SMT702 User Manual.pdf, 2010. [9] R. Qiu, Z. Chen, N. Guo, Y. Song, P. Zhang, H. Li, and L. Lai, “Towards a Real-Time Cognitive Radio Network Testbed: Architecture, Hardware Platform, and Application to Smart Grid,” in Networking Technologies for Software Defined Radio (SDR) Networks, 2010 Fifth IEEE Workshop on. IEEE, 2010, pp. 1–6.
