wafer level encapsulation techniques for a mems microreactor with

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strength against stiction and pressure difference during opera- tion. For its properties of .... then the vacuum pump was switched off and the inlet valve opened.
Wafer Level Encapsulation Techniques for a MEMS Microreactor with Integrated Heat Exchanger F. Santagata, L. Mele, M. Mihailovic, B. Morana, J.F. Creemer, P.M. Sarro Department of Microelectronics Laboratory of Electronic Components, Technology & Materials (ECTM), DIMES, Delft University of Technology 2600 GB Delft, The Netherlands Email: [email protected]

Abstract— This paper presents a MEMS chemical microreactor with integrated heat exchanger designed and fabricated by means of wafer level encapsulation techniques like low temperature (400◦ C) silicon fusion bonding and thin film encapsulation. The fabrication method results in a leak tight reaction cavity under 1 atm pressure difference during operation. Furthermore, the surface micromachining process leads to scale down the height of the microchannels and to achieve close contact between hot and cold microchannels along their whole length, maximizing heat exchanging capability of the device.

Fig. 1.

I. I NTRODUCTION

II. D EVICE D ESIGN

Microreactors have great potential for providing new understanding and control of fundamental chemical processes [1], [2]. In addition, they can generate chemicals with a higher yield and purity compared to the equivalent bulk reactors, in much shorter periods of time. Because these kinds of devices operate under controlled pressure conditions, a constant gas pressure inside the channels is needed during operation, which means negligible gas leakage from the channel to the outside through the capping layer. In order to meet these requirements, conventional encapsulation techniques can be used to fabricate leak tight microchannels or microcavities. In particular, here we present a microreactor with integrated heat exchanger in which the reaction channel is leak tight down to a pressure difference of at least 1 atm. The device was fabricated combining surface micromachining and wafer to wafer fusion bonding. This encapsulation technique allows the reduction of the device dimensions and shows room for performance improvements in the terms of thermal management. Indeed, thermal losses in such miniaturized systems need to be reduced as much as possible because it undermines the overall system efficiency; this is particularly important in any miniaturized system involving one or more high-temperature steps [3]. In the presented microreactor, due to the combination of surface micromachining and wafer to wafer bonding, the heat exchange takes place along the whole length of the microchannels. The benefit is the decrease of the electrical power needed for reaching the desired temperature in the heated zone and to improve cooling times. This research is fund by the Point One project MEMSLand (www.memsland.nl).

978-1-4244-5335-1/09/$26.00 ©2009 IEEE

Schematic configuration of microreactor

The reactor consists mainly of three different thermal zones as depicted in Fig. 1: the high temperature reaction chamber, the heat exchanging zone and the cold zone (at room temperature). The high temperature reaction chamber contains a thin-film platinum resistor embedded for localized heating and temperature sensing, that is thermally isolated by means of a free standing SiN membrane. The heat exchanging zone consists of three free-standing microchannels that share a thin SiN surface to enable heat exchange between the gases/fluids in these channels. The reactants are loaded at room temperature in the cold zone that corresponds to the bulky part of the device. A schematic cross section of the device is showed in Fig. 2. The microreactor consists of two 10x3.3 mm bonded dies that are symmetrically fabricated; the bonding area is limited only to the perimeter of the device and is 10 mm2 , about 30% of the total device area. In the device we can distinguish the outer microchannels (labeled in the following as “hot”) that are fabricated by surface micromachining [4] and a middle “cold” microchannel obtained by fusion bonding of the two wafers. The hot microchannels contain an array of “pillars” to increase the strength against stiction and pressure difference during operation. For its properties of low stress and mechanical stiffness, SiN was chosen as material for pillars and capping layer. COMSOL simulations were used for designing the minimal distance between two pillars and the thickness of the capping layer in order to avoid its deflections under the operating pressure difference. A thickness of 1 µm for the SiN capping layer and a distance of 20 µm between the pillars were chosen. The chosen pillar diameter is 3 µm. For the simulation we used measured values of Young modulus and intrinsic stress of the

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Fig. 2.

Schematic cross section of the device

low-stress LPCVD SiN layer deposited during the process. An array of circular holes was designed to perform the sacrificial etching for releasing the hot microchannels. The holes are defined by lithographic step and the chosen diameter is 1.5 µm. These holes were closed defining plugs of 2 µm height that were also used as spacers in the middle channel (cold channel). These spacers were needed in order to prevent stiction of the ceilings of the two hot microchannels during processing or during operation, that would permanently block the middle channel. The free standing SiN membrane has a surface of 2.8 mm2 ; in the middle of the membrane there is the heat exchanging part with a surface area of 0.8 mm2 , including also the platinum heater with a surface of 0.2 mm2 (25%). The remaining membrane area (70%) is all around the heatexchanging zone and it is used for thermal isolation. The height of the cold channel is 4 µm but it increases during operation due to the pressure difference between inside and outside the reactor; instead the height of the hot channels is 2 µm and it does not change during operation. III. FABRICATION In order to achieve a strong fusion bonding, the silicon surfaces need to be very smooth (RMS roughness less than 0.5 nm) and clean (particles larger than 0.5 µm give cmsize voids) [5]. The bonding surface needs to be protected during processing because any processing step on the surface degrades its smoothness; for this reason, as a first step a 400 nm thermal oxide was grown on single-side polished wafers to protect the front-side. DRIE was used to create a 6 µm-deep recess that defines the flow channel (Fig. 3a). A 700 nm low-stress LPCVD SiN was then deposited to create the bottom of the microchannels and then a layer of silicon dioxide, used as sacrificial layer, was deposited by LPCVD, on top of the silicon nitride. In order to fabricate the pillars, the sacrificial layer was dry etched down to the silicon nitride and a deposition of low-stressed SiN constituting the pillars and the capping layer was performed. This SiN capping layer was then patterned through to open a 1.5 µm diameter access hole for further sacrificial etching of the underlying oxide. The device was then submerged in BHF solution for sacrificial etching of the microchannels (Fig. 3b). During the drying step, no stiction was observed

Fig. 3.

Schematic cross-section flowchart

thanks to the support of the pillars distributed all around the chamber. The released chamber was sent to PECVD oxide deposition for performing the plugging step. The deposition recipe was tuned to specifically seal the access hole gap, while minimize its deposition inside the chamber. The PECVD oxide was etched away everywhere leaving the plug structure and a further LPCVD SiN layer was deposited on top of the oxide plug in order to improve the hermetic sealing (Fig. 3c). Only on the bottom half a 20/180 nm thick Ta/Pt heater was evaporated and patterned (Fig. 3d) by lift-off. The heater was then covered by a 400 nm LPCVD SiN. On the back-side SiN was patterned for silicon etch in KOH, to define inlet

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and outlet of the device, SiN membrane in correspondence of the heater (both on bottom and top half) and the contact pads access (only on the top half). The inner opening on the microchannels ceiling were opened by DRIE etching (Fig. 3e). Before bonding, the stack of SiN layers was dry etched, stopping on the protective oxide that was then stripped in BHF, thus uncovering the smooth silicon surface. With RCA-1 cleaning at 75◦ C a clean and hydrophilic surface was obtained. The LPCVD SiN that covers the heater prevents it from being etched during this step. A post-bonding thermal annealing at 400◦ C (ramp up 10◦ C/min) was performed for 1 hour in order to increase the bonding strength (Fig. 3f). Next, low-stress LPCVD SiN membranes were released in 33 wt% KOH at 85◦ C. A passivation layer of SiO2 was deposited by PECVD on the top of the device and a DRIE etching was performed only into the KOH cavity corresponding to the contact pads, reaching the buried platinum lines. Then, a platinum evaporation was performed inside the cavity in order to bring the contact pads on the backside of the upper wafer. Finally inlet and outlet were opened by DRIE etching.

Fig. 5.

SEM cross section of a pillar

IV. R ESULTS AND D ISCUSSION In the Figs. 4-5 SEM pictures of a plug and a pillar cross section are showed. Instead, in Fig. 6 a cross section of the device after bonding is showed, in which it is possible to observe the three channels one on top of each other (as also depicted in the schematic Fig. 1) with the pillars and plugs distribution. In Fig. 7 it is given an optical image of the free standing membrane showing the channel with the pillars and plugs and the heater upon it. To characterize the device, first an electrical calibration of the platinum heater was performed at wafer level. The experimental results were obtained from measurements on a Cascade probing station equipped with a temperature controlled hot plate and an HP 4156C parameter analyzer. Measurements of the electrical resistance of the heater at different chuck temperatures were performed in order to get a calibration curve. The extrapolated TCR value is 3.75 mK-1 and the resistance value at room temperature is 107.15 ± 2.54 Ω (Fig. 8).

Fig. 4.

SEM image of a plug

Fig. 6. visible

SEM cross section of the device in which the three channels are

After electrical characterization, hermeticity and flow-rate of the channel were tested. The measurements were performed loading the device on a dedicated testing fixture with Oring seals that provides connections of inlet and outlet. The device was then placed inside a vacuum chamber equipped with a vacuum pump and vacuum gauge. A schematic of the measurement setup is showed in Fig. 9. For the hermeticity test, inlet and outlet were both closed and the pressure in the chamber was reduced down to 9·10-7 mbar. Opening the inlet valve, air could flow through the channel without causing pressure increase in the vacuum chamber. A modified version of this setup was used for the flow-rate measurement. In this case the device outlet was not connected with the outside but it was left opened inside the vacuum chamber. Flow-rate measurement was performed in two steps. First the vacuum chamber was pumped down keeping the device inlet closed; then the vacuum pump was switched off and the inlet valve opened. In this way the air flowing from the inlet to the vacuum chamber through the device outlet leads to a pressure increase, measured by the vacuum gauge. From the rate of the

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Fig. 9.

Schematic configuration of the measurement setup

resulted to be leak tight down to 9·10-7 mbar. ACKNOWLEDGMENT

Fig. 7.

The authors of this paper would like to acknowledge all the members of the IC Process Group of DIMES for their continuous support. This work is part of the Point One project MEMSLand (www.memsland.nl).

Optical image of a channel with heater and inlet

R EFERENCES [1] K.F. Jensen, Silicon-Based Microchemical Systems: Characteristics and Applications, MRS BULLETIN, vol.31, 2006. [2] P. Watts and S.J. Haswell, The Application of Microreactors for Small Scale Organic Synthesis, Chemical Engineering & Technology, vol. 28, 2005, pp. 290-301. [3] W. Ehrfeld, V. Hessel, H. Lowe, Microreactors, new technology for modern chemistry, WILEY-VCH, 2000. [4] F. Santagata, C.K. Yang, J.F. Creemer, P. J. French, P.M. Sarro, Single Wafer Surface Micromachined Field Emission Electron Source, Proceedings IEEE MEMS 2009, pp. 848-851. [5] A. Pl¨oßl, G. Kr¨auter, Wafer direct bonding: tailoring adhesion between brittle materials, Materials Science and Engineering R: Reports, Vol. 25, Issues 1-2, March 1999.

Fig. 8.

Temperature vs. resistance curve

pressure increase inside the vacuum chamber, it was possible to calculate a device flow-rate of 0.3 ml/min. V. C ONCLUSION In this paper a MEMS chemical microreactor with integrated heat exchanger was developed using both thin film and direct wafer-to-wafer bonding encapsulation techniques. The device heating subsystem integrates a platinum heater and counter-flow heat exchanger, providing heat transfer from hot to cold flow leading to improvement of chemical performance. The presented fabrication method makes use of typical encapsulation techniques that result in a hermetic sealing of the reaction cavity during operation. Furthermore, the surface micromachining process permits to decrease the height of the microchannels to 1 µm and to increase the thermal coupling between hot and cold microchannels along their whole length, maximizing heat exchanging capability of the device. A calibration of the heater was performed measuring the electrical resistance at different temperatures. The device was tested measuring the flow rate and the hermeticity of the channel. A flow rate of 0.3 ml/min was measured and the device is

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