Web-Based Visualization Tools for Teaching VLSI CAD Algorithms John A. Nestor ECE Department Lafayette College Easton, Pennsylvania 18042
[email protected] Abstract This paper describes a project to develop Java applets that use graphics and animation to aid in teaching VLSI CAD algorithms. Current applets illustrate routing using the Left Edge Algorithm and Lee Algorithm and placement using simulated annealing. Additional applets are planned for the future.
1. Introduction While electronic systems design continues to move to higher levels of abstraction, it remains important for students to learn about the underlying technologies that make high-level design possible. The goal of this project is to develop a set of visualization tools that will aid students in understanding the operation of VLSI CAD algorithms [1] using graphical display and animation. Our general approach is as follows: • The tools are being developed as Java Applets. This allows for their easy distribution and use via the Web. Also, it allows the tools to take advantage of Java’s support for graphics and multithreaded execution. • The tools are parameterized to allow the display of different information and behavior at different times. This allows the use of the same applet to illustrate different aspects or options of an algorithm. • Where practical, common data structures and classes are being developed to allow reuse in tools for visualizing similar algorithms (e.g., different placement algorithms). The remainder of this paper describes some preliminary results of this project. At this point three applets have been developed that illustrate the Left Edge Algorithm [2] for channel routing, the Lee Algorithm for maze routing [3], and placement using Simulated Annealing [4]. These applets can be accessed at: http://foghorn.cadlab.lafayette.edu/cadapplets
2. The Left Edge Algorithm Applet The Left-Edge Algorithm (LEA) [2] routes a rectangular channel that is defined by a set of columns. Terminals that are placed at the top and bottom of columns specify nets that must be connected by routing. The LEA assigns each net to a wire in a horizontal track in the channel on one interconnect layer. It then connects terminals at the top and bottom of the channel using vertical wires on a second layer. Figure 1 shows the LEA Applet in operation. The applet displays the channel with text fields for net names at the top and bottom of each column. The user defines a routing problem by entering net names into the text fields, as shown in Figure 1, and then invokes routing by clicking a button. The applet then displays the result of applying the LEA, including satisfaction of any vertical constraints which occur when terminals from different nets are placed at the top and bottom of the same column. If the user enters a routing problem with conflicting vertical constraints, the applet displays an error message.
3. The Maze Routing Applet The Lee Algorithm for maze routing [3] models the routing surface as a grid. Each gridpoint can be the source or target terminal of a desired connection, a wire that connects adjacent gridpoints, or an obstacle that is not available for connections. The algorithm operates in two phases: an expansion phase in which unoccupied gridpoints are labeled with their distance from the source, and a traceback phase in which a minimum-distance connection is found by following labels of decreasing value from the target back to the source. The Maze Routing Applet illustrates the operation of the Lee Algorithm as shown in Figure 2 (a). The applet displays a grid representing the routing surface. The user specifies a source and target for expansion by clicking on individual gridpoints. Once both source and target terminals are specified, the expansion and traceback
phases are displayed in animated form. This applet is parameterized to allow either single or multiple-layer operation, which is shown in Figure 2(b).
4. The Placement Applet The Placement Applet illustrates the general formulation of the placement problem along with the use of Simulated Annealing [4] to search for a good placement configuration. The goal of placement is to assign connected modules to a layout surface in a way that minimizes a cost function – typically a weighted sum of overall area, wire length, and penalty costs due to module overlaps. Simulated annealing searches for a lowcost placement by repeatedly applying simple transformations called moves under the control of a temperature parameter which allows controlled hillclimbing. The applet displays a graphical representation of a placement and its current cost, illustrates how moves can be applied, and presents an animated display of how the placement changes during an annealing run. Planned additions include optional display of the annealing cooling schedule and illustration of different approaches to wirelength estimation.
Figure 1 – Left-Edge Algorithm Applet
(a) Single-Layer Routing
5. Conclusions Our initial experience with this project has been been encouraging. The applets described in this paper have been used to demonstrate CAD algorithms in VLSI classes at Lafayette with a favorable response. There has also been a favorable response from users accessing the applets via the internet, especially since download times for the compiled applets (10-20Kbytes each) are moderate. Future work for this project will include the development of additional applets, extensions to existing applets, and expansion of the website to include more reference information about the algorithms.
(b) Multi-Layer Routing
Figure 2 –Maze Routing Applet
References [1] M. Sarrafzadeh and C. K. Wong, An Introduction to VLSI Physical Design, McGraw-Hill, 1996. [2] A. Hashimoto and J. Stevens, “Wire Routing by Optimizing Channel Assignment Within Large Apertures”, Proceedings of the 86h Design Automation Conference, pp. 165-173, 1971 . [3] C. Y. Lee, “An Algorithm for Path Connections and its Applications”, IRE Transactions on Computers, vol.EC-10, pp. 346-365, 1961. [4] S. Kirkpatrick et. al., “Optimization by Simulated Annealing , Science, Vol. 220, No. 2298, pp. 671-680, 1983.
Figure 3 – Placement Applet
