A type-2 fuzzy logic controller design for buck and boost DC–DC ...

J Intell Manuf (2012) 23:1023–1034 DOI 10.1007/s10845-010-0388-1

A type-2 fuzzy logic controller design for buck and boost DC–DC converters Ismail Atacak · Omer Faruk Bay

Received: 14 August 2009 / Accepted: 10 February 2010 / Published online: 23 February 2010 © Springer Science+Business Media, LLC 2010

Abstract Conventional (type-1) fuzzy logic controllers have been commonly used in various power converter applications. Generally, in these controllers, the experience and knowledge of human experts are needed to decide parameters associated with the rule base and membership functions. The rule base and the membership function parameters may often mean different things to different experts. This may cause rule uncertainty problems. Consequently, the performance of the controlled system, which is controlled with type-1 fuzzy logic controller, is undesirably affected. In this study, a type-2 fuzzy logic controller is proposed for the control of buck and boost DC–DC converters. To examine and analysis the effects of the proposed controller on the system performance, both converters are also controlled using the PI controller and conventional fuzzy logic controller. The settling time, the overshoot, the steady state error and the transient response of the converters under the load and input voltage changes are used as the performance criteria for the evaluation of the controller performance. Simulation results show that buck and boost converters controlled by type-2 fuzzy logic controller have better performance than the buck and boost converters controlled by type-1 fuzzy logic controller and PI controller. Keywords DC–DC converter · PI controller · Type-1 fuzzy logic controller · Type-2 fuzzy logic controller · Type reduction

I. Atacak · O. F. Bay (B) Department of Electronics and Computer Education, Gazi University, 06500 Ankara, Turkey e-mail: [email protected]

Introduction Type-1 fuzzy logic (T1FL) controllers have been successfully used in numerous applications many of which are too complex to be analyzed using conventional mathematical techniques for years. In design of T1FL controllers, the experience and knowledge of human experts are needed to determine parameters associated with the rule base and membership function (Lee 1990; Zimmermann 1987). Because available information usually includes an uncertainty, T1FL controllers will also have an uncertainty related to rule base and membership functions. Zadeh introduced type-2 and higher-types fuzzy systems in (1975) to eliminate the paradox of T1FL systems which can be formulated as the problem that the membership grades are themselves precise real numbers. Type-2 and higher-types systems are an extension of T1FL systems. Similar to T1FL systems, type-2 fuzzy logic (T2FL) systems comprise fuzzifier, rule base, inference engine and output processor. One of the most important differences between T1FL and T2FL systems takes place in the output processing. The output processing of T2FL systems includes type reducer which converts the type-2 fuzzy output sets into type-1 sets and defuzzifier which maps type-1 fuzzy sets obtained from type reducer into crisp data. Therefore, the type reduction captures more information about rule uncertainties than that of a crisp number. Another important difference between these systems is the membership sets used in the fuzzifier. A type-2 fuzzy set is characterized by a fuzzy membership function, i.e., the membership value (or membership grade) for each element of this set is a fuzzy number in [0,1]. Thus, these sets can be used in situations where there is uncertainty about the membership grades themselves, e.g., an uncertainty in the shape of the membership function or in some of its parameters (Karnik 1999; Liang and Mendel 2000).

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DC–DC converters are employed in a variety of applications, including power supplies for personal computers, office equipment, spacecraft power systems, laptop computers, and telecommunications equipment, as well as DC motor drives (Wu 2006; Cuk and Middlebrook 1981). The dynamics of DC–DC converters is non-linear, and the practical converter operation deviates from theoretical prediction because of problems associated with parasitic resistances, stray capacitances and leakage inductances of the components. All these make the design of an optimal control scheme for closed loop operation of the converter difficult (Muhammed 2001). A control scheme should ensure stability in arbitrary operating conditions along with good response in terms of the rejection of load variations, input voltage changes and even parameter uncertainties. Several control techniques for DC–DC converters have been reported in the literature, such as linear based control techniques, sliding mode control technique, and fuzzy logic control technique. Although the structure and design of linear based control techniques are simple, their performance usually depends on the working conditions of the controlled system. Sliding mode control technique needs a system model to be designed. One of the most important problems in design of this controller is control chattering (Wan et al. 2007; Alvarez-Ramirez 2001; Spiazzi et al. 1995). Traditional fuzzy techniques provide for the output voltage regulation against input voltage and load variations. However, the performance of this controller depends on the experience and knowledge of human experts. In general, trial-and-error tuning procedure is used to adjust parameters of the rule base and membership sets (Gupta et al. 1997; So et al. 1996). This means that these parameters will be change from one expert to another expert. The controlled system performance may be undesirably affected from these uncertainty conditions. Thus, a type-2 fuzzy controller will be highly suitable to tackle the uncertainty which occurs in traditional fuzzy logic controllers. In this study, a T2FL controller is proposed for the control of the buck and boost DC–DC converters to achieve a good output voltage regulation and dynamic response against input voltage and load variations. To analyze the effects on the system performance of T2FL controller, the converters are also controlled using the PI and traditional fuzzy controller. The structure of the converters and its mathematical model are given in section “Mathematical modelling of

DC–DC converters”. Section “Control techniques used for the DC–DC converters” presents the control algorithms used for the control of the DC–DC converters. The simulation results are presented in section “Simulation results”. Finally, the performance of the proposed controller is evaluated by using the simulation results.

Fig. 1 Equivalent circuits of two basic DC–DC converters. a Buck converter. b Boost converter

rL

(a)

L

Q

Mathematical modelling of DC–DC converters Two basic converter topologies known as a buck converter and a boost converter are used to evaluate the effect of type-2 fuzzy logic controller on the performance of DC–DC converters. A buck converter and a boost converter is basically composed of a power switch Q which transforms the energy of a voltage source Vi, a diode D, a LC filter which reduce the high frequency components, and a resistance R L which is used as a load. The circuit diagrams of both converters are shown in Fig. 1. Where rC and r L define the parasitic resistances of the inductor and capacitor in the LC filters, respectively and v O is the output voltage of both converters. In steady state operation, both converters have two operating mode. In the first operating mode of the buck converter, a positive voltage across the inductor occurs while the power mosfet is turned on and the diode becomes reverse biased. This voltage causes a linear increase in the inductor current. In the second mode, when the power mosfet is turned off and the diode is forward biased, the inductor current decrements due to a negative voltage across the inductor. The differential equations describing the dynamics of the buck converter is obtained through the direct application of Kirchoff’s current and Kirchoff’s voltage laws for each one of the possible circuit topologies arising from both operating modes of the buck converter.    1 R L · rc RL di L =− · +r L · i L + · vC −vi · sw dt L R L +rc R L +rC (1)   1 RL 1 dvC (2) = · · iL − · vC dt C R L +rC R L +rC   R L · rc RL (3) vO = · iL + · vC R L +rc R L +rC In the first operating mode of the boost converter, when the power mosfet is turned on, it conducts the inductor current and the diode becomes reverse biased. This results in

(b)

vi

rL

D

iL

iL + -

vC

C

D rC

123

L

RL

vO

vi

+ -

Q

vC rC

C RL

vO

J Intell Manuf (2012) 23:1023–1034

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the input voltage of the converter across the inductor. This voltage causes a linear increase in the inductor current. In the second mode, when the power mosfet is turned off and the diode is forward biased, the inductor current will continue to fall as long as the output voltage is greater than the input voltage. In a similar way, the differential equations describing boost converter can be obtained by applying Kirchoff’s laws to the circuit topologies arising from both operating modes of the converter.   1 R L · rc di L =− · (1 − sw) · + rL · iL dt L R L + rc  RL (4) +(1 − sw) · · vC − vi R L + rC   dvC 1 1 RL · iL − · vC (5) = · (1 − sw) · dt C R L + rc R L + rC   R L · rc RL (6) v O = (1 − sw) · · iL + · vC R L + rc R L + rC

all applications. However, the best way to say this is not true. When compared with each other, the above three topology have some unique advantages and disadvantages. While the voltage mode control is attractive for some applications, the current mode control is crucial for others (Mammano 1994). In this study, the voltage-mode control technique is selected to control the buck and boost converters because of its simplicity. This technique consists of a voltage loop and a pulse width modulation (PWM) generator as shown in Fig. 2. The voltage loop generates the reference waveform for PWM generator by using the output voltage error and change of error of converter. In this study, PI, T1FL and T2FL controllers are used instead of voltage loop. The PWM generator obtains the required switching signals by comparing the carrier waveform with the reference waveform obtained from controller output.

where vC is the capacitor voltage, i L is the inductor current, and sw is the switching function. The switching function sw is the parameter which determines the operating mode of the converters. The value of this parameter is either zero or one. While the first operating mode of the converters represents that the parameter sw takes the value of 1, the operation of the converters on the second operating mode, the parameter sw takes the value of zero. The control algorithm used in the converters assigns the value of this parameter.

Design of the PI controller Today, PI controllers are implemented in numerous applications by computer algorithms. This means that the controller inputs are measured at certain sampling rates. Thus, it is important that controller equations are defined as discretetime before making application of the controlled system. In the first step of the design procedure of the discrete PI controller, the equation of a conventional PI controller defined in the time domain is needed. Generally, the output of a conventional PI controller can be represented by

Control techniques used for the DC–DC converters

t u(t) = K p ∗ e(t) + K i ∗

DC–DC converters use closed-loop control algorithms to achieve design objectives for line regulation, load regulation and dynamic response. Output voltage of converters is controlled with duty cycle rate. There are three basic control techniques for the control of DC/DC converters: Voltage mode control technique, Feed-forward voltage mode control technique and Current mode control technique. An optimal model of the control circuit does not appear possible to say for

Fig. 2 Block diagram of voltage-mode control technique for a DC–DC converter system

e(τ ).dτ

(7)

0

where u(t) is the control signal fed to the process to be controlled, e(t) is the error signal: the difference between the desired and measured process output, and K p , and K i are the controller constants A computer implementation of a conventional PI controller can be expressed as in the frequency s domain, given by

+

vi vramp

+

DC-DC converter

-

-

-

vO

+ u (k ) = u (k − 1) + Δ u

fc

(k ) e Δu

fc

+

vref

Voltage Loop

d dt

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 U (s) =

Kp +

Ki s

 · E(s)

(8)

Applying the bilinear transformation,   1 − z −1 2 . s= · T 1 + z −1

(9)

where T > 0 is the sampling period (Tang et al. 2001). Thus, results the following discrete form to the conventional PI controller equation,   Ki · T Ki · T · E(z) (10) + U (z) = K p − 2 1 − z −1 Considering K 0 = K p − (K i · T /2) and K 1 = K i · T , and taking the inverse z transform, we will have u(k) − u(k − 1) = K 0 (e(k) − e(k − 1)) + K 1 · T · e(k)(11) Dividing this equation by T , the control law for the discrete PI controller can be obtained as follow. u(k) = u(k − 1) + K 0 · e(k) + K 1 · e(k)

(12)

where K 0 · e(k) + K 1 · e(k) is represented by u f c (k) = K 0 · e(k) + K 1 · e(k)

(13)

The simplest form of the controller output can be written as follow. u(k) = u(k − 1) + u f c (k)

(14)

The equations associated with the output error e and change in the output error e of the converters are given in the design procedure of the T1FL controller. The coefficients K p and K i of the PI controller can be adjusted using Ziegler–Nichols method and the model based methods such as frequency response method, root locus and pole assignment design methods. In this study, Ziegler–Nichols method is used to adjust the coefficients of the PI controller because it does not require a system model and control parameters Fig. 3 Block diagram of the T1FL controller used for the control of the DC–DC converters

are designed from the plant step response. From Ziegler– Nichols method, the coefficients K p and K i of the controllers are obtained as 1,288 for the buck converter and as 1.2, 195 for the boost converter, respectively. Then, the coefficients K 0 and K 1 of the discrete PI controller are computed using equations K 0 = K p −(K i · T /2) andK 1 = K i · T . The coefficients K 0 and K 1 are found as 0.9928, 0.0144 for the buck converter and as 1.195, 0.00975 for the boost converter, respectively. Design of the T1FL controller Block diagram of the T1FL controller used for the control of the DC–DC converters is shown in Fig. 3. The T1FL controller is divided into four sections: fuzzifier, rule base, inference engine, and defuzzifier. During the fuzzification process, all input data are classified into suitable linguistic values or sets. According to knowledge of the control rules and the linguistic variable definition, a fuzzy control action is derived in the inference section. Then, a crisp control action is obtained by converting the inferred fuzzy control action in the defuzzifier section. The output of the fuzzy controller is the change in the reference waveform which determines the change in the duty cycle rate. The reference waveform u(k) is determined by adding the previous reference waveform u(k − 1) to the calculated change in reference waveform u(k), which can be expressed as follow. u(k) = u(k − 1) + u f c (k)

(15)

This representation is an integrating process and decreases the steady state error of the controlled system. The calculated reference waveform u(k) is then sent to the PWM generator. The T1FL controller has two inputs: error e and the change in the error e. Both inputs are created by using the output voltage of converters. The error for the output voltage can be given as follow. +

vi vramp

-

-

+

DC-DC converter

-

vO

+ u (k ) = u (k − 1) + Δ u

fc

(k ) Type-1 fuzzy system e

rule base Δu

123

fc

defuzzifier

inference engine

fuzzifier

d dt

+

vref

J Intell Manuf (2012) 23:1023–1034

1

NB

1027

NS

Z

PS

0

0.5

PB

NB

NS

-1

-0.5

Z

PS

PB

0

0.5

1

μe μ Δe 0 -1

-0.5

e, Δe

1

Δu fc

(a)

(b)

Fig. 4 Input and output membership functions of the T1FL controller used for the control of DC–DC converters: a Membership functions for input variables. b Membership functions for output variable

e(k) = vr e f − v O (k)

(16)

where vr e f is the reference output voltage and v O (k) the sensed output voltage at the kth sampling instant. The change in the error is expressed as follow. e(k) = e(k) − e(k − 1)

(17)

The universe of the output error and the change in the output error are divided into five fuzzy sets as given in Fig. 4a. Triangular membership functions are used for fuzzy sets because this is the simplest and the most efficient form for many applications. The membership functions are defined with linguistic labels: Negative Big (NB), Negative Small (NS), Zero (Z), Positive Small (PS) and Positive Big (PB), respectively. Singleton membership function is used as the output membership functions as shown in Fig. 4b due to easy calculation. The value of the input and output variables is normalized in [−1,1] by using suitable scale factors. The control rules associated with the fuzzy input and fuzzy output are derived from general knowledge of the converter behavior. However, the control rules for most applications are usually developed using “trial and error”. In this study, the fuzzy control rules for the T1FL controller are obtained from the analysis of the system behavior. The derivation of the fuzzy control rules is based on the following criteria: 1) when the output voltage error and the change in the output voltage are very big (PB or NB), the corrective response given by the controller must be robust (duty cycle close to zero or one) in order to have the dynamic response as fast as possible. 2) when the output voltage error and the change in the Table 1 Fuzzy control rules of the T1FL controller used for the DC–DC converters

e

output voltage approach zero(NS or PS), the controller must be forced to give a lower response (a small change in duty cycle). 3) when the output voltage error and the change in the output voltage is reached zero or is very close to this point, the controller response must kept constant (zero change in duty cycle) so as to prevent overshoot. Each fuzzy rule is i THEN u i in form: R i : IF e is Fei and e is Fe f c is w . i i Where Fe and Fe are fuzzy sets in their universe of discourse and wi is a fuzzy singleton. Twenty five fuzzy control rules derived from these criteria are given in Table 1. After selecting the active rules associated with the input values, the fuzzy inference method whose task is the inference result of each rule is determined. Although there have been several fuzzy inference method such as Mamdani, Larsen, and Takagi_Sugeno fuzzy implications, Mamdani’s MIN implication is commonly used in most application studies. According to Mamdani’s MIN implication method, the inference result of each rule consists of two parts: the degree of change in reference waveform wi and its weighting factor f i . The weighting factor wi is obtained by means of Mamdani’s MIN fuzzy implication of membership degrees μ Fei (e) and μ F i (e) · wi is retrieved from the control rule e table. The inferred output of each rule is written as follow.   (18) z i = min μ Fei (e), μ F i (e) · wi = f i · wi e

zi

where is the fuzzy representation output of change in control effort inferred by the ith control rule. Since z i is a linguistic result, a defuzzification operation is required next to obtain a crisp result.

e NB

NS

Z

PS

NB

−1

−1

−1

−0.5

NS

−1

−1

−0.5

Z

−1

−0.5

PS

−0.5

PB

0

0

PB 0 0.5

0

0.5

1

0

0.5

1

1

0.5

1

1

1

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Fig. 5 Block diagram of the T2FL controller used for the control of the DC–DC converters

vi

DC-DC converter

vO

v ramp

e

u (k ) = u (k − 1) + Δ u fc (k )

Type reducer

inference engine

Δ u fc

-0,9

Z

NS

-0,4

0

e, Δ e

PS

0,4

PB

0,9

(a)

NB

NS

- 0,5

-0,25

v ref

d/dt

Human knowledge

Rule base

defuzzifier

NB

fuzzifier

Z

PS

PB

0

0,25

0,5

Δ u fc

(b)

Fig. 6 Type-2 membership functions for the T2FL controlled system. a Membership functions for the input variables. b Membership functions for the output variable

In the last step, the defuzzification method obtained crisp result from linguistic inference result is selected. The most desirable way to perform the defuzzification operation is through the center of gravity method, where the output of controller can be computed by a logical sum of the inference results of the active control rules. N i i i=1 f · w (19) u f c = N i i=1 w where N is the maximum number of the firing rules. In this study, this number is equal to 4 since symmetric membership functions is used for the input variables to T1FL controller. Design of the T2FL controller The block diagram of the proposed T2FL controller for DC– DC converters is given in Fig. 5. The controller mainly consists of five sections which are fuzzifier, rule base, inference engine, type-reducer and defuzzifier. In the T2FL controller, as in the T1FL controller, the crisp inputs are first fuzzified into input fuzzy sets which then activate the inference engine and the rule base to produce output type-2 fuzzy sets. The type-2 fuzzy outputs of the inference engine are then processed by the type-reducer which combines the output sets and then performs a centroid calculation, which leads to

123

type-1 fuzzy sets called type-reduced sets (Mendel 2001). Then, the defuzzifier defuzzifies the type-reduced type-1 fuzzy outputs to produce crisp outputs that are used to generate PWM waveform. Interval type-2 fuzzy sets are used to fuzzify the input variables e and e as they are simple to use and they distribute the uncertainty evenly among all admissible primary memberships. As in the T1FL controller, the labels of type-2 fuzzy sets are assigned with Negative Big (NB), Negative Small (NS), Zero (Z), Positive Small (PS) and Positive Big (PB), respectively. Output membership sets representing singleton upper and lower control actions are shown in Fig. 6. These sets are labelled with the same linguistic terms of the input membership sets. In the T2FL controller, the rules remain the same as in type-1 FL controller but the antecedents and the consequents are represented by type-2 fuzzy sets, each of which has the following form: i THEN u f c is [wli , wri ] (20) R i : IF e is F˜ei and e is F˜e i are the type-2 fuzzy sets for which are where F˜ei and F˜e defined both input variables, and wli and wri are the control output obtained from system actions. The upper and lower bound of the type-2 fuzzy sets and the control output in fuzzy rules are determined by using general knowledge of the both

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Table 2 Upper bounds of the fuzzy rules for the T2FL controlled DC–DC converters e

e NB

NS

Z

PS

PB

NB

−0.51

−0.51

−0.51

−0.41

−0.01

NS

−0.51

−0.51

−0.41

−0.01

0.41

Z

−0.51

−0.41

−0.01

0.41

0.51

PS

−0.41

−0.01

0.41

0.51

0.51

PB

−0.01

0.41

0.51

0.51

0.51

Table 3 Lower bounds of the fuzzy rules for the T2FL controlled DC–DC converters e

e NB

NS

Z

PS

PB

NB

−0.49

−0.49

−0.49

−0.39

0.01

NS

−0.49

−0.49

−0.39

0.01

0.39

Z

−0.49

−0.39

0.01

0.39

0.49

PS

−0.39

0.01

0.39

0.49

0.49

PB

0.01

0.39

0.49

0.49

0.49

converter behaviors. Since there are five type-2 fuzzy sets for e and five type-2 sets fore, twenty-five fuzzy rules for both the upper and lower bound of T2FL controller are needed. Tables 2 and 3 show the upper and lower bounds of the fuzzy rules for the T2FL controlled DC–DC converters. The inference engine combines the fired rules and gives a mapping from input type-2 fuzzy sets to output type-2 fuzzy sets. In the inference engine, antecedents in the rules are connected using the Meet operation, the membership grades in the input sets are combined with those in the output sets using the extended sup-star composition, and multiple rules are combined using the Join operation. Similar to type-1 fuzzy system, the firing strength can be obtained by the following inference process: i Fi = [ f , f i ]

NS

min

f

i

e

min

Z

f

i

Δe Fig. 7 The meet operation using a minimum t-norm operator in the T2FL controller

(21)

i

where f and f i can be written as follow: i

f = μ F˜ i (e)∗μ F˜ i (e)

(22)

f i = μ F˜ i (e)∗μ F˜ i (e)

(23)

e

e

e e

where μ and μ denote the grade of upper and lower membership functions, respectively. Symbol ∗ is the t-norm operator. In this study, the meet operation is carried out using a minimum t-norm operator as shown in Fig. 7. Unlike T1FL controller, in the T2FL controller, the output of the inference engine must be type reduced before the defuzzifier can be used to generate a crisp output. There are many various type reduction methods, such as centroid,

center of sets, height, and modified height for realizing type reduction process. In this study, the type-reduction procedure is fulfilled using the center of set type-reduction method, as it has reasonable computational complexity. For the T2FL controller, the type-reduced set can be obtained as follows: 



u cos = w 1 ∈[wl1 ,wu1 ]

M

i=1 1/ M

f i · wi

i=1

fi

w M ∈[wlM ,wuM ] f 1 ∈[ f 1 , f 1 ]

= [u l , u r ]





...

... f M ∈[ f

M

, f M]

(24)

where u cos is an interval type-1 fuzzy set determined by its left most point u l and its right most point u r . To be found

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u cos , firstly, the two-end-points of the interval type-1 fuzzy set u l and u r must be computed. The two-end-points u l and u r can be expressed as follows, in which [wli , wri ] is

Table 4 Circuit parameters for the buck and boost converters Parameter

Buck converter

the consequent centroid set for the ith rule and F i = [ f , f i ] corresponds to the firing strength set for the ith rule (Liang and Mendel 2000). M i i i=1 f l · wl (25) u l = M i i=1 fl

vi (V)

380

120

v O (V)

120

380

L(μH)

500

400

r L (m)

10

20

C(μF)

440

1000

i

and

M

u r =

i i=1 f r

M

· wri

i i=1 f r

i

1) Compute u r in (26) by initially setting fri = (( f + i f i )/2) for i = 1, . . .., M, where f and f i have been previously computed using (22) and (23) and let u r = u r . 2) Find R(1 ≤ R ≤ M − 1) such that wrR ≤ u r ≤ wrR+1 . 3) Compute u r in (26) with fri = f i for i ≤ R and i

fri = f for i > R and let u r = u r . 4) If u r = u r , then go to step 5. If u r = u r , then set u r = u r and stop. 5) Let u r = u r and return to step 2. The procedure for computingu l is similar to the one just given for u r . Replace wri by wli and, in Step 2, find L(1 ≤ L ≤ M − 1) such that wrL ≤ u r ≤ wrL+1 . Additionally, in Step 3, compute u l in (25) with fli = f i for i

i ≤ L and fli = f for i > L. After u l and u r are obtained, the type-reduced set can be defuzzified to calculate the crisp output. For an interval type-reduced set, the defuzzified output can be calculated by getting the average of u l and u r . u l + u r 2

(27)

Simulation results In order to analysis the effect on the performance of the DC– DC converters of the proposed T2FL controller, the control of the DC–DC converters have been controlled using

123

5

f S (kHz)

20

12.5 20

(26)

In order to compute u l and u r , it is needed to compute fli (I = 1 . . . M) and fri (I = 1 . . . M). In this study, this is realized applying the minimum t-norm operator to the active rule as shown in Fig. 7. Here, the computational procedure for u l or u r is briefly provided as follows. Without loss of generality, assume that the pre-computed wri are arranged in ascending order; wr1 ≤ wr2 ≤ · · · ≤ wrM , then,

u f c =

rC (m)

Boost converter

not only T2FL controller but also PI controller and T1FL controller, whose design procedures was explained in the above section. Simulation studies were realized by a program written C programming language, which contains the dynamic equations of the converters and the control algorithm related to the mentioned controllers. The simulations are performed for the following three cases of the converters: 1) the nominal case (vi = 120V and R L = 100 for the buck converter, and vi = 380V and R L = 300 for the boost converter); 2) the load variation case (the output load changes: either from 100 to 10 or from 10 to 100 for the buck converter, and either from 300 to 30 or from 30 to 300 for the boost converter); and 3) the input variation case (falling 30% of the input voltage for both converters). The circuit parameters listed in Table 4 for the buck converter and boost converter were used in the simulation studies. The simulation results of the PI controlled buck converter for the three operating cases are shown in Fig. 8. Figure 8a illustrates that the settling-time, the overshoot and the steadystate error for the converter output are 3.3 ms, 1,67% and 1.95 V, respectively. The converter behavior in the case of step load changes from full-load to light-load and vice-versa is given in Fig. 8b. The controller corrects the voltage collapse which happens when the output load value is changed from 100 to 10 at 1.71 milliseconds. When the output load value is changed from 10 to 100, the time needed by the controller to correct the voltage collapse is 1.67 milliseconds. As understood from Fig. 8c, the voltage collapse due to 30% of change in the input voltage is corrected by controller at 1.35 milliseconds. The simulation results of the T1FL controlled buck converter are shown in Fig. 9. As shown in Fig. 9a, b and c, the settling time for the output voltage response of the converter is 2.6 milliseconds, the steady-state error of the converter is 0.7 V, the transient responses of the converter for load changes are 1.4 and 1.35 milliseconds, and the transient response of converter for input voltage change is 0.9 milliseconds. There isn’t any overshoot in the output voltage of the T1FL controlled buck converter.

J Intell Manuf (2012) 23:1023–1034

1031

(a)140

120

120

100

100

ess=1.95V

80

Vo(V )

Vo(V )

(a) 140

60

80 60

40

40

20

20

0

0

5

10

3.3ms

15

0

20

ess=0.7V

0

120

120

100

100

80

6.95V

7V 60

1.71ms

Vo(V )

(b)140

Vo(V )

(b) 140

40

1.67ms

10

5.6V

5.5V

1.4ms

1.35ms

20

5

10

15

0 5

20

10

15

20

Time ( ms )

(c) 140

(c) 140

120

120

100

100

2.1V

3.8V

80

Vo(V )

Vo(V )

20

60

Time ( ms )

1.35ms 60

80

40

20

20

5

10

15

20

Time ( ms )

0.9ms

60

40

0

15

Time ( ms )

80

40

20 0

5

2.6ms

Time ( ms )

0

5

10

15

20

Time ( ms )

Fig. 8 Simulation results of PI controlled buck converter. a Output voltage for the nominal case. b Output voltage under the load changes, c Output voltage under the input voltage change

Fig. 9 Simulation results of T1FL controlled buck converter. a Output voltage for the nominal case. b Output voltage under the load changes. c Output voltage under the input voltage change

Figure 10 shows the simulation results of the T2FL controlled buck converter. As shown in Fig. 10a, the settling time for the output voltage response of converter is 0.95 milliseconds, the steady-state error of converter is 0.38 V, and doesn’t appear any overshoot in the output voltage. The transient responses of the T2FL controlled converter when load value

changes from 100 to 10 and from 10 to 100 are obtained as 0.57 and 0.55 milliseconds, respectively, as understood from Fig. 10b. Figure 10c shows the transient response of the converter for 30% of the change in the input voltage and the transient response for this change is obtained as 0.3 milliseconds. From these results, it can be seen that the T2 FL

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(a) 140

(a) 400

120

350 300

100

ess=2.5V

80

Vo(V )

Vo(V )

250

ess=0.38V 60

200 150

40

100

20

50 0

0

0 0.95ms

5

10

15

20

0

Time ( ms )

5

10

15

20

Time ( ms )

4.27ms

(b) 400

(b) 140

350

120

300 100

3.8V

Vo(V )

Vo(V )

250 80

3.72V

60

8.4V

8.9V 200 150

0.57ms

40

100

20 0

50

5

10

15

0

20

Time ( ms )

5

10

15

20

Time ( ms )

(c) 140

(c) 400

120

350 300

100

0.8V

4.9V

250

80

0.3ms

Vo(V )

Vo(V )

2.3ms

2.4ms

0.55ms

60

200

1.67ms

150 40

100 20

50 0

5

10

15

20

Time ( ms )

Fig. 10 Simulation results of T2FL controlled buck converter. a Output voltage for the nominal case. b Output voltage under the load changes. c Output voltage under the input voltage change

controlled buck converter has better performance than both the PI controlled buck converter and T1FL controlled buck converter. The simulation results of the PI controlled boost converter for the three considered cases are shown in Fig. 11. From Fig. 11a, it can be seen that the settling-time, the

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0

5

10

15

20

Time ( ms )

Fig. 11 Simulation results of PI controlled boost converter. a Output voltage for the nominal case. b Output voltage under the load changes. c Output voltage under the input voltage change

overshoot and the steady-state error for the converter output are 4.27 milliseconds, 3.68% and 2.5 V, respectively. Figure 11b shows the converter behavior in the case of step load changes from 300 to 30 and from 30 to 300. In that case, the transient responses of the PI controlled boost converter are obtained as 2.4 milliseconds and 2.3 milliseconds,

J Intell Manuf (2012) 23:1023–1034

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(a) 400

(a)400

350

350

300

300

ess=1.8V

200

200

150

150

100

100

50

50

0

0

5

10 Time ( ms )

3.2ms

15

0

20

(b)400

350

350

300

300

5

10

Vo(V )

6.9V

7.3V 200 150

5.1V 200

100

50

50 10

0.68ms

0.7ms

1.6ms

100

5

15

0

20

5

10

Time ( ms )

15

(c) 400

350

350 300

300

2.4V

4.1V

250

Vo(V )

250

Vo(V )

20

Time ( ms )

(c) 400

200 1.3ms

200 0.6ms

150

150

100

100

50

50 0

20

5.3V

150

1.8ms

15

Time ( ms )

250

250

0

0

1.3ms

(b) 400

Vo(V )

ess=0.8V

250

Vo(V )

Vo(V )

250

0 5

10

15

20

5

10

15

20

Time ( ms )

Time ( ms )

Fig. 12 Simulation results of T1FL controlled boost converter. a Output voltage for the nominal case. b Output voltage under the load changes. c Output voltage under the input voltage change

respectively. The transient response under 30% of change in the input voltage is 1.67 milliseconds, as shown in Fig. 11c. The simulation results of T1FL controlled boost converter are given in Fig. 12. In Fig. 12a, it is shown that the settlingtime, the overshoot and the steady-state error of the converter

Fig. 13 Simulation results of T2FL controlled boost converter. a Output voltage for the nominal case. b Output voltage under the load changes. c Output voltage under the input voltage change

are 3.2 milliseconds, no overshoot and 1.8 V, respectively. The transient responses of the converter under the same load changes are obtained as 1.8 and 1.6 milliseconds, as shown in Fig. 12b. The transient response of the converter under the input voltage change is shown in Fig. 12c. The controller

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corrects the voltage collapse caused by this change at 1.3 milliseconds. The simulation results of the T2FL controlled boost converter are given in Fig. 13. As shown in Fig. 13a, b and c, the settling time for the output voltage response of the converter is 1.3 milliseconds, the steady-state error in the converter output is 0.8 V, the transient responses of the converter under the both load changes are 0.7 and 0.68 milliseconds, and the transient response of the converter under the input voltage change is 0.6 milliseconds. There isn’t any overshoot on the converter output. From these results, it can be understood that the performance of the T2FL controller is better than that of both the PI controller and T1FL controller for the control of the boost converter, as in the buck converter. Thus, the T2FL controller design method is highly suitable to apply to DC–DC converters, compared with the PI controller design and T1FL controller design.

Conclusions In this study, a T2FL controller was proposed for the control of the two main DC–DC converters: a buck converter and a boost converter to obtain a good performance and demonstrated that the T2FL controller could effectively control these converters. In order to determine the effectiveness of the T2FL controller on the performance of the DC–DC converters, the converters were also controlled using PI and T1FL controllers. To compare with the converter performances, the settling time, the overshoot, steady-state error, and the transient responses of the converter under the load change and the input voltage change were taken as the performance criteria. Simulation results showed that T1FL controller used for the control of the both DC–DC converters had a better performance in terms of the mentioned performance criteria than the PI controller under the three operating cases of the converters: the nominal case, the input voltage change case and the output load change. When compared with T1FL controller and T2FL controller, it was shown that the T2FL controller provided a better performance in the control of the converters because the T2FL controller was able to handle uncertainties in rules and parameters of input membership functions occurring T1FL controller. In conclusion, the

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simulation result confirmed that the T2FL controller was more suitable for application to DC–DC converters than both the PI controller and T1FL controller.

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