IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 33, NO. 1, JANUARY 2018
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Active Power Decoupling for Submodules of a Modular Multilevel Converter Zenghui Kong, Xin Huang, Ze Wang, Jian Xiong, and Kai Zhang
Abstract—The modular multilevel converter (MMC) is receiving wide acceptance in both high- and medium-voltage (MV) applications. However, due to the low (fundamental and second-order) frequency ripple powers in the submodule (SM) capacitors, large capacitance is required to smooth the SM voltage. The SM capacitors account for a large portion of volume and weight in the MMC system. Present methods (e.g., circulating current control, power channels linking upper and lower arms) cannot eliminate the fundamental and second-order ripple powers simultaneously. This paper investigates the feasibility of an active power decoupling technique for solving this issue. By adding a buck-type active power filter (APF) circuit (which contains another energy-storage capacitor), the low-frequency ripple powers can be transferred to the APF capacitor. This significantly reduces the SM voltage ripple and therefore the total capacitance of the SM. To enhance voltage ripple suppression, APF capacitor voltage reference is modified in a closed-loop manner, and a proportional-integral plus repetitive controller is proposed. Simulations and experimental results prove the validity of the method. A comparison with the traditional MMC shows that it can significantly reduce system volume and improve power density. The method is best suited for MV applications where power density is given a high priority. Index Terms—Active damping, active power decupling, active power filter (APF), modular multilevel converter (MMC), repetitive control, voltage ripple suppression.
I. INTRODUCTION HE modular multilevel converter (MMC) is a promising multilevel topology not only for high-voltage but also for medium-voltage (MV) applications. The latter encompass MV drives, offshore wind farms, MV dc systems for all-electric ships, power conditioners for railway traction feeders, rail interties, various power quality applications, etc. [1]–[7]. Compared with traditional multilevel converters, it is convenient for power expansion, and does not need isolated dc sources. However, due to its working principle, there are low frequency ripple powers in the submodule (SM) capacitors, of which the fundamental and second-order ones being the most significant [8], [9]. To keep the SM voltages smooth, the SM capacitors have to be designed
T
Manuscript received July 17, 2016; revised October 2, 2016 and December 12, 2016; accepted January 17, 2017. Date of publication January 31, 2017; date of current version October 6, 2017. This work was supported by the National Natural Science Foundation of China under Grant 51477063. Recommended for publication by Associate Editor J. Liu. The authors are with the School of Electrical and Electronic Engineering, Huazhong University of Science and Technology, Wuhan 430074 China (e-mail:
[email protected];
[email protected];
[email protected]. cn;
[email protected];
[email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TPEL.2017.2661539
large enough to withstand the ripple powers, thus increasing the system’s volume and weight, and even limiting the applications of the MMC [10], [11]. Typically, the SM capacitor can take up over 50% of the total size of each SM, and even more in its weight. For ac drive applications, common-mode injection methods have been used to remove the fundamental frequency ripple power. Specifically, high frequency common-mode voltages are injected in the ac output voltages, and circulating currents with the same frequency are injected into each phase [12]–[16]. In this way, fundamental frequency ripple power can be transformed to high frequency ones, which cause much smaller voltage ripples. Apart from complex calculation and control, a major drawback of these methods is significantly increased current stress (due to the circulating current injection). Besides, there will be little room in the modulation indices for common-mode voltage injection when the output frequency is close or equal to utility frequency, according to the constant V/Hz principle. For each phase, the second-order ripple powers of the SMs, the dc source, and the load should balance out. In light of this, the second-order ripple power in the SMs can be transferred to the dc source by injecting an appropriate amount of second-order circulating current into each phase. In [17]–[20], the injection of circulating current is carried out in an open-loop manner. In [21], the second-order circulating currents are transformed to dc components using a negative-sequence rotating frame, and PI controllers are used for closed-loop control. But this method is difficult to be applied in single-phase systems. In [22] and [23], proportional-resonant (PR) controllers are employed to control the second-order circulating currents, which are applicable for both single-phase and three-phase systems. Circulating current injection can reduce SM capacitor voltage ripple, but it increases the arm currents (and therefore current stress of the power devices). In addition, it cannot reduce the fundamental frequency ripple power in the SMs, which is the most significant one. Recently, some new methods were proposed to suppress the power/voltage ripple and reduce the SM capacitance. In [24], power channels are constructed between the upper and lower arms. Since the fundamental ripple powers are in opposite phase for the upper and lower arms, they can be eliminated altogether through the power channels. But isolating transformers are required in the power channels, and the second-order ripple powers cannot be removed with this method. In [10], stacked switched capacitor architecture is used to reduce the SM capacitance. But the device count is significant, and it will introduce second and higher harmonics to the SM dc-bus voltage.
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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 33, NO. 1, JANUARY 2018
This paper attempts to reduce the SM capacitors of MMCs by means of active power decoupling [25]–[28]. This technique has been developed to address the inherent second-order ripple power problem with single-phase systems. The basic idea is to use an active circuit to divert the low frequency ripple power in the main dc-link capacitor into another energy storage component (a capacitor or an inductor). A good review of active power decoupling technique can be found in [29]. Up to now, little study of active power decoupling for MMC applications has been done. In this paper, a buck-type active power filter (APF) topology is adopted and a capacitor is used for ripple energy storage. One challenge for the APF circuit is that it has to deal with the fundamental and second-order ripple powers simultaneously. A “PI + repetitive” control strategy is proposed to achieve this goal. Simulations and experiments show that this method can significantly reduce the total size of SM capacitors, while eliminating circulating current at the same time. The proposed method relies on instantaneous control of the voltages and currents. Therefore, it is best suited for MV applications where carrier-based modulation techniques and a relatively higher switching frequency are possible. Also, since the method does not “increase” the frequency of the ripple power, it is not intended for MV drives where the frequency of the ripple power can go near zero. The rest of this paper is organized as follows. Section II demonstrates the problem to be solved by presenting an analysis of the arm powers. Section III briefly introduces the active power decoupling technique, and selects an appropriate APF topology. Section IV discusses the control system for the APF circuit. Simulation/experimental results and a comparison study with the conventional MMC are presented in Section V. Section VI concludes this paper. II. RIPPLE POWER/VOLTAGE IN THE MMC Shown in Fig. 1 is a typical three-phase MMC with halfbridge SMs. Suppose the output voltage and current to be vx = Vx sin(ωt + θx ) ix = Ix sin(ωt + θx − ϕ)
(1)
where Vx (x = u, v, w) is peak output voltage, Ix is peak output current, ω is output frequency, ϕ is output power factor angle, and θx = θ, θ − 2π/3 or θ + 2π/3 according to the phase. The per-phase output power is then px = vx ix =
Vx Ix Vx Ix cos ϕ − cos(2ωt + 2θx − ϕ). (2) 2 2
The output power consists of a dc and a second-order component, corresponding to the average and pulsating powers of the load, respectively. The former is provided by the dc source (through dc component Iz x 0 of the circulating current iz x ). The latter can be considered as jointly supplied by the dc source (through second-order component Iz x 2 of the circulating current) and the SM capacitors.
Fig. 1.
Typical three-phase MMC topology.
Neglecting higher order harmonics, which are much smaller, circulating current iz x can be expressed as follows: iz x = Iz x 0 + Iz x 2 sin(2ωt + θ2x )
(3)
where θ2x is the phase angle of the circulating current. Then, the upper and lower arm currents ixp and ixn can be expressed as follows: ⎧ ixp = iz x + i2x = Iz x 0 + Iz x 2 sin(2ωt + θ2x ) ⎪ ⎪ ⎨ + I2x sin(ωt + θx − ϕ) (4) ix ⎪ ⎪ ⎩ixn = izIxx − 2 = Iz x 0 + Iz x 2 sin(2ωt + θ2x ) − 2 sin(ωt + θx − ϕ). If the resistance of arm inductor R is ignored, arm voltage can be written as follows: vxp = 12 Vdc − vx = 12 Vdc − Vx sin (ωt + θx ) (5) vxn = 12 Vdc + vx = 12 Vdc + Vx sin (ωt + θx ) where Vdc is the dc-link voltage of the MMC. The arm powers, or total capacitor powers of the upper and lower arms, can be calculated by multiplying arm current and arm voltage: ⎧ pxp = V d 4c I x sin(ωt + θx − ϕ) − Vx Iz x 0 sin(ωt + θx ) ⎪ ⎪ ⎪ ⎪ − V x I2z x 2 cos(ωt + θ2x − θx ) + V d c I2z x 2 sin(2ωt + θ2x ) ⎪ ⎪ ⎪ ⎨ + V x I x cos(2ωt + 2θx − ϕ) + V x I z x 2 cos(3ωt + θ2x +θx) 4 2 ⎪ pxn = − V d c I x sin(ωt + θx − ϕ) + Vx Iz x 0 sin(ωt + θx ) ⎪ 4 ⎪ ⎪ ⎪ + V x I z x 2 cos(ωt + θ2x − θx ) + V d c I z x 2 sin(2ωt + θ2x ) ⎪ 2 2 ⎪ ⎩ + V x4I x cos(2ωt + 2θx − ϕ) − V x I2z x 2 cos(3ωt + θ2x +θx). (6) As shown in (6), there are fundamental, second, and third harmonics in the arm powers. Notice that there is no dc power component in steady state. Since the third harmonic is relatively small, this paper will focus on the fundamental and second-order
KONG et al.: ACTIVE POWER DECOUPLING FOR SUBMODULES OF A MODULAR MULTILEVEL CONVERTER
Fig. 2.
Active power decoupling for a single-phase system.
ripple powers, although the proposed method can also deal with higher order harmonics if necessary. Ripple powers in upper and lower arms can cause voltage ripples in SM capacitors, of which the most significant components also being fundamental and second-order ones [8]. Excessive ripple voltage may cause overvoltage, reduce lifetime of power devices, increase circulating current, and affect waveforms of output voltage/current [9], [30]. In conventional MMCs, SM capacitors are designed fairly large to limit these low frequency voltage ripples, making the whole MMC system bulky and heavy. III. PROPOSED ACTIVE POWER DECOUPLING METHOD FOR THE MMC Active power decoupling technique was originally developed to address the second-order ripple power problem of singlephase systems, such as light-emitting diodes drives, photovoltaic power converters, electric vehicle battery chargers, etc. [29]. In those single-phase systems, the tight voltage ripple tolerance at the dc link (which is necessary for proper operation of the whole converter) usually leads to an overdesign of the main capacitor whose energy storage capability far exceeds the need for absorbing the second-order ripple power (in other word, its energy storage capability is not fully utilized). With active power decoupling technique, an APF circuit is used to divert the ripple power of the dc link into another energy storage component (a capacitor or an inductor). Since the latter is not directly connected to the dc link, it allows substantial fluctuation of the voltage/current (in other word, its energy storage capability can be fully utilized). Therefore, its size can be much smaller. Meanwhile, the main filter component(s) at the dc link can be shrunk significantly since the ripple power has been removed. Fig. 2 shows an application of active power decoupling technique for a single-phase pulse width modulation (PWM) rectifier. Considering efficiency, volume, weight, and cost, a capacitor is superior to an inductor to serve as the energy storage component in the APF. For capacitive energy storage, buck, boost, buck–boost, and capacitor-split type APF topologies can be used [29]. To limit the types of power devices, it is advantageous for the power devices in APF circuit to have the same voltage and current ratings with those in the original half-bridge SMs. In this paper, a buck-type topology is selected (see Fig. 3). The buck-type decoupling circuit consists of one phase leg (T1 and T2 ), an energy storage capacitor Ccs , and a smoothing
Fig. 3.
127
Proposed MMC SM with active power decoupling.
inductor Lcs . A dc-link capacitor Cs is still needed to filter the switching harmonics, although the capacitance can be much smaller than in the original SM. Since Cs behaves like a voltage source, the control of the APF circuit is virtually independent of the normal control of the SM that is required for the MMC operation. Voltage vcs of APF capacitor Ccs is controlled by T1 and T2 . If controlled properly, the fundamental and second-order ripple powers coming from the output port of the SM can be fully absorbed by the APF circuit, leaving the dc-link capacitor Cs with virtually no low-frequency voltage ripples. Working principles, operating modes, and control strategies of the buck-type decoupling circuit when applied in single-phase rectifiers have been studied in [25]–[28]. In MMC applications though, the components of ripple power are more complicated and APF circuit has to compensate fundamental and second harmonic ripple powers at the same time, which poses a more complex task. IV. WORKING PRINCIPAL OF THE PROPOSED METHOD As shown in (6), ripple powers in the upper and lower arms are similar except that some items have opposite signs. For an APF control strategy, there is no difference between the upper arm and lower arm. Thus, only the upper arm APF control strategy will be analyzed. Consider the ripple power within each SM as only containing the fundamental and second-order components, i.e. Vdc Ix Vx Iz x 0 sin(ωt + θx − ϕ) − sin(ωt + θx ) 4N N Vdc Iz x 2 Vx Iz x 2 cos(ωt + θ2x − θx ) + sin(2ωt + θ2x ) − 2N 2N Vx Ix cos(2ωt + 2θx − ϕ) (7) + 4N where N is the number of SMs in each arm. Suppose that the APF capacitor is to absorb all the ripple power, therefore pripple =
dvcs vcs = pripple . dt Integrating both sides yields 1 Ccs vc2s = pripple = er + Eb 2 Ccs
(8)
(9)
where er is the ripple energy of each SM, and Eb is a constant. Based on (7) and (9), the APF capacitor voltage vcs and current
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Fig. 4.
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 33, NO. 1, JANUARY 2018
Closed-loop compensation of the APF capacitor voltage reference.
ics can be calculated as follows: 2 vcs = (er + Eb ) Ccs
− V d c I x cos(ωt + θx − ϕ) + 2V x I z x 0 cos(ωt + θx ) N ωCc s
2N ω C c s
V x Iz x 2 V d c Iz x 2 = − N ω C c s sin(ωt + θ2x − θx ) − 2N ω C c s cos(2ωt + θ2x ) 2E b V x Ix + 4N ω C c s sin(2ωt + 2θx − ϕ) + C c s (10) ics =
pripple . vcs
(11)
The constant Eb determines the dc offset of vcs , which in turn affects energy storage efficiency. Equation (10) can serve as the voltage reference for APF capacitor Ccs . A. Closed-Loop Compensation of Voltage Reference Parameter deviations, measurement errors, and control delay in practical applications will affect the precision of the voltage reference that is calculated based on (10). The smoothing inductor Lcs also will incur a small amount of ripple power. The voltage reference should be corrected in a closed-loop manner to achieve good active power decoupling. Assume that the error in voltage reference arises from inaccurate ripple energy er , which is then to be compensated by ecom . Therefore, (9) should be revised as follows: 1 Ccs vc2s = er + ecom +Eb = er + Eb 2
(12)
where er is the compensated ripple energy to be used for calculating the voltage reference. Compensation of er is based on residual ripple power es in the SM capacitor Cs , which should be zero if compensation is perfect. Suppose the instantaneous and average voltages of Cs are vds and Vds , respectively, then the ripple power es can be calculated as follows: es =
1 1 2 2 Cs vds − Cs Vds . 2 2
(13)
The basic idea of the closed-loop reference compensation is shown in Fig. 4. Suppose the compensated voltage reference can be tracked perfectly (with the voltage control system described later in Section IV-C), the ripple power diverted from the main SM capacitor Cs into the APF capacitor Ccs would be er = er + ecom . If the real SM ripple power is er real , then the residual ripple power in Cs is es = er
real
− er = er
real
− er − ecom .
(14)
Fig. 5.
Bode diagram of the two paralleled quasi-PR compensators.
In this light, the plant model as seen by the closed-loop compensators is simply unity. Two proportional quasi-resonant (quasi-PR) compensators are paralleled to generate the compensating component ecom . Transfer function for each of the compensator takes the following form [31]: GPR (s) = kp +
2kr ωc s s2 + 2ωc s + ω02
(15)
where ω0 is the resonance frequency, and ωc is called cutoff frequency. Compared with a PR compensator, the gain of the quasi-PR compensator at ω0 becomes finite, but the passband is wider, making the quasi-PR compensator more robust against frequency drift. Resonance frequencies of the two quasi-PR compensators are set at fundamental frequency and secondorder frequency, respectively. Fig. 5 shows the Bode diagram of the two parallel quasi-PR compensators as a whole. B. Parameter Design To minimize Ccs , the range of its voltage fluctuation should be maximized. For buck-type APF, this maximum range is 0 ≤ vcs ≤ Vds .
(16)
Here, the SM voltage is taken as its average value for simplicity, since the ripple voltage will be suppressed substantially by the APF circuit. The ripple energy er in (10) can be expressed as follows: Vdc Ix Vx Iz x 0 cos(ωt + θx ) cos(ωt + θx − ϕ) + Nω 4N ω Vdc Iz x 2 Vx Iz x 2 sin(ωt + θ2x − θx ) − cos(2ωt + θ2x ) − 2N ω 4N ω Vx Ix sin(2ωt + 2θx − ϕ). (17) + 8N ω
er = −
It is purely ac, but the positive and negative peak values may be different. Suppose the positive and negative peaks of er to be Er m ax (positive value) and Er m in (negative value), respectively, then the constraints given by (16) can be translated
KONG et al.: ACTIVE POWER DECOUPLING FOR SUBMODULES OF A MODULAR MULTILEVEL CONVERTER
Fig. 6. (a) APF capacitor voltage v c s and (b) current ic s with different values of K .
into
Er
m in
+ Eb = − |Er
Er
m ax
+ Eb ≤ 12 Ccs Vd2s
or Eb ≥ |Er
m in |
Ccs ≥
(Er
2 V d2s
= −Er m ax
m in |
+ Eb ≥ 0
(18)
m in
+ Eb ) ≥
2 V d2s
(Er
m ax
− Er
m in ).
(19)
As revealed by (19), a smaller Eb can reduce Ccs and therefore increase energy storage efficiency, but Eb has to be greater or equal than the absolute value of Er m in (otherwise vcs will go below zero). For further analysis on the relationship between energy storage efficiency and constant Eb , the following energy buffering ratio K is defined: K=
Er m ax − Er m in , (0 < K < 1). Er m ax + Eb
(20)
In (20), the numerator represents the ripple energy that has to be handled (i.e., the requirement on Ccs ), the denominator represents the maximum ripple energy that the APF capacitor can store (i.e., the ability of Ccs ). Setting Eb = |Er m in | yields K = 1, which means 100% utilization of the APF capacitor Ccs . Setting Eb > |Er m in | yields K < 1, which leaves some margin in the utilization of Ccs . Constant Eb can then be calculated from K according to (20): (1 − K)Er
m ax
− Er
m in
. (21) K Waveforms of APF capacitor voltage vcs and current ics with different values of K are shown in Fig. 6. Harmonic content Eb =
129
Fig. 7. (a) Harmonic content of APF capacitor voltage and (b) peak current of APF capacitor with different values of K .
of vcs and peak value of ics are also given in Fig. 7. It can be seen that when K = 1, APF capacitor Ccs is fully charged and discharged. The harmonic content of the capacitor voltage is the heaviest, which is the most difficult to track. The ripple current is also the largest, resulting in the highest current stress. As K decreases from 1, the capacitor is not fully utilized, but the voltage and current become smoother with smaller peak-to-peak values. Taking into consideration the factors mentioned above, K should be carefully designed. In this study, K = 0.98 is adopted. After K is chosen, the APF capacitor Ccs can be readily calculated from (19) and (22) as follows: 2 (Er m ax + Eb ) Vd2s 2 (1 − K)Er m ax − Er = 2 Er m ax + Vd s K
Ccs =
m in
.
(22)
In practical applications, metalized film capacitors [32] which have very low equivalent series resistance and high ripple current tolerance, and which have already been used in many MMC applications, can readily serve as the APF capacitor. Next to be designed is the smoothing inductor Lcs . To achieve good switching harmonics suppression, the LC resonant frequency fL C is usually 1/10 – 1/5 of switching frequency fAPF : fL C
1 √ = = λfAPF , 2π Lcs Ccs
1 1
